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Differential D136396

[X86] Enable reassociation for ADD instructions
ClosedPublic

Authored by Carrot on Oct 20 2022, 5:07 PM.

Details

Reviewers
spatel
craig.topper
RKSimon
pengfei
Commits
rGd24c93cc4107: [X86] Enable reassociation for ADD instructions
Summary

ADD is an associative and commutative operation, so we can do reassociation for it.

Diff Detail

Event Timeline

Carrot created this revision.Oct 20 2022, 5:07 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 20 2022, 5:07 PM
Herald added subscribers: StephenFan, pengfei, hiraditya. · View Herald Transcript
Carrot requested review of this revision.Oct 20 2022, 5:07 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 20 2022, 5:07 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
craig.topper added reviewers: RKSimon, pengfei.Oct 20 2022, 5:24 PM
Harbormaster completed remote builds in B193374: Diff 469414.Oct 20 2022, 6:31 PM
pengfei added inline comments.Oct 20 2022, 11:56 PM
llvm/test/CodeGen/X86/reassociate-add.ll
4

No idea if we intended to not do reassociation in ADD instructions.
Is there problem when unexpected overflow/underflow may be generated during reassociation?

RKSimon added inline comments.Oct 21 2022, 6:49 AM
llvm/test/CodeGen/X86/reassociate-add.ll
2

Drop -mcpu=x86-64

Pre-commit these test with current codegen to trunk and rebase to show the patch diffs.

4

Not that I can think of - EFLAGS will be the same and we already handles the $dst=$src0 constraint

llvm/test/CodeGen/X86/xmulo.ll
1871

Annoying - normally I'd expect reassociation to help us reduce stack use

spatel added inline comments.Oct 21 2022, 7:01 AM
llvm/test/CodeGen/X86/reassociate-add.ll
4

I was working on this a long time ago (~2015), so it's hard to remember exactly, but I don't think there was a fundamental reason to exclude integer ADD.

It just seemed like it did not have much potential gain with the limited register set and could interfere with other transforms like LEA formation.

If there's evidence that this improves something (and doesn't cause regressions), then it should be ok.

xbolva00 added a subscriber: xbolva00.Oct 21 2022, 7:28 AM
xbolva00 added inline comments.
llvm/test/CodeGen/X86/lea-opt-cse4.ll
105–111

New leas, +1

Carrot added inline comments.Oct 21 2022, 11:14 AM
llvm/test/CodeGen/X86/reassociate-add.ll
4

EFLAGS may be different. Suppose we are adding three bytes, 250 + 10 + 10.

  • If we add them in the order (250 + 10) + 10, the first ADD generates carry/overflow flags, the second ADD doesn't generate carry/overflow.
  • If we add them in the order (10 + 10) + 250, the first ADD doesn't generates carry/overflow flags, the second ADD generates these flags.

So we need to check if the definition of EFLAGS is dead.

Maybe this is the reason @spatel didn't add ADD instructions in 2015.

Thank @pengfei for the reminds.

craig.topper added inline comments.Oct 21 2022, 11:15 AM
llvm/test/CodeGen/X86/reassociate-add.ll
4

Scalar MUL would have the same EFLAGs issue. So hopefully we already solved it?

Carrot added inline comments.Oct 21 2022, 11:51 AM
llvm/test/CodeGen/X86/reassociate-add.ll
4

Indeed. So IMULrr should be handled similar to ADD. But I can't find any code for it :(

craig.topper added inline comments.Oct 21 2022, 11:55 AM
llvm/lib/Target/X86/X86InstrInfo.cpp
8700

Here is the EFLAGS code

Carrot added inline comments.Oct 21 2022, 1:12 PM
llvm/lib/Target/X86/X86InstrInfo.cpp
8700

Thanks for the pointer. So now EFLAGS is not a problem for ADD.

Carrot mentioned this in D136501: [X86] New test case for reassociation of ADD instructions..Oct 21 2022, 2:21 PM
Carrot added inline comments.Oct 21 2022, 3:01 PM
llvm/test/CodeGen/X86/reassociate-add.ll
2

Test case has been sent out as https://reviews.llvm.org/D136501.

-mcpu=x86-64 is required because in MachineCombiner the reassociation is performed either the new sequence reduce latency, or function doSubstitute returns true. In its implementation, if -mcpu is not specified, the target will not have a valid schedule model, and then doSubstitute returns true, and reassociation is performed.

bool MachineCombiner::doSubstitute(unsigned NewSize, unsigned OldSize,
                                   bool OptForSize) {
  if (OptForSize && (NewSize < OldSize))
    return true;
  if (!TSchedModel.hasInstrSchedModelOrItineraries())
    return true;
  return false;
}
llvm/test/CodeGen/X86/xmulo.ll
1871

Agree it is annoying.
But I think the impact of reassociation to register allocation is quite randomly, it depends on if the operands can be killed by the first instruction, and later be scheduled earlier to shorten the operands' live range.

In this specific case, although it increases stack use, it reduces register spill/reload instructions.

$ git diff origin/main xmulo.ll | grep "+;" | wc
    104     518    3715
$ git diff origin/main xmulo.ll | grep "\-;" | wc
    108     542    3846
RKSimon added inline comments.Oct 22 2022, 1:06 AM
llvm/test/CodeGen/X86/reassociate-add.ll
2

OK - that makes sense!

4

Sorry, bad description - EFLAGS will be handled (we check they are ignored...) the same as the existing ops

Carrot mentioned this in rGf298bfb09b74: [X86] New test case for reassociation of ADD instructions..Oct 24 2022, 10:49 AM
Carrot updated this revision to Diff 470288.Oct 24 2022, 2:10 PM

Rebase test cases.

Harbormaster completed remote builds in B194029: Diff 470288.Oct 24 2022, 4:28 PM
pengfei accepted this revision.Oct 24 2022, 6:45 PM

LGTM.

This revision is now accepted and ready to land.Oct 24 2022, 6:45 PM
Closed by commit rGd24c93cc4107: [X86] Enable reassociation for ADD instructions (authored by Carrot). · Explain WhyOct 25 2022, 5:48 PM
This revision was automatically updated to reflect the committed changes.
Carrot added a commit: rGd24c93cc4107: [X86] Enable reassociation for ADD instructions.
JDevlieghere added subscribers: Orlando, jmorse, JDevlieghere.Oct 26 2022, 1:04 PM

Hey, this broke a Dexter test: https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/47878/

@jmorse and/or @Orlando can you help make sure this isn't a Dexter issue?

JDevlieghere added a comment.Oct 26 2022, 1:14 PM

I've temporarily disabled the test in 2234f582c91e8511443f3e71b6e06abe3e47db4b

JDevlieghere mentioned this in rG2234f582c91e: [dexter] Temporary disable optnone-simple-functions.Oct 26 2022, 1:15 PM
Carrot added a comment.Oct 26 2022, 1:29 PM
In D136396#3886403, @JDevlieghere wrote:

Hey, this broke a Dexter test: https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/47878/

@jmorse and/or @Orlando can you help make sure this isn't a Dexter issue?

Here is the patch https://reviews.llvm.org/D136778 waiting for review.

jmorse added a comment.Oct 26 2022, 1:50 PM

Enjoyably not a Dexter bug -- the output with -v indicates that there's a sequence in the "main" function of that test where the main_result variable becomes unavailable with this patch. That would appear to be because TargetInstrInfo::reassociateOps isn't instrumented for instruction referencing, which I'll file as a fault. This patch just exposes that omission.

Sadly though, this Dexter test isn't supposed to be checking for this sort of error, it's supposed to be making sure the other functions in the file have reasonable debug-info. The only reason we see this is because we didn't mark main with __attribute__((optnone)). I'll add that attribute and un-xfail the test as I'm out of cycles; thanks for pinging!

LuoYuanke added a subscriber: LuoYuanke.Jan 16 2023, 7:57 PM

It seems this patch cause spec2017/548 performance regression, as it increased register pressure after reassociating ADD operation.

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Diff 470663

llvm/lib/Target/X86/X86InstrInfo.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 8,691 Lines • ▼ Show 20 Linesbool X86InstrInfo::hasReassociableOperands(const MachineInstr &Inst,
// the EFLAGS register. That operand must be both defined here and never // the EFLAGS register. That operand must be both defined here and never
// used; ie, it must be dead. If the EFLAGS operand is live, then we can // used; ie, it must be dead. If the EFLAGS operand is live, then we can
// not change anything because rearranging the operands could affect other // not change anything because rearranging the operands could affect other
// instructions that depend on the exact status flags (zero, sign, etc.) // instructions that depend on the exact status flags (zero, sign, etc.)
// that are set by using these particular operands with this operation. // that are set by using these particular operands with this operation.
const MachineOperand *FlagDef = Inst.findRegisterDefOperand(X86::EFLAGS); const MachineOperand *FlagDef = Inst.findRegisterDefOperand(X86::EFLAGS);
assert((Inst.getNumDefs() == 1 || FlagDef) && assert((Inst.getNumDefs() == 1 || FlagDef) &&
"Implicit def isn't flags?"); "Implicit def isn't flags?");
if (FlagDef && !FlagDef->isDead()) if (FlagDef && !FlagDef->isDead())
craig.topperUnsubmitted
Not Done
ReplyInline Actions

Here is the EFLAGS code

craig.topper: Here is the EFLAGS code
CarrotAuthorUnsubmitted
Done
ReplyInline Actions

Thanks for the pointer. So now EFLAGS is not a problem for ADD.

Carrot: Thanks for the pointer. So now EFLAGS is not a problem for ADD.
return false; return false;
return TargetInstrInfo::hasReassociableOperands(Inst, MBB); return TargetInstrInfo::hasReassociableOperands(Inst, MBB);
} }
// TODO: There are many more machine instruction opcodes to match: // TODO: There are many more machine instruction opcodes to match:
// 1. Other data types (integer, vectors) // 1. Other data types (integer, vectors)
// 2. Other math / logic operations (xor, or) // 2. Other math / logic operations (xor, or)
// 3. Other forms of the same operation (intrinsics and other variants) // 3. Other forms of the same operation (intrinsics and other variants)
bool X86InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const { bool X86InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const {
switch (Inst.getOpcode()) { switch (Inst.getOpcode()) {
case X86::ADD8rr:
case X86::ADD16rr:
case X86::ADD32rr:
case X86::ADD64rr:
case X86::AND8rr: case X86::AND8rr:
case X86::AND16rr: case X86::AND16rr:
case X86::AND32rr: case X86::AND32rr:
case X86::AND64rr: case X86::AND64rr:
case X86::OR8rr: case X86::OR8rr:
case X86::OR16rr: case X86::OR16rr:
case X86::OR32rr: case X86::OR32rr:
case X86::OR64rr: case X86::OR64rr:
▲ Show 20 Lines • Show All 1,003 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll

Show All 31 Lines
; CHECK-NEXT: leaq (%rax,%r8), %r10 ; CHECK-NEXT: leaq (%rax,%r8), %r10
; CHECK-NEXT: addq %r14, %rdi ; CHECK-NEXT: addq %r14, %rdi
; CHECK-NEXT: addq %r10, %r10 ; CHECK-NEXT: addq %r10, %r10
; CHECK-NEXT: bswapq %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: addq %r14, %r10 ; CHECK-NEXT: addq %r14, %r10
; CHECK-NEXT: addq %rbx, %r11 ; CHECK-NEXT: addq %rbx, %r11
; CHECK-NEXT: leaq (%rsi,%rdx), %rbx ; CHECK-NEXT: leaq (%rsi,%rdx), %rbx
; CHECK-NEXT: addq %rdi, %rbx ; CHECK-NEXT: addq %rdi, %rbx
; CHECK-NEXT: addq %rdi, %r11
; CHECK-NEXT: addq %rbx, %r11 ; CHECK-NEXT: addq %rbx, %r11
; CHECK-NEXT: addq %rax, %rax ; CHECK-NEXT: addq %rax, %rax
; CHECK-NEXT: addq %r10, %rax ; CHECK-NEXT: addq %r10, %rax
; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: addq %rdi, %r11
; CHECK-NEXT: addq %r11, %r8 ; CHECK-NEXT: addq %r11, %r8
; CHECK-NEXT: addq %r10, %rax ; CHECK-NEXT: addq %r10, %rax
; CHECK-NEXT: addq %r11, %rax ; CHECK-NEXT: addq %r11, %rax
; CHECK-NEXT: bswapq %rbx ; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: leaq (%rdi,%rsi), %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: addq %rdx, %r11
; CHECK-NEXT: leaq (%rdi,%rsi), %rdx
; CHECK-NEXT: addq %r8, %rdx
; CHECK-NEXT: addq %r8, %r11 ; CHECK-NEXT: addq %r8, %r11
; CHECK-NEXT: addq %rdx, %rbx ; CHECK-NEXT: addq %rdx, %r11
; CHECK-NEXT: addq %r11, %rbx
; CHECK-NEXT: leaq (%r10,%rcx), %rdx ; CHECK-NEXT: leaq (%r10,%rcx), %rdx
; CHECK-NEXT: addq %rdx, %rdx ; CHECK-NEXT: addq %rdx, %rdx
; CHECK-NEXT: addq %rax, %rdx ; CHECK-NEXT: addq %rax, %rdx
; CHECK-NEXT: movq X(%rip), %r11 ; CHECK-NEXT: addq %r11, %r9
; CHECK-NEXT: addq %r8, %rbx
; CHECK-NEXT: addq %rbx, %r9
; CHECK-NEXT: addq %rax, %rdx ; CHECK-NEXT: addq %rax, %rdx
; CHECK-NEXT: addq %rbx, %rdx ; CHECK-NEXT: addq %r11, %rdx
; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: bswapq %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: leaq (%r8,%rdi), %rbx
; CHECK-NEXT: addq %r9, %rbx
; CHECK-NEXT: addq %rsi, %r11 ; CHECK-NEXT: addq %rsi, %r11
; CHECK-NEXT: addq %rbx, %r11 ; CHECK-NEXT: leaq (%r8,%rdi), %rsi
; CHECK-NEXT: addq %r9, %rsi
; CHECK-NEXT: addq %r9, %r11
; CHECK-NEXT: addq %rsi, %r11
; CHECK-NEXT: leaq (%rax,%r10), %rsi ; CHECK-NEXT: leaq (%rax,%r10), %rsi
; CHECK-NEXT: addq %rsi, %rsi ; CHECK-NEXT: addq %rsi, %rsi
; CHECK-NEXT: addq %rdx, %rsi ; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: addq %r9, %r11
; CHECK-NEXT: addq %r11, %rcx ; CHECK-NEXT: addq %r11, %rcx
; CHECK-NEXT: addq %rdx, %rsi ; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: addq %r11, %rsi ; CHECK-NEXT: addq %r11, %rsi
; CHECK-NEXT: bswapq %rbx ; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: leaq (%r9,%r8), %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: addq %rdi, %r11
; CHECK-NEXT: leaq (%r9,%r8), %rdi
; CHECK-NEXT: addq %rcx, %rdi
; CHECK-NEXT: addq %rcx, %r11 ; CHECK-NEXT: addq %rcx, %r11
; CHECK-NEXT: addq %rdi, %rbx ; CHECK-NEXT: addq %rdi, %r11
; CHECK-NEXT: addq %r11, %rbx
; CHECK-NEXT: leaq (%rdx,%rax), %rdi ; CHECK-NEXT: leaq (%rdx,%rax), %rdi
; CHECK-NEXT: addq %rdi, %rdi ; CHECK-NEXT: addq %rdi, %rdi
; CHECK-NEXT: addq %rsi, %rdi ; CHECK-NEXT: addq %rsi, %rdi
; CHECK-NEXT: movq X(%rip), %r11 ; CHECK-NEXT: addq %r11, %r10
; CHECK-NEXT: addq %rcx, %rbx
; CHECK-NEXT: addq %rbx, %r10
; CHECK-NEXT: addq %rsi, %rdi ; CHECK-NEXT: addq %rsi, %rdi
; CHECK-NEXT: addq %rbx, %rdi ; CHECK-NEXT: addq %r11, %rdi
; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: bswapq %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: leaq (%rcx,%r9), %rbx
; CHECK-NEXT: addq %r10, %rbx
; CHECK-NEXT: addq %r8, %r11 ; CHECK-NEXT: addq %r8, %r11
; CHECK-NEXT: addq %rbx, %r11 ; CHECK-NEXT: leaq (%rcx,%r9), %r8
; CHECK-NEXT: addq %r10, %r8
; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: addq %r8, %r11
; CHECK-NEXT: leaq (%rsi,%rdx), %r8 ; CHECK-NEXT: leaq (%rsi,%rdx), %r8
; CHECK-NEXT: addq %r8, %r8 ; CHECK-NEXT: addq %r8, %r8
; CHECK-NEXT: addq %rdi, %r8 ; CHECK-NEXT: addq %rdi, %r8
; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: addq %r11, %rax ; CHECK-NEXT: addq %r11, %rax
; CHECK-NEXT: addq %rdi, %r8 ; CHECK-NEXT: addq %rdi, %r8
; CHECK-NEXT: addq %r11, %r8 ; CHECK-NEXT: addq %r11, %r8
; CHECK-NEXT: bswapq %rbx ; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: leaq (%r10,%rcx), %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: addq %r9, %r11
; CHECK-NEXT: leaq (%r10,%rcx), %r9
; CHECK-NEXT: addq %rax, %r9
; CHECK-NEXT: addq %rax, %r11 ; CHECK-NEXT: addq %rax, %r11
; CHECK-NEXT: addq %r9, %rbx ; CHECK-NEXT: addq %r9, %r11
; CHECK-NEXT: addq %r11, %rbx
; CHECK-NEXT: leaq (%rdi,%rsi), %r9 ; CHECK-NEXT: leaq (%rdi,%rsi), %r9
; CHECK-NEXT: addq %r9, %r9 ; CHECK-NEXT: addq %r9, %r9
; CHECK-NEXT: addq %r8, %r9 ; CHECK-NEXT: addq %r8, %r9
; CHECK-NEXT: movq X(%rip), %r11 ; CHECK-NEXT: addq %r11, %rdx
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: addq %rbx, %rdx
; CHECK-NEXT: addq %r8, %r9 ; CHECK-NEXT: addq %r8, %r9
; CHECK-NEXT: addq %rbx, %r9 ; CHECK-NEXT: addq %r11, %r9
; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: bswapq %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: leaq (%rax,%r10), %rbx
; CHECK-NEXT: addq %rdx, %rbx
; CHECK-NEXT: addq %rcx, %r11 ; CHECK-NEXT: addq %rcx, %r11
; CHECK-NEXT: addq %rbx, %r11 ; CHECK-NEXT: leaq (%rax,%r10), %rcx
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %rdx, %r11
; CHECK-NEXT: addq %rcx, %r11
; CHECK-NEXT: leaq (%r8,%rdi), %rcx ; CHECK-NEXT: leaq (%r8,%rdi), %rcx
; CHECK-NEXT: addq %rcx, %rcx ; CHECK-NEXT: addq %rcx, %rcx
; CHECK-NEXT: addq %r9, %rcx ; CHECK-NEXT: addq %r9, %rcx
; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: addq %rdx, %r11
; CHECK-NEXT: addq %r11, %rsi ; CHECK-NEXT: addq %r11, %rsi
; CHECK-NEXT: addq %r9, %rcx ; CHECK-NEXT: addq %r9, %rcx
; CHECK-NEXT: addq %r11, %rcx ; CHECK-NEXT: addq %r11, %rcx
; CHECK-NEXT: bswapq %rbx ; CHECK-NEXT: movq X(%rip), %r11
; CHECK-NEXT: leaq (%rdx,%rax), %r11 ; CHECK-NEXT: bswapq %r11
; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: leaq (%rdx,%rax), %r10
; CHECK-NEXT: addq %rsi, %r10
; CHECK-NEXT: addq %rsi, %r11 ; CHECK-NEXT: addq %rsi, %r11
; CHECK-NEXT: addq %r10, %rbx ; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: addq %r11, %rbx
; CHECK-NEXT: leaq (%r9,%r8), %r10 ; CHECK-NEXT: leaq (%r9,%r8), %r10
; CHECK-NEXT: addq %r10, %r10 ; CHECK-NEXT: addq %r10, %r10
; CHECK-NEXT: addq %rcx, %r10 ; CHECK-NEXT: addq %rcx, %r10
; CHECK-NEXT: movq X(%rip), %r14 ; CHECK-NEXT: addq %r11, %rdi
; CHECK-NEXT: addq %rsi, %rbx
; CHECK-NEXT: addq %rbx, %rdi
; CHECK-NEXT: addq %rcx, %r10 ; CHECK-NEXT: addq %rcx, %r10
; CHECK-NEXT: addq %rbx, %r10 ; CHECK-NEXT: addq %r11, %r10
; CHECK-NEXT: bswapq %r14 ; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: leaq (%rsi,%rdx), %r11 ; CHECK-NEXT: bswapq %rbx
; CHECK-NEXT: addq %rdi, %r11 ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: addq %rax, %r14 ; CHECK-NEXT: leaq (%rsi,%rdx), %rax
; CHECK-NEXT: addq %r11, %r14 ; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: addq %rdi, %rbx
; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: leaq (%rcx,%r9), %r11 ; CHECK-NEXT: leaq (%rcx,%r9), %r11
; CHECK-NEXT: addq %r11, %r11 ; CHECK-NEXT: addq %r11, %r11
; CHECK-NEXT: addq %r10, %r11 ; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: movq X(%rip), %rax ; CHECK-NEXT: addq %rbx, %r8
; CHECK-NEXT: addq %rdi, %r14
; CHECK-NEXT: addq %r14, %r8
; CHECK-NEXT: addq %r10, %r11 ; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: addq %r14, %r11 ; CHECK-NEXT: addq %rbx, %r11
; CHECK-NEXT: movq X(%rip), %rax
; CHECK-NEXT: bswapq %rax ; CHECK-NEXT: bswapq %rax
; CHECK-NEXT: leaq (%rdi,%rsi), %rbx
; CHECK-NEXT: addq %r8, %rbx
; CHECK-NEXT: addq %rdx, %rax ; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rbx, %rax ; CHECK-NEXT: leaq (%rdi,%rsi), %rdx
; CHECK-NEXT: addq %r8, %rdx
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: leaq (%r10,%rcx), %rdx ; CHECK-NEXT: leaq (%r10,%rcx), %rdx
; CHECK-NEXT: addq %rdx, %rdx ; CHECK-NEXT: addq %rdx, %rdx
; CHECK-NEXT: addq %r11, %rdx ; CHECK-NEXT: addq %r11, %rdx
; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: addq %rax, %r9 ; CHECK-NEXT: addq %rax, %r9
; CHECK-NEXT: addq %r11, %rdx ; CHECK-NEXT: addq %r11, %rdx
; CHECK-NEXT: addq %rax, %rdx ; CHECK-NEXT: addq %rax, %rdx
; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: bswapq %rbx ; CHECK-NEXT: bswapq %rbx
; CHECK-NEXT: addq %rsi, %rbx
; CHECK-NEXT: leaq (%r8,%rdi), %rax ; CHECK-NEXT: leaq (%r8,%rdi), %rax
; CHECK-NEXT: addq %r9, %rax ; CHECK-NEXT: addq %r9, %rax
; CHECK-NEXT: addq %rsi, %rbx ; CHECK-NEXT: addq %r9, %rbx
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: leaq (%r11,%r10), %rax ; CHECK-NEXT: leaq (%r11,%r10), %rax
; CHECK-NEXT: addq %rax, %rax ; CHECK-NEXT: addq %rax, %rax
; CHECK-NEXT: addq %rdx, %rax ; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: movq X(%rip), %r14
; CHECK-NEXT: addq %r9, %rbx
; CHECK-NEXT: addq %rbx, %rcx ; CHECK-NEXT: addq %rbx, %rcx
; CHECK-NEXT: addq %rdx, %rax ; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rbx, %rax ; CHECK-NEXT: addq %rbx, %rax
; CHECK-NEXT: bswapq %r14 ; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: bswapq %rbx
; CHECK-NEXT: addq %rdi, %rbx
; CHECK-NEXT: leaq (%r9,%r8), %rsi ; CHECK-NEXT: leaq (%r9,%r8), %rsi
; CHECK-NEXT: addq %rcx, %rsi ; CHECK-NEXT: addq %rcx, %rsi
; CHECK-NEXT: addq %rdi, %r14 ; CHECK-NEXT: addq %rcx, %rbx
; CHECK-NEXT: addq %rsi, %r14 ; CHECK-NEXT: addq %rsi, %rbx
; CHECK-NEXT: leaq (%rdx,%r11), %rsi ; CHECK-NEXT: leaq (%rdx,%r11), %rsi
; CHECK-NEXT: addq %rsi, %rsi ; CHECK-NEXT: addq %rsi, %rsi
; CHECK-NEXT: addq %rax, %rsi ; CHECK-NEXT: addq %rax, %rsi
; CHECK-NEXT: movq X(%rip), %rdi ; CHECK-NEXT: addq %rbx, %r10
; CHECK-NEXT: addq %rcx, %r14
; CHECK-NEXT: addq %r14, %r10
; CHECK-NEXT: addq %rax, %rsi ; CHECK-NEXT: addq %rax, %rsi
; CHECK-NEXT: addq %r14, %rsi ; CHECK-NEXT: addq %rbx, %rsi
; CHECK-NEXT: bswapq %rdi ; CHECK-NEXT: movq X(%rip), %rbx
; CHECK-NEXT: leaq (%rcx,%r9), %rbx ; CHECK-NEXT: bswapq %rbx
; CHECK-NEXT: addq %r8, %rbx
; CHECK-NEXT: leaq (%rcx,%r9), %rdi
; CHECK-NEXT: addq %r10, %rdi
; CHECK-NEXT: addq %r10, %rbx ; CHECK-NEXT: addq %r10, %rbx
; CHECK-NEXT: addq %r8, %rdi ; CHECK-NEXT: addq %rdi, %rbx
; CHECK-NEXT: leaq (%rax,%rdx), %rdi
; CHECK-NEXT: addq %rdi, %rdi
; CHECK-NEXT: addq %rsi, %rdi
; CHECK-NEXT: addq %rbx, %r11
; CHECK-NEXT: addq %rsi, %rdi
; CHECK-NEXT: addq %rbx, %rdi ; CHECK-NEXT: addq %rbx, %rdi
; CHECK-NEXT: leaq (%rax,%rdx), %r8 ; CHECK-NEXT: movq X(%rip), %r8
; CHECK-NEXT: addq %r8, %r8 ; CHECK-NEXT: bswapq %r8
; CHECK-NEXT: addq %rsi, %r8 ; CHECK-NEXT: addq %r9, %r8
; CHECK-NEXT: addq %r10, %rdi
; CHECK-NEXT: addq %rdi, %r11
; CHECK-NEXT: addq %rsi, %r8
; CHECK-NEXT: addq %rdi, %r8
; CHECK-NEXT: movq X(%rip), %rdi
; CHECK-NEXT: bswapq %rdi
; CHECK-NEXT: addq %r9, %rdi
; CHECK-NEXT: leaq (%r10,%rcx), %r9 ; CHECK-NEXT: leaq (%r10,%rcx), %r9
; CHECK-NEXT: addq %r11, %r9 ; CHECK-NEXT: addq %r11, %r9
; CHECK-NEXT: addq %r9, %rdi ; CHECK-NEXT: addq %r11, %r8
; CHECK-NEXT: addq %r9, %r8
; CHECK-NEXT: addq %rax, %rsi ; CHECK-NEXT: addq %rax, %rsi
; CHECK-NEXT: addq %rsi, %rsi ; CHECK-NEXT: addq %rsi, %rsi
; CHECK-NEXT: addq %r8, %rsi
; CHECK-NEXT: addq %r8, %rsi
; CHECK-NEXT: addq %r11, %rdi
; CHECK-NEXT: addq %rdi, %rdx
; CHECK-NEXT: addq %rdi, %rsi ; CHECK-NEXT: addq %rdi, %rsi
; CHECK-NEXT: addq %rdi, %rsi
; CHECK-NEXT: addq %r8, %rdx
; CHECK-NEXT: addq %r8, %rsi
; CHECK-NEXT: movq X(%rip), %rax ; CHECK-NEXT: movq X(%rip), %rax
; CHECK-NEXT: bswapq %rax ; CHECK-NEXT: bswapq %rax
; CHECK-NEXT: addq %r10, %r11 ; CHECK-NEXT: addq %r10, %r11
; CHECK-NEXT: movq %rax, X(%rip) ; CHECK-NEXT: movq %rax, X(%rip)
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: addq %rdx, %r11 ; CHECK-NEXT: addq %rdx, %r11
; CHECK-NEXT: addq %r11, %rax
; CHECK-NEXT: addq %rdx, %rax ; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %r11, %rax
; CHECK-NEXT: addq %rsi, %rax ; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %r14 ; CHECK-NEXT: popq %r14
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%tmp = load volatile i64, ptr @X ; <i64> [#uses=7] %tmp = load volatile i64, ptr @X ; <i64> [#uses=7]
%tmp1 = load volatile i64, ptr @X ; <i64> [#uses=5] %tmp1 = load volatile i64, ptr @X ; <i64> [#uses=5]
%tmp2 = load volatile i64, ptr @X ; <i64> [#uses=3] %tmp2 = load volatile i64, ptr @X ; <i64> [#uses=3]
%tmp3 = load volatile i64, ptr @X ; <i64> [#uses=1] %tmp3 = load volatile i64, ptr @X ; <i64> [#uses=1]
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llvm/test/CodeGen/X86/DynamicCalleeSavedRegisters.ll

Show All 22 Lines
; CHECK-NEXT: movl %edx, %ebx ; CHECK-NEXT: movl %edx, %ebx
; CHECK-NEXT: movl %eax, %edx ; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: movl %ebp, %ecx ; CHECK-NEXT: movl %ebp, %ecx
; CHECK-NEXT: movl %ebx, %edi ; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; CHECK-NEXT: movl %ebp, %esi ; CHECK-NEXT: movl %ebp, %esi
; CHECK-NEXT: calll callee@PLT ; CHECK-NEXT: calll callee@PLT
; CHECK-NEXT: addl %eax, %ebx
; CHECK-NEXT: addl %ebp, %ebx ; CHECK-NEXT: addl %ebp, %ebx
; CHECK-NEXT: addl %eax, %ebx
; CHECK-NEXT: movl %ebx, %esi ; CHECK-NEXT: movl %ebx, %esi
; CHECK-NEXT: addl $12, %esp ; CHECK-NEXT: addl $12, %esp
; CHECK-NEXT: retl ; CHECK-NEXT: retl
%b1 = call x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0) %b1 = call x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0)
%b2 = add i32 %b1, %d0 %b2 = add i32 %b1, %d0
%b3 = add i32 %b2, %e0 %b3 = add i32 %b2, %e0
ret i32 %b3 ret i32 %b3
} }
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llvm/test/CodeGen/X86/add-sub-bool.ll

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andl $1, %eax ; X86-NEXT: andl $1, %eax
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_i32_add_add_idx0: ; X64-LABEL: test_i32_add_add_idx0:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: # kill: def $esi killed $esi def $rsi ; X64-NEXT: # kill: def $edx killed $edx def $rdx
; X64-NEXT: # kill: def $edi killed $edi def $rdi ; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: leal (%rdi,%rsi), %eax
; X64-NEXT: andl $1, %edx ; X64-NEXT: andl $1, %edx
; X64-NEXT: addl %edx, %eax ; X64-NEXT: leal (%rdx,%rdi), %eax
; X64-NEXT: addl %esi, %eax
; X64-NEXT: retq ; X64-NEXT: retq
%add = add i32 %y, %x %add = add i32 %y, %x
%mask = and i32 %z, 1 %mask = and i32 %z, 1
%add1 = add i32 %mask, %add %add1 = add i32 %mask, %add
ret i32 %add1 ret i32 %add1
} }
define i24 @test_i24_add_add_idx(i24 %x, i24 %y, i24 %z) nounwind { define i24 @test_i24_add_add_idx(i24 %x, i24 %y, i24 %z) nounwind {
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llvm/test/CodeGen/X86/alias-static-alloca.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
; We should be able to bypass the load values to their corresponding ; We should be able to bypass the load values to their corresponding
; stores here. ; stores here.
define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d) { define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d) {
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi ; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: movl %esi, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %esi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl %edi, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %edi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl %edx, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: leal (%rdi,%rsi), %eax ; CHECK-NEXT: leal (%rsi,%rdx), %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%a0 = alloca i32 %a0 = alloca i32
%a1 = alloca i32 %a1 = alloca i32
%a2 = alloca i32 %a2 = alloca i32
%a3 = alloca i32 %a3 = alloca i32
store i32 %b, ptr %a1 store i32 %b, ptr %a1
store i32 %d, ptr %a3 store i32 %d, ptr %a3
Show All 11 Lines

llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll

Show First 20 Lines • Show All 111 Lines • ▼ Show 20 Lines; CHECK-NEXT: retq
%res2 = add i64 %res0, %res1 %res2 = add i64 %res0, %res1
ret i64 %res2 ret i64 %res2
} }
declare i64 @llvm.x86.avx512.cvttss2usi64(<4 x float>, i32) nounwind readnone declare i64 @llvm.x86.avx512.cvttss2usi64(<4 x float>, i32) nounwind readnone
define i64 @test_x86_avx512_cvtsd2usi64(<2 x double> %a0) { define i64 @test_x86_avx512_cvtsd2usi64(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtsd2usi64: ; CHECK-LABEL: test_x86_avx512_cvtsd2usi64:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: vcvtsd2usi %xmm0, %rax ; CHECK-NEXT: vcvtsd2usi %xmm0, %rcx
; CHECK-NEXT: vcvtsd2usi {rz-sae}, %xmm0, %rcx ; CHECK-NEXT: vcvtsd2usi {rz-sae}, %xmm0, %rdx
; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: vcvtsd2usi {rd-sae}, %xmm0, %rax ; CHECK-NEXT: vcvtsd2usi {rd-sae}, %xmm0, %rax
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%res = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %a0, i32 4) %res = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %a0, i32 4)
%res1 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %a0, i32 11) %res1 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %a0, i32 11)
%res2 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %a0, i32 9) %res2 = call i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double> %a0, i32 9)
%res3 = add i64 %res, %res1 %res3 = add i64 %res, %res1
%res4 = add i64 %res3, %res2 %res4 = add i64 %res3, %res2
ret i64 %res4 ret i64 %res4
} }
declare i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double>, i32) nounwind readnone declare i64 @llvm.x86.avx512.vcvtsd2usi64(<2 x double>, i32) nounwind readnone
define i64 @test_x86_avx512_cvtsd2si64(<2 x double> %a0) { define i64 @test_x86_avx512_cvtsd2si64(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtsd2si64: ; CHECK-LABEL: test_x86_avx512_cvtsd2si64:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: vcvtsd2si %xmm0, %rax ; CHECK-NEXT: vcvtsd2si %xmm0, %rcx
; CHECK-NEXT: vcvtsd2si {rz-sae}, %xmm0, %rcx ; CHECK-NEXT: vcvtsd2si {rz-sae}, %xmm0, %rdx
; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: vcvtsd2si {rd-sae}, %xmm0, %rax ; CHECK-NEXT: vcvtsd2si {rd-sae}, %xmm0, %rax
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%res = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %a0, i32 4) %res = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %a0, i32 4)
%res1 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %a0, i32 11) %res1 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %a0, i32 11)
%res2 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %a0, i32 9) %res2 = call i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double> %a0, i32 9)
%res3 = add i64 %res, %res1 %res3 = add i64 %res, %res1
%res4 = add i64 %res3, %res2 %res4 = add i64 %res3, %res2
ret i64 %res4 ret i64 %res4
} }
declare i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double>, i32) nounwind readnone declare i64 @llvm.x86.avx512.vcvtsd2si64(<2 x double>, i32) nounwind readnone
define i64 @test_x86_avx512_cvtss2usi64(<4 x float> %a0) { define i64 @test_x86_avx512_cvtss2usi64(<4 x float> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtss2usi64: ; CHECK-LABEL: test_x86_avx512_cvtss2usi64:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: vcvtss2usi %xmm0, %rax ; CHECK-NEXT: vcvtss2usi %xmm0, %rcx
; CHECK-NEXT: vcvtss2usi {rz-sae}, %xmm0, %rcx ; CHECK-NEXT: vcvtss2usi {rz-sae}, %xmm0, %rdx
; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: vcvtss2usi {rd-sae}, %xmm0, %rax ; CHECK-NEXT: vcvtss2usi {rd-sae}, %xmm0, %rax
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%res = call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %a0, i32 4) %res = call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %a0, i32 4)
%res1 = call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %a0, i32 11) %res1 = call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %a0, i32 11)
%res2 = call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %a0, i32 9) %res2 = call i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float> %a0, i32 9)
%res3 = add i64 %res, %res1 %res3 = add i64 %res, %res1
%res4 = add i64 %res3, %res2 %res4 = add i64 %res3, %res2
ret i64 %res4 ret i64 %res4
} }
declare i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float>, i32) nounwind readnone declare i64 @llvm.x86.avx512.vcvtss2usi64(<4 x float>, i32) nounwind readnone
define i64 @test_x86_avx512_cvtss2si64(<4 x float> %a0) { define i64 @test_x86_avx512_cvtss2si64(<4 x float> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtss2si64: ; CHECK-LABEL: test_x86_avx512_cvtss2si64:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: vcvtss2si %xmm0, %rax ; CHECK-NEXT: vcvtss2si %xmm0, %rcx
; CHECK-NEXT: vcvtss2si {rz-sae}, %xmm0, %rcx ; CHECK-NEXT: vcvtss2si {rz-sae}, %xmm0, %rdx
; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: vcvtss2si {rd-sae}, %xmm0, %rax ; CHECK-NEXT: vcvtss2si {rd-sae}, %xmm0, %rax
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%res = call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %a0, i32 4) %res = call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %a0, i32 4)
%res1 = call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %a0, i32 11) %res1 = call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %a0, i32 11)
%res2 = call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %a0, i32 9) %res2 = call i64 @llvm.x86.avx512.vcvtss2si64(<4 x float> %a0, i32 9)
%res3 = add i64 %res, %res1 %res3 = add i64 %res, %res1
%res4 = add i64 %res3, %res2 %res4 = add i64 %res3, %res2
▲ Show 20 Lines • Show All 61 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/avx512-intrinsics.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 928 Lines • ▼ Show 20 Lines; CHECK-NEXT: ret{{[l|q]}}
%res2 = add i32 %res0, %res1 %res2 = add i32 %res0, %res1
ret i32 %res2 ret i32 %res2
} }
declare i32 @llvm.x86.avx512.cvttss2usi(<4 x float>, i32) nounwind readnone declare i32 @llvm.x86.avx512.cvttss2usi(<4 x float>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtsd2usi32(<2 x double> %a0) { define i32 @test_x86_avx512_cvtsd2usi32(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtsd2usi32: ; CHECK-LABEL: test_x86_avx512_cvtsd2usi32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vcvtsd2usi %xmm0, %eax ; CHECK-NEXT: vcvtsd2usi %xmm0, %ecx
; CHECK-NEXT: vcvtsd2usi {rz-sae}, %xmm0, %ecx ; CHECK-NEXT: vcvtsd2usi {rz-sae}, %xmm0, %edx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtsd2usi {rd-sae}, %xmm0, %eax ; CHECK-NEXT: vcvtsd2usi {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}} ; CHECK-NEXT: ret{{[l|q]}}
%res = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 4) %res = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 4)
%res1 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 11) %res1 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 11)
%res2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 9) %res2 = call i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double> %a0, i32 9)
%res3 = add i32 %res, %res1 %res3 = add i32 %res, %res1
%res4 = add i32 %res3, %res2 %res4 = add i32 %res3, %res2
ret i32 %res4 ret i32 %res4
} }
declare i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double>, i32) nounwind readnone declare i32 @llvm.x86.avx512.vcvtsd2usi32(<2 x double>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtsd2si32(<2 x double> %a0) { define i32 @test_x86_avx512_cvtsd2si32(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtsd2si32: ; CHECK-LABEL: test_x86_avx512_cvtsd2si32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vcvtsd2si %xmm0, %eax ; CHECK-NEXT: vcvtsd2si %xmm0, %ecx
; CHECK-NEXT: vcvtsd2si {rz-sae}, %xmm0, %ecx ; CHECK-NEXT: vcvtsd2si {rz-sae}, %xmm0, %edx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtsd2si {rd-sae}, %xmm0, %eax ; CHECK-NEXT: vcvtsd2si {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}} ; CHECK-NEXT: ret{{[l|q]}}
%res = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 4) %res = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 4)
%res1 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 11) %res1 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 11)
%res2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 9) %res2 = call i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double> %a0, i32 9)
%res3 = add i32 %res, %res1 %res3 = add i32 %res, %res1
%res4 = add i32 %res3, %res2 %res4 = add i32 %res3, %res2
ret i32 %res4 ret i32 %res4
} }
declare i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double>, i32) nounwind readnone declare i32 @llvm.x86.avx512.vcvtsd2si32(<2 x double>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtss2usi32(<4 x float> %a0) { define i32 @test_x86_avx512_cvtss2usi32(<4 x float> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtss2usi32: ; CHECK-LABEL: test_x86_avx512_cvtss2usi32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vcvtss2usi %xmm0, %eax ; CHECK-NEXT: vcvtss2usi %xmm0, %ecx
; CHECK-NEXT: vcvtss2usi {rz-sae}, %xmm0, %ecx ; CHECK-NEXT: vcvtss2usi {rz-sae}, %xmm0, %edx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtss2usi {rd-sae}, %xmm0, %eax ; CHECK-NEXT: vcvtss2usi {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}} ; CHECK-NEXT: ret{{[l|q]}}
%res = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 4) %res = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 4)
%res1 = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 11) %res1 = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 11)
%res2 = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 9) %res2 = call i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float> %a0, i32 9)
%res3 = add i32 %res, %res1 %res3 = add i32 %res, %res1
%res4 = add i32 %res3, %res2 %res4 = add i32 %res3, %res2
ret i32 %res4 ret i32 %res4
} }
declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone declare i32 @llvm.x86.avx512.vcvtss2usi32(<4 x float>, i32) nounwind readnone
define i32 @test_x86_avx512_cvtss2si32(<4 x float> %a0) { define i32 @test_x86_avx512_cvtss2si32(<4 x float> %a0) {
; CHECK-LABEL: test_x86_avx512_cvtss2si32: ; CHECK-LABEL: test_x86_avx512_cvtss2si32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vcvtss2si %xmm0, %eax ; CHECK-NEXT: vcvtss2si %xmm0, %ecx
; CHECK-NEXT: vcvtss2si {rz-sae}, %xmm0, %ecx ; CHECK-NEXT: vcvtss2si {rz-sae}, %xmm0, %edx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: vcvtss2si {rd-sae}, %xmm0, %eax ; CHECK-NEXT: vcvtss2si {rd-sae}, %xmm0, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ret{{[l|q]}} ; CHECK-NEXT: ret{{[l|q]}}
%res = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 4) %res = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 4)
%res1 = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 11) %res1 = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 11)
%res2 = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 9) %res2 = call i32 @llvm.x86.avx512.vcvtss2si32(<4 x float> %a0, i32 9)
%res3 = add i32 %res, %res1 %res3 = add i32 %res, %res1
%res4 = add i32 %res3, %res2 %res4 = add i32 %res3, %res2
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llvm/test/CodeGen/X86/avx512-regcall-Mask.ll

Show All 29 Lines
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: addl {{[0-9]+}}(%esp), %eax ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: adcl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; WIN64-LABEL: test_argv64i1: ; WIN64-LABEL: test_argv64i1:
; WIN64: # %bb.0: ; WIN64: # %bb.0:
; WIN64-NEXT: addq %rdx, %rcx
; WIN64-NEXT: addq %rdi, %rcx
; WIN64-NEXT: addq %rsi, %rcx
; WIN64-NEXT: addq %r8, %rcx
; WIN64-NEXT: addq %r9, %rcx
; WIN64-NEXT: addq %r10, %rcx
; WIN64-NEXT: addq %r11, %rcx
; WIN64-NEXT: addq %r12, %rcx
; WIN64-NEXT: addq %r14, %rcx
; WIN64-NEXT: addq %r15, %rcx
; WIN64-NEXT: addq %rcx, %rax ; WIN64-NEXT: addq %rcx, %rax
; WIN64-NEXT: addq %rdx, %rax
; WIN64-NEXT: addq %rdi, %rax
; WIN64-NEXT: addq %rsi, %rax
; WIN64-NEXT: addq %r8, %rax
; WIN64-NEXT: addq %r9, %rax
; WIN64-NEXT: addq %r10, %rax
; WIN64-NEXT: addq %r11, %rax
; WIN64-NEXT: addq %r12, %rax
; WIN64-NEXT: addq %r14, %rax
; WIN64-NEXT: addq %r15, %rax
; WIN64-NEXT: addq {{[0-9]+}}(%rsp), %rax ; WIN64-NEXT: addq {{[0-9]+}}(%rsp), %rax
; WIN64-NEXT: retq ; WIN64-NEXT: retq
; ;
; LINUXOSX64-LABEL: test_argv64i1: ; LINUXOSX64-LABEL: test_argv64i1:
; LINUXOSX64: # %bb.0: ; LINUXOSX64: # %bb.0:
; LINUXOSX64-NEXT: addq %rdx, %rcx
; LINUXOSX64-NEXT: addq %rdi, %rcx
; LINUXOSX64-NEXT: addq %rsi, %rcx
; LINUXOSX64-NEXT: addq %r8, %rcx
; LINUXOSX64-NEXT: addq %r9, %rcx
; LINUXOSX64-NEXT: addq %r12, %rcx
; LINUXOSX64-NEXT: addq %r13, %rcx
; LINUXOSX64-NEXT: addq %r14, %rcx
; LINUXOSX64-NEXT: addq %r15, %rcx
; LINUXOSX64-NEXT: addq %rcx, %rax ; LINUXOSX64-NEXT: addq %rcx, %rax
; LINUXOSX64-NEXT: addq %rdx, %rax
; LINUXOSX64-NEXT: addq %rdi, %rax
; LINUXOSX64-NEXT: addq %rsi, %rax
; LINUXOSX64-NEXT: addq %r8, %rax
; LINUXOSX64-NEXT: addq %r9, %rax
; LINUXOSX64-NEXT: addq %r12, %rax
; LINUXOSX64-NEXT: addq %r13, %rax
; LINUXOSX64-NEXT: addq %r14, %rax
; LINUXOSX64-NEXT: addq %r15, %rax
; LINUXOSX64-NEXT: addq {{[0-9]+}}(%rsp), %rax ; LINUXOSX64-NEXT: addq {{[0-9]+}}(%rsp), %rax
; LINUXOSX64-NEXT: addq {{[0-9]+}}(%rsp), %rax ; LINUXOSX64-NEXT: addq {{[0-9]+}}(%rsp), %rax
; LINUXOSX64-NEXT: retq ; LINUXOSX64-NEXT: retq
%y0 = bitcast <64 x i1> %x0 to i64 %y0 = bitcast <64 x i1> %x0 to i64
%y1 = bitcast <64 x i1> %x1 to i64 %y1 = bitcast <64 x i1> %x1 to i64
%y2 = bitcast <64 x i1> %x2 to i64 %y2 = bitcast <64 x i1> %x2 to i64
%y3 = bitcast <64 x i1> %x3 to i64 %y3 = bitcast <64 x i1> %x3 to i64
%y4 = bitcast <64 x i1> %x4 to i64 %y4 = bitcast <64 x i1> %x4 to i64
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llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll

Show First 20 Lines • Show All 933 Lines • ▼ Show 20 Lines
} }
; Test regcall when running multiple input parameters - callee saved GPRs ; Test regcall when running multiple input parameters - callee saved GPRs
define dso_local x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %b1, i32 %b2, i32 %b3, i32 %b4, i32 %b5, i32 %b6) nounwind { define dso_local x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %b1, i32 %b2, i32 %b3, i32 %b4, i32 %b5, i32 %b6) nounwind {
; X32-LABEL: testi32_inp: ; X32-LABEL: testi32_inp:
; X32: # %bb.0: ; X32: # %bb.0:
; X32-NEXT: pushl %ebp ; X32-NEXT: pushl %ebp
; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %ebx
; X32-NEXT: subl $12, %esp ; X32-NEXT: subl $16, %esp
; X32-NEXT: movl %esi, (%esp) # 4-byte Spill ; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl %edi, %esi ; X32-NEXT: movl %edi, %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: leal (%edx,%esi), %eax ; X32-NEXT: leal (%edx,%esi), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: subl %esi, %ebx ; X32-NEXT: subl %esi, %ebx
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: subl %ecx, %eax ; X32-NEXT: subl %ecx, %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %edx
; X32-NEXT: subl {{[0-9]+}}(%esp), %eax ; X32-NEXT: subl {{[0-9]+}}(%esp), %edx
; X32-NEXT: imull %ebx, %eax ; X32-NEXT: imull %ebx, %edx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload
; X32-NEXT: subl {{[0-9]+}}(%esp), %ebx ; X32-NEXT: subl %ebp, %ebx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: imull %ebx, %ecx ; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: addl %eax, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: addl {{[0-9]+}}(%esp), %ebp ; X32-NEXT: addl {{[0-9]+}}(%esp), %edx
; X32-NEXT: imull %ebp, %edi ; X32-NEXT: imull %edx, %edi
; X32-NEXT: addl {{[0-9]+}}(%esp), %esi ; X32-NEXT: addl {{[0-9]+}}(%esp), %esi
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addl {{[0-9]+}}(%esp), %edx ; X32-NEXT: imull %ebp, %eax
; X32-NEXT: imull %eax, %edx ; X32-NEXT: addl %esi, %eax
; X32-NEXT: addl %edx, %edi ; X32-NEXT: addl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: addl $12, %esp ; X32-NEXT: addl $16, %esp
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: popl %ebp ; X32-NEXT: popl %ebp
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; WIN64-LABEL: testi32_inp: ; WIN64-LABEL: testi32_inp:
; WIN64: # %bb.0: ; WIN64: # %bb.0:
; WIN64-NEXT: pushq %rbx ; WIN64-NEXT: pushq %rbx
; WIN64-NEXT: # kill: def $edx killed $edx def $rdx ; WIN64-NEXT: # kill: def $edx killed $edx def $rdx
Show All 17 Lines
; WIN64-NEXT: subl %r10d, %r9d ; WIN64-NEXT: subl %r10d, %r9d
; WIN64-NEXT: movl %eax, %r10d ; WIN64-NEXT: movl %eax, %r10d
; WIN64-NEXT: subl %ecx, %r10d ; WIN64-NEXT: subl %ecx, %r10d
; WIN64-NEXT: imull %r10d, %r9d ; WIN64-NEXT: imull %r10d, %r9d
; WIN64-NEXT: leal (%r11,%r12), %r10d ; WIN64-NEXT: leal (%r11,%r12), %r10d
; WIN64-NEXT: # kill: def $r11d killed $r11d killed $r11 ; WIN64-NEXT: # kill: def $r11d killed $r11d killed $r11
; WIN64-NEXT: subl %r12d, %r11d ; WIN64-NEXT: subl %r12d, %r11d
; WIN64-NEXT: imull %edx, %r11d ; WIN64-NEXT: imull %edx, %r11d
; WIN64-NEXT: addl %r9d, %r11d
; WIN64-NEXT: leal (%r14,%r15), %edx ; WIN64-NEXT: leal (%r14,%r15), %edx
; WIN64-NEXT: movl %r14d, %r9d ; WIN64-NEXT: # kill: def $r14d killed $r14d killed $r14
; WIN64-NEXT: subl %r15d, %r9d ; WIN64-NEXT: subl %r15d, %r14d
; WIN64-NEXT: imull %esi, %r9d ; WIN64-NEXT: imull %esi, %r14d
; WIN64-NEXT: addl %r11d, %r9d ; WIN64-NEXT: addl %r11d, %r14d
; WIN64-NEXT: addl %ecx, %eax ; WIN64-NEXT: addl %ecx, %eax
; WIN64-NEXT: imull %r8d, %eax ; WIN64-NEXT: imull %r8d, %eax
; WIN64-NEXT: imull %ebx, %r10d ; WIN64-NEXT: imull %ebx, %r10d
; WIN64-NEXT: addl %r10d, %eax
; WIN64-NEXT: imull %edi, %edx ; WIN64-NEXT: imull %edi, %edx
; WIN64-NEXT: addl %r10d, %edx
; WIN64-NEXT: addl %edx, %eax ; WIN64-NEXT: addl %edx, %eax
; WIN64-NEXT: addl %r14d, %eax
; WIN64-NEXT: addl %r9d, %eax ; WIN64-NEXT: addl %r9d, %eax
; WIN64-NEXT: popq %rbx ; WIN64-NEXT: popq %rbx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
; ;
; LINUXOSX64-LABEL: testi32_inp: ; LINUXOSX64-LABEL: testi32_inp:
; LINUXOSX64: # %bb.0: ; LINUXOSX64: # %bb.0:
; LINUXOSX64-NEXT: # kill: def $edx killed $edx def $rdx ; LINUXOSX64-NEXT: # kill: def $edx killed $edx def $rdx
; LINUXOSX64-NEXT: # kill: def $esi killed $esi def $rsi ; LINUXOSX64-NEXT: # kill: def $esi killed $esi def $rsi
Show All 13 Lines
; LINUXOSX64-NEXT: # kill: def $r9d killed $r9d killed $r9 ; LINUXOSX64-NEXT: # kill: def $r9d killed $r9d killed $r9
; LINUXOSX64-NEXT: subl %r12d, %r9d ; LINUXOSX64-NEXT: subl %r12d, %r9d
; LINUXOSX64-NEXT: movl %eax, %r11d ; LINUXOSX64-NEXT: movl %eax, %r11d
; LINUXOSX64-NEXT: subl %ecx, %r11d ; LINUXOSX64-NEXT: subl %ecx, %r11d
; LINUXOSX64-NEXT: imull %r11d, %r9d ; LINUXOSX64-NEXT: imull %r11d, %r9d
; LINUXOSX64-NEXT: leal (%r13,%r14), %r11d ; LINUXOSX64-NEXT: leal (%r13,%r14), %r11d
; LINUXOSX64-NEXT: movl %r13d, %r12d ; LINUXOSX64-NEXT: movl %r13d, %r12d
; LINUXOSX64-NEXT: subl %r14d, %r12d ; LINUXOSX64-NEXT: subl %r14d, %r12d
; LINUXOSX64-NEXT: movl {{[0-9]+}}(%rsp), %r14d
; LINUXOSX64-NEXT: imull %edx, %r12d ; LINUXOSX64-NEXT: imull %edx, %r12d
; LINUXOSX64-NEXT: movl {{[0-9]+}}(%rsp), %edx ; LINUXOSX64-NEXT: movl %r15d, %edx
; LINUXOSX64-NEXT: addl %r9d, %r12d ; LINUXOSX64-NEXT: subl %r14d, %edx
; LINUXOSX64-NEXT: movl %r15d, %r9d ; LINUXOSX64-NEXT: imull %esi, %edx
; LINUXOSX64-NEXT: subl %edx, %r9d ; LINUXOSX64-NEXT: addl %r12d, %edx
; LINUXOSX64-NEXT: imull %esi, %r9d
; LINUXOSX64-NEXT: addl %r12d, %r9d
; LINUXOSX64-NEXT: addl %ecx, %eax ; LINUXOSX64-NEXT: addl %ecx, %eax
; LINUXOSX64-NEXT: imull %r8d, %eax ; LINUXOSX64-NEXT: imull %r8d, %eax
; LINUXOSX64-NEXT: imull %r10d, %r11d ; LINUXOSX64-NEXT: imull %r10d, %r11d
; LINUXOSX64-NEXT: addl %r11d, %eax ; LINUXOSX64-NEXT: addl %r15d, %r14d
; LINUXOSX64-NEXT: addl %r15d, %edx ; LINUXOSX64-NEXT: imull %edi, %r14d
; LINUXOSX64-NEXT: imull %edi, %edx ; LINUXOSX64-NEXT: addl %r11d, %r14d
; LINUXOSX64-NEXT: addl %r14d, %eax
; LINUXOSX64-NEXT: addl %edx, %eax ; LINUXOSX64-NEXT: addl %edx, %eax
; LINUXOSX64-NEXT: addl %r9d, %eax ; LINUXOSX64-NEXT: addl %r9d, %eax
; LINUXOSX64-NEXT: retq ; LINUXOSX64-NEXT: retq
%x1 = sub i32 %a1, %a2 %x1 = sub i32 %a1, %a2
%x2 = sub i32 %a3, %a4 %x2 = sub i32 %a3, %a4
%x3 = sub i32 %a5, %a6 %x3 = sub i32 %a5, %a6
%y1 = sub i32 %b1, %b2 %y1 = sub i32 %b1, %b2
%y2 = sub i32 %b3, %b4 %y2 = sub i32 %b3, %b4
▲ Show 20 Lines • Show All 221 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll

Show First 20 Lines • Show All 1,899 Lines • ▼ Show 20 Lines
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_cmp_b_512: ; X64-LABEL: test_cmp_b_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x74,0xc1] ; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x74,0xc1]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpgtb %zmm0, %zmm1, %k0 # encoding: [0x62,0xf1,0x75,0x48,0x64,0xc0] ; X64-NEXT: vpcmpgtb %zmm0, %zmm1, %k0 # encoding: [0x62,0xf1,0x75,0x48,0x64,0xc0]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1]
; X64-NEXT: vpcmpleb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x02] ; X64-NEXT: vpcmpleb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x02]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8] ; X64-NEXT: addq %rcx, %rdx # encoding: [0x48,0x01,0xca]
; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x04]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1] ; X64-NEXT: addq %rdx, %rcx # encoding: [0x48,0x01,0xd1]
; X64-NEXT: vpcmpnltb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x05] ; X64-NEXT: vpcmpnltb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x05]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8] ; X64-NEXT: addq %rcx, %rdx # encoding: [0x48,0x01,0xca]
; X64-NEXT: addq %rax, %rdx # encoding: [0x48,0x01,0xc2]
; X64-NEXT: vpcmpgtb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x64,0xc1] ; X64-NEXT: vpcmpgtb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x64,0xc1]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: leaq -1(%rcx,%rax), %rax # encoding: [0x48,0x8d,0x44,0x01,0xff] ; X64-NEXT: leaq -1(%rax,%rdx), %rax # encoding: [0x48,0x8d,0x44,0x10,0xff]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1) %res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1)
%res1 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 -1) %res1 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 -1)
%ret1 = add i64 %res0, %res1 %ret1 = add i64 %res0, %res1
%res2 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 -1) %res2 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 -1)
%ret2 = add i64 %ret1, %res2 %ret2 = add i64 %ret1, %res2
%res3 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 -1) %res3 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 -1)
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; X86-NEXT: popl %esi # encoding: [0x5e] ; X86-NEXT: popl %esi # encoding: [0x5e]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_mask_cmp_b_512: ; X64-LABEL: test_mask_cmp_b_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf] ; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x74,0xc1] ; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x74,0xc1]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpgtb %zmm0, %zmm1, %k0 {%k1} # encoding: [0x62,0xf1,0x75,0x49,0x64,0xc0]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1] ; X64-NEXT: vpcmpgtb %zmm0, %zmm1, %k0 {%k1} # encoding: [0x62,0xf1,0x75,0x49,0x64,0xc0]
; X64-NEXT: vpcmpleb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x02]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8] ; X64-NEXT: vpcmpleb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x02]
; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rax, %rdx # encoding: [0x48,0x01,0xc2]
; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x04]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1] ; X64-NEXT: addq %rdx, %rax # encoding: [0x48,0x01,0xd0]
; X64-NEXT: vpcmpnltb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x05] ; X64-NEXT: vpcmpnltb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x05]
; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0] ; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rcx, %rdx # encoding: [0x48,0x01,0xca] ; X64-NEXT: addq %rax, %rdx # encoding: [0x48,0x01,0xc2]
; X64-NEXT: vpcmpgtb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x64,0xc1] ; X64-NEXT: vpcmpgtb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x64,0xc1]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: addq %rdx, %rax # encoding: [0x48,0x01,0xd0] ; X64-NEXT: addq %rdx, %rax # encoding: [0x48,0x01,0xd0]
; X64-NEXT: addq %rdi, %rax # encoding: [0x48,0x01,0xf8] ; X64-NEXT: addq %rdi, %rax # encoding: [0x48,0x01,0xf8]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask) %res0 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask)
%res1 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 %mask) %res1 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 %mask)
%ret1 = add i64 %res0, %res1 %ret1 = add i64 %res0, %res1
%res2 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 %mask) %res2 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 %mask)
%ret2 = add i64 %ret1, %res2 %ret2 = add i64 %ret1, %res2
%res3 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 %mask) %res3 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 %mask)
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; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_ucmp_b_512: ; X64-LABEL: test_ucmp_b_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x74,0xc1] ; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x74,0xc1]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpltub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x01] ; X64-NEXT: vpcmpltub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x01]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1]
; X64-NEXT: vpcmpleub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x02] ; X64-NEXT: vpcmpleub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x02]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8] ; X64-NEXT: addq %rcx, %rdx # encoding: [0x48,0x01,0xca]
; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3f,0xc1,0x04]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1] ; X64-NEXT: addq %rdx, %rcx # encoding: [0x48,0x01,0xd1]
; X64-NEXT: vpcmpnltub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x05] ; X64-NEXT: vpcmpnltub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x05]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8] ; X64-NEXT: addq %rcx, %rdx # encoding: [0x48,0x01,0xca]
; X64-NEXT: addq %rax, %rdx # encoding: [0x48,0x01,0xc2]
; X64-NEXT: vpcmpnleub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x06] ; X64-NEXT: vpcmpnleub %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0x7d,0x48,0x3e,0xc1,0x06]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: leaq -1(%rcx,%rax), %rax # encoding: [0x48,0x8d,0x44,0x01,0xff] ; X64-NEXT: leaq -1(%rax,%rdx), %rax # encoding: [0x48,0x8d,0x44,0x10,0xff]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1) %res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 -1)
%res1 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 -1) %res1 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 -1)
%ret1 = add i64 %res0, %res1 %ret1 = add i64 %res0, %res1
%res2 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 -1) %res2 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 -1)
%ret2 = add i64 %ret1, %res2 %ret2 = add i64 %ret1, %res2
%res3 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 -1) %res3 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 -1)
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; X86-NEXT: popl %esi # encoding: [0x5e] ; X86-NEXT: popl %esi # encoding: [0x5e]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_mask_x86_avx512_ucmp_b_512: ; X64-LABEL: test_mask_x86_avx512_ucmp_b_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf] ; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x74,0xc1] ; X64-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x74,0xc1]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpltub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x01]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1] ; X64-NEXT: vpcmpltub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x01]
; X64-NEXT: vpcmpleub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x02]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8] ; X64-NEXT: vpcmpleub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x02]
; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rax, %rdx # encoding: [0x48,0x01,0xc2]
; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqb %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3f,0xc1,0x04]
; X64-NEXT: kmovq %k0, %rcx # encoding: [0xc4,0xe1,0xfb,0x93,0xc8] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: addq %rax, %rcx # encoding: [0x48,0x01,0xc1] ; X64-NEXT: addq %rdx, %rax # encoding: [0x48,0x01,0xd0]
; X64-NEXT: vpcmpnltub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x05] ; X64-NEXT: vpcmpnltub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x05]
; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0] ; X64-NEXT: kmovq %k0, %rdx # encoding: [0xc4,0xe1,0xfb,0x93,0xd0]
; X64-NEXT: addq %rcx, %rdx # encoding: [0x48,0x01,0xca] ; X64-NEXT: addq %rax, %rdx # encoding: [0x48,0x01,0xc2]
; X64-NEXT: vpcmpnleub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x06] ; X64-NEXT: vpcmpnleub %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x49,0x3e,0xc1,0x06]
; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0] ; X64-NEXT: kmovq %k0, %rax # encoding: [0xc4,0xe1,0xfb,0x93,0xc0]
; X64-NEXT: addq %rdx, %rax # encoding: [0x48,0x01,0xd0] ; X64-NEXT: addq %rdx, %rax # encoding: [0x48,0x01,0xd0]
; X64-NEXT: addq %rdi, %rax # encoding: [0x48,0x01,0xf8] ; X64-NEXT: addq %rdi, %rax # encoding: [0x48,0x01,0xf8]
; X64-NEXT: addq %rcx, %rax # encoding: [0x48,0x01,0xc8]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask) %res0 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 0, i64 %mask)
%res1 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 %mask) %res1 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 1, i64 %mask)
%ret1 = add i64 %res0, %res1 %ret1 = add i64 %res0, %res1
%res2 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 %mask) %res2 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 2, i64 %mask)
%ret2 = add i64 %ret1, %res2 %ret2 = add i64 %ret1, %res2
%res3 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 %mask) %res3 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i32 3, i64 %mask)
Show All 13 Lines
define i32 @test_cmp_w_512(<32 x i16> %a0, <32 x i16> %a1) nounwind { define i32 @test_cmp_w_512(<32 x i16> %a0, <32 x i16> %a1) nounwind {
; X86-LABEL: test_cmp_w_512: ; X86-LABEL: test_cmp_w_512:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1] ; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 # encoding: [0x62,0xf1,0x75,0x48,0x65,0xc0] ; X86-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 # encoding: [0x62,0xf1,0x75,0x48,0x65,0xc0]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X86-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1]
; X86-NEXT: vpcmplew %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x02] ; X86-NEXT: vpcmplew %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x02]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X86-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04] ; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X86-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X86-NEXT: addl %edx, %ecx # encoding: [0x01,0xd1]
; X86-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x05] ; X86-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x05]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X86-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X86-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X86-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x65,0xc1] ; X86-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x65,0xc1]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: leal -1(%ecx,%eax), %eax # encoding: [0x8d,0x44,0x01,0xff] ; X86-NEXT: leal -1(%eax,%edx), %eax # encoding: [0x8d,0x44,0x10,0xff]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_cmp_w_512: ; X64-LABEL: test_cmp_w_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1] ; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 # encoding: [0x62,0xf1,0x75,0x48,0x65,0xc0] ; X64-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 # encoding: [0x62,0xf1,0x75,0x48,0x65,0xc0]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1]
; X64-NEXT: vpcmplew %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x02] ; X64-NEXT: vpcmplew %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x02]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X64-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X64-NEXT: addl %edx, %ecx # encoding: [0x01,0xd1]
; X64-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x05] ; X64-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x05]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X64-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X64-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X64-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x65,0xc1] ; X64-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x65,0xc1]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: leal -1(%rcx,%rax), %eax # encoding: [0x8d,0x44,0x01,0xff] ; X64-NEXT: leal -1(%rax,%rdx), %eax # encoding: [0x8d,0x44,0x10,0xff]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 -1) %res0 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 -1)
%res1 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 -1) %res1 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 -1)
%ret1 = add i32 %res0, %res1 %ret1 = add i32 %res0, %res1
%res2 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 -1) %res2 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 -1)
%ret2 = add i32 %ret1, %res2 %ret2 = add i32 %ret1, %res2
%res3 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 -1) %res3 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 -1)
Show All 11 Lines
define i32 @test_mask_cmp_w_512(<32 x i16> %a0, <32 x i16> %a1, i32 %mask) nounwind { define i32 @test_mask_cmp_w_512(<32 x i16> %a0, <32 x i16> %a1, i32 %mask) nounwind {
; X86-LABEL: test_mask_cmp_w_512: ; X86-LABEL: test_mask_cmp_w_512:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %esi # encoding: [0x56] ; X86-NEXT: pushl %esi # encoding: [0x56]
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x08] ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x08]
; X86-NEXT: kmovd %ecx, %k1 # encoding: [0xc5,0xfb,0x92,0xc9] ; X86-NEXT: kmovd %ecx, %k1 # encoding: [0xc5,0xfb,0x92,0xc9]
; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1] ; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 {%k1} # encoding: [0x62,0xf1,0x75,0x49,0x65,0xc0]
; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0] ; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X86-NEXT: addl %eax, %edx # encoding: [0x01,0xc2] ; X86-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 {%k1} # encoding: [0x62,0xf1,0x75,0x49,0x65,0xc0]
; X86-NEXT: vpcmplew %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x02]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: addl %edx, %eax # encoding: [0x01,0xd0] ; X86-NEXT: vpcmplew %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x02]
; X86-NEXT: kmovd %k0, %esi # encoding: [0xc5,0xfb,0x93,0xf0]
; X86-NEXT: addl %eax, %esi # encoding: [0x01,0xc6]
; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04] ; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04]
; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: addl %eax, %edx # encoding: [0x01,0xc2] ; X86-NEXT: addl %esi, %eax # encoding: [0x01,0xf0]
; X86-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x05] ; X86-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x05]
; X86-NEXT: kmovd %k0, %esi # encoding: [0xc5,0xfb,0x93,0xf0] ; X86-NEXT: kmovd %k0, %esi # encoding: [0xc5,0xfb,0x93,0xf0]
; X86-NEXT: addl %edx, %esi # encoding: [0x01,0xd6] ; X86-NEXT: addl %eax, %esi # encoding: [0x01,0xc6]
; X86-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x65,0xc1] ; X86-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x65,0xc1]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: addl %esi, %eax # encoding: [0x01,0xf0] ; X86-NEXT: addl %esi, %eax # encoding: [0x01,0xf0]
; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
; X86-NEXT: addl %edx, %eax # encoding: [0x01,0xd0]
; X86-NEXT: popl %esi # encoding: [0x5e] ; X86-NEXT: popl %esi # encoding: [0x5e]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_mask_cmp_w_512: ; X64-LABEL: test_mask_cmp_w_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1] ; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 {%k1} # encoding: [0x62,0xf1,0x75,0x49,0x65,0xc0]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X64-NEXT: vpcmpgtw %zmm0, %zmm1, %k0 {%k1} # encoding: [0x62,0xf1,0x75,0x49,0x65,0xc0]
; X64-NEXT: vpcmplew %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x02]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X64-NEXT: vpcmplew %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x02]
; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X64-NEXT: addl %edx, %eax # encoding: [0x01,0xd0]
; X64-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x05] ; X64-NEXT: vpcmpnltw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x05]
; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0] ; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %ecx, %edx # encoding: [0x01,0xca] ; X64-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X64-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x65,0xc1] ; X64-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x65,0xc1]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: addl %edx, %eax # encoding: [0x01,0xd0] ; X64-NEXT: addl %edx, %eax # encoding: [0x01,0xd0]
; X64-NEXT: addl %edi, %eax # encoding: [0x01,0xf8] ; X64-NEXT: addl %edi, %eax # encoding: [0x01,0xf8]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 %mask) %res0 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 %mask)
%res1 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 %mask) %res1 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 %mask)
%ret1 = add i32 %res0, %res1 %ret1 = add i32 %res0, %res1
%res2 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 %mask) %res2 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 %mask)
%ret2 = add i32 %ret1, %res2 %ret2 = add i32 %ret1, %res2
%res3 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 %mask) %res3 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 %mask)
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define i32 @test_ucmp_w_512(<32 x i16> %a0, <32 x i16> %a1) nounwind { define i32 @test_ucmp_w_512(<32 x i16> %a0, <32 x i16> %a1) nounwind {
; X86-LABEL: test_ucmp_w_512: ; X86-LABEL: test_ucmp_w_512:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1] ; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x01] ; X86-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x01]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X86-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1]
; X86-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x02] ; X86-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x02]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X86-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04] ; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X86-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X86-NEXT: addl %edx, %ecx # encoding: [0x01,0xd1]
; X86-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x05] ; X86-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x05]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X86-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X86-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X86-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x06] ; X86-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x06]
; X86-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: leal -1(%ecx,%eax), %eax # encoding: [0x8d,0x44,0x01,0xff] ; X86-NEXT: leal -1(%eax,%edx), %eax # encoding: [0x8d,0x44,0x10,0xff]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_ucmp_w_512: ; X64-LABEL: test_ucmp_w_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1] ; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf1,0x7d,0x48,0x75,0xc1]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x01] ; X64-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x01]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1]
; X64-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x02] ; X64-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x02]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X64-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3f,0xc1,0x04]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X64-NEXT: addl %edx, %ecx # encoding: [0x01,0xd1]
; X64-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x05] ; X64-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x05]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X64-NEXT: addl %ecx, %edx # encoding: [0x01,0xca]
; X64-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X64-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x06] ; X64-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 # encoding: [0x62,0xf3,0xfd,0x48,0x3e,0xc1,0x06]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: leal -1(%rcx,%rax), %eax # encoding: [0x8d,0x44,0x01,0xff] ; X64-NEXT: leal -1(%rax,%rdx), %eax # encoding: [0x8d,0x44,0x10,0xff]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 -1) %res0 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 -1)
%res1 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 -1) %res1 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 -1)
%ret1 = add i32 %res0, %res1 %ret1 = add i32 %res0, %res1
%res2 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 -1) %res2 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 -1)
%ret2 = add i32 %ret1, %res2 %ret2 = add i32 %ret1, %res2
%res3 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 -1) %res3 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 -1)
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define i32 @test_mask_ucmp_w_512(<32 x i16> %a0, <32 x i16> %a1, i32 %mask) nounwind { define i32 @test_mask_ucmp_w_512(<32 x i16> %a0, <32 x i16> %a1, i32 %mask) nounwind {
; X86-LABEL: test_mask_ucmp_w_512: ; X86-LABEL: test_mask_ucmp_w_512:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %esi # encoding: [0x56] ; X86-NEXT: pushl %esi # encoding: [0x56]
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x08] ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x08]
; X86-NEXT: kmovd %ecx, %k1 # encoding: [0xc5,0xfb,0x92,0xc9] ; X86-NEXT: kmovd %ecx, %k1 # encoding: [0xc5,0xfb,0x92,0xc9]
; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1] ; X86-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x01]
; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0] ; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X86-NEXT: addl %eax, %edx # encoding: [0x01,0xc2] ; X86-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x01]
; X86-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x02]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: addl %edx, %eax # encoding: [0x01,0xd0] ; X86-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x02]
; X86-NEXT: kmovd %k0, %esi # encoding: [0xc5,0xfb,0x93,0xf0]
; X86-NEXT: addl %eax, %esi # encoding: [0x01,0xc6]
; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04] ; X86-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04]
; X86-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: addl %eax, %edx # encoding: [0x01,0xc2] ; X86-NEXT: addl %esi, %eax # encoding: [0x01,0xf0]
; X86-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x05] ; X86-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x05]
; X86-NEXT: kmovd %k0, %esi # encoding: [0xc5,0xfb,0x93,0xf0] ; X86-NEXT: kmovd %k0, %esi # encoding: [0xc5,0xfb,0x93,0xf0]
; X86-NEXT: addl %edx, %esi # encoding: [0x01,0xd6] ; X86-NEXT: addl %eax, %esi # encoding: [0x01,0xc6]
; X86-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x06] ; X86-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x06]
; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X86-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X86-NEXT: addl %esi, %eax # encoding: [0x01,0xf0] ; X86-NEXT: addl %esi, %eax # encoding: [0x01,0xf0]
; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X86-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
; X86-NEXT: addl %edx, %eax # encoding: [0x01,0xd0]
; X86-NEXT: popl %esi # encoding: [0x5e] ; X86-NEXT: popl %esi # encoding: [0x5e]
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X86-NEXT: retl # encoding: [0xc3] ; X86-NEXT: retl # encoding: [0xc3]
; ;
; X64-LABEL: test_mask_ucmp_w_512: ; X64-LABEL: test_mask_ucmp_w_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf] ; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1] ; X64-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf1,0x7d,0x49,0x75,0xc1]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x01]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X64-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x01]
; X64-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x02]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8] ; X64-NEXT: vpcmpleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x02]
; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04] ; X64-NEXT: vpcmpneqw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3f,0xc1,0x04]
; X64-NEXT: kmovd %k0, %ecx # encoding: [0xc5,0xfb,0x93,0xc8] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: addl %eax, %ecx # encoding: [0x01,0xc1] ; X64-NEXT: addl %edx, %eax # encoding: [0x01,0xd0]
; X64-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x05] ; X64-NEXT: vpcmpnltuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x05]
; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0] ; X64-NEXT: kmovd %k0, %edx # encoding: [0xc5,0xfb,0x93,0xd0]
; X64-NEXT: addl %ecx, %edx # encoding: [0x01,0xca] ; X64-NEXT: addl %eax, %edx # encoding: [0x01,0xc2]
; X64-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x06] ; X64-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x49,0x3e,0xc1,0x06]
; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0] ; X64-NEXT: kmovd %k0, %eax # encoding: [0xc5,0xfb,0x93,0xc0]
; X64-NEXT: addl %edx, %eax # encoding: [0x01,0xd0] ; X64-NEXT: addl %edx, %eax # encoding: [0x01,0xd0]
; X64-NEXT: addl %edi, %eax # encoding: [0x01,0xf8] ; X64-NEXT: addl %edi, %eax # encoding: [0x01,0xf8]
; X64-NEXT: addl %ecx, %eax # encoding: [0x01,0xc8]
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] ; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
; X64-NEXT: retq # encoding: [0xc3] ; X64-NEXT: retq # encoding: [0xc3]
%res0 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 %mask) %res0 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 0, i32 %mask)
%res1 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 %mask) %res1 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 1, i32 %mask)
%ret1 = add i32 %res0, %res1 %ret1 = add i32 %res0, %res1
%res2 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 %mask) %res2 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 2, i32 %mask)
%ret2 = add i32 %ret1, %res2 %ret2 = add i32 %ret1, %res2
%res3 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 %mask) %res3 = call i32 @llvm.x86.avx512.mask.ucmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i32 3, i32 %mask)
▲ Show 20 Lines • Show All 1,772 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll

Show First 20 Lines • Show All 118 Lines • ▼ Show 20 Lines
; X86-LABEL: scalar_i64: ; X86-LABEL: scalar_i64:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: pushl %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: calll __divdi3 ; X86-NEXT: calll __divdi3
; X86-NEXT: addl $16, %esp ; X86-NEXT: addl $16, %esp
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %ecx, 4(%edx) ; X86-NEXT: movl %ecx, 4(%edx)
; X86-NEXT: movl %eax, (%edx) ; X86-NEXT: movl %eax, (%edx)
; X86-NEXT: imull %eax, %ebp ; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebx ; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebp, %edx ; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: imull %ebx, %ecx ; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: subl %eax, %esi ; X86-NEXT: subl %eax, %esi
; X86-NEXT: sbbl %ecx, %edi ; X86-NEXT: sbbl %ecx, %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
Show All 36 Lines
; X64-NEXT: movq %rsi, %r12 ; X64-NEXT: movq %rsi, %r12
; X64-NEXT: movq %rdi, %r13 ; X64-NEXT: movq %rdi, %r13
; X64-NEXT: callq __divti3@PLT ; X64-NEXT: callq __divti3@PLT
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rdx, 8(%rbx) ; X64-NEXT: movq %rdx, 8(%rbx)
; X64-NEXT: movq %rax, (%rbx) ; X64-NEXT: movq %rax, (%rbx)
; X64-NEXT: imulq %rax, %r14 ; X64-NEXT: imulq %rax, %r14
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: addq %r14, %rdx
; X64-NEXT: imulq %r15, %rcx ; X64-NEXT: imulq %r15, %rcx
; X64-NEXT: addq %r14, %rcx
; X64-NEXT: addq %rdx, %rcx ; X64-NEXT: addq %rdx, %rcx
; X64-NEXT: subq %rax, %r13 ; X64-NEXT: subq %rax, %r13
; X64-NEXT: sbbq %rcx, %r12 ; X64-NEXT: sbbq %rcx, %r12
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq %r12, %rdx ; X64-NEXT: movq %r12, %rdx
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: popq %r12 ; X64-NEXT: popq %r12
; X64-NEXT: popq %r13 ; X64-NEXT: popq %r13
▲ Show 20 Lines • Show All 822 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll

Show First 20 Lines • Show All 118 Lines • ▼ Show 20 Lines
; X86-LABEL: scalar_i64: ; X86-LABEL: scalar_i64:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: pushl %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: calll __udivdi3 ; X86-NEXT: calll __udivdi3
; X86-NEXT: addl $16, %esp ; X86-NEXT: addl $16, %esp
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %ecx, 4(%edx) ; X86-NEXT: movl %ecx, 4(%edx)
; X86-NEXT: movl %eax, (%edx) ; X86-NEXT: movl %eax, (%edx)
; X86-NEXT: imull %eax, %ebp ; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebx ; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebp, %edx ; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: imull %ebx, %ecx ; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: subl %eax, %esi ; X86-NEXT: subl %eax, %esi
; X86-NEXT: sbbl %ecx, %edi ; X86-NEXT: sbbl %ecx, %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
Show All 36 Lines
; X64-NEXT: movq %rsi, %r12 ; X64-NEXT: movq %rsi, %r12
; X64-NEXT: movq %rdi, %r13 ; X64-NEXT: movq %rdi, %r13
; X64-NEXT: callq __udivti3@PLT ; X64-NEXT: callq __udivti3@PLT
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rdx, 8(%rbx) ; X64-NEXT: movq %rdx, 8(%rbx)
; X64-NEXT: movq %rax, (%rbx) ; X64-NEXT: movq %rax, (%rbx)
; X64-NEXT: imulq %rax, %r14 ; X64-NEXT: imulq %rax, %r14
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: addq %r14, %rdx
; X64-NEXT: imulq %r15, %rcx ; X64-NEXT: imulq %r15, %rcx
; X64-NEXT: addq %r14, %rcx
; X64-NEXT: addq %rdx, %rcx ; X64-NEXT: addq %rdx, %rcx
; X64-NEXT: subq %rax, %r13 ; X64-NEXT: subq %rax, %r13
; X64-NEXT: sbbq %rcx, %r12 ; X64-NEXT: sbbq %rcx, %r12
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq %r12, %rdx ; X64-NEXT: movq %r12, %rdx
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: popq %r12 ; X64-NEXT: popq %r12
; X64-NEXT: popq %r13 ; X64-NEXT: popq %r13
▲ Show 20 Lines • Show All 822 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/divide-by-constant.ll

Show First 20 Lines • Show All 787 Lines • ▼ Show 20 Lines
; X32-NEXT: shrl %edx ; X32-NEXT: shrl %edx
; X32-NEXT: leal (%edx,%edx,2), %eax ; X32-NEXT: leal (%edx,%edx,2), %eax
; X32-NEXT: subl %eax, %esi ; X32-NEXT: subl %eax, %esi
; X32-NEXT: subl %esi, %ecx ; X32-NEXT: subl %esi, %ecx
; X32-NEXT: sbbl $0, %edi ; X32-NEXT: sbbl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA ; X32-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-1431655765, %edi, %esi # imm = 0xAAAAAAAB
; X32-NEXT: imull $-1431655765, %edi, %ecx # imm = 0xAAAAAAAB ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_3: ; X64-LABEL: udiv_i64_3:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
Show All 24 Lines
; X32-NEXT: shrl $2, %edx ; X32-NEXT: shrl $2, %edx
; X32-NEXT: leal (%edx,%edx,4), %eax ; X32-NEXT: leal (%edx,%edx,4), %eax
; X32-NEXT: subl %eax, %esi ; X32-NEXT: subl %eax, %esi
; X32-NEXT: subl %esi, %ecx ; X32-NEXT: subl %esi, %ecx
; X32-NEXT: sbbl $0, %edi ; X32-NEXT: sbbl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: imull $-858993460, %ecx, %ecx # imm = 0xCCCCCCCC ; X32-NEXT: imull $-858993460, %ecx, %ecx # imm = 0xCCCCCCCC
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-858993459, %edi, %esi # imm = 0xCCCCCCCD
; X32-NEXT: imull $-858993459, %edi, %ecx # imm = 0xCCCCCCCD ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_5: ; X64-LABEL: udiv_i64_5:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
Show All 25 Lines
; X32-NEXT: leal (%eax,%eax,2), %eax ; X32-NEXT: leal (%eax,%eax,2), %eax
; X32-NEXT: subl %eax, %esi ; X32-NEXT: subl %eax, %esi
; X32-NEXT: subl %esi, %ecx ; X32-NEXT: subl %esi, %ecx
; X32-NEXT: sbbl $0, %edi ; X32-NEXT: sbbl $0, %edi
; X32-NEXT: movl $-286331153, %edx # imm = 0xEEEEEEEF ; X32-NEXT: movl $-286331153, %edx # imm = 0xEEEEEEEF
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edx ; X32-NEXT: mull %edx
; X32-NEXT: imull $-286331154, %ecx, %ecx # imm = 0xEEEEEEEE ; X32-NEXT: imull $-286331154, %ecx, %ecx # imm = 0xEEEEEEEE
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-286331153, %edi, %esi # imm = 0xEEEEEEEF
; X32-NEXT: imull $-286331153, %edi, %ecx # imm = 0xEEEEEEEF ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_15: ; X64-LABEL: udiv_i64_15:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movabsq $-8608480567731124087, %rcx # imm = 0x8888888888888889 ; X64-NEXT: movabsq $-8608480567731124087, %rcx # imm = 0x8888888888888889
Show All 25 Lines
; X32-NEXT: shrl $4, %edx ; X32-NEXT: shrl $4, %edx
; X32-NEXT: addl %eax, %edx ; X32-NEXT: addl %eax, %edx
; X32-NEXT: subl %edx, %esi ; X32-NEXT: subl %edx, %esi
; X32-NEXT: subl %esi, %ecx ; X32-NEXT: subl %esi, %ecx
; X32-NEXT: sbbl $0, %edi ; X32-NEXT: sbbl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: imull $-252645136, %ecx, %ecx # imm = 0xF0F0F0F0 ; X32-NEXT: imull $-252645136, %ecx, %ecx # imm = 0xF0F0F0F0
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-252645135, %edi, %esi # imm = 0xF0F0F0F1
; X32-NEXT: imull $-252645135, %edi, %ecx # imm = 0xF0F0F0F1 ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_17: ; X64-LABEL: udiv_i64_17:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
Show All 26 Lines
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: adcl %edx, %eax ; X32-NEXT: adcl %edx, %eax
; X32-NEXT: subl %eax, %ecx ; X32-NEXT: subl %eax, %ecx
; X32-NEXT: sbbl $0, %esi ; X32-NEXT: sbbl $0, %esi
; X32-NEXT: movl $-16843009, %edx # imm = 0xFEFEFEFF ; X32-NEXT: movl $-16843009, %edx # imm = 0xFEFEFEFF
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edx ; X32-NEXT: mull %edx
; X32-NEXT: imull $-16843010, %ecx, %ecx # imm = 0xFEFEFEFE ; X32-NEXT: imull $-16843010, %ecx, %ecx # imm = 0xFEFEFEFE
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-16843009, %esi, %esi # imm = 0xFEFEFEFF
; X32-NEXT: imull $-16843009, %esi, %ecx # imm = 0xFEFEFEFF ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_255: ; X64-LABEL: udiv_i64_255:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movabsq $-9187201950435737471, %rcx # imm = 0x8080808080808081 ; X64-NEXT: movabsq $-9187201950435737471, %rcx # imm = 0x8080808080808081
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %rcx
Show All 24 Lines
; X32-NEXT: shrl $8, %edx ; X32-NEXT: shrl $8, %edx
; X32-NEXT: addl %eax, %edx ; X32-NEXT: addl %eax, %edx
; X32-NEXT: subl %edx, %esi ; X32-NEXT: subl %edx, %esi
; X32-NEXT: subl %esi, %ecx ; X32-NEXT: subl %esi, %ecx
; X32-NEXT: sbbl $0, %edi ; X32-NEXT: sbbl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: imull $-16711936, %ecx, %ecx # imm = 0xFF00FF00 ; X32-NEXT: imull $-16711936, %ecx, %ecx # imm = 0xFF00FF00
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-16711935, %edi, %esi # imm = 0xFF00FF01
; X32-NEXT: imull $-16711935, %edi, %ecx # imm = 0xFF00FF01 ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_257: ; X64-LABEL: udiv_i64_257:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
▲ Show 20 Lines • Show All 117 Lines • ▼ Show 20 Lines
; X32-NEXT: shrl %edx ; X32-NEXT: shrl %edx
; X32-NEXT: leal (%edx,%edx,2), %eax ; X32-NEXT: leal (%edx,%edx,2), %eax
; X32-NEXT: subl %eax, %esi ; X32-NEXT: subl %eax, %esi
; X32-NEXT: subl %esi, %ecx ; X32-NEXT: subl %esi, %ecx
; X32-NEXT: sbbl $0, %edi ; X32-NEXT: sbbl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA ; X32-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull $-1431655765, %edi, %esi # imm = 0xAAAAAAAB
; X32-NEXT: imull $-1431655765, %edi, %ecx # imm = 0xAAAAAAAB ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: udiv_i64_12: ; X64-LABEL: udiv_i64_12:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
Show All 38 Lines

llvm/test/CodeGen/X86/divmod128.ll

Show First 20 Lines • Show All 476 Lines • ▼ Show 20 Lines
; X86-64-NEXT: leaq (%rdx,%rdx,2), %rax ; X86-64-NEXT: leaq (%rdx,%rdx,2), %rax
; X86-64-NEXT: subq %rax, %rcx ; X86-64-NEXT: subq %rax, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA ; X86-64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_3: ; WIN64-LABEL: udiv_i128_3:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %rdx, %r9 ; WIN64-NEXT: addq %rdx, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-6148914691236517205, %r10 # imm = 0xAAAAAAAAAAAAAAAB ; WIN64-NEXT: movabsq $-6148914691236517205, %r10 # imm = 0xAAAAAAAAAAAAAAAB
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: shrq %rdx ; WIN64-NEXT: shrq %rdx
; WIN64-NEXT: leaq (%rdx,%rdx,2), %rax ; WIN64-NEXT: leaq (%rdx,%rdx,2), %rax
; WIN64-NEXT: subq %rax, %r9 ; WIN64-NEXT: subq %rax, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-6148914691236517206, %r9 # imm = 0xAAAAAAAAAAAAAAAA ; WIN64-NEXT: movabsq $-6148914691236517206, %r9 # imm = 0xAAAAAAAAAAAAAAAA
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 3 %rem = udiv i128 %x, 3
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_5(i128 %x) nounwind { define i128 @udiv_i128_5(i128 %x) nounwind {
Show All 9 Lines
; X86-64-NEXT: leaq (%rdx,%rdx,4), %rax ; X86-64-NEXT: leaq (%rdx,%rdx,4), %rax
; X86-64-NEXT: subq %rax, %rcx ; X86-64-NEXT: subq %rax, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-3689348814741910324, %rcx # imm = 0xCCCCCCCCCCCCCCCC ; X86-64-NEXT: movabsq $-3689348814741910324, %rcx # imm = 0xCCCCCCCCCCCCCCCC
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_5: ; WIN64-LABEL: udiv_i128_5:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %rdx, %r9 ; WIN64-NEXT: addq %rdx, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-3689348814741910323, %r10 # imm = 0xCCCCCCCCCCCCCCCD ; WIN64-NEXT: movabsq $-3689348814741910323, %r10 # imm = 0xCCCCCCCCCCCCCCCD
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: shrq $2, %rdx ; WIN64-NEXT: shrq $2, %rdx
; WIN64-NEXT: leaq (%rdx,%rdx,4), %rax ; WIN64-NEXT: leaq (%rdx,%rdx,4), %rax
; WIN64-NEXT: subq %rax, %r9 ; WIN64-NEXT: subq %rax, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-3689348814741910324, %r9 # imm = 0xCCCCCCCCCCCCCCCC ; WIN64-NEXT: movabsq $-3689348814741910324, %r9 # imm = 0xCCCCCCCCCCCCCCCC
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 5 %rem = udiv i128 %x, 5
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_15(i128 %x) nounwind { define i128 @udiv_i128_15(i128 %x) nounwind {
Show All 11 Lines
; X86-64-NEXT: subq %rax, %rcx ; X86-64-NEXT: subq %rax, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-1229782938247303442, %rcx # imm = 0xEEEEEEEEEEEEEEEE ; X86-64-NEXT: movabsq $-1229782938247303442, %rcx # imm = 0xEEEEEEEEEEEEEEEE
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movabsq $-1229782938247303441, %r8 # imm = 0xEEEEEEEEEEEEEEEF ; X86-64-NEXT: movabsq $-1229782938247303441, %r8 # imm = 0xEEEEEEEEEEEEEEEF
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_15: ; WIN64-LABEL: udiv_i128_15:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %rdx, %r9 ; WIN64-NEXT: addq %rdx, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-8608480567731124087, %rdx # imm = 0x8888888888888889 ; WIN64-NEXT: movabsq $-8608480567731124087, %rdx # imm = 0x8888888888888889
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %rdx ; WIN64-NEXT: mulq %rdx
; WIN64-NEXT: shrq $3, %rdx ; WIN64-NEXT: shrq $3, %rdx
; WIN64-NEXT: leaq (%rdx,%rdx,4), %rax ; WIN64-NEXT: leaq (%rdx,%rdx,4), %rax
; WIN64-NEXT: leaq (%rax,%rax,2), %rax ; WIN64-NEXT: leaq (%rax,%rax,2), %rax
; WIN64-NEXT: subq %rax, %r9 ; WIN64-NEXT: subq %rax, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-1229782938247303442, %r9 # imm = 0xEEEEEEEEEEEEEEEE ; WIN64-NEXT: movabsq $-1229782938247303442, %r9 # imm = 0xEEEEEEEEEEEEEEEE
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movabsq $-1229782938247303441, %r10 # imm = 0xEEEEEEEEEEEEEEEF ; WIN64-NEXT: movabsq $-1229782938247303441, %r10 # imm = 0xEEEEEEEEEEEEEEEF
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 15 %rem = udiv i128 %x, 15
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_17(i128 %x) nounwind { define i128 @udiv_i128_17(i128 %x) nounwind {
Show All 11 Lines
; X86-64-NEXT: addq %rax, %rdx ; X86-64-NEXT: addq %rax, %rdx
; X86-64-NEXT: subq %rdx, %rcx ; X86-64-NEXT: subq %rdx, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-1085102592571150096, %rcx # imm = 0xF0F0F0F0F0F0F0F0 ; X86-64-NEXT: movabsq $-1085102592571150096, %rcx # imm = 0xF0F0F0F0F0F0F0F0
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_17: ; WIN64-LABEL: udiv_i128_17:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %rdx, %r9 ; WIN64-NEXT: addq %rdx, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-1085102592571150095, %r10 # imm = 0xF0F0F0F0F0F0F0F1 ; WIN64-NEXT: movabsq $-1085102592571150095, %r10 # imm = 0xF0F0F0F0F0F0F0F1
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: movq %rdx, %rax ; WIN64-NEXT: movq %rdx, %rax
; WIN64-NEXT: andq $-16, %rax ; WIN64-NEXT: andq $-16, %rax
; WIN64-NEXT: shrq $4, %rdx ; WIN64-NEXT: shrq $4, %rdx
; WIN64-NEXT: addq %rax, %rdx ; WIN64-NEXT: addq %rax, %rdx
; WIN64-NEXT: subq %rdx, %r9 ; WIN64-NEXT: subq %rdx, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-1085102592571150096, %r9 # imm = 0xF0F0F0F0F0F0F0F0 ; WIN64-NEXT: movabsq $-1085102592571150096, %r9 # imm = 0xF0F0F0F0F0F0F0F0
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 17 %rem = udiv i128 %x, 17
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_255(i128 %x) nounwind { define i128 @udiv_i128_255(i128 %x) nounwind {
Show All 13 Lines
; X86-64-NEXT: adcq %rdx, %rax ; X86-64-NEXT: adcq %rdx, %rax
; X86-64-NEXT: subq %rax, %rdi ; X86-64-NEXT: subq %rax, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-72340172838076674, %rcx # imm = 0xFEFEFEFEFEFEFEFE ; X86-64-NEXT: movabsq $-72340172838076674, %rcx # imm = 0xFEFEFEFEFEFEFEFE
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movabsq $-72340172838076673, %r8 # imm = 0xFEFEFEFEFEFEFEFF ; X86-64-NEXT: movabsq $-72340172838076673, %r8 # imm = 0xFEFEFEFEFEFEFEFF
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_255: ; WIN64-LABEL: udiv_i128_255:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: addq %rdx, %rax ; WIN64-NEXT: addq %rdx, %rax
Show All 9 Lines
; WIN64-NEXT: adcq %rdx, %rax ; WIN64-NEXT: adcq %rdx, %rax
; WIN64-NEXT: subq %rax, %rcx ; WIN64-NEXT: subq %rax, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-72340172838076674, %r9 # imm = 0xFEFEFEFEFEFEFEFE ; WIN64-NEXT: movabsq $-72340172838076674, %r9 # imm = 0xFEFEFEFEFEFEFEFE
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movabsq $-72340172838076673, %r10 # imm = 0xFEFEFEFEFEFEFEFF ; WIN64-NEXT: movabsq $-72340172838076673, %r10 # imm = 0xFEFEFEFEFEFEFEFF
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 255 %rem = udiv i128 %x, 255
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_257(i128 %x) nounwind { define i128 @udiv_i128_257(i128 %x) nounwind {
Show All 11 Lines
; X86-64-NEXT: addq %rax, %rdx ; X86-64-NEXT: addq %rax, %rdx
; X86-64-NEXT: subq %rdx, %rcx ; X86-64-NEXT: subq %rdx, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-71777214294589696, %rcx # imm = 0xFF00FF00FF00FF00 ; X86-64-NEXT: movabsq $-71777214294589696, %rcx # imm = 0xFF00FF00FF00FF00
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_257: ; WIN64-LABEL: udiv_i128_257:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %rdx, %r9 ; WIN64-NEXT: addq %rdx, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-71777214294589695, %r10 # imm = 0xFF00FF00FF00FF01 ; WIN64-NEXT: movabsq $-71777214294589695, %r10 # imm = 0xFF00FF00FF00FF01
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: movq %rdx, %rax ; WIN64-NEXT: movq %rdx, %rax
; WIN64-NEXT: andq $-256, %rax ; WIN64-NEXT: andq $-256, %rax
; WIN64-NEXT: shrq $8, %rdx ; WIN64-NEXT: shrq $8, %rdx
; WIN64-NEXT: addq %rax, %rdx ; WIN64-NEXT: addq %rax, %rdx
; WIN64-NEXT: subq %rdx, %r9 ; WIN64-NEXT: subq %rdx, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-71777214294589696, %r9 # imm = 0xFF00FF00FF00FF00 ; WIN64-NEXT: movabsq $-71777214294589696, %r9 # imm = 0xFF00FF00FF00FF00
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 257 %rem = udiv i128 %x, 257
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_65535(i128 %x) nounwind { define i128 @udiv_i128_65535(i128 %x) nounwind {
Show All 13 Lines
; X86-64-NEXT: adcq %rdx, %rax ; X86-64-NEXT: adcq %rdx, %rax
; X86-64-NEXT: subq %rax, %rdi ; X86-64-NEXT: subq %rax, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-281479271743490, %rcx # imm = 0xFFFEFFFEFFFEFFFE ; X86-64-NEXT: movabsq $-281479271743490, %rcx # imm = 0xFFFEFFFEFFFEFFFE
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movabsq $-281479271743489, %r8 # imm = 0xFFFEFFFEFFFEFFFF ; X86-64-NEXT: movabsq $-281479271743489, %r8 # imm = 0xFFFEFFFEFFFEFFFF
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_65535: ; WIN64-LABEL: udiv_i128_65535:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: addq %rdx, %rax ; WIN64-NEXT: addq %rdx, %rax
Show All 9 Lines
; WIN64-NEXT: adcq %rdx, %rax ; WIN64-NEXT: adcq %rdx, %rax
; WIN64-NEXT: subq %rax, %rcx ; WIN64-NEXT: subq %rax, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-281479271743490, %r9 # imm = 0xFFFEFFFEFFFEFFFE ; WIN64-NEXT: movabsq $-281479271743490, %r9 # imm = 0xFFFEFFFEFFFEFFFE
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movabsq $-281479271743489, %r10 # imm = 0xFFFEFFFEFFFEFFFF ; WIN64-NEXT: movabsq $-281479271743489, %r10 # imm = 0xFFFEFFFEFFFEFFFF
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 65535 %rem = udiv i128 %x, 65535
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_65537(i128 %x) nounwind { define i128 @udiv_i128_65537(i128 %x) nounwind {
Show All 11 Lines
; X86-64-NEXT: addq %rax, %rdx ; X86-64-NEXT: addq %rax, %rdx
; X86-64-NEXT: subq %rdx, %rcx ; X86-64-NEXT: subq %rdx, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-281470681808896, %rcx # imm = 0xFFFF0000FFFF0000 ; X86-64-NEXT: movabsq $-281470681808896, %rcx # imm = 0xFFFF0000FFFF0000
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_65537: ; WIN64-LABEL: udiv_i128_65537:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %rdx, %r9 ; WIN64-NEXT: addq %rdx, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-281470681808895, %r10 # imm = 0xFFFF0000FFFF0001 ; WIN64-NEXT: movabsq $-281470681808895, %r10 # imm = 0xFFFF0000FFFF0001
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: movq %rdx, %rax ; WIN64-NEXT: movq %rdx, %rax
; WIN64-NEXT: andq $-65536, %rax # imm = 0xFFFF0000 ; WIN64-NEXT: andq $-65536, %rax # imm = 0xFFFF0000
; WIN64-NEXT: shrq $16, %rdx ; WIN64-NEXT: shrq $16, %rdx
; WIN64-NEXT: addq %rax, %rdx ; WIN64-NEXT: addq %rax, %rdx
; WIN64-NEXT: subq %rdx, %r9 ; WIN64-NEXT: subq %rdx, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-281470681808896, %r9 # imm = 0xFFFF0000FFFF0000 ; WIN64-NEXT: movabsq $-281470681808896, %r9 # imm = 0xFFFF0000FFFF0000
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 65537 %rem = udiv i128 %x, 65537
ret i128 %rem ret i128 %rem
} }
define i128 @udiv_i128_12(i128 %x) nounwind { define i128 @udiv_i128_12(i128 %x) nounwind {
Show All 11 Lines
; X86-64-NEXT: leaq (%rdx,%rdx,2), %rax ; X86-64-NEXT: leaq (%rdx,%rdx,2), %rax
; X86-64-NEXT: subq %rax, %rcx ; X86-64-NEXT: subq %rax, %rcx
; X86-64-NEXT: subq %rcx, %rdi ; X86-64-NEXT: subq %rcx, %rdi
; X86-64-NEXT: sbbq $0, %rsi ; X86-64-NEXT: sbbq $0, %rsi
; X86-64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA ; X86-64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
; X86-64-NEXT: imulq %rdi, %rcx ; X86-64-NEXT: imulq %rdi, %rcx
; X86-64-NEXT: movq %rdi, %rax ; X86-64-NEXT: movq %rdi, %rax
; X86-64-NEXT: mulq %r8 ; X86-64-NEXT: mulq %r8
; X86-64-NEXT: addq %rcx, %rdx
; X86-64-NEXT: imulq %rsi, %r8 ; X86-64-NEXT: imulq %rsi, %r8
; X86-64-NEXT: addq %rcx, %r8
; X86-64-NEXT: addq %r8, %rdx ; X86-64-NEXT: addq %r8, %rdx
; X86-64-NEXT: retq ; X86-64-NEXT: retq
; ;
; WIN64-LABEL: udiv_i128_12: ; WIN64-LABEL: udiv_i128_12:
; WIN64: # %bb.0: # %entry ; WIN64: # %bb.0: # %entry
; WIN64-NEXT: movq %rdx, %r8 ; WIN64-NEXT: movq %rdx, %r8
; WIN64-NEXT: shrdq $2, %rdx, %rcx ; WIN64-NEXT: shrdq $2, %rdx, %rcx
; WIN64-NEXT: shrq $2, %r8 ; WIN64-NEXT: shrq $2, %r8
; WIN64-NEXT: movq %rcx, %r9 ; WIN64-NEXT: movq %rcx, %r9
; WIN64-NEXT: addq %r8, %r9 ; WIN64-NEXT: addq %r8, %r9
; WIN64-NEXT: adcq $0, %r9 ; WIN64-NEXT: adcq $0, %r9
; WIN64-NEXT: movabsq $-6148914691236517205, %r10 # imm = 0xAAAAAAAAAAAAAAAB ; WIN64-NEXT: movabsq $-6148914691236517205, %r10 # imm = 0xAAAAAAAAAAAAAAAB
; WIN64-NEXT: movq %r9, %rax ; WIN64-NEXT: movq %r9, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: shrq %rdx ; WIN64-NEXT: shrq %rdx
; WIN64-NEXT: leaq (%rdx,%rdx,2), %rax ; WIN64-NEXT: leaq (%rdx,%rdx,2), %rax
; WIN64-NEXT: subq %rax, %r9 ; WIN64-NEXT: subq %rax, %r9
; WIN64-NEXT: subq %r9, %rcx ; WIN64-NEXT: subq %r9, %rcx
; WIN64-NEXT: sbbq $0, %r8 ; WIN64-NEXT: sbbq $0, %r8
; WIN64-NEXT: movabsq $-6148914691236517206, %r9 # imm = 0xAAAAAAAAAAAAAAAA ; WIN64-NEXT: movabsq $-6148914691236517206, %r9 # imm = 0xAAAAAAAAAAAAAAAA
; WIN64-NEXT: imulq %rcx, %r9 ; WIN64-NEXT: imulq %rcx, %r9
; WIN64-NEXT: movq %rcx, %rax ; WIN64-NEXT: movq %rcx, %rax
; WIN64-NEXT: mulq %r10 ; WIN64-NEXT: mulq %r10
; WIN64-NEXT: addq %r9, %rdx
; WIN64-NEXT: imulq %r10, %r8 ; WIN64-NEXT: imulq %r10, %r8
; WIN64-NEXT: addq %r9, %r8
; WIN64-NEXT: addq %r8, %rdx ; WIN64-NEXT: addq %r8, %rdx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
entry: entry:
%rem = udiv i128 %x, 12 %rem = udiv i128 %x, 12
ret i128 %rem ret i128 %rem
} }
; Make sure we don't inline expand for minsize. ; Make sure we don't inline expand for minsize.
▲ Show 20 Lines • Show All 63 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/fold-add.ll

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; STATIC-NEXT: movabsq $-2147483649, %rax ; STATIC-NEXT: movabsq $-2147483649, %rax
; STATIC-NEXT: leaq foo(%rax), %rax ; STATIC-NEXT: leaq foo(%rax), %rax
; PIC-NEXT: leaq foo(%rip), %rcx ; PIC-NEXT: leaq foo(%rip), %rcx
; PIC-NEXT: movabsq $-2147483649, %rax ; PIC-NEXT: movabsq $-2147483649, %rax
; PIC-NEXT: addq %rcx, %rax ; PIC-NEXT: addq %rcx, %rax
; MSTATIC-NEXT: movabsq $-2147483649, %rcx ; MSTATIC-NEXT: movabsq $-2147483649, %rcx
; MSTATIC-NEXT: movabsq $foo, %rax ; MSTATIC-NEXT: movabsq $foo, %rax
; MSTATIC-NEXT: addq %rcx, %rax ; MSTATIC-NEXT: addq %rcx, %rax
; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax ; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
; MPIC-NEXT: movabsq $foo@GOTOFF, %rcx ; MPIC-NEXT: movabsq $foo@GOTOFF, %rdx
; MPIC-NEXT: addq %rax, %rcx
; MPIC-NEXT: movabsq $-2147483649, %rax ; MPIC-NEXT: movabsq $-2147483649, %rax
; MPIC-NEXT: addq %rdx, %rax
; MPIC-NEXT: addq %rcx, %rax ; MPIC-NEXT: addq %rcx, %rax
entry: entry:
ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 -2147483649) ret i64 add (i64 ptrtoint (ptr @foo to i64), i64 -2147483649)
} }
attributes #0 = { nounwind } attributes #0 = { nounwind }

llvm/test/CodeGen/X86/fold-tied-op.ll

Show All 18 Lines
; CHECK-NEXT: .cfi_def_cfa_register %ebp ; CHECK-NEXT: .cfi_def_cfa_register %ebp
; CHECK-NEXT: pushl %ebx ; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi ; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi ; CHECK-NEXT: pushl %esi
; CHECK-NEXT: subl $12, %esp ; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: .cfi_offset %esi, -20 ; CHECK-NEXT: .cfi_offset %esi, -20
; CHECK-NEXT: .cfi_offset %edi, -16 ; CHECK-NEXT: .cfi_offset %edi, -16
; CHECK-NEXT: .cfi_offset %ebx, -12 ; CHECK-NEXT: .cfi_offset %ebx, -12
; CHECK-NEXT: movl $-1028477379, %ebx # imm = 0xC2B2AE3D ; CHECK-NEXT: movl $-1028477379, %edi # imm = 0xC2B2AE3D
; CHECK-NEXT: movl $668265295, %ecx # imm = 0x27D4EB4F ; CHECK-NEXT: movl $668265295, %ebx # imm = 0x27D4EB4F
; CHECK-NEXT: movl a, %edi ; CHECK-NEXT: movl a, %eax
; CHECK-NEXT: cmpl $0, (%edi) ; CHECK-NEXT: cmpl $0, (%eax)
; CHECK-NEXT: je .LBB0_2 ; CHECK-NEXT: je .LBB0_2
; CHECK-NEXT: # %bb.1: # %if.then ; CHECK-NEXT: # %bb.1: # %if.then
; CHECK-NEXT: movl 8(%edi), %esi ; CHECK-NEXT: movl 8(%eax), %edi
; CHECK-NEXT: movl 12(%edi), %eax ; CHECK-NEXT: movl 12(%eax), %esi
; CHECK-NEXT: movl %eax, %edx ; CHECK-NEXT: movl %esi, %edx
; CHECK-NEXT: shldl $1, %esi, %edx ; CHECK-NEXT: shldl $1, %edi, %edx
; CHECK-NEXT: orl %eax, %edx ; CHECK-NEXT: orl %esi, %edx
; CHECK-NEXT: leal (%esi,%esi), %eax ; CHECK-NEXT: leal (%edi,%edi), %ecx
; CHECK-NEXT: orl %esi, %eax ; CHECK-NEXT: orl %edi, %ecx
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl 16(%edi), %ebx ; CHECK-NEXT: movl 16(%eax), %ecx
; CHECK-NEXT: movl 20(%edi), %esi ; CHECK-NEXT: movl 20(%eax), %esi
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: shldl $2, %ebx, %eax ; CHECK-NEXT: shldl $2, %ecx, %edi
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl %ebx, %eax ; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: movl %esi, %ebx ; CHECK-NEXT: shldl $31, %ecx, %edi
; CHECK-NEXT: shldl $31, %eax, %ebx ; CHECK-NEXT: shll $2, %ecx
; CHECK-NEXT: shll $2, %eax ; CHECK-NEXT: orl %edi, %ecx
; CHECK-NEXT: orl %ebx, %eax
; CHECK-NEXT: shrl %esi ; CHECK-NEXT: shrl %esi
; CHECK-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; CHECK-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; CHECK-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; CHECK-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: adcl %edx, %esi ; CHECK-NEXT: adcl %edx, %esi
; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; CHECK-NEXT: movl 28(%eax), %ecx
; CHECK-NEXT: movl 24(%edi), %eax ; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl 24(%eax), %eax
; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: movl $-1028477379, %ebx # imm = 0xC2B2AE3D ; CHECK-NEXT: movl $-1028477379, %ecx # imm = 0xC2B2AE3D
; CHECK-NEXT: imull %eax, %ecx
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: movl %eax, %edi
; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; CHECK-NEXT: imull %eax, %ebx ; CHECK-NEXT: imull %eax, %ebx
; CHECK-NEXT: mull %ecx ; CHECK-NEXT: addl %ecx, %ebx
; CHECK-NEXT: movl %eax, %esi ; CHECK-NEXT: addl %edx, %ebx
; CHECK-NEXT: addl %ebx, %edx ; CHECK-NEXT: imull $1336530590, %eax, %ecx # imm = 0x4FA9D69E
; CHECK-NEXT: movl 28(%edi), %edi ; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; CHECK-NEXT: imull %edi, %ecx ; CHECK-NEXT: imull $-2056954758, %edx, %eax # imm = 0x85655C7A
; CHECK-NEXT: addl %edx, %ecx ; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: movl $1336530590, %edx # imm = 0x4FA9D69E ; CHECK-NEXT: movl $1336530590, %edx # imm = 0x4FA9D69E
; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: mull %edx ; CHECK-NEXT: mull %edx
; CHECK-NEXT: imull $-2056954758, %ebx, %ebx # imm = 0x85655C7A ; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %edx, %ebx ; CHECK-NEXT: shrdl $3, %ebx, %edi
; CHECK-NEXT: imull $1336530590, %edi, %edx # imm = 0x4FA9D69E ; CHECK-NEXT: sarl $3, %ebx
; CHECK-NEXT: addl %ebx, %edx ; CHECK-NEXT: orl %ecx, %ebx
; CHECK-NEXT: shrdl $3, %ecx, %esi ; CHECK-NEXT: orl %eax, %edi
; CHECK-NEXT: sarl $3, %ecx ; CHECK-NEXT: imull $326129324, %edi, %eax # imm = 0x137056AC
; CHECK-NEXT: orl %edx, %ecx ; CHECK-NEXT: imull $-66860409, %ebx, %ecx # imm = 0xFC03CA87
; CHECK-NEXT: orl %eax, %esi
; CHECK-NEXT: movl $-66860409, %ebx # imm = 0xFC03CA87
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: movl %eax, %edi
; CHECK-NEXT: imull $326129324, %esi, %eax # imm = 0x137056AC
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: imull $-66860409, %ecx, %ecx # imm = 0xFC03CA87
; CHECK-NEXT: addl %eax, %ecx ; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; CHECK-NEXT: movl $-66860409, %ebx # imm = 0xFC03CA87
; CHECK-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; CHECK-NEXT: movl %edi, b
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: mull %ebx ; CHECK-NEXT: mull %ebx
; CHECK-NEXT: imull $326129324, %edi, %esi # imm = 0x137056AC ; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %edx, %esi ; CHECK-NEXT: xorl %esi, %ecx
; CHECK-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; CHECK-NEXT: movl %ecx, b+4 ; CHECK-NEXT: movl %ecx, b+4
; CHECK-NEXT: imull $326129324, %eax, %edx # imm = 0x137056AC
; CHECK-NEXT: imull $-66860409, %ecx, %ecx # imm = 0xFC03CA87 ; CHECK-NEXT: imull $-66860409, %ecx, %ecx # imm = 0xFC03CA87
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: movl %eax, b
; CHECK-NEXT: mull %ebx
; CHECK-NEXT: jmp .LBB0_3 ; CHECK-NEXT: jmp .LBB0_3
; CHECK-NEXT: .LBB0_2: # %if.else ; CHECK-NEXT: .LBB0_2: # %if.else
; CHECK-NEXT: xorl b+4, %ebx ; CHECK-NEXT: xorl b+4, %edi
; CHECK-NEXT: xorl b, %ecx ; CHECK-NEXT: xorl b, %ebx
; CHECK-NEXT: movl $1419758215, %edx # imm = 0x549FCA87 ; CHECK-NEXT: movl $1419758215, %ecx # imm = 0x549FCA87
; CHECK-NEXT: movl %ecx, %eax ; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: mull %edx ; CHECK-NEXT: mull %ecx
; CHECK-NEXT: imull $93298681, %ecx, %esi # imm = 0x58F9FF9 ; CHECK-NEXT: imull $93298681, %ebx, %esi # imm = 0x58F9FF9
; CHECK-NEXT: addl %edx, %esi ; CHECK-NEXT: imull $1419758215, %edi, %ecx # imm = 0x549FCA87
; CHECK-NEXT: imull $1419758215, %ebx, %ecx # imm = 0x549FCA87
; CHECK-NEXT: .LBB0_3: # %if.end
; CHECK-NEXT: addl %esi, %ecx ; CHECK-NEXT: addl %esi, %ecx
; CHECK-NEXT: .LBB0_3: # %if.end
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl $-1028477341, %eax # imm = 0xC2B2AE63 ; CHECK-NEXT: addl $-1028477341, %eax # imm = 0xC2B2AE63
; CHECK-NEXT: adcl $-2048144777, %ecx # imm = 0x85EBCA77 ; CHECK-NEXT: adcl $-2048144777, %ecx # imm = 0x85EBCA77
; CHECK-NEXT: movl %eax, b ; CHECK-NEXT: movl %eax, b
; CHECK-NEXT: movl %ecx, b+4 ; CHECK-NEXT: movl %ecx, b+4
; CHECK-NEXT: addl $12, %esp ; CHECK-NEXT: addl $12, %esp
; CHECK-NEXT: popl %esi ; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %edi ; CHECK-NEXT: popl %edi
; CHECK-NEXT: popl %ebx ; CHECK-NEXT: popl %ebx
▲ Show 20 Lines • Show All 62 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/h-registers-1.ll

Show All 24 Lines
; CHECK-NEXT: movq %r8, %rax ; CHECK-NEXT: movq %r8, %rax
; CHECK-NEXT: movzbl %ah, %ecx ; CHECK-NEXT: movzbl %ah, %ecx
; CHECK-NEXT: movq %r9, %rax ; CHECK-NEXT: movq %r9, %rax
; CHECK-NEXT: movzbl %ah, %ebx ; CHECK-NEXT: movzbl %ah, %ebx
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d ; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %r8d
; CHECK-NEXT: addq %rdi, %rsi ; CHECK-NEXT: addq %rdi, %rsi
; CHECK-NEXT: addq %rbp, %rdx ; CHECK-NEXT: addq %rbp, %rdx
; CHECK-NEXT: addq %rsi, %rdx
; CHECK-NEXT: addq %rbx, %rcx ; CHECK-NEXT: addq %rbx, %rcx
; CHECK-NEXT: addq %r8, %rax ; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: addq %rdx, %rax ; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: popq %rbp ; CHECK-NEXT: popq %rbp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; GNUX32-LABEL: foo: ; GNUX32-LABEL: foo:
; GNUX32: # %bb.0: ; GNUX32: # %bb.0:
Show All 12 Lines
; GNUX32-NEXT: movq %r8, %rax ; GNUX32-NEXT: movq %r8, %rax
; GNUX32-NEXT: movzbl %ah, %ecx ; GNUX32-NEXT: movzbl %ah, %ecx
; GNUX32-NEXT: movq %r9, %rax ; GNUX32-NEXT: movq %r9, %rax
; GNUX32-NEXT: movzbl %ah, %ebx ; GNUX32-NEXT: movzbl %ah, %ebx
; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %eax ; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %r8d ; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %r8d
; GNUX32-NEXT: addq %rdi, %rsi ; GNUX32-NEXT: addq %rdi, %rsi
; GNUX32-NEXT: addq %rbp, %rdx ; GNUX32-NEXT: addq %rbp, %rdx
; GNUX32-NEXT: addq %rsi, %rdx
; GNUX32-NEXT: addq %rbx, %rcx ; GNUX32-NEXT: addq %rbx, %rcx
; GNUX32-NEXT: addq %r8, %rax ; GNUX32-NEXT: addq %r8, %rax
; GNUX32-NEXT: addq %rcx, %rax ; GNUX32-NEXT: addq %rcx, %rax
; GNUX32-NEXT: addq %rdx, %rax ; GNUX32-NEXT: addq %rdx, %rax
; GNUX32-NEXT: addq %rsi, %rax
; GNUX32-NEXT: popq %rbx ; GNUX32-NEXT: popq %rbx
; GNUX32-NEXT: .cfi_def_cfa_offset 16 ; GNUX32-NEXT: .cfi_def_cfa_offset 16
; GNUX32-NEXT: popq %rbp ; GNUX32-NEXT: popq %rbp
; GNUX32-NEXT: .cfi_def_cfa_offset 8 ; GNUX32-NEXT: .cfi_def_cfa_offset 8
; GNUX32-NEXT: retq ; GNUX32-NEXT: retq
%sa = lshr i64 %a, 8 %sa = lshr i64 %a, 8
%A = and i64 %sa, 255 %A = and i64 %sa, 255
%sb = lshr i64 %b, 8 %sb = lshr i64 %b, 8
Show All 25 Lines

llvm/test/CodeGen/X86/hipe-cc.ll

Show All 15 Linesentry:
; CHECK-NEXT: movl $1, 8(%esp) ; CHECK-NEXT: movl $1, 8(%esp)
; CHECK: calll foo ; CHECK: calll foo
tail call void @foo(i32 undef, i32 undef, i32 1, i32 2, i32 %res) nounwind tail call void @foo(i32 undef, i32 undef, i32 1, i32 2, i32 %res) nounwind
ret void ret void
} }
define cc 11 {i32, i32, i32} @addfour(i32 %hp, i32 %p, i32 %x, i32 %y, i32 %z) nounwind { define cc 11 {i32, i32, i32} @addfour(i32 %hp, i32 %p, i32 %x, i32 %y, i32 %z) nounwind {
entry: entry:
; CHECK: addl %edx, %eax ; CHECK: addl %edx, %ecx
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
%0 = add i32 %x, %y %0 = add i32 %x, %y
%1 = add i32 %0, %z %1 = add i32 %0, %z
; CHECK: ret ; CHECK: ret
%res = insertvalue {i32, i32, i32} undef, i32 %1, 2 %res = insertvalue {i32, i32, i32} undef, i32 %1, 2
ret {i32, i32, i32} %res ret {i32, i32, i32} %res
} }
▲ Show 20 Lines • Show All 61 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/hipe-cc64.ll

Show All 17 Linesentry:
; CHECK-NEXT: movq %rax, %r9 ; CHECK-NEXT: movq %rax, %r9
; CHECK: callq foo ; CHECK: callq foo
tail call void @foo(i64 undef, i64 undef, i64 1, i64 2, i64 3, i64 %res) nounwind tail call void @foo(i64 undef, i64 undef, i64 1, i64 2, i64 3, i64 %res) nounwind
ret void ret void
} }
define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind { define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
entry: entry:
; CHECK: leaq (%rsi,%rdx), %rax ; CHECK: leaq (%rdx,%rcx), %rax
; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: addq %r8, %rax ; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: addq %rsi, %rax
%0 = add i64 %x, %y %0 = add i64 %x, %y
%1 = add i64 %0, %z %1 = add i64 %0, %z
%2 = add i64 %1, %w %2 = add i64 %1, %w
; CHECK: ret ; CHECK: ret
%res = insertvalue {i64, i64, i64} undef, i64 %2, 2 %res = insertvalue {i64, i64, i64} undef, i64 %2, 2
ret {i64, i64, i64} %res ret {i64, i64, i64} %res
} }
▲ Show 20 Lines • Show All 67 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/imul.ll

Show First 20 Lines • Show All 444 Lines • ▼ Show 20 Lines
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: shlq $5, %rax ; X64-NEXT: shlq $5, %rax
; X64-NEXT: addq %rdi, %rax ; X64-NEXT: addq %rdi, %rax
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: test6: ; X86-LABEL: test6:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: pushl %esi
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: shll $5, %ecx ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %esi
; X86-NEXT: shll $5, %esi
; X86-NEXT: movl $33, %eax ; X86-NEXT: movl $33, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %edx
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
entry: entry:
%tmp3 = mul i64 %a, 33 %tmp3 = mul i64 %a, 33
ret i64 %tmp3 ret i64 %tmp3
} }
define i64 @test7(i64 %a) { define i64 @test7(i64 %a) {
; X64-LABEL: test7: ; X64-LABEL: test7:
▲ Show 20 Lines • Show All 79 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/lea-opt-cse4.ll

Show First 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; X64-NEXT: movl 16(%rdi), %eax ; X64-NEXT: movl 16(%rdi), %eax
; X64-NEXT: leal 1(%rcx,%rax), %edx ; X64-NEXT: leal 1(%rcx,%rax), %edx
; X64-NEXT: movl %edx, 12(%rdi) ; X64-NEXT: movl %edx, 12(%rdi)
; X64-NEXT: decl %esi ; X64-NEXT: decl %esi
; X64-NEXT: jne .LBB1_1 ; X64-NEXT: jne .LBB1_1
; X64-NEXT: # %bb.2: # %exit ; X64-NEXT: # %bb.2: # %exit
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: addl %eax, %ecx
; X64-NEXT: leal 1(%rax,%rcx), %ecx ; X64-NEXT: leal 1(%rax,%rcx), %ecx
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: leal (%rax,%rax), %edx
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: addl %eax, %edx
; X64-NEXT: addl %eax, %ecx ; X64-NEXT: addl %ecx, %edx
; X64-NEXT: movl %ecx, 16(%rdi) ; X64-NEXT: movl %edx, 16(%rdi)
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: foo_loop: ; X86-LABEL: foo_loop:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 12 ; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: .cfi_offset %esi, -12 ; X86-NEXT: .cfi_offset %esi, -12
; X86-NEXT: .cfi_offset %edi, -8 ; X86-NEXT: .cfi_offset %edi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90 ; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .LBB1_1: # %loop ; X86-NEXT: .LBB1_1: # %loop
; X86-NEXT: # =>This Inner Loop Header: Depth=1 ; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl (%eax), %esi ; X86-NEXT: movl (%eax), %esi
; X86-NEXT: movl 16(%eax), %ecx ; X86-NEXT: movl 16(%eax), %ecx
; X86-NEXT: leal 1(%esi,%ecx), %edi ; X86-NEXT: leal 1(%esi,%ecx), %edi
; X86-NEXT: movl %edi, 12(%eax) ; X86-NEXT: movl %edi, 12(%eax)
; X86-NEXT: decl %edx ; X86-NEXT: decl %edx
; X86-NEXT: jne .LBB1_1 ; X86-NEXT: jne .LBB1_1
; X86-NEXT: # %bb.2: # %exit ; X86-NEXT: # %bb.2: # %exit
; X86-NEXT: addl %ecx, %esi ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: leal 1(%ecx,%esi), %edx ; X86-NEXT: leal 1(%ecx,%esi), %edx
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: leal (%ecx,%ecx), %esi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %edx, %esi
; X86-NEXT: movl %edx, 16(%eax) ; X86-NEXT: movl %esi, 16(%eax)
xbolva00Unsubmitted
Not Done
ReplyInline Actions

New leas, +1

xbolva00: New leas, +1
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
entry: entry:
br label %loop br label %loop
Show All 24 Lines

llvm/test/CodeGen/X86/lea-opt2.ll

Show All 29 Linesentry:
%sub1 = sub i32 %a, %b %sub1 = sub i32 %a, %b
ret i32 %sub1 ret i32 %sub1
} }
; (A + B) + C --> C + A + B ; (A + B) + C --> C + A + B
define i32 @test2(ptr %p, i32 %a, i32 %b, i32 %c) { define i32 @test2(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: test2: ; CHECK-LABEL: test2:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: addl %edx, %ecx ; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %esi, %ecx
; CHECK-NEXT: movl %ecx, (%rdi) ; CHECK-NEXT: movl %ecx, (%rdi)
; CHECK-NEXT: subl %edx, %eax ; CHECK-NEXT: subl %edx, %eax
; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%0 = add i32 %a, %b %0 = add i32 %a, %b
%1 = add i32 %c, %0 %1 = add i32 %c, %0
store i32 %1, ptr %p, align 4 store i32 %1, ptr %p, align 4
%sub1 = sub i32 %a, %b %sub1 = sub i32 %a, %b
ret i32 %sub1 ret i32 %sub1
} }
; C + (A + B) --> C + A + B ; C + (A + B) --> C + A + B
define i32 @test3(ptr %p, i32 %a, i32 %b, i32 %c) { define i32 @test3(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: test3: ; CHECK-LABEL: test3:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: addl %edx, %ecx ; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %esi, %ecx
; CHECK-NEXT: movl %ecx, (%rdi) ; CHECK-NEXT: movl %ecx, (%rdi)
; CHECK-NEXT: subl %edx, %eax ; CHECK-NEXT: subl %edx, %eax
; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%0 = add i32 %a, %b %0 = add i32 %a, %b
%1 = add i32 %0, %c %1 = add i32 %0, %c
store i32 %1, ptr %p, align 4 store i32 %1, ptr %p, align 4
%sub1 = sub i32 %a, %b %sub1 = sub i32 %a, %b
ret i32 %sub1 ret i32 %sub1
} }
Show All 36 Linesentry:
%sub1 = sub i64 %ld, %b %sub1 = sub i64 %ld, %b
ret i64 %sub1 ret i64 %sub1
} }
define i64 @test6(ptr %p, i64 %a, i64 %b, i64 %c) { define i64 @test6(ptr %p, i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: test6: ; CHECK-LABEL: test6:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %rax, %rcx ; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: movq %rcx, (%rdi) ; CHECK-NEXT: movq %rcx, (%rdi)
; CHECK-NEXT: subq %rdx, %rax ; CHECK-NEXT: subq %rdx, %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%ld = load i64, ptr %p, align 8 %ld = load i64, ptr %p, align 8
%0 = add i64 %b, %ld %0 = add i64 %b, %ld
%1 = add i64 %0, %c %1 = add i64 %0, %c
store i64 %1, ptr %p, align 8 store i64 %1, ptr %p, align 8
%sub1 = sub i64 %ld, %b %sub1 = sub i64 %ld, %b
ret i64 %sub1 ret i64 %sub1
} }
define i64 @test7(ptr %p, i64 %a, i64 %b, i64 %c) { define i64 @test7(ptr %p, i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: test7: ; CHECK-LABEL: test7:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %rax, %rcx ; CHECK-NEXT: addq %rax, %rcx
; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: movq %rcx, (%rdi) ; CHECK-NEXT: movq %rcx, (%rdi)
; CHECK-NEXT: subq %rdx, %rax ; CHECK-NEXT: subq %rdx, %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%ld = load i64, ptr %p, align 8 %ld = load i64, ptr %p, align 8
%0 = add i64 %b, %ld %0 = add i64 %b, %ld
%1 = add i64 %c, %0 %1 = add i64 %c, %0
store i64 %1, ptr %p, align 8 store i64 %1, ptr %p, align 8
▲ Show 20 Lines • Show All 119 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/lrshrink.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s
; Checks if "%7 = add nuw nsw i64 %4, %2" is moved before the last call ; Checks if "%7 = add nuw nsw i64 %4, %2" is moved before the last call
; to minimize live-range. ; to minimize live-range.
define i64 @test(i1 %a, i64 %r1, i64 %r2, i64 %s1, i64 %s2, i64 %t1, i64 %t2) { define i64 @test(i1 %a, i64 %r1, i64 %r2, i64 %s1, i64 %s2, i64 %t1, i64 %t2) {
; CHECK-LABEL: test: ; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %r15 ; CHECK-NEXT: pushq %r15
Show All 17 Lines
; CHECK-NEXT: .LBB0_2: # %else ; CHECK-NEXT: .LBB0_2: # %else
; CHECK-NEXT: addq %r9, %rbx ; CHECK-NEXT: addq %r9, %rbx
; CHECK-NEXT: addq %rsi, %r14 ; CHECK-NEXT: addq %rsi, %r14
; CHECK-NEXT: callq _Z3foov@PLT ; CHECK-NEXT: callq _Z3foov@PLT
; CHECK-NEXT: movl %eax, %r15d ; CHECK-NEXT: movl %eax, %r15d
; CHECK-NEXT: addq %r14, %r15 ; CHECK-NEXT: addq %r14, %r15
; CHECK-NEXT: callq _Z3foov@PLT ; CHECK-NEXT: callq _Z3foov@PLT
; CHECK-NEXT: movl %eax, %r14d ; CHECK-NEXT: movl %eax, %r14d
; CHECK-NEXT: addq %r15, %r14
; CHECK-NEXT: callq _Z3foov@PLT ; CHECK-NEXT: callq _Z3foov@PLT
; CHECK-NEXT: movl %eax, %eax ; CHECK-NEXT: movl %eax, %eax
; CHECK-NEXT: addq %r14, %rax ; CHECK-NEXT: addq %r14, %rax
; CHECK-NEXT: addq %r15, %rax
; CHECK-NEXT: addq %rbx, %rax ; CHECK-NEXT: addq %rbx, %rax
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 24 ; CHECK-NEXT: .cfi_def_cfa_offset 24
; CHECK-NEXT: popq %r14 ; CHECK-NEXT: popq %r14
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: popq %r15 ; CHECK-NEXT: popq %r15
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
▲ Show 20 Lines • Show All 41 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/midpoint-int.ll

Show First 20 Lines • Show All 298 Lines • ▼ Show 20 Lines
; ;
; X86-LABEL: scalar_i64_signed_reg_reg: ; X86-LABEL: scalar_i64_signed_reg_reg:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax ; X86-NEXT: cmpl %ebp, %eax
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %ecx
; X86-NEXT: sbbl %ebp, %edx ; X86-NEXT: sbbl %esi, %ecx
; X86-NEXT: setl %dl ; X86-NEXT: setl %cl
; X86-NEXT: movzbl %dl, %ebx ; X86-NEXT: movzbl %cl, %edx
; X86-NEXT: jl .LBB5_1 ; X86-NEXT: jl .LBB5_1
; X86-NEXT: # %bb.2: ; X86-NEXT: # %bb.2:
; X86-NEXT: movl %esi, %ebx
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: jmp .LBB5_3 ; X86-NEXT: jmp .LBB5_3
; X86-NEXT: .LBB5_1: ; X86-NEXT: .LBB5_1:
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %ebx
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ebp, %edi ; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: .LBB5_3: ; X86-NEXT: .LBB5_3:
; X86-NEXT: negl %ebx ; X86-NEXT: negl %edx
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp ; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %esi, %eax ; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl %edx, %edi ; X86-NEXT: sbbl %ebx, %edi
; X86-NEXT: shrdl $1, %edi, %eax ; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi ; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi ; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%t3 = icmp sgt i64 %a1, %a2 ; signed %t3 = icmp sgt i64 %a1, %a2 ; signed
%t4 = select i1 %t3, i64 -1, i64 1 %t4 = select i1 %t3, i64 -1, i64 1
%t5 = select i1 %t3, i64 %a2, i64 %a1 %t5 = select i1 %t3, i64 %a2, i64 %a1
Show All 22 Lines
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: scalar_i64_unsigned_reg_reg: ; X86-LABEL: scalar_i64_unsigned_reg_reg:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: xorl %ebx, %ebx ; X86-NEXT: xorl %edx, %edx
; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax ; X86-NEXT: cmpl %ebx, %eax
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %ecx
; X86-NEXT: sbbl %ebp, %edx ; X86-NEXT: sbbl %esi, %ecx
; X86-NEXT: setb %dl ; X86-NEXT: setb %cl
; X86-NEXT: sbbl %ebx, %ebx ; X86-NEXT: sbbl %edx, %edx
; X86-NEXT: testb %dl, %dl ; X86-NEXT: testb %cl, %cl
; X86-NEXT: jne .LBB6_1 ; X86-NEXT: jne .LBB6_1
; X86-NEXT: # %bb.2: ; X86-NEXT: # %bb.2:
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl %esi, %ebp
; X86-NEXT: movl %ebp, %edx ; X86-NEXT: movl %ebx, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: jmp .LBB6_3 ; X86-NEXT: jmp .LBB6_3
; X86-NEXT: .LBB6_1: ; X86-NEXT: .LBB6_1:
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %ebp
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ebp, %edi ; X86-NEXT: movl %ebx, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: .LBB6_3: ; X86-NEXT: .LBB6_3:
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: orl $1, %ebp ; X86-NEXT: orl $1, %ebx
; X86-NEXT: subl %esi, %eax ; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl %edx, %edi ; X86-NEXT: sbbl %ebp, %edi
; X86-NEXT: shrdl $1, %edi, %eax ; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi ; X86-NEXT: shrl %edi
; X86-NEXT: imull %ebp, %edi ; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebx, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebx
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%t3 = icmp ugt i64 %a1, %a2 %t3 = icmp ugt i64 %a1, %a2
%t4 = select i1 %t3, i64 -1, i64 1 %t4 = select i1 %t3, i64 -1, i64 1
%t5 = select i1 %t3, i64 %a2, i64 %a1 %t5 = select i1 %t3, i64 %a2, i64 %a1
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl (%ecx), %esi ; X86-NEXT: movl (%edx), %ecx
; X86-NEXT: movl 4(%ecx), %ecx ; X86-NEXT: movl 4(%edx), %esi
; X86-NEXT: cmpl %esi, %eax ; X86-NEXT: cmpl %ecx, %eax
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ecx, %edx ; X86-NEXT: sbbl %esi, %edx
; X86-NEXT: setl %dl ; X86-NEXT: setl %dl
; X86-NEXT: movzbl %dl, %ebx ; X86-NEXT: movzbl %dl, %edx
; X86-NEXT: jl .LBB7_1 ; X86-NEXT: jl .LBB7_1
; X86-NEXT: # %bb.2: ; X86-NEXT: # %bb.2:
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X86-NEXT: movl %esi, (%esp) # 4-byte Spill
; X86-NEXT: movl %esi, %edx ; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: jmp .LBB7_3 ; X86-NEXT: jmp .LBB7_3
; X86-NEXT: .LBB7_1: ; X86-NEXT: .LBB7_1:
; X86-NEXT: movl %edi, (%esp) # 4-byte Spill ; X86-NEXT: movl %edi, (%esp) # 4-byte Spill
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl %ecx, %edi ; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: .LBB7_3: ; X86-NEXT: .LBB7_3:
; X86-NEXT: negl %ebx ; X86-NEXT: negl %edx
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp ; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %edx, %eax ; X86-NEXT: subl %ebx, %eax
; X86-NEXT: sbbl (%esp), %edi # 4-byte Folded Reload ; X86-NEXT: sbbl (%esp), %edi # 4-byte Folded Reload
; X86-NEXT: shrdl $1, %edi, %eax ; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi ; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi ; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl $4, %esp ; X86-NEXT: addl $4, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%a1 = load i64, ptr %a1_addr %a1 = load i64, ptr %a1_addr
%t3 = icmp sgt i64 %a1, %a2 ; signed %t3 = icmp sgt i64 %a1, %a2 ; signed
Show All 26 Lines
; ;
; X86-LABEL: scalar_i64_signed_reg_mem: ; X86-LABEL: scalar_i64_signed_reg_mem:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl (%edx), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl 4(%edx), %edi ; X86-NEXT: movl (%ecx), %eax
; X86-NEXT: cmpl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl 4(%ecx), %edi
; X86-NEXT: movl %edi, %edx ; X86-NEXT: cmpl %ebp, %eax
; X86-NEXT: sbbl %ebp, %edx ; X86-NEXT: movl %edi, %ecx
; X86-NEXT: setl %dl ; X86-NEXT: sbbl %esi, %ecx
; X86-NEXT: movzbl %dl, %ebx ; X86-NEXT: setl %cl
; X86-NEXT: movzbl %cl, %edx
; X86-NEXT: jl .LBB8_1 ; X86-NEXT: jl .LBB8_1
; X86-NEXT: # %bb.2: ; X86-NEXT: # %bb.2:
; X86-NEXT: movl %esi, %ebx
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: jmp .LBB8_3 ; X86-NEXT: jmp .LBB8_3
; X86-NEXT: .LBB8_1: ; X86-NEXT: .LBB8_1:
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %ebx
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %ebp, %edi ; X86-NEXT: movl %ebp, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: .LBB8_3: ; X86-NEXT: .LBB8_3:
; X86-NEXT: negl %ebx ; X86-NEXT: negl %edx
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp ; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %esi, %eax ; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl %edx, %edi ; X86-NEXT: sbbl %ebx, %edi
; X86-NEXT: shrdl $1, %edi, %eax ; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi ; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi ; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%a2 = load i64, ptr %a2_addr %a2 = load i64, ptr %a2_addr
%t3 = icmp sgt i64 %a1, %a2 ; signed %t3 = icmp sgt i64 %a1, %a2 ; signed
%t4 = select i1 %t3, i64 -1, i64 1 %t4 = select i1 %t3, i64 -1, i64 1
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %esi ; X86-NEXT: movl (%eax), %ecx
; X86-NEXT: movl 4(%eax), %ecx ; X86-NEXT: movl 4(%eax), %esi
; X86-NEXT: movl (%edx), %eax ; X86-NEXT: movl (%edx), %eax
; X86-NEXT: movl 4(%edx), %edi ; X86-NEXT: movl 4(%edx), %edi
; X86-NEXT: cmpl %esi, %eax ; X86-NEXT: cmpl %ecx, %eax
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %edi, %edx
; X86-NEXT: sbbl %ecx, %edx ; X86-NEXT: sbbl %esi, %edx
; X86-NEXT: setl %dl ; X86-NEXT: setl %dl
; X86-NEXT: movzbl %dl, %ebx ; X86-NEXT: movzbl %dl, %edx
; X86-NEXT: jl .LBB9_1 ; X86-NEXT: jl .LBB9_1
; X86-NEXT: # %bb.2: ; X86-NEXT: # %bb.2:
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X86-NEXT: movl %esi, (%esp) # 4-byte Spill
; X86-NEXT: movl %esi, %edx ; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: jmp .LBB9_3 ; X86-NEXT: jmp .LBB9_3
; X86-NEXT: .LBB9_1: ; X86-NEXT: .LBB9_1:
; X86-NEXT: movl %edi, (%esp) # 4-byte Spill ; X86-NEXT: movl %edi, (%esp) # 4-byte Spill
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl %ecx, %edi ; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: .LBB9_3: ; X86-NEXT: .LBB9_3:
; X86-NEXT: negl %ebx ; X86-NEXT: negl %edx
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: orl $1, %ebp ; X86-NEXT: orl $1, %ebp
; X86-NEXT: subl %edx, %eax ; X86-NEXT: subl %ebx, %eax
; X86-NEXT: sbbl (%esp), %edi # 4-byte Folded Reload ; X86-NEXT: sbbl (%esp), %edi # 4-byte Folded Reload
; X86-NEXT: shrdl $1, %edi, %eax ; X86-NEXT: shrdl $1, %edi, %eax
; X86-NEXT: imull %eax, %ebx
; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: shrl %edi ; X86-NEXT: shrl %edi
; X86-NEXT: imull %eax, %edx
; X86-NEXT: imull %ebp, %edi ; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: mull %ebp
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl $4, %esp ; X86-NEXT: addl $4, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%a1 = load i64, ptr %a1_addr %a1 = load i64, ptr %a1_addr
%a2 = load i64, ptr %a2_addr %a2 = load i64, ptr %a2_addr
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llvm/test/CodeGen/X86/misched-balance.ll

; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
; ;
; Verify that misched resource/latency balancy heuristics are sane. ; Verify that misched resource/latency balancy heuristics are sane.
define void @unrolled_mmult1(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94, define void @unrolled_mmult1(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94,
ptr %pre95, ptr %pre96, ptr %pre97, ptr %pre98, ptr %pre99, ptr %pre95, ptr %pre96, ptr %pre97, ptr %pre98, ptr %pre99,
ptr %pre100, ptr %pre101, ptr %pre102, ptr %pre103, ptr %pre104) ptr %pre100, ptr %pre101, ptr %pre102, ptr %pre103, ptr %pre104)
nounwind uwtable ssp { nounwind uwtable ssp {
entry: entry:
br label %for.body br label %for.body
; imull folded loads should be in order and interleaved with addl, never ; imull folded loads should be in order, addl may be reordered to reduce total
; adjacent. Also check that we have no spilling. ; latency. Also check that we have no spilling.
; ;
; Since mmult1 IR is already in good order, this effectively ensure ; Since mmult1 IR is already in good order, this effectively ensure
; the scheduler maintains source order. ; the scheduler maintains source order.
; ;
; CHECK-LABEL: %for.body ; CHECK-LABEL: %for.body
; CHECK-NOT: %rsp ; CHECK-NOT: %rsp
; CHECK: imull 4 ; CHECK: imull 4
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: imull 8 ; CHECK: imull 8
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 12 ; CHECK: imull 12
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: addl
; CHECK: imull 16 ; CHECK: imull 16
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 20 ; CHECK: imull 20
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: imull 24 ; CHECK: imull 24
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: addl
; CHECK: imull 28 ; CHECK: imull 28
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 32 ; CHECK: imull 32
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: imull 36 ; CHECK: imull 36
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: addl
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK-LABEL: %end ; CHECK-LABEL: %end
for.body: for.body:
%indvars.iv42.i = phi i64 [ %indvars.iv.next43.i, %for.body ], [ 0, %entry ] %indvars.iv42.i = phi i64 [ %indvars.iv.next43.i, %for.body ], [ 0, %entry ]
%tmp57 = load i32, ptr %tmp56, align 4 %tmp57 = load i32, ptr %tmp56, align 4
%arrayidx12.us.i61 = getelementptr inbounds i32, ptr %pre, i64 %indvars.iv42.i %arrayidx12.us.i61 = getelementptr inbounds i32, ptr %pre, i64 %indvars.iv42.i
%tmp58 = load i32, ptr %arrayidx12.us.i61, align 4 %tmp58 = load i32, ptr %arrayidx12.us.i61, align 4
%mul.us.i = mul nsw i32 %tmp58, %tmp57 %mul.us.i = mul nsw i32 %tmp58, %tmp57
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; ;
; CHECK-LABEL: %for.body ; CHECK-LABEL: %for.body
; CHECK-NOT: %rsp ; CHECK-NOT: %rsp
; CHECK: imull 4 ; CHECK: imull 4
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: imull 8 ; CHECK: imull 8
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 12 ; CHECK: imull 12
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: addl
; CHECK: imull 16 ; CHECK: imull 16
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 20 ; CHECK: imull 20
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: imull 24 ; CHECK: imull 24
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: addl
; CHECK: imull 28 ; CHECK: imull 28
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl
; CHECK: imull 32 ; CHECK: imull 32
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: imull 36 ; CHECK: imull 36
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK: addl ; CHECK: addl
; CHECK: addl
; CHECK-NOT: {{imull|rsp}} ; CHECK-NOT: {{imull|rsp}}
; CHECK-LABEL: %end ; CHECK-LABEL: %end
define void @unrolled_mmult2(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94, define void @unrolled_mmult2(ptr %tmp55, ptr %tmp56, ptr %pre, ptr %pre94,
ptr %pre95, ptr %pre96, ptr %pre97, ptr %pre98, ptr %pre99, ptr %pre95, ptr %pre96, ptr %pre97, ptr %pre98, ptr %pre99,
ptr %pre100, ptr %pre101, ptr %pre102, ptr %pre103, ptr %pre104) ptr %pre100, ptr %pre101, ptr %pre102, ptr %pre103, ptr %pre104)
nounwind uwtable ssp { nounwind uwtable ssp {
entry: entry:
br label %for.body br label %for.body
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llvm/test/CodeGen/X86/misched-matrix.ll

Show All 27 Lines
; scheduled independently, and that the imull/adds are interleaved. ; scheduled independently, and that the imull/adds are interleaved.
; ;
; ILPMIN-LABEL: %for.body ; ILPMIN-LABEL: %for.body
; ILPMIN: movl %{{.*}}, ( ; ILPMIN: movl %{{.*}}, (
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl ; ILPMIN: addl
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl ; ILPMIN: addl
; ILPMIN: addl
; ILPMIN: movl %{{.*}}, 4( ; ILPMIN: movl %{{.*}}, 4(
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl ; ILPMIN: addl
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl ; ILPMIN: addl
; ILPMIN: addl
; ILPMIN: movl %{{.*}}, 8( ; ILPMIN: movl %{{.*}}, 8(
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl ; ILPMIN: addl
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl
; ILPMIN: imull ; ILPMIN: imull
; ILPMIN: addl ; ILPMIN: addl
; ILPMIN: addl
; ILPMIN: movl %{{.*}}, 12( ; ILPMIN: movl %{{.*}}, 12(
; ILPMIN-LABEL: %for.end ; ILPMIN-LABEL: %for.end
; ;
; For -misched=ilpmax, verify that each expression subtree is ; For -misched=ilpmax, verify that each expression subtree is
; scheduled independently, and that the imull/adds are clustered. ; scheduled independently, and that the imull/adds are clustered.
; ;
; ILPMAX-LABEL: %for.body ; ILPMAX-LABEL: %for.body
; ILPMAX: movl %{{.*}}, ( ; ILPMAX: movl %{{.*}}, (
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llvm/test/CodeGen/X86/mul-constant-i16.ll

Show First 20 Lines • Show All 552 Lines • ▼ Show 20 Lines
; X64-NEXT: retq ; X64-NEXT: retq
%mul = mul nsw i16 %x, 28 %mul = mul nsw i16 %x, 28
ret i16 %mul ret i16 %mul
} }
define i16 @test_mul_by_29(i16 %x) { define i16 @test_mul_by_29(i16 %x) {
; X86-LABEL: test_mul_by_29: ; X86-LABEL: test_mul_by_29:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%ecx,%ecx,8), %eax ; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %eax, %eax
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mul_by_29: ; X64-LABEL: test_mul_by_29:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi ; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: leal (%rdi,%rdi,8), %eax ; X64-NEXT: leal (%rdi,%rdi,8), %eax
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llvm/test/CodeGen/X86/mul-constant-i32.ll

Show First 20 Lines • Show All 894 Lines • ▼ Show 20 Lines
; X64-SLM-NEXT: retq ; X64-SLM-NEXT: retq
%mul = mul nsw i32 %x, 28 %mul = mul nsw i32 %x, 28
ret i32 %mul ret i32 %mul
} }
define i32 @test_mul_by_29(i32 %x) { define i32 @test_mul_by_29(i32 %x) {
; X86-LABEL: test_mul_by_29: ; X86-LABEL: test_mul_by_29:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%ecx,%ecx,8), %eax ; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%eax,%eax,2), %eax ; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %eax, %eax
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-HSW-LABEL: test_mul_by_29: ; X64-HSW-LABEL: test_mul_by_29:
; X64-HSW: # %bb.0: ; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi ; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax ; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax ; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
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; ;
; X64-NOOPT-LABEL: test_mul_by_66: ; X64-NOOPT-LABEL: test_mul_by_66:
; X64-NOOPT: # %bb.0: ; X64-NOOPT: # %bb.0:
; X64-NOOPT-NEXT: imull $66, %edi, %eax ; X64-NOOPT-NEXT: imull $66, %edi, %eax
; X64-NOOPT-NEXT: retq ; X64-NOOPT-NEXT: retq
; ;
; X64-SLM-LABEL: test_mul_by_66: ; X64-SLM-LABEL: test_mul_by_66:
; X64-SLM: # %bb.0: ; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: def $edi killed $edi def $rdi
; X64-SLM-NEXT: movl %edi, %eax ; X64-SLM-NEXT: movl %edi, %eax
; X64-SLM-NEXT: shll $6, %eax ; X64-SLM-NEXT: shll $6, %eax
; X64-SLM-NEXT: addl %edi, %eax ; X64-SLM-NEXT: addl %edi, %eax
; X64-SLM-NEXT: addl %edi, %eax ; X64-SLM-NEXT: addl %edi, %eax
; X64-SLM-NEXT: retq ; X64-SLM-NEXT: retq
%mul = mul nsw i32 %x, 66 %mul = mul nsw i32 %x, 66
ret i32 %mul ret i32 %mul
} }
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llvm/test/CodeGen/X86/mul-constant-i64.ll

Show First 20 Lines • Show All 492 Lines • ▼ Show 20 Lines
; X64-NEXT: retq ; X64-NEXT: retq
%mul = mul nsw i64 %x, 16 %mul = mul nsw i64 %x, 16
ret i64 %mul ret i64 %mul
} }
define i64 @test_mul_by_17(i64 %x) { define i64 @test_mul_by_17(i64 %x) {
; X86-LABEL: test_mul_by_17: ; X86-LABEL: test_mul_by_17:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: pushl %esi
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: shll $4, %ecx ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %esi
; X86-NEXT: shll $4, %esi
; X86-NEXT: movl $17, %eax ; X86-NEXT: movl $17, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %edx
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X86-NOOPT-LABEL: test_mul_by_17: ; X86-NOOPT-LABEL: test_mul_by_17:
; X86-NOOPT: # %bb.0: ; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $17, %eax ; X86-NOOPT-NEXT: movl $17, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp) ; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $17, {{[0-9]+}}(%esp), %ecx ; X86-NOOPT-NEXT: imull $17, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx ; X86-NOOPT-NEXT: addl %ecx, %edx
▲ Show 20 Lines • Show All 164 Lines • ▼ Show 20 Lines
; X64-NOOPT-NEXT: retq ; X64-NOOPT-NEXT: retq
%mul = mul nsw i64 %x, 21 %mul = mul nsw i64 %x, 21
ret i64 %mul ret i64 %mul
} }
define i64 @test_mul_by_22(i64 %x) { define i64 @test_mul_by_22(i64 %x) {
; X86-LABEL: test_mul_by_22: ; X86-LABEL: test_mul_by_22:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: pushl %esi
; X86-NEXT: leal (%eax,%eax,4), %ecx ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: leal (%eax,%ecx,4), %ecx ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%ecx,%eax,4), %esi
; X86-NEXT: movl $22, %eax ; X86-NEXT: movl $22, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %edx
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X86-NOOPT-LABEL: test_mul_by_22: ; X86-NOOPT-LABEL: test_mul_by_22:
; X86-NOOPT: # %bb.0: ; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $22, %eax ; X86-NOOPT-NEXT: movl $22, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp) ; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $22, {{[0-9]+}}(%esp), %ecx ; X86-NOOPT-NEXT: imull $22, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx ; X86-NOOPT-NEXT: addl %ecx, %edx
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; X64-NOOPT-NEXT: retq ; X64-NOOPT-NEXT: retq
%mul = mul nsw i64 %x, 25 %mul = mul nsw i64 %x, 25
ret i64 %mul ret i64 %mul
} }
define i64 @test_mul_by_26(i64 %x) { define i64 @test_mul_by_26(i64 %x) {
; X86-LABEL: test_mul_by_26: ; X86-LABEL: test_mul_by_26:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: pushl %esi
; X86-NEXT: leal (%eax,%eax,4), %ecx ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: leal (%ecx,%ecx,4), %ecx ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%eax,%eax,4), %esi
; X86-NEXT: movl $26, %eax ; X86-NEXT: movl $26, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X86-NOOPT-LABEL: test_mul_by_26: ; X86-NOOPT-LABEL: test_mul_by_26:
; X86-NOOPT: # %bb.0: ; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $26, %eax ; X86-NOOPT-NEXT: movl $26, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp) ; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $26, {{[0-9]+}}(%esp), %ecx ; X86-NOOPT-NEXT: imull $26, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx ; X86-NOOPT-NEXT: addl %ecx, %edx
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; X64-NOOPT-NEXT: retq ; X64-NOOPT-NEXT: retq
%mul = mul nsw i64 %x, 27 %mul = mul nsw i64 %x, 27
ret i64 %mul ret i64 %mul
} }
define i64 @test_mul_by_28(i64 %x) { define i64 @test_mul_by_28(i64 %x) {
; X86-LABEL: test_mul_by_28: ; X86-LABEL: test_mul_by_28:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: pushl %esi
; X86-NEXT: leal (%eax,%eax,8), %ecx ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: leal (%ecx,%ecx,2), %ecx ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %esi
; X86-NEXT: movl $28, %eax ; X86-NEXT: movl $28, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X86-NOOPT-LABEL: test_mul_by_28: ; X86-NOOPT-LABEL: test_mul_by_28:
; X86-NOOPT: # %bb.0: ; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $28, %eax ; X86-NOOPT-NEXT: movl $28, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp) ; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $28, {{[0-9]+}}(%esp), %ecx ; X86-NOOPT-NEXT: imull $28, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx ; X86-NOOPT-NEXT: addl %ecx, %edx
Show All 24 Lines
; X64-NOOPT-NEXT: retq ; X64-NOOPT-NEXT: retq
%mul = mul nsw i64 %x, 28 %mul = mul nsw i64 %x, 28
ret i64 %mul ret i64 %mul
} }
define i64 @test_mul_by_29(i64 %x) { define i64 @test_mul_by_29(i64 %x) {
; X86-LABEL: test_mul_by_29: ; X86-LABEL: test_mul_by_29:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: pushl %esi
; X86-NEXT: leal (%eax,%eax,8), %ecx ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: leal (%ecx,%ecx,2), %ecx ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %esi
; X86-NEXT: addl %ecx, %ecx
; X86-NEXT: movl $29, %eax ; X86-NEXT: movl $29, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X86-NOOPT-LABEL: test_mul_by_29: ; X86-NOOPT-LABEL: test_mul_by_29:
; X86-NOOPT: # %bb.0: ; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $29, %eax ; X86-NOOPT-NEXT: movl $29, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp) ; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $29, {{[0-9]+}}(%esp), %ecx ; X86-NOOPT-NEXT: imull $29, {{[0-9]+}}(%esp), %ecx
; X86-NOOPT-NEXT: addl %ecx, %edx ; X86-NOOPT-NEXT: addl %ecx, %edx
▲ Show 20 Lines • Show All 506 Lines • ▼ Show 20 Lines
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: leal (%ebp,%ebp,4), %eax ; X86-NEXT: leal (%ebp,%ebp,4), %eax
; X86-NEXT: addl $2, %edi ; X86-NEXT: addl $2, %edi
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebx
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: imull %esi, %ebx ; X86-NEXT: imull %esi, %ebx
; X86-NEXT: addl %ebx, %edx
; X86-NEXT: imull %ecx, %edi ; X86-NEXT: imull %ecx, %edi
; X86-NEXT: addl %ebx, %edi
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X86-NOOPT-LABEL: test_mul_spec: ; X86-NOOPT-LABEL: test_mul_spec:
Show All 18 Lines
; X86-NOOPT-NEXT: movl %eax, %edi ; X86-NOOPT-NEXT: movl %eax, %edi
; X86-NOOPT-NEXT: movl %edx, %ebx ; X86-NOOPT-NEXT: movl %edx, %ebx
; X86-NOOPT-NEXT: leal (%ebp,%ebp,4), %eax ; X86-NOOPT-NEXT: leal (%ebp,%ebp,4), %eax
; X86-NOOPT-NEXT: addl $2, %edi ; X86-NOOPT-NEXT: addl $2, %edi
; X86-NOOPT-NEXT: adcl %eax, %ebx ; X86-NOOPT-NEXT: adcl %eax, %ebx
; X86-NOOPT-NEXT: movl %esi, %eax ; X86-NOOPT-NEXT: movl %esi, %eax
; X86-NOOPT-NEXT: mull %edi ; X86-NOOPT-NEXT: mull %edi
; X86-NOOPT-NEXT: imull %esi, %ebx ; X86-NOOPT-NEXT: imull %esi, %ebx
; X86-NOOPT-NEXT: addl %ebx, %edx
; X86-NOOPT-NEXT: imull %ecx, %edi ; X86-NOOPT-NEXT: imull %ecx, %edi
; X86-NOOPT-NEXT: addl %ebx, %edi
; X86-NOOPT-NEXT: addl %edi, %edx ; X86-NOOPT-NEXT: addl %edi, %edx
; X86-NOOPT-NEXT: popl %esi ; X86-NOOPT-NEXT: popl %esi
; X86-NOOPT-NEXT: popl %edi ; X86-NOOPT-NEXT: popl %edi
; X86-NOOPT-NEXT: popl %ebx ; X86-NOOPT-NEXT: popl %ebx
; X86-NOOPT-NEXT: popl %ebp ; X86-NOOPT-NEXT: popl %ebp
; X86-NOOPT-NEXT: retl ; X86-NOOPT-NEXT: retl
; ;
; X64-HSW-LABEL: test_mul_spec: ; X64-HSW-LABEL: test_mul_spec:
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llvm/test/CodeGen/X86/mul-i1024.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32 ; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @test_1024(ptr %a, ptr %b, ptr %out) nounwind { define void @test_1024(ptr %a, ptr %b, ptr %out) nounwind {
; X32-LABEL: test_1024: ; X32-LABEL: test_1024:
; X32: # %bb.0: ; X32: # %bb.0:
; X32-NEXT: pushl %ebp ; X32-NEXT: pushl %ebp
; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi ; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi ; X32-NEXT: pushl %esi
; X32-NEXT: subl $400, %esp # imm = 0x190 ; X32-NEXT: subl $400, %esp # imm = 0x190
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 60(%ecx), %esi ; X32-NEXT: movl 60(%ecx), %edi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl 56(%ecx), %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%eax), %ebp ; X32-NEXT: movl 56(%ecx), %ebx
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebp ; X32-NEXT: movl (%ebp), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl 4(%ebp), %ecx
; X32-NEXT: movl 4(%eax), %ecx ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, %edi ; X32-NEXT: movl %ecx, %ebp
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 48(%edi), %esi ; X32-NEXT: movl 48(%esi), %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 52(%edi), %eax ; X32-NEXT: movl 52(%esi), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl (%esp), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 8(%eax), %ebp ; X32-NEXT: movl 8(%eax), %ebx
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %edi, %esi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 12(%eax), %edi ; X32-NEXT: movl 12(%eax), %ebx
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edi, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebx, %edi ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %esi, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl (%esp), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl %ebx, %ecx
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb (%esp) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movzbl (%esp), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 40(%esi), %edi ; X32-NEXT: movl 40(%esi), %ebp
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 44(%esi), %ebp
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: movl 44(%esi), %ebx
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl 32(%ebp), %edi ; X32-NEXT: movl 32(%edi), %ecx
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl 36(%ebp), %eax ; X32-NEXT: movl 36(%edi), %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %edi, %esi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %esi, %ebx ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %edi, %esi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebx, %edi ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movl (%esp), %esi # 4-byte Reload ; X32-NEXT: movl %edi, %esi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload
; X32-NEXT: adcl %edi, %eax ; X32-NEXT: adcl %edi, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, (%esp) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 16(%eax), %edi ; X32-NEXT: movl 16(%eax), %esi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 20(%eax), %edx
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: mull %edx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 20(%eax), %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %cl
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %esi, %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %ebx, %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebx, %esi
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 24(%eax), %ebx ; X32-NEXT: movl 24(%eax), %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 28(%eax), %ecx ; X32-NEXT: movl 28(%eax), %ecx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %ebp, %edi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebp, %esi ; X32-NEXT: addl %edi, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl %bl, %edi ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X32-NEXT: adcl %edi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl (%esp), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %edx ; X32-NEXT: movl %edi, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb (%esp) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %esi
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %esi, %eax ; X32-NEXT: movl %eax, %edi
; X32-NEXT: movl %eax, %esi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edi, %ebx ; X32-NEXT: movl %esi, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %ebx, %esi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl %esi, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload
; X32-NEXT: movl %eax, %esi ; X32-NEXT: adcl %edi, %eax
; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ecx ; X32-NEXT: adcl %eax, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 24(%esi), %ebp ; X32-NEXT: movl 24(%esi), %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 28(%esi), %edi ; X32-NEXT: movl 28(%esi), %ebp
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 16(%edi), %esi ; X32-NEXT: movl 16(%esi), %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 20(%edi), %eax ; X32-NEXT: movl 20(%esi), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %esi, %ebx ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %ebx
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edi, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: addl %ebx, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl %ebx, %ecx
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl (%esp), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 8(%esi), %ecx ; X32-NEXT: movl 8(%esi), %ebp
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 12(%esi), %ebp ; X32-NEXT: movl 12(%esi), %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl (%esp), %ebx # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl (%ebp), %edi ; X32-NEXT: movl (%esi), %ecx
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl 4(%ebp), %eax ; X32-NEXT: movl 4(%esi), %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %esi ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl (%esp), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %esi, %ebx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %edi, %esi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebx, %edi ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %esi, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 1-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload ; X32-NEXT: adcl %ebx, %eax
; X32-NEXT: adcl %edi, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %esi, %ecx
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %edi, %esi ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl (%esp), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %ebp, %edi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebp, %esi ; X32-NEXT: addl %edi, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl %bl, %edi ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X32-NEXT: adcl %edi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %edx ; X32-NEXT: movl %edi, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %edi, %ebp ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %edi, %ebp
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %edi, %esi
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %ebx, %ebp
; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %esi, %edi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ebx, %esi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload
; X32-NEXT: addl %edi, %ebx ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ebx ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, (%esp) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl (%esp), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X32-NEXT: movl 32(%ebx), %esi ; X32-NEXT: movl 32(%ebp), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl 36(%ebp), %ebp
; X32-NEXT: movl 36(%eax), %ecx ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: mull %ebp
; X32-NEXT: mull %ecx ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ecx, %ebx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: mull %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: mull %ebx
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebx, %ecx ; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 40(%eax), %ebx ; X32-NEXT: movl 40(%eax), %ebp
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %ebx
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 44(%eax), %ebx ; X32-NEXT: movl 44(%eax), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: movl %esi, %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %ebx, %ebp
; X32-NEXT: addl %esi, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %esi, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%esp), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %edi, %ebp
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebx, %esi ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 1-byte Folded Reload
; X32-NEXT: adcl %ebx, %eax ; X32-NEXT: adcl %ebx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 48(%eax), %esi ; X32-NEXT: movl 48(%eax), %ebx
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl %esi, %ecx
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 52(%eax), %edx ; X32-NEXT: movl 52(%eax), %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edx, %edi
; X32-NEXT: mull %edx ; X32-NEXT: mull %edx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: mull %edi
; X32-NEXT: mull %esi ; X32-NEXT: movl %edi, %esi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%esp), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ecx, %esi ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 56(%eax), %ecx ; X32-NEXT: movl 56(%eax), %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 60(%eax), %ecx ; X32-NEXT: movl 60(%eax), %ecx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %ebx ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %esi
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: addl %ebx, %edi ; X32-NEXT: addl %edi, %ebx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %edx ; X32-NEXT: movl %ebx, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
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; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %ebx, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %edi, %ebx ; X32-NEXT: addl %ebx, %edi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: movl %ecx, %edi ; X32-NEXT: movl %ecx, %ebx
; X32-NEXT: adcl %eax, %edi ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ebx ; X32-NEXT: adcl %eax, %edi
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl (%esp), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
Show All 27 Lines
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebx, %ebp ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ecx, %esi ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: mull %ecx
; X32-NEXT: mull %edi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: addl %ebx, %esi
; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %esi, %ebp ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: movl %ebx, %ecx
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebp, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: mull %esi
; X32-NEXT: mull %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %edi, %ebx
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %ebp, %esi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edi ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: mull %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebp, %esi ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movl %ebp, %esi ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 1-byte Folded Reload
; X32-NEXT: adcl %ebx, %eax ; X32-NEXT: adcl %ebx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: mull %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %ebp
; X32-NEXT: movl %edi, %ebp ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %ecx ; X32-NEXT: adcl %ebx, %edi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ecx, %esi ; X32-NEXT: addl %edi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %edi, %ebp
; X32-NEXT: addl %ebx, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebx, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: addl %edi, %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %edx ; X32-NEXT: movl %ebx, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: movl %edi, %ecx
; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: mull %esi
; X32-NEXT: mull %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: mull %ecx
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X32-NEXT: setb %bl
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %esi, %edi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %ebx, %edi ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %ebx ; X32-NEXT: addl %ebx, %ecx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebx, %ebp
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %esi, %edi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ebx, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X32-NEXT: movl %edi, %ebp
; X32-NEXT: adcl %eax, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ebp ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
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; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 64(%eax), %edi ; X32-NEXT: movl 64(%eax), %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 68(%eax), %ecx ; X32-NEXT: movl 68(%eax), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ecx, %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %ecx
; X32-NEXT: mull %ecx ; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %ecx
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl (%esp), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ebp, %esi
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %cl
; X32-NEXT: movl %ecx, %esi ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: mull %esi
; X32-NEXT: mull %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 72(%eax), %edi ; X32-NEXT: movl 72(%eax), %ecx
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 76(%eax), %esi ; X32-NEXT: movl 76(%eax), %ecx
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %edi, %eax ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %esi, %ebp ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: addl %ebx, %esi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: mull %edi
; X32-NEXT: mull %ebp ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl (%esp), %ecx # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebx, %ebp
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl (%esp), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %edi, %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: mull %ecx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: mull %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebx, %esi ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl %bl, %ebx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 1-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl %ebx, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl %edi, %eax ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 80(%eax), %esi ; X32-NEXT: movl 80(%eax), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 84(%eax), %ecx ; X32-NEXT: movl 84(%eax), %ecx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ecx, %ebp
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, %ebx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %edi ; X32-NEXT: adcl %ebp, %edi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %esi ; X32-NEXT: addl %edi, %ecx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 88(%eax), %edi ; X32-NEXT: movl 88(%eax), %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 92(%eax), %edi ; X32-NEXT: movl 92(%eax), %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: adcl %ebx, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %edi, %ebx
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %edi, %ecx ; X32-NEXT: movl %ebx, %ecx
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %esi, %edi ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %edi, %ebx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %edx ; X32-NEXT: movl %ebx, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: mull %edi
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebx, %ecx ; X32-NEXT: addl %esi, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: mull %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ebx, %ebp ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: addl %esi, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl %ebx, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %edi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: addl %edi, %ebx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebx, %ecx ; X32-NEXT: adcl %eax, %edi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: addl %ecx, %edx
; X32-NEXT: adcl %esi, %eax ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ecx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
Show All 18 Lines
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl (%esp), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
Show All 30 Lines
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl (%esp), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebx, %edi ; X32-NEXT: addl %ebx, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ebp ; X32-NEXT: adcl %eax, %ebp
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
Show All 32 Lines
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %esi, %ecx ; X32-NEXT: imull %eax, %esi
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: mull %ebx
; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: imull %ebp, %esi ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %ebx, %esi ; X32-NEXT: imull %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: imull %edi, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: addl %edx, %esi ; X32-NEXT: imull %esi, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl %edx, %ebp
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: mull %esi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: movl %eax, %edi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: addl %edx, %ebp
; X32-NEXT: movl %edi, %eax ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl %ebx, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebp, %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %cl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: movl (%esp), %ebx # 4-byte Reload
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: imull %ebx, %ebp
; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: addl %edx, %ebp ; X32-NEXT: addl %edx, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: imull %edi, %edx
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %edi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: imull %ecx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: mull %ecx
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: mull %ebx
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull (%esp) # 4-byte Folded Reload
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %cl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, (%esp) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 104(%esi), %ebx ; X32-NEXT: movl 104(%ecx), %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl 108(%esi), %esi ; X32-NEXT: movl 108(%ecx), %ecx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ebx, %edi
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: movl %ebx, %edi
; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 96(%esi), %eax ; X32-NEXT: movl 96(%ecx), %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl 100(%esi), %eax ; X32-NEXT: movl 100(%ecx), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %edi, %eax ; X32-NEXT: mull %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %edi, %esi ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebx, %ebp ; X32-NEXT: adcl %ebx, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %esi, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebp, %esi ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X32-NEXT: mull %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %edi, %ebx ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: mull %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: addl %esi, %eax
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl %ebx, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 112(%ecx), %edi ; X32-NEXT: movl 112(%ecx), %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: imull %edi, %esi ; X32-NEXT: imull %eax, %edi
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl 116(%ecx), %eax ; X32-NEXT: movl 116(%ecx), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: imull %eax, %ebx ; X32-NEXT: imull %eax, %ebx
; X32-NEXT: addl %edi, %ebx
; X32-NEXT: addl %edx, %ebx ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: movl 120(%ecx), %eax ; X32-NEXT: movl 120(%ecx), %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: imull %ecx, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: imull %esi, %ecx
; X32-NEXT: movl 124(%edx), %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull %ebp, %edi
; X32-NEXT: addl %ecx, %edi
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %esi, %edx ; X32-NEXT: addl %edx, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 124(%esi), %esi
; X32-NEXT: imull %ebp, %esi
; X32-NEXT: addl %edx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %ebx, %edi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ecx, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl %bl, %esi
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %edi, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: imull %eax, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: addl %edx, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %edi ; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %edi ; X32-NEXT: mull %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: mull %ecx ; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %eax, %esi ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: addl %edi, %edx ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: imull %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: imull %edi, %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: mull %edi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, %esi ; X32-NEXT: adcl %ebx, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: addl %ebx, %ecx ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl %bl, %edi ; X32-NEXT: movzbl %bl, %edi
; X32-NEXT: adcl %edi, %edx ; X32-NEXT: adcl %edi, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, %edi ; X32-NEXT: movl %esi, %edi
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, %ebx ; X32-NEXT: movl %ecx, %ebx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %ebx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
Show All 20 Lines
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl (%esp), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebx, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 72(%esi), %ebp ; X32-NEXT: movl 72(%esi), %ebp
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 76(%esi), %ebx ; X32-NEXT: movl 76(%esi), %ebx
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl (%esp), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
Show All 13 Lines
; X32-NEXT: movl 68(%ebx), %eax ; X32-NEXT: movl 68(%ebx), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %edi, %ebp ; X32-NEXT: addl %edi, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl (%esp), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
▲ Show 20 Lines • Show All 128 Lines • ▼ Show 20 Lines
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %ebx, %edx ; X32-NEXT: movl %ebx, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl %ebp, %ecx
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
Show All 18 Lines
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %edi, %ebp
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebx, %ebp ; X32-NEXT: addl %ebx, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
Show All 14 Lines
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %esi, %ebx ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ebx ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
Show All 10 Lines
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 96(%eax), %edi ; X32-NEXT: movl 96(%eax), %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
Show All 15 Lines
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%esp), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl %esi, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 104(%eax), %esi ; X32-NEXT: movl 104(%eax), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 108(%eax), %esi ; X32-NEXT: movl 108(%eax), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ecx, %esi ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ebp ; X32-NEXT: adcl %eax, %ebp
; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl (%esp), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
Show All 15 Lines
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %edi, %esi ; X32-NEXT: imull %eax, %edi
; X32-NEXT: imull %eax, %esi ; X32-NEXT: movl (%esp), %ecx # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %ecx ; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: addl %edi, %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: imull %edi, %esi ; X32-NEXT: imull %edi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: imull %ebp, %esi
; X32-NEXT: addl %edx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %ecx, %esi
; X32-NEXT: addl %edx, %esi
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %edx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl (%esp), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %ebx, %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl 124(%edi), %ecx ; X32-NEXT: movl 124(%edi), %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl 120(%edi), %esi ; X32-NEXT: movl 120(%edi), %esi
; X32-NEXT: movl %edi, %ebx
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull (%esp), %esi # 4-byte Folded Reload ; X32-NEXT: imull %ebp, %esi
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %edx, %esi ; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl 112(%edi), %edi ; X32-NEXT: movl 112(%edi), %ecx
; X32-NEXT: movl 116(%ebx), %ebp ; X32-NEXT: movl 116(%edi), %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: imull %ebp, %ebx ; X32-NEXT: imull %edi, %edx
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: addl %ebx, %edx ; X32-NEXT: imull %ecx, %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: imull %edi, %ecx
; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl (%esp), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %esi, %edi
; X32-NEXT: adcl %ebx, %ecx ; X32-NEXT: adcl %ebx, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, (%esp) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
Show All 12 Lines
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
Show All 17 Lines
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: movzbl %cl, %eax ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
Show All 17 Lines
; X32-NEXT: addl %esi, %ebp ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ecx ; X32-NEXT: adcl %eax, %ecx
; X32-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: setb (%esp) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
Show All 12 Lines
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl %ecx, %ebx ; X32-NEXT: adcl %ecx, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl (%esp), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %edi, %esi ; X32-NEXT: imull %eax, %edi
; X32-NEXT: imull %eax, %esi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull %ebp, %ecx ; X32-NEXT: imull %ebp, %ecx
; X32-NEXT: addl %edi, %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: imull %esi, %edx
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %esi, %edi ; X32-NEXT: imull %ecx, %edi
; X32-NEXT: addl %edx, %edi ; X32-NEXT: addl %edx, %edi
; X32-NEXT: addl (%esp), %ecx # 4-byte Folded Reload ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: addl %edx, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %esi, %ebx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %ebp, %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %cl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %esi, %ecx ; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: addl %edx, %ebx ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: imull %edi, %ecx ; X32-NEXT: imull %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull %ebp, %ecx ; X32-NEXT: imull %ebp, %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X32-NEXT: mull %ebp
; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %ecx ; X32-NEXT: adcl %ebx, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %ebp, %ebx ; X32-NEXT: movl %ebp, %edi
; X32-NEXT: mull %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: addl %ebp, %ecx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl %esi, %edi ; X32-NEXT: adcl %esi, %edi
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %cl, %ecx
; X32-NEXT: adcl %ecx, %esi ; X32-NEXT: adcl %ecx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl (%esp), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, %ebp ; X32-NEXT: movl %ecx, %ebp
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, %edx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, (%esp) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%esp), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
Show All 21 Lines
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl (%esp), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
Show All 21 Lines
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%esp), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; X64-NEXT: pushq %rbp ; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %r15 ; X64-NEXT: pushq %r15
; X64-NEXT: pushq %r14 ; X64-NEXT: pushq %r14
; X64-NEXT: pushq %r13 ; X64-NEXT: pushq %r13
; X64-NEXT: pushq %r12 ; X64-NEXT: pushq %r12
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %rbx
; X64-NEXT: subq $240, %rsp ; X64-NEXT: subq $240, %rsp
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rsi, %rbp
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq 40(%rdi), %r12 ; X64-NEXT: movq 40(%rdi), %rbx
; X64-NEXT: movq 32(%rdi), %r14 ; X64-NEXT: movq 32(%rdi), %r12
; X64-NEXT: movq 56(%rdi), %r15 ; X64-NEXT: movq 56(%rdi), %r14
; X64-NEXT: movq 48(%rdi), %r10 ; X64-NEXT: movq 48(%rdi), %r10
; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq (%rsi), %r11 ; X64-NEXT: movq (%rsi), %r11
; X64-NEXT: movq 8(%rsi), %r8 ; X64-NEXT: movq 8(%rsi), %rcx
; X64-NEXT: movq %rsi, %r13
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rdi
; X64-NEXT: movq %r15, %rax
; X64-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %rbp
; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %rcx, %r9 ; X64-NEXT: addq %rsi, %r9
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %r9, %rcx ; X64-NEXT: addq %r9, %r8
; X64-NEXT: adcq %rsi, %r10 ; X64-NEXT: adcq %rdi, %r10
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: movzbl %al, %r9d ; X64-NEXT: movzbl %al, %r9d
; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %r8
; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %r13
; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r10, %rsi
; X64-NEXT: adcq %r9, %r13
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %r10, %rdi
; X64-NEXT: adcq %r9, %r15
; X64-NEXT: movq %r12, %rax
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %rbx, %r14
; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %r9, %r11 ; X64-NEXT: addq %r9, %r11
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r10
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: addq %r11, %rax ; X64-NEXT: addq %r11, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r10, %r9 ; X64-NEXT: adcq %r10, %r9
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r11 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r9, %rbx ; X64-NEXT: addq %r9, %rbx
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r11 ; X64-NEXT: adcq %rax, %r11
; X64-NEXT: addq %rdi, %rbx ; X64-NEXT: addq %rbp, %rbx
; X64-NEXT: adcq %rcx, %r11 ; X64-NEXT: adcq %r8, %r11
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r15
; X64-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq 16(%rbp), %r15 ; X64-NEXT: movq 16(%r13), %rcx
; X64-NEXT: movq %r14, %r10
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r8
; X64-NEXT: movq %r12, %rax
; X64-NEXT: movq %r12, %rcx
; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r15 ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %r14, %rbp
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rdi, %r14 ; X64-NEXT: addq %r8, %r14
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq 24(%rbp), %rdi ; X64-NEXT: movq 24(%r13), %r13
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rdi ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdi, %rbp
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: addq %r14, %rax ; X64-NEXT: addq %r14, %rax
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: adcq %r9, %r12 ; X64-NEXT: adcq %r9, %r12
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %rdi ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %r12, %r9 ; X64-NEXT: addq %r12, %r9
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rdi ; X64-NEXT: adcq %rax, %r8
; X64-NEXT: addq %rbx, %r8 ; X64-NEXT: addq %rbx, %rsi
; X64-NEXT: movq %r8, (%rsp) # 8-byte Spill ; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r11, %r14 ; X64-NEXT: adcq %r11, %r14
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, (%rsp) # 8-byte Spill
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: adcq $0, %rdi ; X64-NEXT: adcq $0, %r8
; X64-NEXT: addq %rsi, %r9 ; X64-NEXT: addq %rdi, %r9
; X64-NEXT: adcq %r13, %rdi ; X64-NEXT: adcq %r15, %r8
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rcx, %r11 ; X64-NEXT: addq %rsi, %r11
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: addq %r11, %rax ; X64-NEXT: addq %r11, %rax
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: adcq %rsi, %rcx ; X64-NEXT: adcq %rdi, %rsi
; X64-NEXT: setb %sil ; X64-NEXT: setb %dil
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %r13
; X64-NEXT: addq %rcx, %rax ; X64-NEXT: addq %rsi, %rax
; X64-NEXT: movzbl %sil, %ecx ; X64-NEXT: movzbl %dil, %esi
; X64-NEXT: adcq %rcx, %rdx ; X64-NEXT: adcq %rsi, %rdx
; X64-NEXT: addq %r9, %r14 ; X64-NEXT: addq %r9, %r14
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %rdi, %r11 ; X64-NEXT: adcq %r8, %r11
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movzbl %r10b, %ecx ; X64-NEXT: movzbl %r10b, %esi
; X64-NEXT: adcq %rcx, %rax ; X64-NEXT: adcq %rsi, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq 16(%r8), %rsi ; X64-NEXT: movq 16(%rcx), %r10
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq 24(%r8), %r14 ; X64-NEXT: movq 24(%rcx), %r14
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %r13, %r15 ; X64-NEXT: movq %r13, %rbx
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rcx, %r11 ; X64-NEXT: addq %rsi, %r8
; X64-NEXT: adcq $0, %rdi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r11, %rsi ; X64-NEXT: addq %r8, %rsi
; X64-NEXT: adcq %rdi, %rbx ; X64-NEXT: adcq %rdi, %r11
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %r13, %r12 ; X64-NEXT: movq %r13, %r12
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rbx, %rdi ; X64-NEXT: addq %r11, %r8
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rcx ; X64-NEXT: adcq %rax, %rbp
; X64-NEXT: movq (%r8), %r13 ; X64-NEXT: movq (%rcx), %r13
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %r11 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq 8(%r8), %rbp ; X64-NEXT: movq 8(%rcx), %rdi
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %r11, %r14 ; X64-NEXT: addq %r11, %r14
; X64-NEXT: adcq $0, %rbx ; X64-NEXT: adcq $0, %rbx
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq %r12, %r11 ; X64-NEXT: movq %r12, %rcx
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: addq %r14, %rax ; X64-NEXT: addq %r14, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %rbx, %r12 ; X64-NEXT: adcq %rbx, %r12
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r11 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r12, %rbx ; X64-NEXT: addq %r12, %rbx
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r11 ; X64-NEXT: adcq %rax, %r11
; X64-NEXT: addq %r9, %rbx ; X64-NEXT: addq %r9, %rbx
; X64-NEXT: adcq %rsi, %r11 ; X64-NEXT: adcq %rsi, %r11
; X64-NEXT: adcq $0, %rdi ; X64-NEXT: adcq $0, %r8
; X64-NEXT: adcq $0, %rcx ; X64-NEXT: adcq $0, %rbp
; X64-NEXT: movq %r13, %r10 ; X64-NEXT: movq %r13, %rcx
; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rsi, %r14 ; X64-NEXT: addq %rsi, %r14
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: addq %r14, %rax ; X64-NEXT: addq %r14, %rax
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: adcq %r9, %r12 ; X64-NEXT: adcq %r9, %r12
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r12, %rsi ; X64-NEXT: addq %r12, %rsi
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r9 ; X64-NEXT: adcq %rax, %r9
; X64-NEXT: addq %rbx, %r13 ; X64-NEXT: addq %rbx, %r13
; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r11, %r14 ; X64-NEXT: adcq %r11, %r14
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: addq %rdi, %rsi ; X64-NEXT: addq %r8, %rsi
; X64-NEXT: adcq %rcx, %r9 ; X64-NEXT: adcq %rbp, %r9
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: adcq $0, %r11
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %rdi, %r8
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rdi, %r11
; X64-NEXT: adcq $0, %r8
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq %rcx, %r15
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: addq %rbx, %rcx ; X64-NEXT: addq %r11, %rcx
; X64-NEXT: adcq %r11, %r14 ; X64-NEXT: adcq %r8, %rbx
; X64-NEXT: setb %r11b ; X64-NEXT: setb %r11b
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rbp
; X64-NEXT: addq %r14, %rax ; X64-NEXT: addq %rbx, %rax
; X64-NEXT: movzbl %r11b, %edi ; X64-NEXT: movzbl %r11b, %edi
; X64-NEXT: adcq %rdi, %rdx ; X64-NEXT: adcq %rdi, %rdx
; X64-NEXT: addq %rsi, %r13 ; X64-NEXT: addq %rsi, %r14
; X64-NEXT: adcq %r9, %rcx ; X64-NEXT: adcq %r9, %rcx
; X64-NEXT: movzbl %r10b, %esi ; X64-NEXT: movzbl %r10b, %esi
; X64-NEXT: adcq %rsi, %rax ; X64-NEXT: adcq %rsi, %rax
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
; X64-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq (%rsp), %rax # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload ; X64-NEXT: adcq (%rsp), %rdx # 8-byte Folded Reload
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: movq 32(%rcx), %rdi ; X64-NEXT: movq 32(%r10), %rcx
; X64-NEXT: movq %r8, %r10 ; X64-NEXT: movq %r15, %rax
; X64-NEXT: movq %r8, %rax ; X64-NEXT: mulq %rcx
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r12, %r8
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rdi ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdi, %r14 ; X64-NEXT: movq %rcx, %r14
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rsi, %r11 ; X64-NEXT: addq %rsi, %r11
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq 40(%rcx), %rsi ; X64-NEXT: movq 40(%r10), %rcx
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r10, %rdi
; X64-NEXT: mulq %rsi ; X64-NEXT: movq %r15, %rax
; X64-NEXT: movq %rsi, %rdi ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rcx, %r12
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r11, %rsi ; X64-NEXT: addq %r11, %rsi
; X64-NEXT: adcq %r9, %rbx ; X64-NEXT: adcq %r9, %rbx
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %rdi ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rbx, %r11 ; X64-NEXT: addq %rbx, %r11
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r9 ; X64-NEXT: adcq %rax, %r9
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r14 ; X64-NEXT: mulq %r14
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r14 ; X64-NEXT: mulq %r14
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %rbx, %r13 ; X64-NEXT: addq %rbx, %r13
; X64-NEXT: adcq $0, %r14 ; X64-NEXT: adcq $0, %r14
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq %rdi, %rbx ; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: mulq %r12
; X64-NEXT: mulq %rdi ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: addq %r13, %rax ; X64-NEXT: addq %r13, %rax
; X64-NEXT: movq %rax, (%rsp) # 8-byte Spill ; X64-NEXT: movq %rax, (%rsp) # 8-byte Spill
; X64-NEXT: adcq %r14, %r10 ; X64-NEXT: adcq %r14, %r15
; X64-NEXT: setb %r15b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq %rbp, %rdi ; X64-NEXT: mulq %r12
; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %r10, %r14 ; X64-NEXT: addq %r15, %r14
; X64-NEXT: movzbl %r15b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rbx ; X64-NEXT: adcq %rax, %rbx
; X64-NEXT: addq %r8, %r14 ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
; X64-NEXT: adcq %rsi, %rbx ; X64-NEXT: adcq %rsi, %rbx
; X64-NEXT: adcq $0, %r11 ; X64-NEXT: adcq $0, %r11
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq %rcx, %r8 ; X64-NEXT: movq 48(%rdi), %r12
; X64-NEXT: movq 48(%rcx), %rcx ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq %r12, %r15 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq %rdi, %r12 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %rsi, %r13 ; X64-NEXT: addq %rsi, %r13
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r15
; X64-NEXT: movq 56(%r8), %rsi ; X64-NEXT: movq 56(%rdi), %rsi
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %r13, %rdi ; X64-NEXT: addq %r13, %rdi
; X64-NEXT: adcq %r10, %r15 ; X64-NEXT: adcq %r15, %rcx
; X64-NEXT: setb %r8b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rsi, %r8
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r15, %r13 ; X64-NEXT: addq %rcx, %r13
; X64-NEXT: movzbl %r8b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rsi ; X64-NEXT: adcq %rax, %rsi
; X64-NEXT: addq %r14, %rbp ; X64-NEXT: addq %r14, %rbp
; X64-NEXT: movq %rbp, %r8 ; X64-NEXT: movq %rbp, %r10
; X64-NEXT: adcq %rbx, %rdi ; X64-NEXT: adcq %rbx, %rdi
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: addq %r11, %r13 ; X64-NEXT: addq %r11, %r13
; X64-NEXT: adcq %r9, %rsi ; X64-NEXT: adcq %r9, %rsi
; X64-NEXT: setb %bpl ; X64-NEXT: setb {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Folded Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r9, %rbx ; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %rbx, %r9 ; X64-NEXT: addq %rbx, %r12
; X64-NEXT: adcq %r10, %r15 ; X64-NEXT: adcq %r9, %rcx
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r15b
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r15, %rbx ; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r15b, %eax
; X64-NEXT: adcq %rax, %r14 ; X64-NEXT: adcq %rax, %r14
; X64-NEXT: addq %r13, %r12 ; X64-NEXT: addq %r13, %rbp
; X64-NEXT: adcq %rsi, %r9 ; X64-NEXT: adcq %rsi, %r12
; X64-NEXT: movzbl %bpl, %eax ; X64-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload
; X64-NEXT: adcq %rax, %rbx ; X64-NEXT: adcq %rax, %rbx
; X64-NEXT: adcq $0, %r14 ; X64-NEXT: adcq $0, %r14
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: addq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: addq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: adcq %rax, (%rsp) # 8-byte Folded Spill ; X64-NEXT: adcq %rax, (%rsp) # 8-byte Folded Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload
; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Folded Reload
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rbp
; X64-NEXT: adcq $0, %r12 ; X64-NEXT: adcq $0, %r12
; X64-NEXT: adcq $0, %r9
; X64-NEXT: adcq $0, %rbx ; X64-NEXT: adcq $0, %rbx
; X64-NEXT: adcq $0, %r14 ; X64-NEXT: adcq $0, %r14
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Folded Reload
; X64-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Folded Reload
; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload
; X64-NEXT: setb {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Folded Spill ; X64-NEXT: setb {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Folded Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rsi, %r13 ; X64-NEXT: movq %rsi, %r13
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %rcx, %r10 ; X64-NEXT: addq %rcx, %rdi
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %r10, %r12 ; X64-NEXT: addq %rdi, %r12
; X64-NEXT: adcq %rsi, %r15 ; X64-NEXT: adcq %rsi, %rcx
; X64-NEXT: setb %r8b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %r15, %rsi ; X64-NEXT: addq %rcx, %rdi
; X64-NEXT: movzbl %r8b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r9 ; X64-NEXT: adcq %rax, %r9
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r10, %r13 ; X64-NEXT: addq %rcx, %r13
; X64-NEXT: adcq $0, %r15 ; X64-NEXT: adcq $0, %r15
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: movq %r8, %r11 ; X64-NEXT: movq %r10, %r11
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r13, %rax ; X64-NEXT: addq %r13, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r15, %r10 ; X64-NEXT: adcq %r15, %rcx
; X64-NEXT: setb %r8b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %rbp, %rax ; X64-NEXT: movq %rbp, %rax
; X64-NEXT: movq %rbp, %r15 ; X64-NEXT: movq %rbp, %r15
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r13 ; X64-NEXT: movq %rdx, %r13
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: addq %r10, %rbp ; X64-NEXT: addq %rcx, %rbp
; X64-NEXT: movzbl %r8b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r13 ; X64-NEXT: adcq %rax, %r13
; X64-NEXT: addq %rdi, %rbp ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Folded Reload
; X64-NEXT: adcq %r12, %r13 ; X64-NEXT: adcq %r12, %r13
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq %r11, %r8 ; X64-NEXT: movq %r11, %r10
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: movq %r15, %r12 ; X64-NEXT: movq %r15, %r12
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %rdi, %r15
; X64-NEXT: adcq $0, %r10
; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %rcx, %r15
; X64-NEXT: adcq $0, %r8
; X64-NEXT: movq %r10, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r15, %rax ; X64-NEXT: addq %r15, %rax
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r15
; X64-NEXT: adcq %r10, %r8 ; X64-NEXT: adcq %r8, %rcx
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rdi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %r8, %r12 ; X64-NEXT: addq %rcx, %r12
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rdi ; X64-NEXT: adcq %rax, %r8
; X64-NEXT: addq %rbp, %r11 ; X64-NEXT: addq %rbp, %r11
; X64-NEXT: adcq %r13, %r15 ; X64-NEXT: adcq %r13, %r15
; X64-NEXT: movq %r15, %rbp ; X64-NEXT: movq %r15, %rbp
; X64-NEXT: adcq $0, %r12 ; X64-NEXT: adcq $0, %r12
; X64-NEXT: adcq $0, %rdi ; X64-NEXT: adcq $0, %r8
; X64-NEXT: addq %rsi, %r12 ; X64-NEXT: addq %rdi, %r12
; X64-NEXT: adcq %r9, %rdi ; X64-NEXT: adcq %r9, %r8
; X64-NEXT: setb {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Folded Spill ; X64-NEXT: setb %r9b
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload
; X64-NEXT: movq %r15, %rax
; X64-NEXT: movq %rcx, %rsi
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r10
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r10
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload
; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %rcx, %r8 ; X64-NEXT: addq %rcx, %rdi
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r8, %rax ; X64-NEXT: addq %rdi, %rax
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: adcq %rsi, %rcx ; X64-NEXT: adcq %rsi, %rcx
; X64-NEXT: setb %sil ; X64-NEXT: setb %sil
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r13
; X64-NEXT: addq %rcx, %rax ; X64-NEXT: addq %rcx, %rax
; X64-NEXT: movzbl %sil, %ecx ; X64-NEXT: movzbl %sil, %ecx
; X64-NEXT: adcq %rcx, %rdx ; X64-NEXT: adcq %rcx, %rdx
; X64-NEXT: addq %r12, %r10 ; X64-NEXT: addq %r12, %r10
; X64-NEXT: adcq %rdi, %r8 ; X64-NEXT: adcq %r8, %rdi
; X64-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 1-byte Folded Reload ; X64-NEXT: movzbl %r9b, %ecx
; X64-NEXT: adcq %rcx, %rax ; X64-NEXT: adcq %rcx, %rax
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: addq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: addq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: adcq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; X64-NEXT: adcq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; X64-NEXT: adcq %rbx, %r11 ; X64-NEXT: adcq %rbx, %r11
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r14, %rbp ; X64-NEXT: adcq %r14, %rbp
; X64-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload ; X64-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 1-byte Folded Reload
; X64-NEXT: adcq %rax, %r10 ; X64-NEXT: adcq %rax, %r10
; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %r8 ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rcx ; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: movq 64(%r9), %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq 64(%r10), %rsi
; X64-NEXT: mulq %rcx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rcx, %r15
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rsi, %r8
; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq 72(%r9), %rsi
; X64-NEXT: movq %r9, %rcx
; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rsi, %r15
; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %rcx, %r9
; X64-NEXT: adcq $0, %r8
; X64-NEXT: movq 72(%r10), %rcx
; X64-NEXT: movq %r10, %rsi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rcx, %rdi
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r8, %rbx ; X64-NEXT: addq %r9, %rbx
; X64-NEXT: adcq %rdi, %r10 ; X64-NEXT: adcq %r8, %rcx
; X64-NEXT: setb %r8b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rsi, %r13 ; X64-NEXT: movq %rdi, %r13
; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %r10, %r9 ; X64-NEXT: addq %rcx, %r9
; X64-NEXT: movzbl %r8b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rsi ; X64-NEXT: adcq %rax, %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq %r15, %rdi
; X64-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload
; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %r8, %r14
; X64-NEXT: adcq $0, %r10
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: movq %r12, %rdi ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %rcx, %r15
; X64-NEXT: adcq $0, %r14
; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r14, %rax ; X64-NEXT: addq %r15, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r10, %r8 ; X64-NEXT: adcq %r14, %rcx
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r10b
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: movq %r15, %r12
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: addq %r8, %rbp ; X64-NEXT: addq %rcx, %rbp
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %r14 ; X64-NEXT: adcq %rax, %r14
; X64-NEXT: addq %r11, %rbp ; X64-NEXT: addq %r11, %rbp
; X64-NEXT: adcq %rbx, %r14 ; X64-NEXT: adcq %rbx, %r14
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %rcx, %rbx ; X64-NEXT: movq %rsi, %r10
; X64-NEXT: movq 80(%rcx), %r15 ; X64-NEXT: movq 80(%rsi), %r15
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r8, %r11 ; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r11
; X64-NEXT: movq 88(%rbx), %rbx ; X64-NEXT: movq 88(%r10), %r10
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %r10
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r11, %rax ; X64-NEXT: addq %rbx, %rax
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: adcq %r10, %r8 ; X64-NEXT: adcq %r11, %rcx
; X64-NEXT: setb %r10b ; X64-NEXT: setb %r11b
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %r10
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r8, %r13 ; X64-NEXT: addq %rcx, %r13
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %r11b, %eax
; X64-NEXT: adcq %rax, %r12 ; X64-NEXT: adcq %rax, %r12
; X64-NEXT: addq %rbp, %rcx ; X64-NEXT: addq %rbp, %rsi
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r14, %r11 ; X64-NEXT: adcq %r14, %rbx
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: adcq $0, %r12 ; X64-NEXT: adcq $0, %r12
; X64-NEXT: addq %r9, %r13 ; X64-NEXT: addq %r9, %r13
; X64-NEXT: adcq %rsi, %r12 ; X64-NEXT: adcq %rdi, %r12
; X64-NEXT: setb %bpl ; X64-NEXT: setb %r9b
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %rdi, %r10 ; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: adcq $0, %r8 ; X64-NEXT: adcq $0, %r8
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %r11, %r14 ; X64-NEXT: mulq %r10
; X64-NEXT: mulq %rbx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: addq %rbx, %rax
; X64-NEXT: addq %r10, %rax ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: adcq %r8, %rcx
; X64-NEXT: adcq %r8, %rdi
; X64-NEXT: setb %r8b ; X64-NEXT: setb %r8b
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %r10
; X64-NEXT: addq %rdi, %rax ; X64-NEXT: addq %rcx, %rax
; X64-NEXT: movzbl %r8b, %ecx ; X64-NEXT: movzbl %r8b, %ecx
; X64-NEXT: adcq %rcx, %rdx ; X64-NEXT: adcq %rcx, %rdx
; X64-NEXT: addq %r13, %rsi ; X64-NEXT: addq %r13, %rdi
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r12, %rsi
; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r12, %r9 ; X64-NEXT: movzbl %r9b, %ecx
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movzbl %bpl, %ecx
; X64-NEXT: adcq %rcx, %rax ; X64-NEXT: adcq %rcx, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: imulq %rax, %rbx ; X64-NEXT: imulq %rax, %r10
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: addq %rbx, %rdx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: imulq %rsi, %r15
; X64-NEXT: imulq %rcx, %r15 ; X64-NEXT: addq %r10, %r15
; X64-NEXT: addq %rdx, %r15 ; X64-NEXT: addq %rdx, %r15
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %rdx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: imulq %rsi, %r10
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: mulq %r9
; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %r10, %rdx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload
; X64-NEXT: imulq %r9, %rbx ; X64-NEXT: imulq %rbx, %rdx
; X64-NEXT: addq %rdx, %rbx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: addq %r8, %rdi ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: adcq %r15, %rbx ; X64-NEXT: imulq %rdi, %r10
; X64-NEXT: movq %r9, %rax ; X64-NEXT: addq %rdx, %r10
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rdx, %r10
; X64-NEXT: addq %rcx, %r8
; X64-NEXT: adcq %r15, %r10
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r15, %r13
; X64-NEXT: adcq $0, %r12
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %r8, %r15 ; X64-NEXT: addq %r13, %r15
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq %r12, %rbp
; X64-NEXT: movq %r9, %rax ; X64-NEXT: setb %cl
; X64-NEXT: mulq %rcx ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %r15, %r11
; X64-NEXT: adcq %r10, %r8
; X64-NEXT: setb %r10b
; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %r8, %r15 ; X64-NEXT: addq %rbp, %r12
; X64-NEXT: movzbl %r10b, %eax ; X64-NEXT: movzbl %cl, %eax
; X64-NEXT: adcq %rax, %rsi ; X64-NEXT: adcq %rax, %rsi
; X64-NEXT: addq %rdi, %r15 ; X64-NEXT: addq %r8, %r12
; X64-NEXT: adcq %rbx, %rsi ; X64-NEXT: adcq %r10, %rsi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; X64-NEXT: movq 120(%rdx), %rdi ; X64-NEXT: movq 120(%rdx), %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: imulq %rax, %rdi ; X64-NEXT: imulq %rax, %rcx
; X64-NEXT: movq 112(%rdx), %rbx ; X64-NEXT: movq 112(%rdx), %r9
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %r10
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rdi, %rdx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: imulq %rbx, %r9
; X64-NEXT: imulq %rcx, %rbx ; X64-NEXT: addq %rcx, %r9
; X64-NEXT: addq %rdx, %rbx ; X64-NEXT: addq %rdx, %r9
; X64-NEXT: movq 96(%r12), %r10 ; X64-NEXT: movq 96(%rdi), %rbp
; X64-NEXT: movq 104(%r12), %rdi ; X64-NEXT: movq 104(%rdi), %rdi
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %r14, %r12 ; X64-NEXT: imulq %rdi, %rax
; X64-NEXT: imulq %rdi, %r12 ; X64-NEXT: imulq %rbp, %r11
; X64-NEXT: mulq %r10 ; X64-NEXT: addq %rax, %r11
; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r12, %rdx ; X64-NEXT: addq %rdx, %r11
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: imulq %r10, %r14
; X64-NEXT: addq %rdx, %r14
; X64-NEXT: addq %r8, %r13 ; X64-NEXT: addq %r8, %r13
; X64-NEXT: adcq %rbx, %r14 ; X64-NEXT: adcq %r9, %r11
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r11, %r14
; X64-NEXT: mulq %rbp ; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %r10
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %r10
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %r8, %r9
; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %r8, %r12 ; X64-NEXT: addq %r9, %r8
; X64-NEXT: adcq $0, %rbp ; X64-NEXT: adcq %rcx, %rbp
; X64-NEXT: movq %r10, %rax ; X64-NEXT: setb %cl
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r12, %rbx
; X64-NEXT: adcq %rbp, %r10
; X64-NEXT: setb %r8b
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %rbx
; X64-NEXT: addq %r10, %rax ; X64-NEXT: addq %rbp, %rax
; X64-NEXT: movzbl %r8b, %edi ; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: adcq %rdi, %rdx ; X64-NEXT: adcq %rcx, %rdx
; X64-NEXT: addq %r13, %rax ; X64-NEXT: addq %r13, %rax
; X64-NEXT: adcq %r14, %rdx ; X64-NEXT: adcq %r14, %rdx
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload
; X64-NEXT: adcq %r11, %rbx ; X64-NEXT: adcq %r15, %r8
; X64-NEXT: adcq %r15, %rax ; X64-NEXT: adcq %r12, %rax
; X64-NEXT: adcq %rsi, %rdx ; X64-NEXT: adcq %rsi, %rdx
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Folded Reload
; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq 80(%r13), %r8 ; X64-NEXT: movq 80(%r8), %r9
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %r10
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq 88(%r13), %r11 ; X64-NEXT: movq 88(%r8), %rbx
; X64-NEXT: movq %r13, %r10 ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rsi, %r9 ; X64-NEXT: movq %rsi, %r11
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %rcx, %rdi ; X64-NEXT: addq %rcx, %rdi
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rdi, %r14 ; X64-NEXT: addq %rdi, %r14
; X64-NEXT: adcq %rsi, %rcx ; X64-NEXT: adcq %rsi, %rcx
; X64-NEXT: setb %dil ; X64-NEXT: setb %dil
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %r8, %r11 ; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rdx, %r13
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %rcx, %rsi ; X64-NEXT: addq %rcx, %rsi
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: adcq %rax, %r13 ; X64-NEXT: adcq %rax, %rbx
; X64-NEXT: movq %r10, %rdi ; X64-NEXT: movq 64(%r8), %rdi
; X64-NEXT: movq 64(%r10), %r10 ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %r10, %rax ; X64-NEXT: mulq %r11
; X64-NEXT: mulq %r9
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq 72(%rdi), %rax ; X64-NEXT: movq 72(%r8), %rax
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %rcx, %r12 ; X64-NEXT: addq %rcx, %r12
; X64-NEXT: adcq $0, %r15 ; X64-NEXT: adcq $0, %r15
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %r11, %r9 ; X64-NEXT: movq %rdi, %r8
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r12, %rax ; X64-NEXT: addq %r12, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r15, %rcx ; X64-NEXT: adcq %r15, %rcx
; X64-NEXT: setb %dil ; X64-NEXT: setb %dil
; X64-NEXT: movq %r8, %r11 ; X64-NEXT: movq %r13, %r11
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: addq %rcx, %rbp ; X64-NEXT: addq %rcx, %rbp
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: adcq %rax, %r12 ; X64-NEXT: adcq %rax, %r12
; X64-NEXT: addq %rbx, %rbp ; X64-NEXT: addq %r10, %rbp
; X64-NEXT: adcq %r14, %r12 ; X64-NEXT: adcq %r14, %r12
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %rbx
; X64-NEXT: movq %r10, %rdi ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r10, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload ; X64-NEXT: mulq %r13
; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: movq %r11, %rbx
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rcx, %r14 ; X64-NEXT: addq %rcx, %r14
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r10
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r14, %rax ; X64-NEXT: movq %rax, %r8
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: addq %r14, %r8
; X64-NEXT: adcq %r10, %rcx ; X64-NEXT: adcq %r10, %rcx
; X64-NEXT: setb %dil ; X64-NEXT: setb %dil
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rcx, %r14 ; X64-NEXT: addq %rcx, %r14
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: adcq %rax, %r10 ; X64-NEXT: adcq %rax, %r10
; X64-NEXT: addq %rbp, %r9 ; X64-NEXT: addq %rbp, %r9
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r12, %r11 ; X64-NEXT: adcq %r12, %r8
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %r14 ; X64-NEXT: adcq $0, %r14
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r10
; X64-NEXT: addq %rsi, %r14 ; X64-NEXT: addq %rsi, %r14
; X64-NEXT: adcq %r13, %r10 ; X64-NEXT: adcq %rbx, %r10
; X64-NEXT: setb %dil ; X64-NEXT: setb %dil
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %rcx, %r9 ; X64-NEXT: addq %rcx, %r9
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq $0, %rsi
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r9, %rax ; X64-NEXT: addq %r9, %rax
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: adcq %rsi, %rcx ; X64-NEXT: adcq %rsi, %rcx
; X64-NEXT: setb %sil ; X64-NEXT: setb %sil
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: addq %rcx, %rax ; X64-NEXT: addq %rcx, %rax
; X64-NEXT: movzbl %sil, %ecx ; X64-NEXT: movzbl %sil, %ecx
; X64-NEXT: adcq %rcx, %rdx ; X64-NEXT: adcq %rcx, %rdx
; X64-NEXT: addq %r14, %r12 ; X64-NEXT: addq %r14, %r8
; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r10, %r9 ; X64-NEXT: adcq %r10, %r9
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movzbl %dil, %ecx ; X64-NEXT: movzbl %dil, %ecx
; X64-NEXT: adcq %rcx, %rax ; X64-NEXT: adcq %rcx, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq 96(%rdi), %rsi ; X64-NEXT: movq 96(%r8), %rcx
; X64-NEXT: imulq %rsi, %r15 ; X64-NEXT: imulq %rcx, %r15
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq %r8, %rcx ; X64-NEXT: movq %r13, %r9
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r15, %rdx ; X64-NEXT: movq 104(%r8), %rdi
; X64-NEXT: movq 104(%rdi), %r9 ; X64-NEXT: imulq %rdi, %r9
; X64-NEXT: imulq %r9, %rcx ; X64-NEXT: addq %r15, %r9
; X64-NEXT: addq %rdx, %rcx ; X64-NEXT: addq %rdx, %r9
; X64-NEXT: movq %rcx, %r14 ; X64-NEXT: movq 112(%r8), %rax
; X64-NEXT: movq 112(%rdi), %rax ; X64-NEXT: movq %rax, %rdx
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload ; X64-NEXT: imulq %r11, %rdx
; X64-NEXT: imulq %r12, %rcx ; X64-NEXT: movq 120(%r8), %r8
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: mulq %r15 ; X64-NEXT: imulq %r10, %r8
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: addq %rdx, %r8
; X64-NEXT: addq %rcx, %rdx ; X64-NEXT: mulq %r10
; X64-NEXT: movq 120(%rdi), %rdi
; X64-NEXT: imulq %r15, %rdi
; X64-NEXT: addq %rdx, %rdi
; X64-NEXT: addq %r10, %r8
; X64-NEXT: adcq %r14, %rdi
; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r10, %r13 ; X64-NEXT: addq %rdx, %r8
; X64-NEXT: adcq $0, %r14 ; X64-NEXT: addq %rsi, %r13
; X64-NEXT: movq %r15, %rax ; X64-NEXT: adcq %r9, %r8
; X64-NEXT: mulq %r9 ; X64-NEXT: movq %r10, %rax
; X64-NEXT: movq %r10, %r9
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %r10
; X64-NEXT: addq %r13, %rbp ; X64-NEXT: addq %rsi, %r10
; X64-NEXT: adcq %r14, %rcx ; X64-NEXT: adcq $0, %rcx
; X64-NEXT: setb %sil ; X64-NEXT: movq %r9, %rax
; X64-NEXT: movq %r12, %rax ; X64-NEXT: mulq %rdi
; X64-NEXT: mulq %r9 ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %r10, %r12
; X64-NEXT: adcq %rcx, %rsi
; X64-NEXT: setb %cl
; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rcx, %r14 ; X64-NEXT: addq %rsi, %r14
; X64-NEXT: movzbl %sil, %eax ; X64-NEXT: movzbl %cl, %eax
; X64-NEXT: adcq %rax, %r10 ; X64-NEXT: adcq %rax, %r10
; X64-NEXT: addq %r8, %r14 ; X64-NEXT: addq %r13, %r14
; X64-NEXT: adcq %rdi, %r10 ; X64-NEXT: adcq %r8, %r10
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: imulq %rax, %rsi
; X64-NEXT: movq %rax, %r11
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rax, %r9
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r15 # 8-byte Reload
; X64-NEXT: imulq %r15, %rdi ; X64-NEXT: imulq %r15, %rcx
; X64-NEXT: movq %r15, %rax ; X64-NEXT: addq %rsi, %rcx
; X64-NEXT: addq %rdx, %rcx
; X64-NEXT: movq %rcx, %r8
; X64-NEXT: movq %rbp, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: mulq %rsi ; X64-NEXT: imulq %rsi, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: imulq %rdi, %rbx
; X64-NEXT: addq %rax, %rbx
; X64-NEXT: movq %rbp, %rax
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: addq %rdi, %rdx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload
; X64-NEXT: imulq %r12, %rsi
; X64-NEXT: addq %rdx, %rsi
; X64-NEXT: movq %rsi, %r8
; X64-NEXT: movq %r11, %rax
; X64-NEXT: movq %r11, %rsi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: imulq %r9, %rsi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload
; X64-NEXT: mulq %r11
; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %rsi, %rdx
; X64-NEXT: imulq %r11, %rbx
; X64-NEXT: addq %rdx, %rbx ; X64-NEXT: addq %rdx, %rbx
; X64-NEXT: addq %rcx, %r13 ; X64-NEXT: addq %r9, %rcx
; X64-NEXT: adcq %r8, %rbx ; X64-NEXT: adcq %r8, %rbx
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %rbx, %rbp
; X64-NEXT: mulq %r15 ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %rdi, %r9
; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %r13
; X64-NEXT: movq %rsi, %rax
; X64-NEXT: movq %rsi, %rbx
; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %r8, %rdi
; X64-NEXT: adcq $0, %rsi
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r8, %rsi
; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rsi, %r11 ; X64-NEXT: addq %rdi, %r11
; X64-NEXT: adcq %rdi, %r8 ; X64-NEXT: adcq %rsi, %r8
; X64-NEXT: setb %sil ; X64-NEXT: setb %sil
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r15
; X64-NEXT: addq %r8, %rax ; X64-NEXT: addq %r8, %rax
; X64-NEXT: movzbl %sil, %esi ; X64-NEXT: movzbl %sil, %esi
; X64-NEXT: adcq %rsi, %rdx ; X64-NEXT: adcq %rsi, %rdx
; X64-NEXT: addq %r13, %rax ; X64-NEXT: addq %rcx, %rax
; X64-NEXT: adcq %rbx, %rdx ; X64-NEXT: adcq %rbp, %rdx
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
; X64-NEXT: adcq %rbp, %r11 ; X64-NEXT: adcq %r12, %r11
; X64-NEXT: adcq %r14, %rax ; X64-NEXT: adcq %r14, %rax
; X64-NEXT: adcq %r10, %rdx ; X64-NEXT: adcq %r10, %rdx
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: movq %rcx, %rdi
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: movq %rsi, %r8 ; X64-NEXT: movq %rsi, %r8
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload
; X64-NEXT: movq %rdi, %r9
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, (%rcx)
; X64-NEXT: movq %rdi, (%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 8(%rcx)
; X64-NEXT: movq %rdi, 8(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 16(%rcx)
; X64-NEXT: movq %rdi, 16(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 24(%rcx)
; X64-NEXT: movq %rdi, 24(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 32(%rcx)
; X64-NEXT: movq %rdi, 32(%rsi) ; X64-NEXT: movq (%rsp), %rsi # 8-byte Reload
; X64-NEXT: movq (%rsp), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 40(%rcx)
; X64-NEXT: movq %rdi, 40(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 48(%rcx)
; X64-NEXT: movq %rdi, 48(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq %rsi, 56(%rcx)
; X64-NEXT: movq %rdi, 56(%rsi) ; X64-NEXT: movq %rdi, 64(%rcx)
; X64-NEXT: movq %r8, 64(%rsi) ; X64-NEXT: movq %r8, 72(%rcx)
; X64-NEXT: movq %r9, 72(%rsi) ; X64-NEXT: movq %r9, 80(%rcx)
; X64-NEXT: movq %r10, 80(%rsi) ; X64-NEXT: movq %r10, 88(%rcx)
; X64-NEXT: movq %rbx, 88(%rsi) ; X64-NEXT: movq %r13, 96(%rcx)
; X64-NEXT: movq %rcx, 96(%rsi) ; X64-NEXT: movq %r11, 104(%rcx)
; X64-NEXT: movq %r11, 104(%rsi) ; X64-NEXT: movq %rax, 112(%rcx)
; X64-NEXT: movq %rax, 112(%rsi) ; X64-NEXT: movq %rdx, 120(%rcx)
; X64-NEXT: movq %rdx, 120(%rsi)
; X64-NEXT: addq $240, %rsp ; X64-NEXT: addq $240, %rsp
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: popq %r12 ; X64-NEXT: popq %r12
; X64-NEXT: popq %r13 ; X64-NEXT: popq %r13
; X64-NEXT: popq %r14 ; X64-NEXT: popq %r14
; X64-NEXT: popq %r15 ; X64-NEXT: popq %r15
; X64-NEXT: popq %rbp ; X64-NEXT: popq %rbp
; X64-NEXT: retq ; X64-NEXT: retq
%av = load i1024, ptr %a %av = load i1024, ptr %a
%bv = load i1024, ptr %b %bv = load i1024, ptr %b
%r = mul i1024 %av, %bv %r = mul i1024 %av, %bv
store i1024 %r, ptr %out store i1024 %r, ptr %out
ret void ret void
} }

llvm/test/CodeGen/X86/mul-i256.ll

Show All 17 Lines
; X32-NEXT: subl $72, %esp ; X32-NEXT: subl $72, %esp
; X32-NEXT: .cfi_def_cfa_offset 92 ; X32-NEXT: .cfi_def_cfa_offset 92
; X32-NEXT: .cfi_offset %esi, -20 ; X32-NEXT: .cfi_offset %esi, -20
; X32-NEXT: .cfi_offset %edi, -16 ; X32-NEXT: .cfi_offset %edi, -16
; X32-NEXT: .cfi_offset %ebx, -12 ; X32-NEXT: .cfi_offset %ebx, -12
; X32-NEXT: .cfi_offset %ebp, -8 ; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 12(%ecx), %esi ; X32-NEXT: movl 12(%ecx), %ebp
; X32-NEXT: movl 8(%ecx), %ebx ; X32-NEXT: movl 8(%ecx), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%eax), %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl (%eax), %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %esi, %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: mull %edi ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 4(%eax), %ebp
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: mull %ebp ; X32-NEXT: movl 4(%eax), %ecx
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, %esi
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl (%edi), %esi ; X32-NEXT: movl (%edi), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl 4(%edi), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl 4(%edi), %edi
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %ecx ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 8(%eax), %edi ; X32-NEXT: movl 8(%eax), %esi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 12(%eax), %esi ; X32-NEXT: movl 12(%eax), %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %esi, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %ebx, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %esi, %ebx
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl (%esp), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl (%esp), %edi # 4-byte Reload ; X32-NEXT: movl %ebx, %ecx
; X32-NEXT: mull %edi ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %esi ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %edi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edi, %ebx ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: addl %esi, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 16(%ecx), %edi ; X32-NEXT: movl 16(%ecx), %edi
; X32-NEXT: movl %ebx, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %edi, %esi ; X32-NEXT: imull %edi, %ebx
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl (%esp), %esi # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl 20(%ecx), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: imull %eax, %ebp ; X32-NEXT: movl 20(%ecx), %ebp
; X32-NEXT: addl %edx, %ebp ; X32-NEXT: imull %ebp, %esi
; X32-NEXT: addl %ebx, %esi
; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl 24(%ecx), %eax ; X32-NEXT: movl 24(%ecx), %eax
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: imull %esi, %edx
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 28(%ecx), %ecx ; X32-NEXT: movl 28(%ecx), %ecx
; X32-NEXT: imull %esi, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: adcl %ebp, %ecx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl (%esp), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %ebx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %edi ; X32-NEXT: adcl %esi, %edi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movzbl %bl, %esi ; X32-NEXT: movzbl %bl, %esi
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl 28(%edi), %esi ; X32-NEXT: movl 28(%edi), %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull %eax, %esi ; X32-NEXT: imull %ebp, %ecx
; X32-NEXT: movl 24(%edi), %ecx ; X32-NEXT: movl 24(%edi), %esi
; X32-NEXT: mull %ecx ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx ; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl 16(%edi), %ebp ; X32-NEXT: movl 16(%edi), %ecx
; X32-NEXT: movl 20(%edi), %ebx ; X32-NEXT: movl 20(%edi), %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edx
; X32-NEXT: imull %ebx, %edi ; X32-NEXT: imull %ebx, %edx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebp ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %edi, %edx ; X32-NEXT: imull %ecx, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: addl %edx, %edi
; X32-NEXT: imull %ebp, %esi ; X32-NEXT: mull %ecx
; X32-NEXT: addl %edx, %esi ; X32-NEXT: addl %edx, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ecx, %esi ; X32-NEXT: adcl %esi, %edi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: mull %ebp
; X32-NEXT: mull %ecx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %esi, %ebx ; X32-NEXT: addl %edi, %esi
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebx, %esi ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: adcl %ecx, %edi ; X32-NEXT: adcl %ebx, %edi
; X32-NEXT: setb %cl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %bl, %esi
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl (%esp), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %ecx, %ebx ; X32-NEXT: movl %esi, %ebx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, (%ecx) ; X32-NEXT: movl %edi, (%esi)
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, 4(%ecx) ; X32-NEXT: movl %edi, 4(%esi)
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, 8(%ecx) ; X32-NEXT: movl %edi, 8(%esi)
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, 12(%ecx) ; X32-NEXT: movl %edi, 12(%esi)
; X32-NEXT: movl %ebx, 16(%ecx) ; X32-NEXT: movl %ebx, 16(%esi)
; X32-NEXT: movl %esi, 20(%ecx) ; X32-NEXT: movl %ecx, 20(%esi)
; X32-NEXT: movl %eax, 24(%ecx) ; X32-NEXT: movl %eax, 24(%esi)
; X32-NEXT: movl %edx, 28(%ecx) ; X32-NEXT: movl %edx, 28(%esi)
; X32-NEXT: addl $72, %esp ; X32-NEXT: addl $72, %esp
; X32-NEXT: .cfi_def_cfa_offset 20 ; X32-NEXT: .cfi_def_cfa_offset 20
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: .cfi_def_cfa_offset 16 ; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: popl %edi ; X32-NEXT: popl %edi
; X32-NEXT: .cfi_def_cfa_offset 12 ; X32-NEXT: .cfi_def_cfa_offset 12
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: .cfi_def_cfa_offset 8 ; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: popl %ebp ; X32-NEXT: popl %ebp
; X32-NEXT: .cfi_def_cfa_offset 4 ; X32-NEXT: .cfi_def_cfa_offset 4
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: test: ; X64-LABEL: test:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: pushq %r15 ; X64-NEXT: pushq %r15
; X64-NEXT: .cfi_def_cfa_offset 16 ; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: pushq %r14 ; X64-NEXT: pushq %r14
; X64-NEXT: .cfi_def_cfa_offset 24 ; X64-NEXT: .cfi_def_cfa_offset 24
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %r12
; X64-NEXT: .cfi_def_cfa_offset 32 ; X64-NEXT: .cfi_def_cfa_offset 32
; X64-NEXT: .cfi_offset %rbx, -32 ; X64-NEXT: pushq %rbx
; X64-NEXT: .cfi_def_cfa_offset 40
; X64-NEXT: .cfi_offset %rbx, -40
; X64-NEXT: .cfi_offset %r12, -32
; X64-NEXT: .cfi_offset %r14, -24 ; X64-NEXT: .cfi_offset %r14, -24
; X64-NEXT: .cfi_offset %r15, -16 ; X64-NEXT: .cfi_offset %r15, -16
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq (%rdi), %rbx ; X64-NEXT: movq (%rdi), %rbx
; X64-NEXT: movq 8(%rdi), %r11 ; X64-NEXT: movq 8(%rdi), %r11
; X64-NEXT: movq 16(%rdi), %r10 ; X64-NEXT: movq 16(%rdi), %r10
; X64-NEXT: movq 16(%rsi), %r8 ; X64-NEXT: movq 16(%rsi), %r8
; X64-NEXT: movq (%rsi), %r9 ; X64-NEXT: movq (%rsi), %r9
; X64-NEXT: movq 8(%rsi), %r14 ; X64-NEXT: movq 8(%rsi), %r14
; X64-NEXT: movq 24(%rdi), %r15 ; X64-NEXT: movq 24(%rdi), %r15
; X64-NEXT: imulq %r9, %r15 ; X64-NEXT: imulq %r9, %r15
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r10 ; X64-NEXT: mulq %r10
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: addq %r15, %rdx
; X64-NEXT: imulq %r14, %r10 ; X64-NEXT: imulq %r14, %r10
; X64-NEXT: addq %r15, %r10
; X64-NEXT: addq %rdx, %r10 ; X64-NEXT: addq %rdx, %r10
; X64-NEXT: movq %r8, %r15 ; X64-NEXT: movq %r8, %r12
; X64-NEXT: imulq %r11, %r15 ; X64-NEXT: imulq %r11, %r12
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %r15, %rdx
; X64-NEXT: movq 24(%rsi), %r15 ; X64-NEXT: movq 24(%rsi), %r15
; X64-NEXT: imulq %rbx, %r15 ; X64-NEXT: imulq %rbx, %r15
; X64-NEXT: addq %r12, %r15
; X64-NEXT: addq %rdx, %r15 ; X64-NEXT: addq %rdx, %r15
; X64-NEXT: addq %rdi, %r8 ; X64-NEXT: addq %rdi, %r8
; X64-NEXT: adcq %r10, %r15 ; X64-NEXT: adcq %r10, %r15
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %r10
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
Show All 16 Lines
; X64-NEXT: adcq %rdi, %rdx ; X64-NEXT: adcq %rdi, %rdx
; X64-NEXT: addq %r8, %rax ; X64-NEXT: addq %r8, %rax
; X64-NEXT: adcq %r15, %rdx ; X64-NEXT: adcq %r15, %rdx
; X64-NEXT: movq %r10, (%rcx) ; X64-NEXT: movq %r10, (%rcx)
; X64-NEXT: movq %rbx, 8(%rcx) ; X64-NEXT: movq %rbx, 8(%rcx)
; X64-NEXT: movq %rax, 16(%rcx) ; X64-NEXT: movq %rax, 16(%rcx)
; X64-NEXT: movq %rdx, 24(%rcx) ; X64-NEXT: movq %rdx, 24(%rcx)
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: .cfi_def_cfa_offset 32
; X64-NEXT: popq %r12
; X64-NEXT: .cfi_def_cfa_offset 24 ; X64-NEXT: .cfi_def_cfa_offset 24
; X64-NEXT: popq %r14 ; X64-NEXT: popq %r14
; X64-NEXT: .cfi_def_cfa_offset 16 ; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: popq %r15 ; X64-NEXT: popq %r15
; X64-NEXT: .cfi_def_cfa_offset 8 ; X64-NEXT: .cfi_def_cfa_offset 8
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%av = load i256, ptr %a %av = load i256, ptr %a
%bv = load i256, ptr %b %bv = load i256, ptr %b
%r = mul i256 %av, %bv %r = mul i256 %av, %bv
store i256 %r, ptr %out store i256 %r, ptr %out
ret void ret void
} }
attributes #0 = { norecurse nounwind uwtable } attributes #0 = { norecurse nounwind uwtable }

llvm/test/CodeGen/X86/mul-i512.ll

Show All 27 Lines
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %esi, %ebx ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 4(%eax), %ecx ; X32-NEXT: movl 4(%eax), %ecx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, %ebp ; X32-NEXT: movl %ecx, %ebp
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %cl, %eax ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 16(%ecx), %ebp ; X32-NEXT: movl 16(%ecx), %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl 20(%ecx), %ebx ; X32-NEXT: movl 20(%ecx), %eax
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %ebp, %esi
; X32-NEXT: mull %esi ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ebp ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: movl %eax, %esi
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: addl %ebp, %esi
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 8(%edi), %ebp ; X32-NEXT: movl 8(%eax), %ecx
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl 12(%edi), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl 12(%eax), %ecx
; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebp, %edi ; X32-NEXT: adcl %ebp, %edi
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: addl %edi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl %ebp, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 8(%ecx), %ebx ; X32-NEXT: movl 8(%ecx), %edi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl 12(%ecx), %ecx ; X32-NEXT: movl 12(%ecx), %ecx
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %ebp, %ebx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edi, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl (%ecx), %esi ; X32-NEXT: movl (%ecx), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl 4(%ecx), %eax ; X32-NEXT: movl 4(%ecx), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %ebx, %esi ; X32-NEXT: movl %ebx, %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %ebp, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %ecx, %esi ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: adcl %ebp, %edi ; X32-NEXT: adcl %edi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %edi, %ebp ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: adcl %ecx, %esi ; X32-NEXT: adcl %ecx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: addl %edi, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X32-NEXT: movl %ebp, %edx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 1-byte Folded Reload
; X32-NEXT: adcl %edi, %eax ; X32-NEXT: adcl %edi, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 16(%eax), %esi ; X32-NEXT: movl 16(%eax), %ebp
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: mull %ebp
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: mull %ebp
; X32-NEXT: mull %esi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 20(%eax), %ecx ; X32-NEXT: movl 20(%eax), %ecx
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: movl %ecx, %esi
; X32-NEXT: movl %ecx, %ebx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ebp ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebp, %ecx ; X32-NEXT: addl %esi, %ecx
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 24(%eax), %ebx ; X32-NEXT: movl 24(%eax), %esi
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 28(%eax), %ebx ; X32-NEXT: movl 28(%eax), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: adcl %ebp, %esi ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %esi
; X32-NEXT: movl %ebx, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: addl %ebx, %ebp
; X32-NEXT: addl %esi, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl (%esp), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %ebp, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: mull %ecx
; X32-NEXT: mull %ebp ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: addl %edi, %eax ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: adcl %esi, %ebp
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %ebx, %edi ; X32-NEXT: addl %ebp, %edi
; X32-NEXT: movl (%esp), %ebx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl %edi, %edx ; X32-NEXT: movl %edi, %edx
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: adcl $0, %ecx
; X32-NEXT: adcl $0, %eax ; X32-NEXT: adcl $0, %eax
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb %bl ; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %edi ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl %edi, %esi ; X32-NEXT: addl %ecx, %esi
; X32-NEXT: movzbl %bl, %eax ; X32-NEXT: movzbl %bl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: mull %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %ebx, %ecx ; X32-NEXT: adcl %edi, %ebx
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edi, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ebx, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb (%esp) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %ebx, %ecx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: addl %esi, %ebx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %edi, %ecx ; X32-NEXT: adcl %eax, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X32-NEXT: addl %edi, %edx
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %esi, %eax ; X32-NEXT: adcl %eax, %ebx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ecx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 32(%eax), %edi ; X32-NEXT: movl 32(%eax), %edi
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %ecx, %ebx ; X32-NEXT: addl %ecx, %ebx
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 36(%eax), %ecx ; X32-NEXT: movl 36(%eax), %ecx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %ecx, %esi ; X32-NEXT: movl %ecx, %esi
; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %ecx ; X32-NEXT: adcl %edi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
Show All 11 Lines
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ecx, %ebp ; X32-NEXT: addl %ecx, %ebp
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl (%esp), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %edi, %esi ; X32-NEXT: adcl %edi, %esi
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl %esi, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl 40(%eax), %esi ; X32-NEXT: movl 40(%eax), %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
Show All 22 Lines
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: adcl $0, %ebp ; X32-NEXT: adcl $0, %ebp
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl (%esp), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
Show All 15 Lines
; X32-NEXT: adcl %ebp, %ebx ; X32-NEXT: adcl %ebp, %ebx
; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload
; X32-NEXT: adcl %ecx, %eax ; X32-NEXT: adcl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %edi, %esi ; X32-NEXT: imull %eax, %edi
; X32-NEXT: imull %eax, %esi ; X32-NEXT: movl (%esp), %ecx # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: imull %ebx, %ecx ; X32-NEXT: imull %ebx, %ecx
; X32-NEXT: addl %edi, %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: addl %edx, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl (%esp), %edi # 4-byte Reload
; X32-NEXT: imull %edi, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: imull %esi, %edx
; X32-NEXT: imull %ebp, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %edx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %ecx, %edi
; X32-NEXT: addl %edx, %edi
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %edx, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl (%esp), %edi # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %ecx ; X32-NEXT: mull %edi
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %ebx, %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx ; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl (%esp), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl 60(%edi), %ecx ; X32-NEXT: movl 60(%edi), %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: imull %eax, %ecx
; X32-NEXT: movl 56(%edi), %esi ; X32-NEXT: movl 56(%edi), %esi
; X32-NEXT: movl %edi, %ebx
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: imull %ebp, %esi
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %edx, %esi ; X32-NEXT: addl %edx, %esi
; X32-NEXT: movl 48(%edi), %edi ; X32-NEXT: movl 48(%edi), %ecx
; X32-NEXT: movl 52(%ebx), %ebp ; X32-NEXT: movl 52(%edi), %ebx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: imull %ebp, %ebx ; X32-NEXT: imull %ebx, %edx
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: mull %edi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: addl %ebx, %edx ; X32-NEXT: imull %ecx, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: addl %edx, %edi
; X32-NEXT: imull %edi, %ecx
; X32-NEXT: addl %edx, %ecx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %ecx
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: addl %edx, %edi
; X32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: adcl %esi, %edi
; X32-NEXT: mull %ecx ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %esi
; X32-NEXT: addl (%esp), %esi # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl %ebp, %edi ; X32-NEXT: addl %esi, %ebp
; X32-NEXT: adcl %ebx, %ecx ; X32-NEXT: adcl %ebx, %ecx
; X32-NEXT: setb %bl ; X32-NEXT: setb %bl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movzbl %bl, %ecx ; X32-NEXT: movzbl %bl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl %edi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl 40(%edi), %ebp ; X32-NEXT: movl 40(%edi), %ebp
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
Show All 15 Lines
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ecx, %eax ; X32-NEXT: addl %ecx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, (%esp) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl %cl, %eax ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 32(%ecx), %esi ; X32-NEXT: movl 32(%ecx), %esi
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
Show All 17 Lines
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl %edi, %ebx ; X32-NEXT: addl %edi, %ebx
; X32-NEXT: movzbl %cl, %eax ; X32-NEXT: movzbl %cl, %eax
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
Show All 16 Lines
; X32-NEXT: addl %esi, %edi ; X32-NEXT: addl %esi, %edi
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %ecx ; X32-NEXT: adcl %eax, %ecx
; X32-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edi ; X32-NEXT: adcl $0, %edi
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: addl (%esp), %edi # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl (%esp), %ecx # 4-byte Folded Reload
; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, (%esp) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ebx ; X32-NEXT: adcl $0, %ebx
; X32-NEXT: movl %esi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload ; X32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: addl %ebp, %eax ; X32-NEXT: addl %ebp, %eax
; X32-NEXT: movl %eax, %ebp ; X32-NEXT: movl %eax, %ebp
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: setb (%esp) # 1-byte Folded Spill ; X32-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: addl %esi, %eax ; X32-NEXT: addl %esi, %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %eax, %esi
; X32-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %edx ; X32-NEXT: adcl %eax, %edx
; X32-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X32-NEXT: addl %edi, (%esp) # 4-byte Folded Spill
; X32-NEXT: adcl %ecx, %ebp ; X32-NEXT: adcl %ecx, %ebp
; X32-NEXT: movl %ebp, (%esp) # 4-byte Spill ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X32-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X32-NEXT: adcl %eax, %esi ; X32-NEXT: adcl %eax, %esi
; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl $0, %edx ; X32-NEXT: adcl $0, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl 48(%ecx), %edi ; X32-NEXT: movl 48(%ecx), %ebp
; X32-NEXT: movl %ebx, %esi ; X32-NEXT: movl %ebx, %esi
; X32-NEXT: imull %edi, %esi ; X32-NEXT: imull %ebp, %esi
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %ebp, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx ; X32-NEXT: mull %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl 52(%ecx), %eax ; X32-NEXT: movl 52(%ecx), %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: imull %eax, %ebx ; X32-NEXT: imull %eax, %ebx
; X32-NEXT: addl %esi, %ebx
; X32-NEXT: addl %edx, %ebx ; X32-NEXT: addl %edx, %ebx
; X32-NEXT: movl 56(%ecx), %eax ; X32-NEXT: movl 56(%ecx), %eax
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl %ecx, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl %eax, %edx
; X32-NEXT: imull %ebp, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx ; X32-NEXT: imull %ecx, %edx
; X32-NEXT: addl %esi, %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl 60(%esi), %esi ; X32-NEXT: movl 60(%esi), %esi
; X32-NEXT: imull %ecx, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: imull %edi, %esi
; X32-NEXT: addl %edx, %esi
; X32-NEXT: mull %edi
; X32-NEXT: addl %edx, %esi ; X32-NEXT: addl %edx, %esi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ebx, %esi ; X32-NEXT: adcl %ebx, %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %edi, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebp, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %edi ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ecx ; X32-NEXT: movl %edx, %ecx
; X32-NEXT: movl %eax, %ebx ; X32-NEXT: movl %eax, %ebx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: adcl $0, %ecx ; X32-NEXT: adcl $0, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl %edi, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %edi ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %ecx, %edi ; X32-NEXT: adcl %ecx, %edi
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %edi, %eax ; X32-NEXT: addl %edi, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %cl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl %esi, %edx ; X32-NEXT: adcl %esi, %edx
; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: imull %eax, %edi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: mull %ecx
; X32-NEXT: movl %eax, %ebx
; X32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: addl %edi, %ecx
; X32-NEXT: addl %edx, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: imull %eax, %ecx ; X32-NEXT: movl %eax, %edx
; X32-NEXT: movl %eax, %esi ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: imull %esi, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: imull %edi, %ebp
; X32-NEXT: addl %edx, %ebp
; X32-NEXT: mull %edi ; X32-NEXT: mull %edi
; X32-NEXT: addl %edx, %ebp
; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: addl %ecx, %edx ; X32-NEXT: adcl %ecx, %ebp
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: imull %ebp, %edi ; X32-NEXT: movl %edi, %eax
; X32-NEXT: addl %edx, %edi ; X32-NEXT: movl %edi, %ebx
; X32-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X32-NEXT: imull %edi, %ecx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: mull %ebx
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: imull %ebx, %ecx ; X32-NEXT: mull %ecx
; X32-NEXT: addl %edx, %ecx ; X32-NEXT: movl %edx, %edi
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %ebx, %eax
; X32-NEXT: mull %esi
; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: movl %edi, %eax ; X32-NEXT: movl %esi, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %ecx
; X32-NEXT: movl %edx, %esi ; X32-NEXT: movl %edx, %esi
; X32-NEXT: movl %eax, %ecx ; X32-NEXT: movl %eax, %ecx
; X32-NEXT: addl %ebx, %ecx ; X32-NEXT: addl %edi, %ecx
; X32-NEXT: adcl $0, %esi ; X32-NEXT: adcl $0, %esi
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl %ebx, %eax
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: movl %edx, %ebx ; X32-NEXT: movl %edx, %ebx
; X32-NEXT: movl %eax, %edi ; X32-NEXT: movl %eax, %edi
; X32-NEXT: addl %ecx, %edi ; X32-NEXT: addl %ecx, %edi
; X32-NEXT: adcl %esi, %ebx ; X32-NEXT: adcl %esi, %ebx
; X32-NEXT: setb %cl ; X32-NEXT: setb %cl
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X32-NEXT: mull %ebp ; X32-NEXT: mull %ebp
; X32-NEXT: addl %ebx, %eax ; X32-NEXT: addl %ebx, %eax
; X32-NEXT: movzbl %cl, %ecx ; X32-NEXT: movzbl %cl, %ecx
; X32-NEXT: adcl %ecx, %edx ; X32-NEXT: adcl %ecx, %edx
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: addl (%esp), %ecx # 4-byte Folded Reload
; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X32-NEXT: adcl (%esp), %edi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X32-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; X64-LABEL: test_512: ; X64-LABEL: test_512:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: pushq %rbp ; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %r15 ; X64-NEXT: pushq %r15
; X64-NEXT: pushq %r14 ; X64-NEXT: pushq %r14
; X64-NEXT: pushq %r13 ; X64-NEXT: pushq %r13
; X64-NEXT: pushq %r12 ; X64-NEXT: pushq %r12
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %rbx
; X64-NEXT: pushq %rax ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, (%rsp) # 8-byte Spill
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq (%rdi), %rbx ; X64-NEXT: movq (%rdi), %r14
; X64-NEXT: movq 8(%rdi), %r9 ; X64-NEXT: movq 8(%rdi), %r9
; X64-NEXT: movq 24(%rdi), %r12 ; X64-NEXT: movq 24(%rdi), %r15
; X64-NEXT: movq 16(%rdi), %r14 ; X64-NEXT: movq 16(%rdi), %rax
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq (%rsi), %rdi
; X64-NEXT: movq (%rsi), %rcx ; X64-NEXT: movq 8(%rsi), %rbx
; X64-NEXT: movq 8(%rsi), %r11 ; X64-NEXT: movq %rsi, %r12
; X64-NEXT: movq %rsi, %rdi ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rcx, %rsi ; X64-NEXT: mulq %rdi
; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rsi, %r15
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %r10
; X64-NEXT: addq %rcx, %r10 ; X64-NEXT: addq %rcx, %r10
; X64-NEXT: adcq $0, %r8 ; X64-NEXT: adcq $0, %r8
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %r10, %rcx ; X64-NEXT: addq %r10, %r11
; X64-NEXT: adcq %r8, %r14 ; X64-NEXT: adcq %r8, %rcx
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: movzbl %al, %esi ; X64-NEXT: movzbl %al, %esi
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %r13 ; X64-NEXT: movq %rdx, %r13
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %r10
; X64-NEXT: addq %r14, %r10 ; X64-NEXT: addq %rcx, %r10
; X64-NEXT: adcq %rsi, %r13 ; X64-NEXT: adcq %rsi, %r13
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %r14, %rsi
; X64-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %r14, %r15 ; X64-NEXT: addq %rcx, %r15
; X64-NEXT: adcq $0, %rbp ; X64-NEXT: adcq $0, %r14
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: movq %rbx, %r12 ; X64-NEXT: movq %rsi, %r8
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: addq %r15, %rax ; X64-NEXT: addq %r15, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %rbp, %rbx ; X64-NEXT: adcq %r14, %rbp
; X64-NEXT: setb %sil ; X64-NEXT: setb %sil
; X64-NEXT: movq %r9, %rdi
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: addq %rbx, %rbp ; X64-NEXT: addq %rbp, %rcx
; X64-NEXT: movzbl %sil, %eax ; X64-NEXT: movzbl %sil, %eax
; X64-NEXT: adcq %rax, %r14 ; X64-NEXT: adcq %rax, %r14
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: adcq %rcx, %r14 ; X64-NEXT: adcq %r11, %r14
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r10
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: movq %rdi, %rsi ; X64-NEXT: movq %r12, %r9
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq 16(%rdi), %r8
; X64-NEXT: movq %r12, %r11
; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq 16(%r12), %rsi
; X64-NEXT: mulq %r8 ; X64-NEXT: movq %r8, %rbx
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq %r9, %rax ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %r9, %r12 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, %r8
; X64-NEXT: mulq %r8 ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdi, %r12
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: addq %rcx, %r15
; X64-NEXT: adcq $0, %rbx
; X64-NEXT: movq 24(%rsi), %rsi
; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %rbp
; X64-NEXT: addq %r11, %rbp
; X64-NEXT: adcq $0, %r15
; X64-NEXT: movq 24(%r9), %rdi
; X64-NEXT: movq %rbx, %rax
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r15, %r11 ; X64-NEXT: addq %rbp, %rbx
; X64-NEXT: adcq %rbx, %r9 ; X64-NEXT: adcq %r15, %r9
; X64-NEXT: setb %bl ; X64-NEXT: setb %bpl
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %r9, %rcx ; X64-NEXT: addq %r9, %r11
; X64-NEXT: movzbl %bl, %eax ; X64-NEXT: movzbl %bpl, %eax
; X64-NEXT: adcq %rax, %r15 ; X64-NEXT: adcq %rax, %r15
; X64-NEXT: addq %rbp, %rdi ; X64-NEXT: addq %rcx, %r8
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r14, %r11 ; X64-NEXT: adcq %r14, %rbx
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %rcx ; X64-NEXT: adcq $0, %r11
; X64-NEXT: adcq $0, %r15 ; X64-NEXT: adcq $0, %r15
; X64-NEXT: addq %r10, %rcx ; X64-NEXT: addq %r10, %r11
; X64-NEXT: adcq %r13, %r15 ; X64-NEXT: adcq %r13, %r15
; X64-NEXT: setb %r12b ; X64-NEXT: setb %bpl
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r11
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %rdi, %rbx
; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %rbx, %rax
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: adcq %r9, %rbp ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: setb %dil ; X64-NEXT: movq %r13, %rax
; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: addq %rbp, %rax ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movzbl %dil, %edi ; X64-NEXT: movq %rax, %r9
; X64-NEXT: adcq %rdi, %rdx ; X64-NEXT: addq %rcx, %r9
; X64-NEXT: addq %rcx, %r11 ; X64-NEXT: adcq $0, %r8
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r10, %rax
; X64-NEXT: adcq %r15, %rbx ; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: addq %r9, %rax
; X64-NEXT: movq %rax, %r9
; X64-NEXT: adcq %r8, %rcx
; X64-NEXT: setb %r8b
; X64-NEXT: movq %r13, %rax
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %rcx, %r14
; X64-NEXT: movzbl %r8b, %eax
; X64-NEXT: adcq %rax, %rdx
; X64-NEXT: addq %r11, %rbx
; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movzbl %r12b, %ecx ; X64-NEXT: adcq %r15, %r9
; X64-NEXT: adcq %rcx, %rax ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movzbl %bpl, %eax
; X64-NEXT: adcq %rax, %r14
; X64-NEXT: adcq $0, %rdx ; X64-NEXT: adcq $0, %rdx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq 32(%rcx), %r15 ; X64-NEXT: movq 32(%rcx), %r11
; X64-NEXT: imulq %r15, %rsi ; X64-NEXT: imulq %r11, %rdi
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %rsi, %rdx ; X64-NEXT: movq 40(%rcx), %r8
; X64-NEXT: movq 40(%rcx), %rsi ; X64-NEXT: imulq %r8, %rsi
; X64-NEXT: imulq %rsi, %r8 ; X64-NEXT: addq %rdi, %rsi
; X64-NEXT: addq %rdx, %r8 ; X64-NEXT: addq %rdx, %rsi
; X64-NEXT: movq 48(%rcx), %rax ; X64-NEXT: movq 48(%rcx), %rax
; X64-NEXT: movq %rcx, %r11 ; X64-NEXT: movq %rcx, %rdx
; X64-NEXT: movq %rax, %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: imulq %r14, %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx # 8-byte Reload
; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: addq %rdi, %rdx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload
; X64-NEXT: movq 56(%r11), %r11 ; X64-NEXT: imulq %r10, %rcx
; X64-NEXT: imulq %rbx, %r11 ; X64-NEXT: movq 56(%rdx), %rbp
; X64-NEXT: addq %rdx, %r11 ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: imulq %rdi, %rbp
; X64-NEXT: addq %rcx, %rbp
; X64-NEXT: mulq %rdi
; X64-NEXT: movq %rax, %rcx
; X64-NEXT: addq %rdx, %rbp
; X64-NEXT: addq %r9, %rcx ; X64-NEXT: addq %r9, %rcx
; X64-NEXT: adcq %r8, %r11 ; X64-NEXT: adcq %rsi, %rbp
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %rbx, %r8 ; X64-NEXT: movq %rdi, %rsi
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rdi, %rbx ; X64-NEXT: addq %rdi, %r11
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %r9
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %rbx, %r13 ; X64-NEXT: addq %r11, %rbx
; X64-NEXT: adcq %r9, %r15 ; X64-NEXT: adcq %r9, %r15
; X64-NEXT: setb %dil ; X64-NEXT: setb %sil
; X64-NEXT: movq %r14, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %r15, %r8 ; X64-NEXT: addq %r15, %r8
; X64-NEXT: movzbl %dil, %eax ; X64-NEXT: movzbl %sil, %eax
; X64-NEXT: adcq %rax, %r12 ; X64-NEXT: adcq %rax, %r12
; X64-NEXT: addq %rcx, %r8 ; X64-NEXT: addq %rcx, %r8
; X64-NEXT: adcq %r11, %r12 ; X64-NEXT: adcq %rbp, %r12
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq 56(%rcx), %rsi ; X64-NEXT: movq 56(%rcx), %rsi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: imulq %rax, %rsi ; X64-NEXT: imulq %rax, %rsi
; X64-NEXT: movq 48(%rcx), %r11 ; X64-NEXT: movq 48(%rcx), %r11
; X64-NEXT: movq %rcx, %rdi ; X64-NEXT: movq %rcx, %rdi
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: mulq %r11 ; X64-NEXT: mulq %r11
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %r10
; X64-NEXT: addq %rsi, %rdx ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload ; X64-NEXT: imulq %rcx, %r11
; X64-NEXT: imulq %r14, %r11 ; X64-NEXT: addq %rsi, %r11
; X64-NEXT: addq %rdx, %r11 ; X64-NEXT: addq %rdx, %r11
; X64-NEXT: movq 32(%rdi), %r9 ; X64-NEXT: movq 32(%rdi), %r9
; X64-NEXT: movq 40(%rdi), %r15 ; X64-NEXT: movq 40(%rdi), %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rdx
; X64-NEXT: imulq %r15, %rsi ; X64-NEXT: imulq %rdi, %rdx
; X64-NEXT: imulq %r9, %r13
; X64-NEXT: addq %rdx, %r13
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %rsi, %rdx ; X64-NEXT: addq %rdx, %r13
; X64-NEXT: imulq %r9, %r10 ; X64-NEXT: addq %r10, %r15
; X64-NEXT: addq %rdx, %r10 ; X64-NEXT: adcq %r11, %r13
; X64-NEXT: addq %rcx, %rdi
; X64-NEXT: adcq %r11, %r10
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rsi, %rbx ; X64-NEXT: addq %r10, %r11
; X64-NEXT: adcq $0, %rbp ; X64-NEXT: adcq $0, %rbp
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r14 ; X64-NEXT: mulq %rcx
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rcx, %r10
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: addq %rbx, %r9 ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: adcq %rbp, %rsi ; X64-NEXT: addq %r11, %rcx
; X64-NEXT: setb %bl ; X64-NEXT: adcq %rbp, %r9
; X64-NEXT: movq %r15, %rax ; X64-NEXT: setb %r11b
; X64-NEXT: mulq %r14 ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: addq %rsi, %rax ; X64-NEXT: mulq %r10
; X64-NEXT: movzbl %bl, %esi ; X64-NEXT: addq %r9, %rax
; X64-NEXT: adcq %rsi, %rdx ; X64-NEXT: movzbl %r11b, %edi
; X64-NEXT: addq %rdi, %rax ; X64-NEXT: adcq %rdi, %rdx
; X64-NEXT: adcq %r10, %rdx ; X64-NEXT: addq %r15, %rax
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: adcq %r13, %rdx
; X64-NEXT: adcq %r13, %r9 ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: adcq %rbx, %rcx
; X64-NEXT: adcq %r8, %rax ; X64-NEXT: adcq %r8, %rax
; X64-NEXT: adcq %r12, %rdx ; X64-NEXT: adcq %r12, %rdx
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload ; X64-NEXT: adcq %r14, %rax
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Folded Reload
; X64-NEXT: movq (%rsp), %rsi # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: movq %rdi, (%rsi)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: movq %rdi, 8(%rsi)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: movq %rdi, 16(%rsi)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: movq %rdi, 24(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %rcx, 32(%rsi) ; X64-NEXT: movq %r8, (%rdi)
; X64-NEXT: movq %r9, 40(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %rax, 48(%rsi) ; X64-NEXT: movq %r8, 8(%rdi)
; X64-NEXT: movq %rdx, 56(%rsi) ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: addq $8, %rsp ; X64-NEXT: movq %r8, 16(%rdi)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %r8, 24(%rdi)
; X64-NEXT: movq %rsi, 32(%rdi)
; X64-NEXT: movq %rcx, 40(%rdi)
; X64-NEXT: movq %rax, 48(%rdi)
; X64-NEXT: movq %rdx, 56(%rdi)
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: popq %r12 ; X64-NEXT: popq %r12
; X64-NEXT: popq %r13 ; X64-NEXT: popq %r13
; X64-NEXT: popq %r14 ; X64-NEXT: popq %r14
; X64-NEXT: popq %r15 ; X64-NEXT: popq %r15
; X64-NEXT: popq %rbp ; X64-NEXT: popq %rbp
; X64-NEXT: retq ; X64-NEXT: retq
%av = load i512, ptr %a %av = load i512, ptr %a
%bv = load i512, ptr %b %bv = load i512, ptr %b
%r = mul i512 %av, %bv %r = mul i512 %av, %bv
store i512 %r, ptr %out store i512 %r, ptr %out
ret void ret void
} }

llvm/test/CodeGen/X86/mul128.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86 ; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
define i128 @foo(i128 %t, i128 %u) { define i128 @foo(i128 %t, i128 %u) {
; X64-LABEL: foo: ; X64-LABEL: foo:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: imulq %rdi, %rcx ; X64-NEXT: imulq %rdi, %rcx
; X64-NEXT: mulq %rdx ; X64-NEXT: mulq %rdx
; X64-NEXT: addq %rcx, %rdx
; X64-NEXT: imulq %rsi, %r8 ; X64-NEXT: imulq %rsi, %r8
; X64-NEXT: addq %rcx, %r8
; X64-NEXT: addq %r8, %rdx ; X64-NEXT: addq %r8, %rdx
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-LABEL: foo: ; X86-LABEL: foo:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: .cfi_def_cfa_offset 12 ; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: .cfi_def_cfa_offset 16 ; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 20 ; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 28 ; X86-NEXT: .cfi_def_cfa_offset 28
; X86-NEXT: .cfi_offset %esi, -20 ; X86-NEXT: .cfi_offset %esi, -20
; X86-NEXT: .cfi_offset %edi, -16 ; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .cfi_offset %ebx, -12 ; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: .cfi_offset %ebp, -8 ; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: imull %ecx, %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %esi, %eax ; X86-NEXT: imull %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: imull %ebp, %esi
; X86-NEXT: addl %eax, %esi
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %edx, %esi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl %edi, %edx
; X86-NEXT: imull {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: imull %esi, %edi
; X86-NEXT: addl %edx, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %ebp, %edi
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %esi, %ecx ; X86-NEXT: imull %edi, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: mull %edi
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: adcl %edi, %ecx ; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: mull %ebp
; X86-NEXT: mull %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %esi
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %esi, %ebp ; X86-NEXT: addl %esi, %ebp
; X86-NEXT: adcl %ebx, %edi ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ebp, %edi
; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movzbl %bl, %esi ; X86-NEXT: movzbl %bl, %esi
; X86-NEXT: adcl %esi, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X86-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ebp, 4(%ecx) ; X86-NEXT: movl %edi, 4(%ecx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, (%ecx) ; X86-NEXT: movl %esi, (%ecx)
; X86-NEXT: movl %eax, 8(%ecx) ; X86-NEXT: movl %eax, 8(%ecx)
; X86-NEXT: movl %edx, 12(%ecx) ; X86-NEXT: movl %edx, 12(%ecx)
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: addl $8, %esp ; X86-NEXT: addl $8, %esp
; X86-NEXT: .cfi_def_cfa_offset 20 ; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
▲ Show 20 Lines • Show All 43 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/mul64.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32 ; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define i64 @foo(i64 %t, i64 %u) nounwind { define i64 @foo(i64 %t, i64 %u) nounwind {
; X32-LABEL: foo: ; X32-LABEL: foo:
; X32: # %bb.0: ; X32: # %bb.0:
; X32-NEXT: pushl %esi ; X32-NEXT: pushl %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl %ecx, %eax ; X32-NEXT: movl %ecx, %eax
; X32-NEXT: mull %esi ; X32-NEXT: mull %esi
; X32-NEXT: imull {{[0-9]+}}(%esp), %ecx ; X32-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X32-NEXT: addl %ecx, %edx
; X32-NEXT: imull {{[0-9]+}}(%esp), %esi ; X32-NEXT: imull {{[0-9]+}}(%esp), %esi
; X32-NEXT: addl %ecx, %esi
; X32-NEXT: addl %esi, %edx ; X32-NEXT: addl %esi, %edx
; X32-NEXT: popl %esi ; X32-NEXT: popl %esi
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: foo: ; X64-LABEL: foo:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: imulq %rsi, %rax ; X64-NEXT: imulq %rsi, %rax
; X64-NEXT: retq ; X64-NEXT: retq
%k = mul i64 %t, %u %k = mul i64 %t, %u
ret i64 %k ret i64 %k
} }

llvm/test/CodeGen/X86/muloti.ll

Show All 16 Lines
; CHECK-NEXT: movq %rdi, %r9 ; CHECK-NEXT: movq %rdi, %r9
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: sarq $63, %rbx ; CHECK-NEXT: sarq $63, %rbx
; CHECK-NEXT: movq %rdx, %rdi ; CHECK-NEXT: movq %rdx, %rdi
; CHECK-NEXT: imulq %rbx, %rdi ; CHECK-NEXT: imulq %rbx, %rdi
; CHECK-NEXT: movq %rdx, %rax ; CHECK-NEXT: movq %rdx, %rax
; CHECK-NEXT: mulq %rbx ; CHECK-NEXT: mulq %rbx
; CHECK-NEXT: movq %rax, %r8 ; CHECK-NEXT: movq %rax, %r8
; CHECK-NEXT: addq %rdi, %rdx
; CHECK-NEXT: imulq %rcx, %rbx ; CHECK-NEXT: imulq %rcx, %rbx
; CHECK-NEXT: addq %rdi, %rbx
; CHECK-NEXT: addq %rdx, %rbx ; CHECK-NEXT: addq %rdx, %rbx
; CHECK-NEXT: movq %rcx, %rdi ; CHECK-NEXT: movq %rcx, %rdi
; CHECK-NEXT: sarq $63, %rdi ; CHECK-NEXT: sarq $63, %rdi
; CHECK-NEXT: movq %rdi, %r14 ; CHECK-NEXT: movq %rdi, %r14
; CHECK-NEXT: imulq %rsi, %r14 ; CHECK-NEXT: imulq %rsi, %r14
; CHECK-NEXT: movq %rdi, %rax ; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: mulq %r9 ; CHECK-NEXT: mulq %r9
; CHECK-NEXT: movq %rax, %r10 ; CHECK-NEXT: movq %rax, %r10
; CHECK-NEXT: addq %r14, %rdx
; CHECK-NEXT: imulq %r9, %rdi ; CHECK-NEXT: imulq %r9, %rdi
; CHECK-NEXT: addq %r14, %rdi
; CHECK-NEXT: addq %rdx, %rdi ; CHECK-NEXT: addq %rdx, %rdi
; CHECK-NEXT: addq %r8, %r10 ; CHECK-NEXT: addq %r8, %r10
; CHECK-NEXT: adcq %rbx, %rdi ; CHECK-NEXT: adcq %rbx, %rdi
; CHECK-NEXT: movq %r9, %rax ; CHECK-NEXT: movq %r9, %rax
; CHECK-NEXT: mulq %r11 ; CHECK-NEXT: mulq %r11
; CHECK-NEXT: movq %rdx, %rbx ; CHECK-NEXT: movq %rdx, %rbx
; CHECK-NEXT: movq %rax, %r8 ; CHECK-NEXT: movq %rax, %r8
; CHECK-NEXT: movq %rsi, %rax ; CHECK-NEXT: movq %rsi, %rax
▲ Show 20 Lines • Show All 63 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/popcnt.ll

Show First 20 Lines • Show All 346 Lines • ▼ Show 20 Lines
; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333 ; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
; X86-NOSSE-NEXT: addl %edi, %edx ; X86-NOSSE-NEXT: addl %edi, %edx
; X86-NOSSE-NEXT: movl %edx, %edi ; X86-NOSSE-NEXT: movl %edx, %edi
; X86-NOSSE-NEXT: shrl $4, %edi ; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %edx, %edi ; X86-NOSSE-NEXT: addl %edx, %edi
; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F ; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: imull $16843009, %edi, %edx # imm = 0x1010101 ; X86-NOSSE-NEXT: imull $16843009, %edi, %edx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %edx ; X86-NOSSE-NEXT: shrl $24, %edx
; X86-NOSSE-NEXT: movl %ecx, %edi ; X86-NOSSE-NEXT: addl %esi, %edx
; X86-NOSSE-NEXT: shrl %edi ; X86-NOSSE-NEXT: movl %ecx, %esi
; X86-NOSSE-NEXT: andl $1431655765, %edi # imm = 0x55555555 ; X86-NOSSE-NEXT: shrl %esi
; X86-NOSSE-NEXT: subl %edi, %ecx ; X86-NOSSE-NEXT: andl $1431655765, %esi # imm = 0x55555555
; X86-NOSSE-NEXT: movl %ecx, %edi ; X86-NOSSE-NEXT: subl %esi, %ecx
; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333 ; X86-NOSSE-NEXT: movl %ecx, %esi
; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
; X86-NOSSE-NEXT: shrl $2, %ecx ; X86-NOSSE-NEXT: shrl $2, %ecx
; X86-NOSSE-NEXT: andl $858993459, %ecx # imm = 0x33333333 ; X86-NOSSE-NEXT: andl $858993459, %ecx # imm = 0x33333333
; X86-NOSSE-NEXT: addl %edi, %ecx ; X86-NOSSE-NEXT: addl %esi, %ecx
; X86-NOSSE-NEXT: movl %ecx, %edi ; X86-NOSSE-NEXT: movl %ecx, %esi
; X86-NOSSE-NEXT: shrl $4, %edi ; X86-NOSSE-NEXT: shrl $4, %esi
; X86-NOSSE-NEXT: addl %ecx, %edi ; X86-NOSSE-NEXT: addl %ecx, %esi
; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F ; X86-NOSSE-NEXT: andl $252645135, %esi # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: imull $16843009, %edi, %ecx # imm = 0x1010101 ; X86-NOSSE-NEXT: imull $16843009, %esi, %ecx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx ; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: addl %edx, %ecx ; X86-NOSSE-NEXT: addl %edx, %ecx
; X86-NOSSE-NEXT: addl %esi, %ecx
; X86-NOSSE-NEXT: movl %ecx, (%eax) ; X86-NOSSE-NEXT: movl %ecx, (%eax)
; X86-NOSSE-NEXT: movl $0, 12(%eax) ; X86-NOSSE-NEXT: movl $0, 12(%eax)
; X86-NOSSE-NEXT: movl $0, 8(%eax) ; X86-NOSSE-NEXT: movl $0, 8(%eax)
; X86-NOSSE-NEXT: movl $0, 4(%eax) ; X86-NOSSE-NEXT: movl $0, 4(%eax)
; X86-NOSSE-NEXT: popl %esi ; X86-NOSSE-NEXT: popl %esi
; X86-NOSSE-NEXT: popl %edi ; X86-NOSSE-NEXT: popl %edi
; X86-NOSSE-NEXT: popl %ebx ; X86-NOSSE-NEXT: popl %ebx
; X86-NOSSE-NEXT: retl $4 ; X86-NOSSE-NEXT: retl $4
Show All 35 Lines
; X64-NEXT: imulq %r9, %rax ; X64-NEXT: imulq %r9, %rax
; X64-NEXT: shrq $56, %rax ; X64-NEXT: shrq $56, %rax
; X64-NEXT: addq %rdx, %rax ; X64-NEXT: addq %rdx, %rax
; X64-NEXT: xorl %edx, %edx ; X64-NEXT: xorl %edx, %edx
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-POPCNT-LABEL: cnt128: ; X86-POPCNT-LABEL: cnt128:
; X86-POPCNT: # %bb.0: ; X86-POPCNT: # %bb.0:
; X86-POPCNT-NEXT: pushl %esi
; X86-POPCNT-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-POPCNT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx
; X86-POPCNT-NEXT: addl %ecx, %edx ; X86-POPCNT-NEXT: addl %ecx, %edx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %esi ; X86-POPCNT-NEXT: addl %edx, %ecx
; X86-POPCNT-NEXT: addl %ecx, %esi ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx
; X86-POPCNT-NEXT: addl %edx, %esi ; X86-POPCNT-NEXT: addl %ecx, %edx
; X86-POPCNT-NEXT: movl %esi, (%eax) ; X86-POPCNT-NEXT: movl %edx, (%eax)
; X86-POPCNT-NEXT: movl $0, 12(%eax) ; X86-POPCNT-NEXT: movl $0, 12(%eax)
; X86-POPCNT-NEXT: movl $0, 8(%eax) ; X86-POPCNT-NEXT: movl $0, 8(%eax)
; X86-POPCNT-NEXT: movl $0, 4(%eax) ; X86-POPCNT-NEXT: movl $0, 4(%eax)
; X86-POPCNT-NEXT: popl %esi
; X86-POPCNT-NEXT: retl $4 ; X86-POPCNT-NEXT: retl $4
; ;
; X64-POPCNT-LABEL: cnt128: ; X64-POPCNT-LABEL: cnt128:
; X64-POPCNT: # %bb.0: ; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: popcntq %rsi, %rcx ; X64-POPCNT-NEXT: popcntq %rsi, %rcx
; X64-POPCNT-NEXT: popcntq %rdi, %rax ; X64-POPCNT-NEXT: popcntq %rdi, %rax
; X64-POPCNT-NEXT: addq %rcx, %rax ; X64-POPCNT-NEXT: addq %rcx, %rax
; X64-POPCNT-NEXT: xorl %edx, %edx ; X64-POPCNT-NEXT: xorl %edx, %edx
▲ Show 20 Lines • Show All 350 Lines • ▼ Show 20 Lines
; X86-NOSSE-LABEL: cnt128_optsize: ; X86-NOSSE-LABEL: cnt128_optsize:
; X86-NOSSE: # %bb.0: ; X86-NOSSE: # %bb.0:
; X86-NOSSE-NEXT: pushl %ebp ; X86-NOSSE-NEXT: pushl %ebp
; X86-NOSSE-NEXT: pushl %ebx ; X86-NOSSE-NEXT: pushl %ebx
; X86-NOSSE-NEXT: pushl %edi ; X86-NOSSE-NEXT: pushl %edi
; X86-NOSSE-NEXT: pushl %esi ; X86-NOSSE-NEXT: pushl %esi
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NOSSE-NEXT: movl %ebx, %ecx ; X86-NOSSE-NEXT: movl %ebx, %eax
; X86-NOSSE-NEXT: shrl %ecx ; X86-NOSSE-NEXT: shrl %eax
; X86-NOSSE-NEXT: movl $1431655765, %edi # imm = 0x55555555 ; X86-NOSSE-NEXT: movl $1431655765, %ecx # imm = 0x55555555
; X86-NOSSE-NEXT: andl %edi, %ecx ; X86-NOSSE-NEXT: andl %ecx, %eax
; X86-NOSSE-NEXT: movl $1431655765, %edi # imm = 0x55555555 ; X86-NOSSE-NEXT: subl %eax, %ebx
; X86-NOSSE-NEXT: subl %ecx, %ebx ; X86-NOSSE-NEXT: movl $858993459, %eax # imm = 0x33333333
; X86-NOSSE-NEXT: movl $858993459, %ecx # imm = 0x33333333 ; X86-NOSSE-NEXT: movl %ebx, %edi
; X86-NOSSE-NEXT: movl %ebx, %ebp ; X86-NOSSE-NEXT: andl %eax, %edi
; X86-NOSSE-NEXT: andl %ecx, %ebp
; X86-NOSSE-NEXT: shrl $2, %ebx ; X86-NOSSE-NEXT: shrl $2, %ebx
; X86-NOSSE-NEXT: andl %ecx, %ebx ; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: addl %ebp, %ebx ; X86-NOSSE-NEXT: addl %edi, %ebx
; X86-NOSSE-NEXT: movl %ebx, %ebp ; X86-NOSSE-NEXT: movl %ebx, %edi
; X86-NOSSE-NEXT: shrl $4, %ebp ; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %ebx, %ebp ; X86-NOSSE-NEXT: addl %ebx, %edi
; X86-NOSSE-NEXT: movl %eax, %ebx ; X86-NOSSE-NEXT: movl %esi, %ebx
; X86-NOSSE-NEXT: shrl %ebx ; X86-NOSSE-NEXT: shrl %ebx
; X86-NOSSE-NEXT: andl %edi, %ebx
; X86-NOSSE-NEXT: subl %ebx, %eax
; X86-NOSSE-NEXT: movl %eax, %ebx
; X86-NOSSE-NEXT: andl %ecx, %ebx ; X86-NOSSE-NEXT: andl %ecx, %ebx
; X86-NOSSE-NEXT: shrl $2, %eax ; X86-NOSSE-NEXT: subl %ebx, %esi
; X86-NOSSE-NEXT: andl %ecx, %eax ; X86-NOSSE-NEXT: movl %esi, %ebx
; X86-NOSSE-NEXT: addl %ebx, %eax ; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: movl %eax, %edi
; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %eax, %edi
; X86-NOSSE-NEXT: movl $252645135, %ebx # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: andl %ebx, %ebp
; X86-NOSSE-NEXT: imull $16843009, %ebp, %eax # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %eax
; X86-NOSSE-NEXT: andl %ebx, %edi
; X86-NOSSE-NEXT: imull $16843009, %edi, %edi # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %edi
; X86-NOSSE-NEXT: addl %eax, %edi
; X86-NOSSE-NEXT: movl %esi, %eax
; X86-NOSSE-NEXT: shrl %eax
; X86-NOSSE-NEXT: movl $1431655765, %ebp # imm = 0x55555555
; X86-NOSSE-NEXT: andl %ebp, %eax
; X86-NOSSE-NEXT: subl %eax, %esi
; X86-NOSSE-NEXT: movl %esi, %eax
; X86-NOSSE-NEXT: andl %ecx, %eax
; X86-NOSSE-NEXT: shrl $2, %esi ; X86-NOSSE-NEXT: shrl $2, %esi
; X86-NOSSE-NEXT: andl %ecx, %esi ; X86-NOSSE-NEXT: andl %eax, %esi
; X86-NOSSE-NEXT: addl %eax, %esi ; X86-NOSSE-NEXT: addl %ebx, %esi
; X86-NOSSE-NEXT: movl %esi, %ebp ; X86-NOSSE-NEXT: movl %esi, %ebx
; X86-NOSSE-NEXT: shrl $4, %ebp ; X86-NOSSE-NEXT: shrl $4, %ebx
; X86-NOSSE-NEXT: addl %esi, %ebp ; X86-NOSSE-NEXT: addl %esi, %ebx
; X86-NOSSE-NEXT: movl %edx, %eax ; X86-NOSSE-NEXT: movl $252645135, %esi # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: shrl %eax ; X86-NOSSE-NEXT: andl %esi, %edi
; X86-NOSSE-NEXT: movl $1431655765, %esi # imm = 0x55555555 ; X86-NOSSE-NEXT: imull $16843009, %edi, %ebp # imm = 0x1010101
; X86-NOSSE-NEXT: andl %esi, %eax ; X86-NOSSE-NEXT: shrl $24, %ebp
; X86-NOSSE-NEXT: subl %eax, %edx ; X86-NOSSE-NEXT: andl %esi, %ebx
; X86-NOSSE-NEXT: movl %edx, %eax ; X86-NOSSE-NEXT: imull $16843009, %ebx, %edi # imm = 0x1010101
; X86-NOSSE-NEXT: andl %ecx, %eax ; X86-NOSSE-NEXT: shrl $24, %edi
; X86-NOSSE-NEXT: addl %ebp, %edi
; X86-NOSSE-NEXT: movl %edx, %ebx
; X86-NOSSE-NEXT: shrl %ebx
; X86-NOSSE-NEXT: andl %ecx, %ebx
; X86-NOSSE-NEXT: subl %ebx, %edx
; X86-NOSSE-NEXT: movl %edx, %ebx
; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: shrl $2, %edx ; X86-NOSSE-NEXT: shrl $2, %edx
; X86-NOSSE-NEXT: andl %ecx, %edx ; X86-NOSSE-NEXT: andl %eax, %edx
; X86-NOSSE-NEXT: addl %eax, %edx ; X86-NOSSE-NEXT: addl %ebx, %edx
; X86-NOSSE-NEXT: movl %edx, %eax ; X86-NOSSE-NEXT: movl %edx, %ebp
; X86-NOSSE-NEXT: shrl $4, %eax ; X86-NOSSE-NEXT: shrl $4, %ebp
; X86-NOSSE-NEXT: addl %edx, %eax ; X86-NOSSE-NEXT: addl %edx, %ebp
; X86-NOSSE-NEXT: andl %ebx, %ebp ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NOSSE-NEXT: andl %ebx, %eax ; X86-NOSSE-NEXT: andl %esi, %ebp
; X86-NOSSE-NEXT: imull $16843009, %ebp, %ecx # imm = 0x1010101 ; X86-NOSSE-NEXT: imull $16843009, %ebp, %edx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: imull $16843009, %eax, %edx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %edx ; X86-NOSSE-NEXT: shrl $24, %edx
; X86-NOSSE-NEXT: addl %ecx, %edx
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOSSE-NEXT: addl %edi, %edx ; X86-NOSSE-NEXT: addl %edi, %edx
; X86-NOSSE-NEXT: xorl %ecx, %ecx ; X86-NOSSE-NEXT: movl %ebx, %edi
; X86-NOSSE-NEXT: movl %ecx, 12(%eax) ; X86-NOSSE-NEXT: shrl %edi
; X86-NOSSE-NEXT: movl %ecx, 8(%eax) ; X86-NOSSE-NEXT: andl %ecx, %edi
; X86-NOSSE-NEXT: movl %ecx, 4(%eax) ; X86-NOSSE-NEXT: subl %edi, %ebx
; X86-NOSSE-NEXT: movl %edx, (%eax) ; X86-NOSSE-NEXT: movl %ebx, %ecx
; X86-NOSSE-NEXT: andl %eax, %ecx
; X86-NOSSE-NEXT: shrl $2, %ebx
; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: addl %ecx, %ebx
; X86-NOSSE-NEXT: movl %ebx, %ecx
; X86-NOSSE-NEXT: shrl $4, %ecx
; X86-NOSSE-NEXT: addl %ebx, %ecx
; X86-NOSSE-NEXT: andl %esi, %ecx
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOSSE-NEXT: imull $16843009, %ecx, %ecx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: addl %edx, %ecx
; X86-NOSSE-NEXT: xorl %edx, %edx
; X86-NOSSE-NEXT: movl %edx, 12(%eax)
; X86-NOSSE-NEXT: movl %edx, 8(%eax)
; X86-NOSSE-NEXT: movl %edx, 4(%eax)
; X86-NOSSE-NEXT: movl %ecx, (%eax)
; X86-NOSSE-NEXT: popl %esi ; X86-NOSSE-NEXT: popl %esi
; X86-NOSSE-NEXT: popl %edi ; X86-NOSSE-NEXT: popl %edi
; X86-NOSSE-NEXT: popl %ebx ; X86-NOSSE-NEXT: popl %ebx
; X86-NOSSE-NEXT: popl %ebp ; X86-NOSSE-NEXT: popl %ebp
; X86-NOSSE-NEXT: retl $4 ; X86-NOSSE-NEXT: retl $4
; ;
; X64-LABEL: cnt128_optsize: ; X64-LABEL: cnt128_optsize:
; X64: # %bb.0: ; X64: # %bb.0:
Show All 32 Lines
; X64-NEXT: imulq %r9, %rax ; X64-NEXT: imulq %r9, %rax
; X64-NEXT: shrq $56, %rax ; X64-NEXT: shrq $56, %rax
; X64-NEXT: addq %rdx, %rax ; X64-NEXT: addq %rdx, %rax
; X64-NEXT: xorl %edx, %edx ; X64-NEXT: xorl %edx, %edx
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-POPCNT-LABEL: cnt128_optsize: ; X86-POPCNT-LABEL: cnt128_optsize:
; X86-POPCNT: # %bb.0: ; X86-POPCNT: # %bb.0:
; X86-POPCNT-NEXT: pushl %esi
; X86-POPCNT-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-POPCNT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx
; X86-POPCNT-NEXT: addl %ecx, %edx ; X86-POPCNT-NEXT: addl %ecx, %edx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %esi ; X86-POPCNT-NEXT: addl %edx, %ecx
; X86-POPCNT-NEXT: addl %ecx, %esi ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx
; X86-POPCNT-NEXT: addl %edx, %esi ; X86-POPCNT-NEXT: addl %ecx, %edx
; X86-POPCNT-NEXT: xorl %ecx, %ecx ; X86-POPCNT-NEXT: xorl %ecx, %ecx
; X86-POPCNT-NEXT: movl %ecx, 12(%eax) ; X86-POPCNT-NEXT: movl %ecx, 12(%eax)
; X86-POPCNT-NEXT: movl %ecx, 8(%eax) ; X86-POPCNT-NEXT: movl %ecx, 8(%eax)
; X86-POPCNT-NEXT: movl %ecx, 4(%eax) ; X86-POPCNT-NEXT: movl %ecx, 4(%eax)
; X86-POPCNT-NEXT: movl %esi, (%eax) ; X86-POPCNT-NEXT: movl %edx, (%eax)
; X86-POPCNT-NEXT: popl %esi
; X86-POPCNT-NEXT: retl $4 ; X86-POPCNT-NEXT: retl $4
; ;
; X64-POPCNT-LABEL: cnt128_optsize: ; X64-POPCNT-LABEL: cnt128_optsize:
; X64-POPCNT: # %bb.0: ; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: popcntq %rsi, %rcx ; X64-POPCNT-NEXT: popcntq %rsi, %rcx
; X64-POPCNT-NEXT: popcntq %rdi, %rax ; X64-POPCNT-NEXT: popcntq %rdi, %rax
; X64-POPCNT-NEXT: addq %rcx, %rax ; X64-POPCNT-NEXT: addq %rcx, %rax
; X64-POPCNT-NEXT: xorl %edx, %edx ; X64-POPCNT-NEXT: xorl %edx, %edx
▲ Show 20 Lines • Show All 274 Lines • ▼ Show 20 Lines
; X86-NOSSE-LABEL: cnt128_pgso: ; X86-NOSSE-LABEL: cnt128_pgso:
; X86-NOSSE: # %bb.0: ; X86-NOSSE: # %bb.0:
; X86-NOSSE-NEXT: pushl %ebp ; X86-NOSSE-NEXT: pushl %ebp
; X86-NOSSE-NEXT: pushl %ebx ; X86-NOSSE-NEXT: pushl %ebx
; X86-NOSSE-NEXT: pushl %edi ; X86-NOSSE-NEXT: pushl %edi
; X86-NOSSE-NEXT: pushl %esi ; X86-NOSSE-NEXT: pushl %esi
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NOSSE-NEXT: movl %ebx, %ecx ; X86-NOSSE-NEXT: movl %ebx, %eax
; X86-NOSSE-NEXT: shrl %ecx ; X86-NOSSE-NEXT: shrl %eax
; X86-NOSSE-NEXT: movl $1431655765, %edi # imm = 0x55555555 ; X86-NOSSE-NEXT: movl $1431655765, %ecx # imm = 0x55555555
; X86-NOSSE-NEXT: andl %edi, %ecx ; X86-NOSSE-NEXT: andl %ecx, %eax
; X86-NOSSE-NEXT: movl $1431655765, %edi # imm = 0x55555555 ; X86-NOSSE-NEXT: subl %eax, %ebx
; X86-NOSSE-NEXT: subl %ecx, %ebx ; X86-NOSSE-NEXT: movl $858993459, %eax # imm = 0x33333333
; X86-NOSSE-NEXT: movl $858993459, %ecx # imm = 0x33333333 ; X86-NOSSE-NEXT: movl %ebx, %edi
; X86-NOSSE-NEXT: movl %ebx, %ebp ; X86-NOSSE-NEXT: andl %eax, %edi
; X86-NOSSE-NEXT: andl %ecx, %ebp
; X86-NOSSE-NEXT: shrl $2, %ebx ; X86-NOSSE-NEXT: shrl $2, %ebx
; X86-NOSSE-NEXT: andl %ecx, %ebx ; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: addl %ebp, %ebx ; X86-NOSSE-NEXT: addl %edi, %ebx
; X86-NOSSE-NEXT: movl %ebx, %ebp ; X86-NOSSE-NEXT: movl %ebx, %edi
; X86-NOSSE-NEXT: shrl $4, %ebp ; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %ebx, %ebp ; X86-NOSSE-NEXT: addl %ebx, %edi
; X86-NOSSE-NEXT: movl %eax, %ebx ; X86-NOSSE-NEXT: movl %esi, %ebx
; X86-NOSSE-NEXT: shrl %ebx ; X86-NOSSE-NEXT: shrl %ebx
; X86-NOSSE-NEXT: andl %edi, %ebx
; X86-NOSSE-NEXT: subl %ebx, %eax
; X86-NOSSE-NEXT: movl %eax, %ebx
; X86-NOSSE-NEXT: andl %ecx, %ebx ; X86-NOSSE-NEXT: andl %ecx, %ebx
; X86-NOSSE-NEXT: shrl $2, %eax ; X86-NOSSE-NEXT: subl %ebx, %esi
; X86-NOSSE-NEXT: andl %ecx, %eax ; X86-NOSSE-NEXT: movl %esi, %ebx
; X86-NOSSE-NEXT: addl %ebx, %eax ; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: movl %eax, %edi
; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %eax, %edi
; X86-NOSSE-NEXT: movl $252645135, %ebx # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: andl %ebx, %ebp
; X86-NOSSE-NEXT: imull $16843009, %ebp, %eax # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %eax
; X86-NOSSE-NEXT: andl %ebx, %edi
; X86-NOSSE-NEXT: imull $16843009, %edi, %edi # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %edi
; X86-NOSSE-NEXT: addl %eax, %edi
; X86-NOSSE-NEXT: movl %esi, %eax
; X86-NOSSE-NEXT: shrl %eax
; X86-NOSSE-NEXT: movl $1431655765, %ebp # imm = 0x55555555
; X86-NOSSE-NEXT: andl %ebp, %eax
; X86-NOSSE-NEXT: subl %eax, %esi
; X86-NOSSE-NEXT: movl %esi, %eax
; X86-NOSSE-NEXT: andl %ecx, %eax
; X86-NOSSE-NEXT: shrl $2, %esi ; X86-NOSSE-NEXT: shrl $2, %esi
; X86-NOSSE-NEXT: andl %ecx, %esi ; X86-NOSSE-NEXT: andl %eax, %esi
; X86-NOSSE-NEXT: addl %eax, %esi ; X86-NOSSE-NEXT: addl %ebx, %esi
; X86-NOSSE-NEXT: movl %esi, %ebp ; X86-NOSSE-NEXT: movl %esi, %ebx
; X86-NOSSE-NEXT: shrl $4, %ebp ; X86-NOSSE-NEXT: shrl $4, %ebx
; X86-NOSSE-NEXT: addl %esi, %ebp ; X86-NOSSE-NEXT: addl %esi, %ebx
; X86-NOSSE-NEXT: movl %edx, %eax ; X86-NOSSE-NEXT: movl $252645135, %esi # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: shrl %eax ; X86-NOSSE-NEXT: andl %esi, %edi
; X86-NOSSE-NEXT: movl $1431655765, %esi # imm = 0x55555555 ; X86-NOSSE-NEXT: imull $16843009, %edi, %ebp # imm = 0x1010101
; X86-NOSSE-NEXT: andl %esi, %eax ; X86-NOSSE-NEXT: shrl $24, %ebp
; X86-NOSSE-NEXT: subl %eax, %edx ; X86-NOSSE-NEXT: andl %esi, %ebx
; X86-NOSSE-NEXT: movl %edx, %eax ; X86-NOSSE-NEXT: imull $16843009, %ebx, %edi # imm = 0x1010101
; X86-NOSSE-NEXT: andl %ecx, %eax ; X86-NOSSE-NEXT: shrl $24, %edi
; X86-NOSSE-NEXT: addl %ebp, %edi
; X86-NOSSE-NEXT: movl %edx, %ebx
; X86-NOSSE-NEXT: shrl %ebx
; X86-NOSSE-NEXT: andl %ecx, %ebx
; X86-NOSSE-NEXT: subl %ebx, %edx
; X86-NOSSE-NEXT: movl %edx, %ebx
; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: shrl $2, %edx ; X86-NOSSE-NEXT: shrl $2, %edx
; X86-NOSSE-NEXT: andl %ecx, %edx ; X86-NOSSE-NEXT: andl %eax, %edx
; X86-NOSSE-NEXT: addl %eax, %edx ; X86-NOSSE-NEXT: addl %ebx, %edx
; X86-NOSSE-NEXT: movl %edx, %eax ; X86-NOSSE-NEXT: movl %edx, %ebp
; X86-NOSSE-NEXT: shrl $4, %eax ; X86-NOSSE-NEXT: shrl $4, %ebp
; X86-NOSSE-NEXT: addl %edx, %eax ; X86-NOSSE-NEXT: addl %edx, %ebp
; X86-NOSSE-NEXT: andl %ebx, %ebp ; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NOSSE-NEXT: andl %ebx, %eax ; X86-NOSSE-NEXT: andl %esi, %ebp
; X86-NOSSE-NEXT: imull $16843009, %ebp, %ecx # imm = 0x1010101 ; X86-NOSSE-NEXT: imull $16843009, %ebp, %edx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: imull $16843009, %eax, %edx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %edx ; X86-NOSSE-NEXT: shrl $24, %edx
; X86-NOSSE-NEXT: addl %ecx, %edx
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOSSE-NEXT: addl %edi, %edx ; X86-NOSSE-NEXT: addl %edi, %edx
; X86-NOSSE-NEXT: xorl %ecx, %ecx ; X86-NOSSE-NEXT: movl %ebx, %edi
; X86-NOSSE-NEXT: movl %ecx, 12(%eax) ; X86-NOSSE-NEXT: shrl %edi
; X86-NOSSE-NEXT: movl %ecx, 8(%eax) ; X86-NOSSE-NEXT: andl %ecx, %edi
; X86-NOSSE-NEXT: movl %ecx, 4(%eax) ; X86-NOSSE-NEXT: subl %edi, %ebx
; X86-NOSSE-NEXT: movl %edx, (%eax) ; X86-NOSSE-NEXT: movl %ebx, %ecx
; X86-NOSSE-NEXT: andl %eax, %ecx
; X86-NOSSE-NEXT: shrl $2, %ebx
; X86-NOSSE-NEXT: andl %eax, %ebx
; X86-NOSSE-NEXT: addl %ecx, %ebx
; X86-NOSSE-NEXT: movl %ebx, %ecx
; X86-NOSSE-NEXT: shrl $4, %ecx
; X86-NOSSE-NEXT: addl %ebx, %ecx
; X86-NOSSE-NEXT: andl %esi, %ecx
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOSSE-NEXT: imull $16843009, %ecx, %ecx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: addl %edx, %ecx
; X86-NOSSE-NEXT: xorl %edx, %edx
; X86-NOSSE-NEXT: movl %edx, 12(%eax)
; X86-NOSSE-NEXT: movl %edx, 8(%eax)
; X86-NOSSE-NEXT: movl %edx, 4(%eax)
; X86-NOSSE-NEXT: movl %ecx, (%eax)
; X86-NOSSE-NEXT: popl %esi ; X86-NOSSE-NEXT: popl %esi
; X86-NOSSE-NEXT: popl %edi ; X86-NOSSE-NEXT: popl %edi
; X86-NOSSE-NEXT: popl %ebx ; X86-NOSSE-NEXT: popl %ebx
; X86-NOSSE-NEXT: popl %ebp ; X86-NOSSE-NEXT: popl %ebp
; X86-NOSSE-NEXT: retl $4 ; X86-NOSSE-NEXT: retl $4
; ;
; X64-LABEL: cnt128_pgso: ; X64-LABEL: cnt128_pgso:
; X64: # %bb.0: ; X64: # %bb.0:
Show All 32 Lines
; X64-NEXT: imulq %r9, %rax ; X64-NEXT: imulq %r9, %rax
; X64-NEXT: shrq $56, %rax ; X64-NEXT: shrq $56, %rax
; X64-NEXT: addq %rdx, %rax ; X64-NEXT: addq %rdx, %rax
; X64-NEXT: xorl %edx, %edx ; X64-NEXT: xorl %edx, %edx
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X86-POPCNT-LABEL: cnt128_pgso: ; X86-POPCNT-LABEL: cnt128_pgso:
; X86-POPCNT: # %bb.0: ; X86-POPCNT: # %bb.0:
; X86-POPCNT-NEXT: pushl %esi
; X86-POPCNT-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-POPCNT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx
; X86-POPCNT-NEXT: addl %ecx, %edx ; X86-POPCNT-NEXT: addl %ecx, %edx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %esi ; X86-POPCNT-NEXT: addl %edx, %ecx
; X86-POPCNT-NEXT: addl %ecx, %esi ; X86-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %edx
; X86-POPCNT-NEXT: addl %edx, %esi ; X86-POPCNT-NEXT: addl %ecx, %edx
; X86-POPCNT-NEXT: xorl %ecx, %ecx ; X86-POPCNT-NEXT: xorl %ecx, %ecx
; X86-POPCNT-NEXT: movl %ecx, 12(%eax) ; X86-POPCNT-NEXT: movl %ecx, 12(%eax)
; X86-POPCNT-NEXT: movl %ecx, 8(%eax) ; X86-POPCNT-NEXT: movl %ecx, 8(%eax)
; X86-POPCNT-NEXT: movl %ecx, 4(%eax) ; X86-POPCNT-NEXT: movl %ecx, 4(%eax)
; X86-POPCNT-NEXT: movl %esi, (%eax) ; X86-POPCNT-NEXT: movl %edx, (%eax)
; X86-POPCNT-NEXT: popl %esi
; X86-POPCNT-NEXT: retl $4 ; X86-POPCNT-NEXT: retl $4
; ;
; X64-POPCNT-LABEL: cnt128_pgso: ; X64-POPCNT-LABEL: cnt128_pgso:
; X64-POPCNT: # %bb.0: ; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: popcntq %rsi, %rcx ; X64-POPCNT-NEXT: popcntq %rsi, %rcx
; X64-POPCNT-NEXT: popcntq %rdi, %rax ; X64-POPCNT-NEXT: popcntq %rdi, %rax
; X64-POPCNT-NEXT: addq %rcx, %rax ; X64-POPCNT-NEXT: addq %rcx, %rax
; X64-POPCNT-NEXT: xorl %edx, %edx ; X64-POPCNT-NEXT: xorl %edx, %edx
▲ Show 20 Lines • Show All 225 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/pr34080-2.ll

Show All 25 Lines
; CHECK-NEXT: movl %edx, %eax ; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: shrl $31, %eax ; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: sarl $5, %ecx ; CHECK-NEXT: sarl $5, %ecx
; CHECK-NEXT: addl %eax, %ecx ; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: movl $1374389535, %edx # imm = 0x51EB851F ; CHECK-NEXT: movl $1374389535, %edx # imm = 0x51EB851F
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: imull %edx ; CHECK-NEXT: imull %edx
; CHECK-NEXT: movl %edx, %edi ; CHECK-NEXT: movl %edx, %edi
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: sarl $7, %edi
; CHECK-NEXT: addl %eax, %edi
; CHECK-NEXT: imull $36525, %esi, %eax # imm = 0x8EAD ; CHECK-NEXT: imull $36525, %esi, %eax # imm = 0x8EAD
; CHECK-NEXT: addl $172251900, %eax # imm = 0xA445AFC ; CHECK-NEXT: addl $172251900, %eax # imm = 0xA445AFC
; CHECK-NEXT: movl $1374389535, %edx # imm = 0x51EB851F ; CHECK-NEXT: movl $1374389535, %edx # imm = 0x51EB851F
; CHECK-NEXT: imull %edx ; CHECK-NEXT: imull %edx
; CHECK-NEXT: movl %edx, %eax ; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: shrl $31, %eax ; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: sarl $5, %edx ; CHECK-NEXT: sarl $5, %edx
; CHECK-NEXT: addl %eax, %edx ; CHECK-NEXT: addl %eax, %edx
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: shrl $31, %eax
; CHECK-NEXT: addl 16(%ebx), %ecx ; CHECK-NEXT: addl 16(%ebx), %ecx
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: sarl $7, %edi
; CHECK-NEXT: addl %edi, %ecx ; CHECK-NEXT: addl %edi, %ecx
; CHECK-NEXT: leal 257(%ecx,%edx), %eax ; CHECK-NEXT: leal 257(%ecx,%edx), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) ; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fildl {{[0-9]+}}(%esp) ; CHECK-NEXT: fildl {{[0-9]+}}(%esp)
; CHECK-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}} ; CHECK-NEXT: fadds {{\.?LCPI[0-9]+_[0-9]+}}
; CHECK-NEXT: fmuls {{\.?LCPI[0-9]+_[0-9]+}} ; CHECK-NEXT: fmuls {{\.?LCPI[0-9]+_[0-9]+}}
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
▲ Show 20 Lines • Show All 81 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/pr36865.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s ; RUN: llc -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
define void @main() { define void @main() {
; CHECK-LABEL: main: ; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $424, %rsp # imm = 0x1A8 ; CHECK-NEXT: subq $424, %rsp # imm = 0x1A8
; CHECK-NEXT: .cfi_def_cfa_offset 432 ; CHECK-NEXT: .cfi_def_cfa_offset 432
; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rdi ; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rdi
; CHECK-NEXT: movl $400, %edx # imm = 0x190 ; CHECK-NEXT: movl $400, %edx # imm = 0x190
; CHECK-NEXT: xorl %esi, %esi ; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: callq memset@PLT ; CHECK-NEXT: callq memset@PLT
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl (%rax), %ecx ; CHECK-NEXT: movl (%rax), %ecx
; CHECK-NEXT: addl 0, %eax ; CHECK-NEXT: addl 0, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %ecx
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %ecx
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%rsp)
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, %ecx ; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: imull %eax, %ecx ; CHECK-NEXT: imull %eax, %ecx
; CHECK-NEXT: subl %ecx, %eax ; CHECK-NEXT: subl %ecx, %eax
; CHECK-NEXT: movl %eax, (%rax) ; CHECK-NEXT: movl %eax, (%rax)
entry: entry:
%k = alloca i32, align 4 %k = alloca i32, align 4
%m = alloca i32, align 4 %m = alloca i32, align 4
Show All 35 Lines

llvm/test/CodeGen/X86/reassociate-add.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 < %s | FileCheck %s ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 < %s | FileCheck %s
RKSimonUnsubmitted
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Drop -mcpu=x86-64

Pre-commit these test with current codegen to trunk and rebase to show the patch diffs.

RKSimon: Drop -mcpu=x86-64 Pre-commit these test with current codegen to trunk and rebase to show the…
CarrotAuthorUnsubmitted
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Test case has been sent out as https://reviews.llvm.org/D136501.

-mcpu=x86-64 is required because in MachineCombiner the reassociation is performed either the new sequence reduce latency, or function doSubstitute returns true. In its implementation, if -mcpu is not specified, the target will not have a valid schedule model, and then doSubstitute returns true, and reassociation is performed.

bool MachineCombiner::doSubstitute(unsigned NewSize, unsigned OldSize,
                                   bool OptForSize) {
  if (OptForSize && (NewSize < OldSize))
    return true;
  if (!TSchedModel.hasInstrSchedModelOrItineraries())
    return true;
  return false;
}
Carrot: Test case has been sent out as https://reviews.llvm.org/D136501. -mcpu=x86-64 is required…
RKSimonUnsubmitted
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OK - that makes sense!

RKSimon: OK - that makes sense!
; This file checks the reassociation of ADD instruction. ; This file checks the reassociation of ADD instruction.
pengfeiUnsubmitted
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No idea if we intended to not do reassociation in ADD instructions.
Is there problem when unexpected overflow/underflow may be generated during reassociation?

pengfei: No idea if we intended to not do reassociation in ADD instructions. Is there problem when…
RKSimonUnsubmitted
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Not that I can think of - EFLAGS will be the same and we already handles the $dst=$src0 constraint

RKSimon: Not that I can think of - EFLAGS will be the same and we already handles the $dst=$src0…
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EFLAGS may be different. Suppose we are adding three bytes, 250 + 10 + 10.

  • If we add them in the order (250 + 10) + 10, the first ADD generates carry/overflow flags, the second ADD doesn't generate carry/overflow.
  • If we add them in the order (10 + 10) + 250, the first ADD doesn't generates carry/overflow flags, the second ADD generates these flags.

So we need to check if the definition of EFLAGS is dead.

Maybe this is the reason @spatel didn't add ADD instructions in 2015.

Thank @pengfei for the reminds.

Carrot: EFLAGS may be different. Suppose we are adding three bytes, 250 + 10 + 10. - If we add them…
craig.topperUnsubmitted
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Scalar MUL would have the same EFLAGs issue. So hopefully we already solved it?

craig.topper: Scalar MUL would have the same EFLAGs issue. So hopefully we already solved it?
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Indeed. So IMULrr should be handled similar to ADD. But I can't find any code for it :(

Carrot: Indeed. So IMULrr should be handled similar to ADD. But I can't find any code for it :(
spatelUnsubmitted
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I was working on this a long time ago (~2015), so it's hard to remember exactly, but I don't think there was a fundamental reason to exclude integer ADD.

It just seemed like it did not have much potential gain with the limited register set and could interfere with other transforms like LEA formation.

If there's evidence that this improves something (and doesn't cause regressions), then it should be ok.

spatel: I was working on this a long time ago (~2015), so it's hard to remember exactly, but I don't…
RKSimonUnsubmitted
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Sorry, bad description - EFLAGS will be handled (we check they are ignored...) the same as the existing ops

RKSimon: Sorry, bad description - EFLAGS will be handled (we check they are ignored...) the same as the…
; The two ADD instructions add v0,v1,t2 together. t2 has a long dependence ; The two ADD instructions add v0,v1,t2 together. t2 has a long dependence
; chain, v0 and v1 has a short dependence chain, in order to get the shortest ; chain, v0 and v1 has a short dependence chain, in order to get the shortest
; latency, v0 and v1 should be added first, and its result is added to t2 ; latency, v0 and v1 should be added first, and its result is added to t2
; later. ; later.
define void @add8(i8 %x0, i8 %x1, i8 %x2, i8* %p) { define void @add8(i8 %x0, i8 %x1, i8 %x2, i8* %p) {
; CHECK-LABEL: add8: ; CHECK-LABEL: add8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orb $16, %dil ; CHECK-NEXT: orb $16, %dil
; CHECK-NEXT: orb $32, %sil ; CHECK-NEXT: orb $32, %sil
; CHECK-NEXT: addb %dil, %sil
; CHECK-NEXT: addb $-8, %dl ; CHECK-NEXT: addb $-8, %dl
; CHECK-NEXT: orb $7, %dl ; CHECK-NEXT: orb $7, %dl
; CHECK-NEXT: movzbl %dl, %eax ; CHECK-NEXT: movzbl %dl, %eax
; CHECK-NEXT: imull $100, %eax, %eax ; CHECK-NEXT: imull $100, %eax, %eax
; CHECK-NEXT: addb %sil, %al ; CHECK-NEXT: addb %sil, %al
; CHECK-NEXT: addb %dil, %al
; CHECK-NEXT: movb %al, (%rcx) ; CHECK-NEXT: movb %al, (%rcx)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%v0 = or i8 %x0, 16 %v0 = or i8 %x0, 16
%v1 = or i8 %x1, 32 %v1 = or i8 %x1, 32
%t0 = sub i8 %x2, 8 %t0 = sub i8 %x2, 8
%t1 = or i8 %t0, 7 %t1 = or i8 %t0, 7
%t2 = mul i8 %t1, 100 %t2 = mul i8 %t1, 100
%t3 = add i8 %t2, %v1 %t3 = add i8 %t2, %v1
%t4 = add i8 %t3, %v0 %t4 = add i8 %t3, %v0
store i8 %t4, i8* %p, align 4 store i8 %t4, i8* %p, align 4
ret void ret void
} }
define void @add16(i16 %x0, i16 %x1, i16 %x2, i16* %p) { define void @add16(i16 %x0, i16 %x1, i16 %x2, i16* %p) {
; CHECK-LABEL: add16: ; CHECK-LABEL: add16:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orl $16, %edi ; CHECK-NEXT: orl $16, %edi
; CHECK-NEXT: orl $32, %esi ; CHECK-NEXT: orl $32, %esi
; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: addl $-8, %edx ; CHECK-NEXT: addl $-8, %edx
; CHECK-NEXT: orl $7, %edx ; CHECK-NEXT: orl $7, %edx
; CHECK-NEXT: imull $100, %edx, %eax ; CHECK-NEXT: imull $100, %edx, %eax
; CHECK-NEXT: addl %esi, %eax ; CHECK-NEXT: addl %esi, %eax
; CHECK-NEXT: addl %edi, %eax
; CHECK-NEXT: movw %ax, (%rcx) ; CHECK-NEXT: movw %ax, (%rcx)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%v0 = or i16 %x0, 16 %v0 = or i16 %x0, 16
%v1 = or i16 %x1, 32 %v1 = or i16 %x1, 32
%t0 = sub i16 %x2, 8 %t0 = sub i16 %x2, 8
%t1 = or i16 %t0, 7 %t1 = or i16 %t0, 7
%t2 = mul i16 %t1, 100 %t2 = mul i16 %t1, 100
%t3 = add i16 %t2, %v1 %t3 = add i16 %t2, %v1
%t4 = add i16 %t3, %v0 %t4 = add i16 %t3, %v0
store i16 %t4, i16* %p, align 4 store i16 %t4, i16* %p, align 4
ret void ret void
} }
define void @add32(i32 %x0, i32 %x1, i32 %x2, i32* %p) { define void @add32(i32 %x0, i32 %x1, i32 %x2, i32* %p) {
; CHECK-LABEL: add32: ; CHECK-LABEL: add32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orl $16, %edi ; CHECK-NEXT: orl $16, %edi
; CHECK-NEXT: orl $32, %esi ; CHECK-NEXT: orl $32, %esi
; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: addl $-8, %edx ; CHECK-NEXT: addl $-8, %edx
; CHECK-NEXT: orl $7, %edx ; CHECK-NEXT: orl $7, %edx
; CHECK-NEXT: imull $100, %edx, %eax ; CHECK-NEXT: imull $100, %edx, %eax
; CHECK-NEXT: addl %esi, %eax ; CHECK-NEXT: addl %esi, %eax
; CHECK-NEXT: addl %edi, %eax
; CHECK-NEXT: movl %eax, (%rcx) ; CHECK-NEXT: movl %eax, (%rcx)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%v0 = or i32 %x0, 16 %v0 = or i32 %x0, 16
%v1 = or i32 %x1, 32 %v1 = or i32 %x1, 32
%t0 = sub i32 %x2, 8 %t0 = sub i32 %x2, 8
%t1 = or i32 %t0, 7 %t1 = or i32 %t0, 7
%t2 = mul i32 %t1, 100 %t2 = mul i32 %t1, 100
%t3 = add i32 %t2, %v1 %t3 = add i32 %t2, %v1
%t4 = add i32 %t3, %v0 %t4 = add i32 %t3, %v0
store i32 %t4, i32* %p, align 4 store i32 %t4, i32* %p, align 4
ret void ret void
} }
define void @add64(i64 %x0, i64 %x1, i64 %x2, i64* %p) { define void @add64(i64 %x0, i64 %x1, i64 %x2, i64* %p) {
; CHECK-LABEL: add64: ; CHECK-LABEL: add64:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orq $16, %rdi ; CHECK-NEXT: orq $16, %rdi
; CHECK-NEXT: orq $32, %rsi ; CHECK-NEXT: orq $32, %rsi
; CHECK-NEXT: addq %rdi, %rsi
; CHECK-NEXT: addq $-8, %rdx ; CHECK-NEXT: addq $-8, %rdx
; CHECK-NEXT: orq $7, %rdx ; CHECK-NEXT: orq $7, %rdx
; CHECK-NEXT: imulq $100, %rdx, %rax ; CHECK-NEXT: imulq $100, %rdx, %rax
; CHECK-NEXT: addq %rsi, %rax ; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: movq %rax, (%rcx) ; CHECK-NEXT: movq %rax, (%rcx)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%v0 = or i64 %x0, 16 %v0 = or i64 %x0, 16
%v1 = or i64 %x1, 32 %v1 = or i64 %x1, 32
%t0 = sub i64 %x2, 8 %t0 = sub i64 %x2, 8
%t1 = or i64 %t0, 7 %t1 = or i64 %t0, 7
%t2 = mul i64 %t1, 100 %t2 = mul i64 %t1, 100
%t3 = add i64 %t2, %v1 %t3 = add i64 %t2, %v1
Show All 28 Lines

llvm/test/CodeGen/X86/smul-with-overflow.ll

Show First 20 Lines • Show All 206 Lines • ▼ Show 20 Lines
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: addl %eax, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %edx, %esi ; X86-NEXT: adcl %edx, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: addl %eax, %esi ; X86-NEXT: addl %eax, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %esi, %edi ; X86-NEXT: addl %esi, %edi
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %eax, %ecx ; X86-NEXT: adcl %eax, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebp ; X86-NEXT: mull %ebp
; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %edx, %edi ; X86-NEXT: addl %edx, %edi
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %eax, %edi ; X86-NEXT: addl %eax, %edi
; X86-NEXT: adcl %edx, %ebx ; X86-NEXT: adcl %edx, %ebx
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: addl %eax, %ebx ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, %ecx
; X86-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl %ebx, %edx ; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: setb %al ; X86-NEXT: setb %al
; X86-NEXT: addl %ebp, %edx ; X86-NEXT: addl %ecx, %ebp
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %edi, %esi ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl %al, %eax ; X86-NEXT: movzbl %al, %eax
; X86-NEXT: adcl %ebx, %eax ; X86-NEXT: adcl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %esi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %edi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %esi, %ebp ; X86-NEXT: adcl %ebx, %ebp
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ebp, %esi ; X86-NEXT: addl %ebp, %ebx
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: adcl (%esp), %edx # 4-byte Folded Reload ; X86-NEXT: adcl (%esp), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, (%esp) # 4-byte Spill ; X86-NEXT: movl %edx, (%esp) # 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %ebx ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %ebx ; X86-NEXT: addl %edi, %esi
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %esi
; X86-NEXT: adcl %ebp, %ecx ; X86-NEXT: adcl %ebp, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %ebp
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebp ; X86-NEXT: adcl %eax, %edi
; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl (%esp), %ebx # 4-byte Folded Reload ; X86-NEXT: adcl (%esp), %esi # 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %edi
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: adcl $0, %edi
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: setb (%esp) # 1-byte Folded Spill ; X86-NEXT: setb (%esp) # 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %esi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: addl %edi, %ecx ; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: adcl %ebp, %esi ; X86-NEXT: adcl %edi, %edx
; X86-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl (%esp), %eax # 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebx
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %esi
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %edi, %eax
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %ebx, %ecx ; X86-NEXT: adcl %edi, %ebx
; X86-NEXT: setb %al ; X86-NEXT: setb %al
; X86-NEXT: addl %edi, %ecx ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: movzbl %al, %eax ; X86-NEXT: movzbl %al, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %edi, %esi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: addl %ebp, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %edi, %ebx ; X86-NEXT: addl %esi, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: adcl $0, %edx
; X86-NEXT: addl %eax, %ebx ; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: adcl %edx, %esi ; X86-NEXT: setb %cl
; X86-NEXT: addl %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl %cl, %esi
; X86-NEXT: adcl %edi, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-NEXT: addl %ebx, %edi ; X86-NEXT: addl %edx, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl %esi, %eax ; X86-NEXT: adcl %esi, %eax
; X86-NEXT: movl %ecx, %ebx ; X86-NEXT: movl %ebx, %esi
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl (%esp), %edx # 4-byte Reload ; X86-NEXT: movl (%esp), %edx # 4-byte Reload
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: addl %ebp, %edi ; X86-NEXT: addl %ebp, %edi
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: adcl %esi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: addl %ebx, %edi ; X86-NEXT: addl %esi, %ecx
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %eax, %edx ; X86-NEXT: setb %dl
; X86-NEXT: setb %al ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %edi, %ebx ; X86-NEXT: movzbl %dl, %esi
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: movzbl %al, %edi ; X86-NEXT: movl (%esp), %ebx # 4-byte Reload
; X86-NEXT: adcl %ecx, %edi
; X86-NEXT: movl (%esp), %eax # 4-byte Reload
; X86-NEXT: adcl $0, %eax
; X86-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: adcl $0, %edx ; X86-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, %edi ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: adcl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %eax
; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ebx, %edx
; X86-NEXT: adcl $0, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, (%esp) # 4-byte Spill
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload ; X86-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-NEXT: movl %eax, %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: addl %edx, %ebp
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %edx, %edi ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: adcl $0, %edi ; X86-NEXT: addl %eax, %ebp
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ecx, %ebx ; X86-NEXT: adcl %edx, %ebx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %edx, %edi
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: addl %eax, %edi ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: movzbl %cl, %ecx ; X86-NEXT: movzbl %cl, %ecx
; X86-NEXT: adcl %edx, %ecx ; X86-NEXT: adcl %edx, %ecx
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %edi, %edx ; X86-NEXT: addl %ebx, %edx
; X86-NEXT: adcl %ecx, %ebp
; X86-NEXT: movl %ebx, %esi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edi, %esi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ecx, %edi ; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: addl %ebp, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-NEXT: adcl %ebx, %ebp ; X86-NEXT: adcl %edi, %ebp
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: addl %esi, %edx ; X86-NEXT: addl %esi, %edx
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: setb %bl
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: adcl %esi, %edx ; X86-NEXT: adcl %edi, %edx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %ebx, %eax ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl (%esp), %ebp # 4-byte Folded Reload ; X86-NEXT: adcl (%esp), %ebp # 4-byte Folded Reload
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: adcl %eax, %edi ; X86-NEXT: adcl %eax, %esi
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, %ecx ; X86-NEXT: movl %esi, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, (%esp) # 4-byte Folded Spill ; X86-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %eax, %ecx ; X86-NEXT: imull %eax, %ecx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: imull %eax, %ebx
; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %eax, %ecx ; X86-NEXT: imull %eax, %ecx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %eax, %edx ; X86-NEXT: imull %eax, %edx
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl %ebx, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: imull %ebx ; X86-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; X86-NEXT: addl %eax, %eax ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl %edx, %edx ; X86-NEXT: adcl %edx, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: adcl %ebx, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-NEXT: adcl %ebx, %edx ; X86-NEXT: adcl %edx, %ebx
; X86-NEXT: addl %edi, %esi ; X86-NEXT: addl %edi, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %ebp, %eax ; X86-NEXT: adcl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl (%esp), %edx # 4-byte Folded Reload ; X86-NEXT: adcl (%esp), %ebx # 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, %edi ; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl %eax, %edi ; X86-NEXT: addl %eax, %edi
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: addl %edx, %edi ; X86-NEXT: addl %edx, %edi
; X86-NEXT: movl %edi, %ebx ; X86-NEXT: movl %edi, %ebx
Show All 37 Lines
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: adcl %ecx, %edi ; X86-NEXT: adcl %ecx, %edi
; X86-NEXT: movzbl %al, %eax ; X86-NEXT: movzbl %al, %eax
; X86-NEXT: adcl %ebp, %eax ; X86-NEXT: adcl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: imull %edx, %ecx ; X86-NEXT: imull %edx, %ebp
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl %ecx, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %edx, %ecx ; X86-NEXT: imull %edx, %ecx
; X86-NEXT: addl %ebp, %ecx ; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: imull %edx, %ebp ; X86-NEXT: imull %edx, %ebp
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload
; X86-NEXT: imull {{[0-9]+}}(%esp), %edx ; X86-NEXT: imull {{[0-9]+}}(%esp), %edx
; X86-NEXT: addl %ebp, %edx ; X86-NEXT: addl %ebp, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl %eax, %ebx ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: addl %eax, %ecx
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; X64-LABEL: smul_ovf: ; X64-LABEL: smul_ovf:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: pushq %rbp ; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %r15 ; X64-NEXT: pushq %r15
; X64-NEXT: pushq %r14 ; X64-NEXT: pushq %r14
; X64-NEXT: pushq %r13 ; X64-NEXT: pushq %r13
; X64-NEXT: pushq %r12 ; X64-NEXT: pushq %r12
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %rbx
; X64-NEXT: movq %r9, %r10 ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r8, %rbp ; X64-NEXT: movq %r8, %r12
; X64-NEXT: movq %rcx, %r12 ; X64-NEXT: movq %rcx, %r15
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rsi, %rbx ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rsi, %r8
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rsi
; X64-NEXT: andl $1, %ecx ; X64-NEXT: andl $1, %esi
; X64-NEXT: negq %rcx ; X64-NEXT: negq %rsi
; X64-NEXT: andl $1, %r12d ; X64-NEXT: andl $1, %r15d
; X64-NEXT: negq %r12 ; X64-NEXT: negq %r15
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rax, %rbx
; X64-NEXT: movq %rax, %rbp
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: addq %rdx, %r15 ; X64-NEXT: addq %rdx, %rbx
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %r10 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %r10, %r14
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: addq %rax, %r15 ; X64-NEXT: addq %rax, %rbx
; X64-NEXT: adcq %rdx, %r9 ; X64-NEXT: adcq %rdx, %rcx
; X64-NEXT: setb %dil ; X64-NEXT: setb %dil
; X64-NEXT: movzbl %dil, %r10d ; X64-NEXT: movzbl %dil, %r13d
; X64-NEXT: addq %rax, %r9 ; X64-NEXT: addq %rax, %rcx
; X64-NEXT: adcq %rdx, %r10 ; X64-NEXT: adcq %rdx, %r13
; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r8, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r14, %rax
; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %rsi, %r11 ; X64-NEXT: addq %rdi, %r11
; X64-NEXT: adcq $0, %rdi ; X64-NEXT: adcq $0, %r10
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: movq %rbx, %r13 ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: mulq %r9
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: mulq %r14
; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: addq %r11, %rax ; X64-NEXT: addq %r11, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %rdi, %rbx ; X64-NEXT: adcq %r10, %rdi
; X64-NEXT: setb %dil ; X64-NEXT: setb %r11b
; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r14, %rax
; X64-NEXT: movq %r8, %rax ; X64-NEXT: mulq %r9
; X64-NEXT: mulq %r14 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: addq %rdi, %rax
; X64-NEXT: addq %rbx, %rax ; X64-NEXT: movzbl %r11b, %edx
; X64-NEXT: movzbl %dil, %edx ; X64-NEXT: adcq %rdx, %r10
; X64-NEXT: adcq %rdx, %rsi ; X64-NEXT: addq %rbp, %rax
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Folded Reload
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: adcq %r15, %rsi ; X64-NEXT: adcq %rbx, %r10
; X64-NEXT: adcq $0, %r9 ; X64-NEXT: adcq $0, %rcx
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r13
; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %r13
; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r14
; X64-NEXT: movq %rax, %rbp
; X64-NEXT: movq %rax, %r9
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r11, %rax
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: addq %r11, %rbx ; X64-NEXT: addq %r11, %rbp
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq $0, %r15 ; X64-NEXT: adcq $0, %r11
; X64-NEXT: addq %r13, %rbx ; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %r11, %r15 ; X64-NEXT: addq %r8, %rbp
; X64-NEXT: adcq %rax, %r11
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: addq %r8, %r15 ; X64-NEXT: addq %r9, %r11
; X64-NEXT: movzbl %al, %r8d ; X64-NEXT: movzbl %al, %r14d
; X64-NEXT: adcq %rdx, %r8 ; X64-NEXT: adcq %rdx, %r14
; X64-NEXT: addq %r13, %rdi ; X64-NEXT: addq %r8, %rdi
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: adcq %rsi, %rbx ; X64-NEXT: adcq %r10, %rbp
; X64-NEXT: adcq $0, %r15 ; X64-NEXT: adcq $0, %r11
; X64-NEXT: adcq $0, %r8 ; X64-NEXT: adcq $0, %r14
; X64-NEXT: addq %r9, %r15 ; X64-NEXT: addq %rcx, %r11
; X64-NEXT: adcq %r10, %r8 ; X64-NEXT: adcq %r13, %r14
; X64-NEXT: setb %r10b ; X64-NEXT: setb %dil
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %rdx, %r11 ; X64-NEXT: addq %rdx, %rbx
; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: adcq $0, %rdi
; X64-NEXT: addq %rax, %r11
; X64-NEXT: adcq %rdx, %rdi
; X64-NEXT: setb %r9b
; X64-NEXT: addq %rax, %rdi
; X64-NEXT: movzbl %r9b, %esi
; X64-NEXT: adcq %rdx, %rsi
; X64-NEXT: addq %rax, %r15
; X64-NEXT: adcq %r8, %r11
; X64-NEXT: movzbl %r10b, %eax
; X64-NEXT: adcq %rax, %rdi
; X64-NEXT: adcq $0, %rsi
; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
; X64-NEXT: movq %rsi, %r8
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload
; X64-NEXT: addq %r14, %r8
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r10
; X64-NEXT: addq %rax, %rbx
; X64-NEXT: adcq %rdx, %r10
; X64-NEXT: setb %cl
; X64-NEXT: addq %rax, %r10
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: adcq %rdx, %rcx
; X64-NEXT: addq %rax, %r11
; X64-NEXT: adcq %r14, %rbx
; X64-NEXT: movzbl %dil, %eax
; X64-NEXT: adcq %rax, %r10
; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: movq %rdi, %r14
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: addq %rax, %r14
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload
; X64-NEXT: movq %r8, %rcx
; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: addq %r9, %r8 ; X64-NEXT: addq %r9, %r14
; X64-NEXT: adcq %r14, %r10 ; X64-NEXT: adcq %rax, %rcx
; X64-NEXT: movq %rax, %rdx
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: addq %rsi, %r10 ; X64-NEXT: addq %rdi, %rcx
; X64-NEXT: movzbl %al, %esi ; X64-NEXT: movzbl %al, %edi
; X64-NEXT: adcq %rdx, %rsi ; X64-NEXT: adcq %r8, %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: imulq %r12, %rax ; X64-NEXT: imulq %r15, %rax
; X64-NEXT: addq %r14, %rax ; X64-NEXT: imulq %r15, %r12
; X64-NEXT: imulq %r12, %rbp
; X64-NEXT: addq %rax, %rbp
; X64-NEXT: movq %r12, %rax
; X64-NEXT: imulq %rcx
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r9, %r12
; X64-NEXT: addq %rax, %r12 ; X64-NEXT: addq %rax, %r12
; X64-NEXT: adcq %rdx, %rbp ; X64-NEXT: addq %rdx, %r12
; X64-NEXT: addq %r10, %r12 ; X64-NEXT: movq %r15, %rax
; X64-NEXT: adcq %rsi, %rbp ; X64-NEXT: imulq %rsi
; X64-NEXT: movq %r13, %r14 ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; X64-NEXT: movq %r9, %r8
; X64-NEXT: addq %rsi, %r14 ; X64-NEXT: addq %rax, %r8
; X64-NEXT: adcq $0, %rsi ; X64-NEXT: adcq %rdx, %r12
; X64-NEXT: addq %rcx, %r8
; X64-NEXT: adcq %rdi, %r12
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
; X64-NEXT: movq %r13, %r15
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: addq %rcx, %r15
; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload
; X64-NEXT: addq %rdi, %r15
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; X64-NEXT: addq %rdx, %r14 ; X64-NEXT: adcq %rdx, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload ; X64-NEXT: setb %r9b
; X64-NEXT: adcq %r9, %rsi ; X64-NEXT: addq %rdi, %rcx
; X64-NEXT: setb %r10b ; X64-NEXT: movzbl %r9b, %edi
; X64-NEXT: adcq %rdx, %rdi
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; X64-NEXT: imulq %rsi, %rdx
; X64-NEXT: imulq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: addq %rdx, %rsi ; X64-NEXT: addq %rdx, %rsi
; X64-NEXT: movzbl %r10b, %r10d ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: adcq %r9, %r10
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
; X64-NEXT: imulq %rcx, %r9
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload
; X64-NEXT: imulq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload
; X64-NEXT: addq %r9, %rcx
; X64-NEXT: addq %r13, %rax ; X64-NEXT: addq %r13, %rax
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: addq %rsi, %rax ; X64-NEXT: addq %rcx, %rax
; X64-NEXT: adcq %r10, %rcx ; X64-NEXT: adcq %rdi, %rsi
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Folded Reload
; X64-NEXT: adcq %r8, %r14 ; X64-NEXT: adcq %r14, %r15
; X64-NEXT: adcq %r12, %rax ; X64-NEXT: adcq %r8, %rax
; X64-NEXT: adcq %rbp, %rcx ; X64-NEXT: adcq %r12, %rsi
; X64-NEXT: addq %r15, %r13 ; X64-NEXT: addq %r11, %r13
; X64-NEXT: adcq %r11, %r14 ; X64-NEXT: adcq %rbx, %r15
; X64-NEXT: adcq %rdi, %rax ; X64-NEXT: adcq %r10, %rax
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
; X64-NEXT: movq %rbx, %rdx ; X64-NEXT: movq %rbp, %rcx
; X64-NEXT: sarq $63, %rdx ; X64-NEXT: sarq $63, %rcx
; X64-NEXT: xorq %rdx, %rcx ; X64-NEXT: xorq %rcx, %rsi
; X64-NEXT: xorq %rdx, %r14 ; X64-NEXT: xorq %rcx, %r15
; X64-NEXT: orq %rcx, %r14 ; X64-NEXT: orq %rsi, %r15
; X64-NEXT: xorq %rdx, %rax ; X64-NEXT: xorq %rcx, %rax
; X64-NEXT: orq %r14, %rax ; X64-NEXT: orq %r15, %rax
; X64-NEXT: xorq %r13, %rdx ; X64-NEXT: xorq %r13, %rcx
; X64-NEXT: orq %rax, %rdx ; X64-NEXT: orq %rax, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: movl %eax, %esi ; X64-NEXT: movl %eax, %esi
; X64-NEXT: andl $1, %esi ; X64-NEXT: andl $1, %esi
; X64-NEXT: movq %rsi, %rcx ; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: negq %rcx ; X64-NEXT: negq %rdx
; X64-NEXT: xorq %rcx, %rbx ; X64-NEXT: xorq %rdx, %rbp
; X64-NEXT: xorq %rax, %rcx ; X64-NEXT: xorq %rax, %rdx
; X64-NEXT: orq %rbx, %rcx ; X64-NEXT: orq %rbp, %rdx
; X64-NEXT: orq %rdx, %rcx ; X64-NEXT: orq %rcx, %rdx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq %rcx, 8(%rax) ; X64-NEXT: movq %rcx, 8(%rax)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq %rcx, (%rax) ; X64-NEXT: movq %rcx, (%rax)
; X64-NEXT: movb %sil, 16(%rax) ; X64-NEXT: movb %sil, 16(%rax)
; X64-NEXT: setne 24(%rax) ; X64-NEXT: setne 24(%rax)
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
Show All 9 Lines

llvm/test/CodeGen/X86/smul_fix.ll

Show First 20 Lines • Show All 225 Lines • ▼ Show 20 Lines
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8 ; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi ; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %esi, %edx ; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i64 @llvm.smul.fix.i64(i64 %x, i64 %y, i32 0) %tmp = call i64 @llvm.smul.fix.i64(i64 %x, i64 %y, i32 0)
ret i64 %tmp ret i64 %tmp
} }
▲ Show 20 Lines • Show All 171 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/smul_fix_sat.ll

Show First 20 Lines • Show All 363 Lines • ▼ Show 20 Lines
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: .cfi_def_cfa_offset 12 ; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: .cfi_def_cfa_offset 16 ; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 20 ; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $12, %esp
; X86-NEXT: .cfi_def_cfa_offset 28 ; X86-NEXT: .cfi_def_cfa_offset 32
; X86-NEXT: .cfi_offset %esi, -20 ; X86-NEXT: .cfi_offset %esi, -20
; X86-NEXT: .cfi_offset %edi, -16 ; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .cfi_offset %ebx, -12 ; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: .cfi_offset %ebp, -8 ; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %ebx ; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: sarl $31, %ebx ; X86-NEXT: sarl $31, %ebx
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: imull %ebx, %edi ; X86-NEXT: imull %ebx, %edi
; X86-NEXT: mull %ebx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %edx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: imull %ebp, %ebx ; X86-NEXT: imull %ebp, %ebx
; X86-NEXT: addl %edi, %ebx
; X86-NEXT: addl %edx, %ebx ; X86-NEXT: addl %edx, %ebx
; X86-NEXT: movl %ebp, %edi
; X86-NEXT: sarl $31, %edi ; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl %edi, %ebp ; X86-NEXT: movl %edi, %edx
; X86-NEXT: imull %ecx, %ebp ; X86-NEXT: imull %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull %esi ; X86-NEXT: imull %ebp, %edi
; X86-NEXT: addl %ebp, %edx ; X86-NEXT: addl %edx, %edi
; X86-NEXT: imull %esi, %edi ; X86-NEXT: mull %ebp
; X86-NEXT: addl %edx, %edi ; X86-NEXT: addl %edx, %edi
; X86-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %ebx, %edi ; X86-NEXT: adcl %ebx, %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: addl %eax, %ebp ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: mull %edx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %eax, %ebp ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl %ebx, %esi ; X86-NEXT: adcl %ebp, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: mull %ebp
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movzbl %bl, %esi ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X86-NEXT: adcl %esi, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: adcl %edi, %edx ; X86-NEXT: adcl %edi, %edx
; X86-NEXT: movl %ebp, %edi ; X86-NEXT: movl %ebx, %edi
; X86-NEXT: sarl $31, %edi ; X86-NEXT: sarl $31, %edi
; X86-NEXT: xorl %edi, %edx ; X86-NEXT: xorl %edi, %edx
; X86-NEXT: xorl %eax, %edi ; X86-NEXT: xorl %eax, %edi
; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: xorl %ebp, %ecx
; X86-NEXT: sarl $31, %ecx ; X86-NEXT: sarl $31, %ecx
; X86-NEXT: movl %ecx, %esi ; X86-NEXT: movl %ecx, %esi
; X86-NEXT: xorl $2147483647, %esi # imm = 0x7FFFFFFF ; X86-NEXT: xorl $2147483647, %esi # imm = 0x7FFFFFFF
; X86-NEXT: orl %edx, %edi ; X86-NEXT: orl %edx, %edi
; X86-NEXT: notl %ecx ; X86-NEXT: notl %ecx
; X86-NEXT: cmovel (%esp), %ecx # 4-byte Folded Reload ; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: cmovel %ebp, %esi ; X86-NEXT: cmovel %ebx, %esi
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl %esi, %edx ; X86-NEXT: movl %esi, %edx
; X86-NEXT: addl $8, %esp ; X86-NEXT: addl $12, %esp
; X86-NEXT: .cfi_def_cfa_offset 20 ; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 16 ; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: .cfi_def_cfa_offset 12 ; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
▲ Show 20 Lines • Show All 324 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll

Show All 17 Lines
; X64-NEXT: movq %rdi, %r10 ; X64-NEXT: movq %rdi, %r10
; X64-NEXT: movq %rsi, %r14 ; X64-NEXT: movq %rsi, %r14
; X64-NEXT: sarq $63, %r14 ; X64-NEXT: sarq $63, %r14
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: imulq %r14, %rdi ; X64-NEXT: imulq %r14, %rdi
; X64-NEXT: movq %rdx, %rax ; X64-NEXT: movq %rdx, %rax
; X64-NEXT: mulq %r14 ; X64-NEXT: mulq %r14
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %rdi, %rdx
; X64-NEXT: imulq %rcx, %r14 ; X64-NEXT: imulq %rcx, %r14
; X64-NEXT: addq %rdi, %r14
; X64-NEXT: addq %rdx, %r14 ; X64-NEXT: addq %rdx, %r14
; X64-NEXT: movq %rcx, %rdi ; X64-NEXT: movq %rcx, %rdi
; X64-NEXT: sarq $63, %rdi ; X64-NEXT: sarq $63, %rdi
; X64-NEXT: movq %rdi, %r15 ; X64-NEXT: movq %rdi, %r15
; X64-NEXT: imulq %rsi, %r15 ; X64-NEXT: imulq %rsi, %r15
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r10 ; X64-NEXT: mulq %r10
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %r11
; X64-NEXT: addq %r15, %rdx
; X64-NEXT: imulq %r10, %rdi ; X64-NEXT: imulq %r10, %rdi
; X64-NEXT: addq %r15, %rdi
; X64-NEXT: addq %rdx, %rdi ; X64-NEXT: addq %rdx, %rdi
; X64-NEXT: addq %r9, %r11 ; X64-NEXT: addq %r9, %r11
; X64-NEXT: adcq %r14, %rdi ; X64-NEXT: adcq %r14, %rdi
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %rbx ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rsi, %rax
Show All 33 Lines
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: .cfi_def_cfa_offset 12 ; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: .cfi_def_cfa_offset 16 ; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 20 ; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: subl $56, %esp ; X86-NEXT: subl $52, %esp
; X86-NEXT: .cfi_def_cfa_offset 76 ; X86-NEXT: .cfi_def_cfa_offset 72
; X86-NEXT: .cfi_offset %esi, -20 ; X86-NEXT: .cfi_offset %esi, -20
; X86-NEXT: .cfi_offset %edi, -16 ; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .cfi_offset %ebx, -12 ; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: .cfi_offset %ebp, -8 ; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: addl %edi, %eax ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: addl %edi, %ebp
; X86-NEXT: adcl %esi, %ebp ; X86-NEXT: adcl %esi, %ebx
; X86-NEXT: setb %bl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %esi, %ebp ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edi, %ebx ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: mull %esi ; X86-NEXT: mull %edx
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ebx, %edi ; X86-NEXT: addl %esi, %edi
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl %ebp, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %ebx, %ecx ; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: adcl %ebp, %esi ; X86-NEXT: adcl %esi, %ebx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %esi, %ecx ; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebp ; X86-NEXT: adcl %eax, %esi
; X86-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %esi
; X86-NEXT: addl (%esp), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl (%esp), %ecx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: setb (%esp) ## 1-byte Folded Spill ; X86-NEXT: setb (%esp) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: mull %edx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: addl %esi, %eax ; X86-NEXT: movl %eax, %edi
; X86-NEXT: movl %eax, %esi ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl %edi, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: addl %edi, %eax
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movl %eax, %edi
; X86-NEXT: adcl %ebx, %ebp
; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl %ebp, %esi ; X86-NEXT: adcl %esi, %edi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl (%esp), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl (%esp), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebp
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edi, %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: sarl $31, %esi ; X86-NEXT: sarl $31, %esi
; X86-NEXT: movl %esi, %edi ; X86-NEXT: movl %esi, %edi
; X86-NEXT: imull {{[0-9]+}}(%esp), %edi ; X86-NEXT: imull {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: mull %ebx ; X86-NEXT: mull %ebp
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %edi, %edx ; X86-NEXT: imull %esi, %ebp
; X86-NEXT: addl %edi, %ebp
; X86-NEXT: addl %edx, %ebp
; X86-NEXT: movl %esi, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull %eax, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: imull %esi, %ebx ; X86-NEXT: imull %esi, %ebx
; X86-NEXT: addl %edx, %ebx ; X86-NEXT: addl %edx, %ebx
; X86-NEXT: movl %ebx, (%esp) ## 4-byte Spill
; X86-NEXT: movl %esi, %ebx
; X86-NEXT: imull {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: addl %edx, %ebx ; X86-NEXT: addl %edx, %ebx
; X86-NEXT: imull %esi, %ebp
; X86-NEXT: addl %ebx, %ebp
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: addl %eax, %ecx
; X86-NEXT: adcl (%esp), %ebp ## 4-byte Folded Reload ; X86-NEXT: movl %ecx, (%esp) ## 4-byte Spill
; X86-NEXT: movl %ebp, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %ebp, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %esi ; X86-NEXT: addl %edi, %esi
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: addl %ebx, %esi ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edi, %ebp ; X86-NEXT: adcl %edi, %ebp
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: addl %eax, %ebp ; X86-NEXT: addl %eax, %ebp
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: addl %ecx, %ebp ; X86-NEXT: addl (%esp), %ebp ## 4-byte Folded Reload
; X86-NEXT: adcl (%esp), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: sarl $31, %ebx ; X86-NEXT: sarl $31, %esi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, %esi
; X86-NEXT: imull %ebx, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: imull %ebx, %edi
; X86-NEXT: addl %ecx, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: imull %ebx, %ecx
; X86-NEXT: mull %ebx
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: movl %edx, %edi
; X86-NEXT: imull %esi, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: imull %esi, %ebx
; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull %ebx, %eax ; X86-NEXT: movl %eax, %edx
; X86-NEXT: addl %edx, %eax ; X86-NEXT: imull %esi, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, (%esp) ## 4-byte Folded Spill ; X86-NEXT: imull %esi, %ecx
; X86-NEXT: adcl %edi, %eax ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: mull %esi
; X86-NEXT: movl %ecx, %edi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %esi, %edi ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: addl %edi, %ebx
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl (%esp), %eax ## 4-byte Reload
; X86-NEXT: addl %eax, %esi
; X86-NEXT: adcl %ebx, %ecx
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %edi, %ebx
; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl %edx, %edi
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: addl %eax, %edi ; X86-NEXT: addl %eax, %edi
; X86-NEXT: adcl %edx, %esi ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: setb %bl
; X86-NEXT: addl %eax, %esi
; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: addl (%esp), %esi ## 4-byte Folded Reload ; X86-NEXT: addl %esi, %edi
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: movl (%esp), %esi ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl %ebp, %esi ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: adcl %ebp, %edi
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: movl %ebx, %edx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: sarl $31, %edx ; X86-NEXT: sarl $31, %ecx
; X86-NEXT: xorl %edx, %eax ; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: xorl %edx, %edi ; X86-NEXT: xorl %ecx, %ebx
; X86-NEXT: orl %eax, %edi ; X86-NEXT: orl %eax, %ebx
; X86-NEXT: xorl %edx, %esi ; X86-NEXT: xorl %ecx, %edi
; X86-NEXT: xorl %ecx, %edx ; X86-NEXT: xorl %esi, %ecx
; X86-NEXT: orl %esi, %edx ; X86-NEXT: orl %edi, %ecx
; X86-NEXT: orl %edi, %edx ; X86-NEXT: orl %ebx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebx, 12(%eax) ; X86-NEXT: movl %edx, 12(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, (%eax) ; X86-NEXT: movl %ecx, (%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 4(%eax) ; X86-NEXT: movl %ecx, 4(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 8(%eax) ; X86-NEXT: movl %ecx, 8(%eax)
; X86-NEXT: setne %al ; X86-NEXT: setne %al
; X86-NEXT: addl $56, %esp ; X86-NEXT: addl $52, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%t = call {i128, i1} @llvm.smul.with.overflow.i128(i128 %v1, i128 %v2) %t = call {i128, i1} @llvm.smul.with.overflow.i128(i128 %v1, i128 %v2)
%val = extractvalue {i128, i1} %t, 0 %val = extractvalue {i128, i1} %t, 0
%obit = extractvalue {i128, i1} %t, 1 %obit = extractvalue {i128, i1} %t, 1
Show All 17 Lines
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %rbx
; X64-NEXT: .cfi_def_cfa_offset 56 ; X64-NEXT: .cfi_def_cfa_offset 56
; X64-NEXT: .cfi_offset %rbx, -56 ; X64-NEXT: .cfi_offset %rbx, -56
; X64-NEXT: .cfi_offset %r12, -48 ; X64-NEXT: .cfi_offset %r12, -48
; X64-NEXT: .cfi_offset %r13, -40 ; X64-NEXT: .cfi_offset %r13, -40
; X64-NEXT: .cfi_offset %r14, -32 ; X64-NEXT: .cfi_offset %r14, -32
; X64-NEXT: .cfi_offset %r15, -24 ; X64-NEXT: .cfi_offset %r15, -24
; X64-NEXT: .cfi_offset %rbp, -16 ; X64-NEXT: .cfi_offset %rbp, -16
; X64-NEXT: movq %r8, %rbx
; X64-NEXT: movq %rcx, %r11 ; X64-NEXT: movq %rcx, %r11
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rsi, %r15 ; X64-NEXT: movq %rsi, %r15
; X64-NEXT: movq %rdx, %rax ; X64-NEXT: movq %rdx, %rax
; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rax, %r10 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rsi, %r10 ; X64-NEXT: addq %rsi, %r8
; X64-NEXT: adcq $0, %rcx ; X64-NEXT: adcq $0, %rcx
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r10
; X64-NEXT: addq %r10, %r14 ; X64-NEXT: addq %r8, %r10
; X64-NEXT: adcq %rcx, %r12 ; X64-NEXT: adcq %rcx, %r12
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: movzbl %al, %ecx ; X64-NEXT: movzbl %al, %ecx
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r11 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: addq %r12, %r14
; X64-NEXT: addq %r12, %rbx ; X64-NEXT: adcq %rcx, %rdx
; X64-NEXT: adcq %rcx, %r11 ; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %r8, %rcx ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: mulq %r8
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rcx ; X64-NEXT: mulq %rbx
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r8, %r13 ; X64-NEXT: addq %r8, %r13
; X64-NEXT: adcq $0, %r12 ; X64-NEXT: adcq $0, %r12
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: movq %r9, %rsi ; X64-NEXT: movq %r9, %rsi
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: addq %r13, %rax ; X64-NEXT: addq %r13, %rax
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: adcq %r12, %r10 ; X64-NEXT: adcq %r12, %r11
; X64-NEXT: setb %cl ; X64-NEXT: setb %cl
; X64-NEXT: movq %r15, %r9 ; X64-NEXT: movq %r15, %r9
; X64-NEXT: movq %r15, %rax ; X64-NEXT: movq %r15, %rax
; X64-NEXT: mulq %rsi ; X64-NEXT: mulq %rsi
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %r10, %r8 ; X64-NEXT: addq %r11, %r8
; X64-NEXT: movzbl %cl, %eax ; X64-NEXT: movzbl %cl, %eax
; X64-NEXT: adcq %rax, %rbp ; X64-NEXT: adcq %rax, %rbp
; X64-NEXT: movq {{[0-9]+}}(%rsp), %r15 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %r15
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r8 ## 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r8 ## 8-byte Folded Reload
; X64-NEXT: adcq %r14, %rbp ; X64-NEXT: adcq %r10, %rbp
; X64-NEXT: adcq $0, %rbx ; X64-NEXT: adcq $0, %r14
; X64-NEXT: adcq $0, %r11 ; X64-NEXT: adcq $0, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Folded Spill
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rdi, %rcx
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %rdi
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: movq %r9, %rsi ; X64-NEXT: movq %r9, %rsi
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %r13 ; X64-NEXT: movq %rdx, %r13
; X64-NEXT: movq %rax, %r9 ; X64-NEXT: movq %rax, %r9
; X64-NEXT: addq %r10, %r9 ; X64-NEXT: addq %r11, %r9
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: movq {{[0-9]+}}(%rsp), %r12 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %r12
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r11 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: addq %r9, %rax ; X64-NEXT: addq %r9, %rax
; X64-NEXT: movq %rax, %rdi ; X64-NEXT: movq %rax, %r9
; X64-NEXT: adcq %r13, %r11 ; X64-NEXT: adcq %r13, %r10
; X64-NEXT: setb %cl ; X64-NEXT: setb %cl
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r11
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r11, %r13 ; X64-NEXT: addq %r10, %r13
; X64-NEXT: movzbl %cl, %eax ; X64-NEXT: movzbl %cl, %eax
; X64-NEXT: adcq %rax, %r10 ; X64-NEXT: adcq %rax, %r11
; X64-NEXT: addq %r8, %r14 ; X64-NEXT: addq %r8, %rdi
; X64-NEXT: movq %r14, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: adcq %rbp, %rdi
; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: adcq %rbp, %r9
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: adcq $0, %r10 ; X64-NEXT: adcq $0, %r11
; X64-NEXT: addq %rbx, %r13 ; X64-NEXT: addq %r14, %r13
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r10 ## 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %r11 ## 8-byte Folded Reload
; X64-NEXT: setb %cl ; X64-NEXT: setb {{[-0-9]+}}(%r{{[sb]}}p) ## 1-byte Folded Spill
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 ## 8-byte Reload
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rsi ; X64-NEXT: movq %rdx, %rsi
; X64-NEXT: movq %rax, %r11 ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbx ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 ## 8-byte Reload
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rdx, %rdi ; X64-NEXT: movq %rdx, %rdi
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rsi, %r8 ; X64-NEXT: addq %rsi, %r8
; X64-NEXT: adcq $0, %rdi ; X64-NEXT: adcq $0, %rdi
; X64-NEXT: movq %r9, %rax ; X64-NEXT: movq %r9, %rax
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: addq %r8, %rax
; X64-NEXT: movq %rax, %rsi ; X64-NEXT: movq %rax, %rsi
; X64-NEXT: addq %r8, %rsi
; X64-NEXT: adcq %rdi, %r9 ; X64-NEXT: adcq %rdi, %r9
; X64-NEXT: setb %r8b ; X64-NEXT: setb %r8b
; X64-NEXT: movq %rbx, %rax ; X64-NEXT: movq %r10, %rax
; X64-NEXT: mulq %r12 ; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: addq %r9, %r14 ; X64-NEXT: addq %r9, %r14
; X64-NEXT: movzbl %r8b, %eax ; X64-NEXT: movzbl %r8b, %eax
; X64-NEXT: adcq %rax, %rbp ; X64-NEXT: adcq %rax, %rbp
; X64-NEXT: addq %r13, %r11 ; X64-NEXT: addq %r13, %rcx
; X64-NEXT: movq %r11, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: adcq %r10, %rsi ; X64-NEXT: adcq %r11, %rsi
; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; X64-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: movzbl %cl, %eax ; X64-NEXT: movzbl {{[-0-9]+}}(%r{{[sb]}}p), %eax ## 1-byte Folded Reload
; X64-NEXT: adcq %rax, %r14 ; X64-NEXT: adcq %rax, %r14
; X64-NEXT: adcq $0, %rbp ; X64-NEXT: adcq $0, %rbp
; X64-NEXT: movq %rbx, %r13 ; X64-NEXT: movq %r10, %r13
; X64-NEXT: movq %rbx, %r10
; X64-NEXT: sarq $63, %r13 ; X64-NEXT: sarq $63, %r13
; X64-NEXT: movq %r13, %rcx ; X64-NEXT: movq %r13, %rcx
; X64-NEXT: imulq %r12, %rcx ; X64-NEXT: imulq %r12, %rcx
; X64-NEXT: movq %r13, %rax ; X64-NEXT: movq %r13, %rax
; X64-NEXT: mulq %r15 ; X64-NEXT: mulq %r15
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rcx, %rdx
; X64-NEXT: imulq %r13, %r15 ; X64-NEXT: imulq %r13, %r15
; X64-NEXT: addq %rcx, %r15
; X64-NEXT: addq %rdx, %r15 ; X64-NEXT: addq %rdx, %r15
; X64-NEXT: movq %r13, %rcx ; X64-NEXT: movq %r13, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi ## 8-byte Reload
; X64-NEXT: imulq %rdi, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi ## 8-byte Reload
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: imulq %rsi, %rcx
; X64-NEXT: movq %rbx, %rax
; X64-NEXT: imulq %r13, %rbx
; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rax, %r11
; X64-NEXT: movq %rdx, %r9 ; X64-NEXT: movq %rdx, %r9
; X64-NEXT: addq %rdx, %rcx ; X64-NEXT: addq %rdx, %rbx
; X64-NEXT: imulq %r13, %rsi
; X64-NEXT: addq %rcx, %rsi
; X64-NEXT: movq %rax, %rcx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; X64-NEXT: addq %rax, %r8 ; X64-NEXT: addq %rax, %r8
; X64-NEXT: adcq %r15, %rsi ; X64-NEXT: adcq %r15, %rbx
; X64-NEXT: movq %rdi, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r13 ; X64-NEXT: mulq %r13
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %r9, %r15 ; X64-NEXT: addq %r9, %r15
; X64-NEXT: movq %rdx, %r13 ; X64-NEXT: movq %rdx, %r13
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: addq %rcx, %r15 ; X64-NEXT: addq %r11, %r15
; X64-NEXT: adcq %r9, %r13 ; X64-NEXT: adcq %r9, %r13
; X64-NEXT: setb %cl ; X64-NEXT: setb %cl
; X64-NEXT: addq %rax, %r13 ; X64-NEXT: addq %rax, %r13
; X64-NEXT: movzbl %cl, %r9d ; X64-NEXT: movzbl %cl, %r9d
; X64-NEXT: adcq %rdx, %r9 ; X64-NEXT: adcq %rdx, %r9
; X64-NEXT: addq %r8, %r13 ; X64-NEXT: addq %r8, %r13
; X64-NEXT: adcq %rsi, %r9 ; X64-NEXT: adcq %rbx, %r9
; X64-NEXT: sarq $63, %r12 ; X64-NEXT: sarq $63, %r12
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax ## 8-byte Reload
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %rcx
; X64-NEXT: imulq %r12, %r8 ; X64-NEXT: imulq %r12, %rcx
; X64-NEXT: mulq %r12
; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %rdx, %r11
; X64-NEXT: addq %rdx, %r8
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi ## 8-byte Reload
; X64-NEXT: movq %rdi, %rbx ; X64-NEXT: movq %rdi, %rbx
; X64-NEXT: imulq %r12, %rbx ; X64-NEXT: imulq %r12, %rbx
; X64-NEXT: addq %r8, %rbx ; X64-NEXT: addq %rcx, %rbx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 ## 8-byte Reload
; X64-NEXT: movq %rax, %rcx ; X64-NEXT: movq %r8, %rdx
; X64-NEXT: imulq %r12, %rcx ; X64-NEXT: imulq %r12, %rdx
; X64-NEXT: mulq %r12
; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rcx, %rdx
; X64-NEXT: imulq %r12, %r10 ; X64-NEXT: imulq %r12, %r10
; X64-NEXT: addq %rdx, %r10 ; X64-NEXT: addq %rdx, %r10
; X64-NEXT: movq %r10, %rcx
; X64-NEXT: mulq %r12
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %rsi
; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r12
; X64-NEXT: movq %rax, %r8
; X64-NEXT: addq %rdx, %rcx
; X64-NEXT: addq %r10, %rbx
; X64-NEXT: addq %rsi, %r8 ; X64-NEXT: addq %rsi, %r8
; X64-NEXT: adcq %rbx, %r10 ; X64-NEXT: adcq %rbx, %rcx
; X64-NEXT: movq %rsi, %rbx ; X64-NEXT: movq %rsi, %rbx
; X64-NEXT: addq %r11, %rbx ; X64-NEXT: addq %r10, %rbx
; X64-NEXT: adcq $0, %r11 ; X64-NEXT: adcq $0, %r10
; X64-NEXT: movq %r12, %rax ; X64-NEXT: movq %r12, %rax
; X64-NEXT: mulq %rdi ; X64-NEXT: mulq %rdi
; X64-NEXT: addq %rax, %rbx ; X64-NEXT: addq %rax, %rbx
; X64-NEXT: adcq %rdx, %r11 ; X64-NEXT: adcq %rdx, %r10
; X64-NEXT: setb %cl ; X64-NEXT: setb %r12b
; X64-NEXT: addq %rax, %r11 ; X64-NEXT: addq %rax, %r10
; X64-NEXT: movzbl %cl, %eax ; X64-NEXT: movzbl %r12b, %eax
; X64-NEXT: adcq %rdx, %rax ; X64-NEXT: adcq %rdx, %rax
; X64-NEXT: addq %r8, %r11 ; X64-NEXT: addq %r8, %r10
; X64-NEXT: adcq %r10, %rax ; X64-NEXT: adcq %rcx, %rax
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi ## 8-byte Folded Reload ; X64-NEXT: addq %r11, %rsi
; X64-NEXT: adcq %r15, %rbx ; X64-NEXT: adcq %r15, %rbx
; X64-NEXT: adcq %r13, %r11 ; X64-NEXT: adcq %r13, %r10
; X64-NEXT: adcq %r9, %rax ; X64-NEXT: adcq %r9, %rax
; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi ## 8-byte Folded Reload ; X64-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %rsi ## 8-byte Folded Reload
; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx ## 8-byte Folded Reload ; X64-NEXT: adcq {{[-0-9]+}}(%r{{[sb]}}p), %rbx ## 8-byte Folded Reload
; X64-NEXT: adcq %r14, %r11 ; X64-NEXT: adcq %r14, %r10
; X64-NEXT: adcq %rbp, %rax ; X64-NEXT: adcq %rbp, %rax
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload
; X64-NEXT: movq %rdx, %rcx ; X64-NEXT: movq %rcx, %rdx
; X64-NEXT: sarq $63, %rcx ; X64-NEXT: sarq $63, %rdx
; X64-NEXT: xorq %rcx, %rax ; X64-NEXT: xorq %rdx, %rax
; X64-NEXT: xorq %rcx, %rbx ; X64-NEXT: xorq %rdx, %rbx
; X64-NEXT: orq %rax, %rbx ; X64-NEXT: orq %rax, %rbx
; X64-NEXT: xorq %rcx, %r11 ; X64-NEXT: xorq %rdx, %r10
; X64-NEXT: xorq %rsi, %rcx ; X64-NEXT: xorq %rsi, %rdx
; X64-NEXT: orq %r11, %rcx ; X64-NEXT: orq %r10, %rdx
; X64-NEXT: orq %rbx, %rcx ; X64-NEXT: orq %rbx, %rdx
; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax
; X64-NEXT: movq %rdx, 24(%rax) ; X64-NEXT: movq %rcx, 24(%rax)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload
; X64-NEXT: movq %rcx, (%rax) ; X64-NEXT: movq %rcx, (%rax)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload
; X64-NEXT: movq %rcx, 8(%rax) ; X64-NEXT: movq %rcx, 8(%rax)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx ## 8-byte Reload
; X64-NEXT: movq %rcx, 16(%rax) ; X64-NEXT: movq %rcx, 16(%rax)
; X64-NEXT: setne %al ; X64-NEXT: setne %al
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
Show All 9 Lines
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx ; X86-NEXT: pushl %ebx
; X86-NEXT: .cfi_def_cfa_offset 12 ; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: pushl %edi ; X86-NEXT: pushl %edi
; X86-NEXT: .cfi_def_cfa_offset 16 ; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 20 ; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: subl $156, %esp ; X86-NEXT: subl $152, %esp
; X86-NEXT: .cfi_def_cfa_offset 176 ; X86-NEXT: .cfi_def_cfa_offset 172
; X86-NEXT: .cfi_offset %esi, -20 ; X86-NEXT: .cfi_offset %esi, -20
; X86-NEXT: .cfi_offset %edi, -16 ; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .cfi_offset %ebx, -12 ; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: .cfi_offset %ebp, -8 ; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %ebp ; X86-NEXT: mull %ecx
; X86-NEXT: movl %ecx, %ebp
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %edi, %ecx
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %ebp ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %esi ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %ecx, %ebp ; X86-NEXT: addl %ecx, %ebp
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edi, %ebx ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ebx, %ecx ; X86-NEXT: addl %esi, %edi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl (%esp), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %esi, (%esp) ## 4-byte Spill ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edx, %esi
; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ebx, %esi ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: adcl %ebp, %edi ; X86-NEXT: adcl %ebp, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %ebp ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebp
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %esi
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: addl (%esp), %esi ## 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: adcl (%esp), %ebx ## 4-byte Folded Reload
; X86-NEXT: setb (%esp) ## 1-byte Folded Spill ; X86-NEXT: setb (%esp) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %edi, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 1-byte Folded Reload
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl %ecx, %edx
; X86-NEXT: addl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl %ebx, %edi ; X86-NEXT: adcl %ebp, %ebx
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl (%esp), %ecx ## 1-byte Folded Reload ; X86-NEXT: movzbl (%esp), %ecx ## 1-byte Folded Reload
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %ebp ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %edi, %ecx
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebp ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %esi ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl %edx, (%esp) ## 4-byte Spill
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: addl %ecx, %ebp
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edi, %ebp ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: mull %ecx ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: mull %ebx
; X86-NEXT: addl %ebp, %ecx ; X86-NEXT: movl %eax, %edi
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: addl %esi, %edi
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %esi ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ebx, %esi ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %ebx ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: adcl %ebp, %edi ; X86-NEXT: adcl %ebp, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %edi, %ebp ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebp
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: addl (%esp), %ebp ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %esi
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl (%esp), %ebp ## 4-byte Folded Reload
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %edi, %ecx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 1-byte Folded Reload ; X86-NEXT: movl %eax, %edi
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx
; X86-NEXT: movl (%esp), %ecx ## 4-byte Reload ; X86-NEXT: movl (%esp), %ecx ## 4-byte Reload
; X86-NEXT: addl %ebp, %ecx ; X86-NEXT: addl %esi, %ecx
; X86-NEXT: movl %edi, %esi ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: adcl %ebx, %esi ; X86-NEXT: adcl %ebp, %edx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %edi, %eax ; X86-NEXT: adcl %eax, %edi
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl %ecx, (%esp) ## 4-byte Spill ; X86-NEXT: movl %ecx, (%esp) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %esi ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %esi, %ebp
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %esi, %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull %ecx
; X86-NEXT: movl %ecx, %edi
; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb %cl
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edi, %ebp ; X86-NEXT: addl %esi, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %esi, %ecx
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %edi
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: adcl %ebp, %edi
; X86-NEXT: mull %esi ; X86-NEXT: setb %cl
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ecx, %edi
; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: mull %esi
; X86-NEXT: mull %ebp ; X86-NEXT: movl %eax, %esi
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: addl %edi, %esi
; X86-NEXT: addl %edi, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %esi, %ebp
; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %edi, %ebx
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebp
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: adcl %ebp, %esi ; X86-NEXT: adcl %edi, %ebp
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %esi, %edi ; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebp ; X86-NEXT: adcl %eax, %edi
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: mull %esi ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: addl %esi, %ebp
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %edx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movzbl %bl, %ecx ; X86-NEXT: movzbl %bl, %esi
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload
; X86-NEXT: addl %edi, %ebx ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload ; X86-NEXT: adcl %edi, %ebp
; X86-NEXT: adcl %ebp, %edi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 1-byte Folded Reload
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl (%esp), %ecx ## 4-byte Reload ; X86-NEXT: movl (%esp), %ecx ## 4-byte Reload
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl %ebx, %edx ; X86-NEXT: movl %ebx, %edx
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edi, %ecx ; X86-NEXT: movl %ebp, %ecx
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
Show All 25 Lines
; X86-NEXT: mull %ebp ; X86-NEXT: mull %ebp
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: mull %edi ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %esi, %ebx
; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %edi, %ebp
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edi, %ecx ; X86-NEXT: adcl %ebx, %ecx
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %edi
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ecx, %esi ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: movzbl %bl, %eax ; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, (%esp) ## 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: mull %edi ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %ecx, %ebp ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %esi
; X86-NEXT: adcl %edi, %ebx ; X86-NEXT: adcl %ebp, %ebx
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %ebx, %ecx ; X86-NEXT: addl %ebx, %ebp
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %edi ; X86-NEXT: adcl %eax, %ecx
; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %edi ; X86-NEXT: addl (%esp), %ebp ## 4-byte Folded Reload
; X86-NEXT: addl (%esp), %ecx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %ebx ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %esi, %ebp ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %ebx, %esi ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: setb (%esp) ## 1-byte Folded Spill ; X86-NEXT: setb (%esp) ## 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %esi, %ebx ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: movzbl (%esp), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl (%esp), %eax ## 1-byte Folded Reload
; X86-NEXT: movl %edx, %esi ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: adcl %eax, %esi ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload ; X86-NEXT: addl %ebp, %edi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: adcl %edi, %ebp ; X86-NEXT: adcl %ecx, %esi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edi
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: sarl $31, %edi ; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %esi, %ebp ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: addl %ecx, %ebp ; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebx, (%esp) ## 4-byte Spill
; X86-NEXT: adcl %esi, %ebx ; X86-NEXT: adcl %esi, %ebp
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: addl %eax, %ebx ; X86-NEXT: addl %eax, %ebp
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: addl %esi, %edx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, %eax
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %esi, %ecx ; X86-NEXT: movl %ebx, %esi
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %esi
; X86-NEXT: addl (%esp), %edx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %eax, %ecx ; X86-NEXT: adcl %eax, %esi
; X86-NEXT: setb %al ; X86-NEXT: setb %dl
; X86-NEXT: addl %ebp, %ecx ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl %al, %edx ; X86-NEXT: movzbl %dl, %edx
; X86-NEXT: adcl %esi, %edx ; X86-NEXT: adcl %ebx, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %esi, %ecx
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl (%esp), %eax ## 4-byte Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl %ebx, %ebp ; X86-NEXT: movl %ebp, %ebx
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: addl (%esp), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: addl %ebp, %ecx ; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: adcl %esi, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: setb %al ; X86-NEXT: setb %al
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl (%esp), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl %al, %eax ; X86-NEXT: movzbl %al, %eax
; X86-NEXT: adcl %ebx, %eax ; X86-NEXT: adcl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, (%esp) ## 4-byte Spill
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: imull %edi, %ecx ; X86-NEXT: imull %edi, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: imull %edi, %esi ; X86-NEXT: imull %edi, %esi
; X86-NEXT: addl %ecx, %esi ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: imull %edi, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %edi, %ecx ; X86-NEXT: imull %edi, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %edi, %ecx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: addl %ebp, %esi
; X86-NEXT: movl (%esp), %eax ## 4-byte Reload
; X86-NEXT: addl %eax, %ebx ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %ebp, %esi ; X86-NEXT: addl %ebp, %esi
; X86-NEXT: adcl $0, %ebp ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %eax, %esi ; X86-NEXT: addl %eax, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edx, %ebp ; X86-NEXT: adcl %edx, %ebp
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: addl %eax, %ebp ; X86-NEXT: addl %eax, %ebp
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 1-byte Folded Reload
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: addl %ebx, %ebp ; X86-NEXT: addl %ebx, %ebp
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %edi, %ecx ; X86-NEXT: imull %edi, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: movl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %edi, %ecx ; X86-NEXT: imull %edi, %ecx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %edi, %edx ; X86-NEXT: imull %edi, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: imull {{[0-9]+}}(%esp), %edi ; X86-NEXT: imull {{[0-9]+}}(%esp), %edi
; X86-NEXT: addl %edx, %edi ; X86-NEXT: addl %edx, %edi
; X86-NEXT: movl (%esp), %edx ## 4-byte Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: addl %edx, %esi ; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl %ecx, %edi ; X86-NEXT: adcl %ecx, %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %esi, %ecx
; X86-NEXT: movl %eax, %edx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: addl %eax, %ecx
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload
; X86-NEXT: addl %ebx, %ecx ; X86-NEXT: addl %ebx, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: addl %ebx, %edx ; X86-NEXT: addl %ebx, %edx
; X86-NEXT: movzbl %cl, %ecx ; X86-NEXT: movzbl %cl, %ecx
; X86-NEXT: adcl %eax, %ecx ; X86-NEXT: adcl %eax, %ecx
; X86-NEXT: addl %esi, %edx ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: adcl %edi, %ecx ; X86-NEXT: adcl %edi, %ecx
; X86-NEXT: movl %ecx, %edi ; X86-NEXT: movl %ecx, %edi
; X86-NEXT: movl (%esp), %ecx ## 4-byte Reload
; X86-NEXT: addl %esi, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: addl (%esp), %esi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: adcl %ebp, %edx ; X86-NEXT: adcl %ebp, %edx
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl %ecx, (%esp) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: sarl $31, %eax ; X86-NEXT: sarl $31, %eax
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %eax, %ecx ; X86-NEXT: addl %eax, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %edx, %esi ; X86-NEXT: adcl %edx, %esi
; X86-NEXT: setb %bl ; X86-NEXT: setb %bl
; X86-NEXT: addl %eax, %esi ; X86-NEXT: addl %eax, %esi
; X86-NEXT: movzbl %bl, %ebx ; X86-NEXT: movzbl %bl, %edi
; X86-NEXT: adcl %edx, %ebx ; X86-NEXT: adcl %edx, %edi
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: adcl %ebx, %eax ; X86-NEXT: adcl %edi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %ebp, %ecx ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %edx, %ebp ; X86-NEXT: addl %edx, %ebp
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %eax, %ebp ; X86-NEXT: addl %eax, %ebp
; X86-NEXT: adcl %edx, %edi ; X86-NEXT: adcl %edx, %ebx
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: addl %eax, %edi ; X86-NEXT: addl %eax, %ebx
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %edx, %eax ; X86-NEXT: adcl %edx, %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: adcl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: adcl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl %edi, %edx ; X86-NEXT: movl %ebx, %edx
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
; X86-NEXT: adcl $0, %eax ; X86-NEXT: adcl $0, %eax
; X86-NEXT: addl %esi, %edx ; X86-NEXT: addl %esi, %edx
; X86-NEXT: adcl %ebx, %eax ; X86-NEXT: adcl %edi, %eax
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: setb %al ; X86-NEXT: setb %al
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload
; X86-NEXT: addl %ebx, %edx ; X86-NEXT: addl %edi, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %ebp, %esi ; X86-NEXT: adcl %ebp, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movzbl %al, %eax ; X86-NEXT: movzbl %al, %eax
; X86-NEXT: adcl %edi, %eax ; X86-NEXT: adcl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: imull %esi, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Reload ; X86-NEXT: imull %esi, %eax
; X86-NEXT: imull %ebp, %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull %ebp, %eax
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %ecx, %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %esi, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %ebp, %ecx ; X86-NEXT: imull %esi, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: addl %esi, %ecx ; X86-NEXT: addl %esi, %ecx
; X86-NEXT: movl %ecx, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %ebp, %ecx
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: addl %edx, %ebx ; X86-NEXT: addl %edx, %edi
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %eax, %ecx ; X86-NEXT: adcl %eax, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload
; X86-NEXT: movl %ecx, %edi ; X86-NEXT: movl %ebx, %ebp
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %ebp
; X86-NEXT: addl %edx, %eax ; X86-NEXT: addl %edx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl %esi, %edi ; X86-NEXT: adcl %esi, %ebp
; X86-NEXT: setb %dl ; X86-NEXT: setb %al
; X86-NEXT: addl %ebx, %edi ; X86-NEXT: addl %edi, %ebp
; X86-NEXT: movzbl %dl, %eax ; X86-NEXT: movzbl %al, %eax
; X86-NEXT: adcl %ebx, %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %ebp, %ecx ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: imull %ebx, %ecx
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: imull %ebx, %esi
; X86-NEXT: imull %ebp, %esi ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %edx, %esi ; X86-NEXT: addl %edx, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl %ebp, %esi ; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebp ; X86-NEXT: imull %eax, %ecx
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %esi, %eax
; X86-NEXT: imull %ebx, %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: mull %ebx
; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: movl %edx, %edi
; X86-NEXT: addl %edx, %esi ; X86-NEXT: addl %edx, %esi
; X86-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: imull %ebp, %eax ; X86-NEXT: mull %ecx
; X86-NEXT: addl %esi, %eax ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: addl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: addl %edi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: mull %ebp ; X86-NEXT: adcl %edi, %edx
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) ## 1-byte Folded Spill
; X86-NEXT: addl %ebx, %ebp ; X86-NEXT: addl %ecx, %edx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 1-byte Folded Reload
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: addl %ecx, %ebp ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: adcl %ebx, %esi ; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: setb %bl ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: addl %eax, %esi ; X86-NEXT: addl %esi, %ebx
; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %edx, %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: addl %edx, %ecx
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: adcl %edi, %esi
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: adcl %ebp, %edx
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: addl (%esp), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: adcl (%esp), %ebx ## 4-byte Folded Reload
; X86-NEXT: movl %ebx, (%esp) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill ; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Folded Reload
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
; X86-NEXT: movl (%esp), %ebx ## 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp ## 4-byte Reload
; X86-NEXT: movl %ebp, %esi
; X86-NEXT: sarl $31, %esi
; X86-NEXT: xorl %esi, %edi
; X86-NEXT: xorl %esi, %edx
; X86-NEXT: orl %edi, %edx
; X86-NEXT: movl %ebx, %edi ; X86-NEXT: movl %ebx, %edi
; X86-NEXT: sarl $31, %edi ; X86-NEXT: xorl %esi, %edi
; X86-NEXT: xorl %edi, %edx ; X86-NEXT: orl %edx, %edi
; X86-NEXT: xorl %edi, %esi
; X86-NEXT: orl %edx, %esi
; X86-NEXT: xorl %edi, %ecx
; X86-NEXT: orl %esi, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload
; X86-NEXT: xorl %edi, %edx ; X86-NEXT: xorl %esi, %edx
; X86-NEXT: orl %ecx, %edx ; X86-NEXT: orl %edi, %edx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx ## 4-byte Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx ## 4-byte Reload ; X86-NEXT: xorl %esi, %ebx
; X86-NEXT: xorl %edi, %edx ; X86-NEXT: xorl %esi, %ecx
; X86-NEXT: xorl %edi, %eax ; X86-NEXT: orl %ebx, %ecx
; X86-NEXT: orl %edx, %eax ; X86-NEXT: xorl %esi, %eax
; X86-NEXT: xorl %edi, %ebp ; X86-NEXT: orl %ecx, %eax
; X86-NEXT: orl %eax, %ebp ; X86-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Folded Reload
; X86-NEXT: xorl {{[-0-9]+}}(%e{{[sb]}}p), %edi ## 4-byte Folded Reload ; X86-NEXT: orl %eax, %esi
; X86-NEXT: orl %ebp, %edi ; X86-NEXT: orl %edx, %esi
; X86-NEXT: orl %ecx, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebx, 28(%eax) ; X86-NEXT: movl %ebp, 28(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, (%eax) ; X86-NEXT: movl %ecx, (%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 4(%eax) ; X86-NEXT: movl %ecx, 4(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 8(%eax) ; X86-NEXT: movl %ecx, 8(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 12(%eax) ; X86-NEXT: movl %ecx, 12(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 16(%eax) ; X86-NEXT: movl %ecx, 16(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 20(%eax) ; X86-NEXT: movl %ecx, 20(%eax)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
; X86-NEXT: movl %ecx, 24(%eax) ; X86-NEXT: movl %ecx, 24(%eax)
; X86-NEXT: setne %al ; X86-NEXT: setne %al
; X86-NEXT: addl $156, %esp ; X86-NEXT: addl $152, %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx ; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
%t = call {i256, i1} @llvm.smul.with.overflow.i256(i256 %v1, i256 %v2) %t = call {i256, i1} @llvm.smul.with.overflow.i256(i256 %v1, i256 %v2)
%val = extractvalue {i256, i1} %t, 0 %val = extractvalue {i256, i1} %t, 0
%obit = extractvalue {i256, i1} %t, 1 %obit = extractvalue {i256, i1} %t, 1
store i256 %val, ptr %res store i256 %val, ptr %res
ret i1 %obit ret i1 %obit
} }
declare {i128, i1} @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone declare {i128, i1} @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone
declare {i256, i1} @llvm.smul.with.overflow.i256(i256, i256) nounwind readnone declare {i256, i1} @llvm.smul.with.overflow.i256(i256, i256) nounwind readnone

llvm/test/CodeGen/X86/sse-regcall.ll

Show First 20 Lines • Show All 190 Lines • ▼ Show 20 Lines
} }
;test calling conventions - input parameters, callee saved GPRs ;test calling conventions - input parameters, callee saved GPRs
define x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, define x86_regcallcc i32 @testi32_inp(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6,
; WIN32-LABEL: testi32_inp: ; WIN32-LABEL: testi32_inp:
; WIN32: # %bb.0: ; WIN32: # %bb.0:
; WIN32-NEXT: pushl %ebp ; WIN32-NEXT: pushl %ebp
; WIN32-NEXT: pushl %ebx ; WIN32-NEXT: pushl %ebx
; WIN32-NEXT: subl $12, %esp ; WIN32-NEXT: subl $16, %esp
; WIN32-NEXT: movl %esi, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %esi, (%esp) # 4-byte Spill
; WIN32-NEXT: movl %edi, %esi ; WIN32-NEXT: movl %edi, %esi
; WIN32-NEXT: movl %edx, %ebx ; WIN32-NEXT: movl %edx, %ebx
; WIN32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl %eax, %edi ; WIN32-NEXT: movl %eax, %edi
; WIN32-NEXT: leal (%edx,%esi), %eax ; WIN32-NEXT: leal (%edx,%esi), %eax
; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: subl %esi, %ebx ; WIN32-NEXT: subl %esi, %ebx
; WIN32-NEXT: movl %edi, %eax ; WIN32-NEXT: movl %edi, %eax
; WIN32-NEXT: subl %ecx, %eax ; WIN32-NEXT: subl %ecx, %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %ebp, %ecx
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: imull %eax, %ecx ; WIN32-NEXT: imull %eax, %ecx
; WIN32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi
; WIN32-NEXT: movl %esi, %eax ; WIN32-NEXT: movl %esi, %edx
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: subl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: imull %ebx, %eax ; WIN32-NEXT: imull %ebx, %edx
; WIN32-NEXT: addl %ecx, %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: movl (%esp), %ebx # 4-byte Reload ; WIN32-NEXT: movl (%esp), %ebx # 4-byte Reload
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ebx ; WIN32-NEXT: subl %ebp, %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %edx, %ecx ; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: subl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: imull %ebx, %ecx ; WIN32-NEXT: imull %ebx, %ecx
; WIN32-NEXT: addl %eax, %ecx ; WIN32-NEXT: addl %edx, %ecx
; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: addl (%esp), %ebp # 4-byte Folded Reload
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %ebp ; WIN32-NEXT: addl {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: imull %ebp, %edi ; WIN32-NEXT: imull %edx, %edi
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %esi ; WIN32-NEXT: addl {{[0-9]+}}(%esp), %esi
; WIN32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; WIN32-NEXT: imull {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; WIN32-NEXT: addl %esi, %edi ; WIN32-NEXT: addl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: addl {{[0-9]+}}(%esp), %edx ; WIN32-NEXT: imull %ebp, %eax
; WIN32-NEXT: imull %eax, %edx ; WIN32-NEXT: addl %esi, %eax
; WIN32-NEXT: addl %edx, %edi ; WIN32-NEXT: addl %eax, %edi
; WIN32-NEXT: addl %ecx, %edi ; WIN32-NEXT: addl %ecx, %edi
; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; WIN32-NEXT: movl %edi, %eax ; WIN32-NEXT: movl %edi, %eax
; WIN32-NEXT: addl $12, %esp ; WIN32-NEXT: addl $16, %esp
; WIN32-NEXT: popl %ebx ; WIN32-NEXT: popl %ebx
; WIN32-NEXT: popl %ebp ; WIN32-NEXT: popl %ebp
; WIN32-NEXT: retl ; WIN32-NEXT: retl
; ;
; WIN64-LABEL: testi32_inp: ; WIN64-LABEL: testi32_inp:
; WIN64: # %bb.0: ; WIN64: # %bb.0:
; WIN64-NEXT: pushq %rbx ; WIN64-NEXT: pushq %rbx
; WIN64-NEXT: # kill: def $edx killed $edx def $rdx ; WIN64-NEXT: # kill: def $edx killed $edx def $rdx
Show All 17 Lines
; WIN64-NEXT: subl %r10d, %r9d ; WIN64-NEXT: subl %r10d, %r9d
; WIN64-NEXT: movl %eax, %r10d ; WIN64-NEXT: movl %eax, %r10d
; WIN64-NEXT: subl %ecx, %r10d ; WIN64-NEXT: subl %ecx, %r10d
; WIN64-NEXT: imull %r10d, %r9d ; WIN64-NEXT: imull %r10d, %r9d
; WIN64-NEXT: leal (%r11,%r12), %r10d ; WIN64-NEXT: leal (%r11,%r12), %r10d
; WIN64-NEXT: # kill: def $r11d killed $r11d killed $r11 ; WIN64-NEXT: # kill: def $r11d killed $r11d killed $r11
; WIN64-NEXT: subl %r12d, %r11d ; WIN64-NEXT: subl %r12d, %r11d
; WIN64-NEXT: imull %edx, %r11d ; WIN64-NEXT: imull %edx, %r11d
; WIN64-NEXT: addl %r9d, %r11d
; WIN64-NEXT: leal (%r14,%r15), %edx ; WIN64-NEXT: leal (%r14,%r15), %edx
; WIN64-NEXT: movl %r14d, %r9d ; WIN64-NEXT: # kill: def $r14d killed $r14d killed $r14
; WIN64-NEXT: subl %r15d, %r9d ; WIN64-NEXT: subl %r15d, %r14d
; WIN64-NEXT: imull %esi, %r9d ; WIN64-NEXT: imull %esi, %r14d
; WIN64-NEXT: addl %r11d, %r9d ; WIN64-NEXT: addl %r11d, %r14d
; WIN64-NEXT: addl %ecx, %eax ; WIN64-NEXT: addl %ecx, %eax
; WIN64-NEXT: imull %r8d, %eax ; WIN64-NEXT: imull %r8d, %eax
; WIN64-NEXT: imull %ebx, %r10d ; WIN64-NEXT: imull %ebx, %r10d
; WIN64-NEXT: addl %r10d, %eax
; WIN64-NEXT: imull %edi, %edx ; WIN64-NEXT: imull %edi, %edx
; WIN64-NEXT: addl %r10d, %edx
; WIN64-NEXT: addl %edx, %eax ; WIN64-NEXT: addl %edx, %eax
; WIN64-NEXT: addl %r14d, %eax
; WIN64-NEXT: addl %r9d, %eax ; WIN64-NEXT: addl %r9d, %eax
; WIN64-NEXT: popq %rbx ; WIN64-NEXT: popq %rbx
; WIN64-NEXT: retq ; WIN64-NEXT: retq
; ;
; LINUXOSX-LABEL: testi32_inp: ; LINUXOSX-LABEL: testi32_inp:
; LINUXOSX: # %bb.0: ; LINUXOSX: # %bb.0:
; LINUXOSX-NEXT: # kill: def $edx killed $edx def $rdx ; LINUXOSX-NEXT: # kill: def $edx killed $edx def $rdx
; LINUXOSX-NEXT: # kill: def $esi killed $esi def $rsi ; LINUXOSX-NEXT: # kill: def $esi killed $esi def $rsi
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; LINUXOSX-NEXT: # kill: def $r9d killed $r9d killed $r9 ; LINUXOSX-NEXT: # kill: def $r9d killed $r9d killed $r9
; LINUXOSX-NEXT: subl %r12d, %r9d ; LINUXOSX-NEXT: subl %r12d, %r9d
; LINUXOSX-NEXT: movl %eax, %r11d ; LINUXOSX-NEXT: movl %eax, %r11d
; LINUXOSX-NEXT: subl %ecx, %r11d ; LINUXOSX-NEXT: subl %ecx, %r11d
; LINUXOSX-NEXT: imull %r11d, %r9d ; LINUXOSX-NEXT: imull %r11d, %r9d
; LINUXOSX-NEXT: leal (%r13,%r14), %r11d ; LINUXOSX-NEXT: leal (%r13,%r14), %r11d
; LINUXOSX-NEXT: movl %r13d, %r12d ; LINUXOSX-NEXT: movl %r13d, %r12d
; LINUXOSX-NEXT: subl %r14d, %r12d ; LINUXOSX-NEXT: subl %r14d, %r12d
; LINUXOSX-NEXT: movl {{[0-9]+}}(%rsp), %r14d
; LINUXOSX-NEXT: imull %edx, %r12d ; LINUXOSX-NEXT: imull %edx, %r12d
; LINUXOSX-NEXT: movl {{[0-9]+}}(%rsp), %edx ; LINUXOSX-NEXT: movl %r15d, %edx
; LINUXOSX-NEXT: addl %r9d, %r12d ; LINUXOSX-NEXT: subl %r14d, %edx
; LINUXOSX-NEXT: movl %r15d, %r9d ; LINUXOSX-NEXT: imull %esi, %edx
; LINUXOSX-NEXT: subl %edx, %r9d ; LINUXOSX-NEXT: addl %r12d, %edx
; LINUXOSX-NEXT: imull %esi, %r9d
; LINUXOSX-NEXT: addl %r12d, %r9d
; LINUXOSX-NEXT: addl %ecx, %eax ; LINUXOSX-NEXT: addl %ecx, %eax
; LINUXOSX-NEXT: imull %r8d, %eax ; LINUXOSX-NEXT: imull %r8d, %eax
; LINUXOSX-NEXT: imull %r10d, %r11d ; LINUXOSX-NEXT: imull %r10d, %r11d
; LINUXOSX-NEXT: addl %r11d, %eax ; LINUXOSX-NEXT: addl %r15d, %r14d
; LINUXOSX-NEXT: addl %r15d, %edx ; LINUXOSX-NEXT: imull %edi, %r14d
; LINUXOSX-NEXT: imull %edi, %edx ; LINUXOSX-NEXT: addl %r11d, %r14d
; LINUXOSX-NEXT: addl %r14d, %eax
; LINUXOSX-NEXT: addl %edx, %eax ; LINUXOSX-NEXT: addl %edx, %eax
; LINUXOSX-NEXT: addl %r9d, %eax ; LINUXOSX-NEXT: addl %r9d, %eax
; LINUXOSX-NEXT: retq ; LINUXOSX-NEXT: retq
i32 %b1, i32 %b2, i32 %b3, i32 %b4, i32 %b5, i32 %b6) nounwind { i32 %b1, i32 %b2, i32 %b3, i32 %b4, i32 %b5, i32 %b6) nounwind {
%x1 = sub i32 %a1, %a2 %x1 = sub i32 %a1, %a2
%x2 = sub i32 %a3, %a4 %x2 = sub i32 %a3, %a4
%x3 = sub i32 %a5, %a6 %x3 = sub i32 %a5, %a6
%y1 = sub i32 %b1, %b2 %y1 = sub i32 %b1, %b2
▲ Show 20 Lines • Show All 131 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/stack-clash-large.ll

Show First 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; CHECK-X64-NEXT: cmpq %r11, %rsp ; CHECK-X64-NEXT: cmpq %r11, %rsp
; CHECK-X64-NEXT: jne .LBB1_1 ; CHECK-X64-NEXT: jne .LBB1_1
; CHECK-X64-NEXT: # %bb.2: ; CHECK-X64-NEXT: # %bb.2:
; CHECK-X64-NEXT: subq $2240, %rsp # imm = 0x8C0 ; CHECK-X64-NEXT: subq $2240, %rsp # imm = 0x8C0
; CHECK-X64-NEXT: .cfi_def_cfa_register %rsp ; CHECK-X64-NEXT: .cfi_def_cfa_register %rsp
; CHECK-X64-NEXT: .cfi_def_cfa_offset 71888 ; CHECK-X64-NEXT: .cfi_def_cfa_offset 71888
; CHECK-X64-NEXT: .cfi_offset %rax, -16 ; CHECK-X64-NEXT: .cfi_offset %rax, -16
; CHECK-X64-NEXT: movl 71888(%rsp), %eax ; CHECK-X64-NEXT: movl 71888(%rsp), %eax
; CHECK-X64-NEXT: addl %esi, %edi
; CHECK-X64-NEXT: addl %ecx, %edx ; CHECK-X64-NEXT: addl %ecx, %edx
; CHECK-X64-NEXT: addl %edi, %edx
; CHECK-X64-NEXT: addl %r9d, %r8d
; CHECK-X64-NEXT: addl 71896(%rsp), %eax ; CHECK-X64-NEXT: addl 71896(%rsp), %eax
; CHECK-X64-NEXT: addl %esi, %edx
; CHECK-X64-NEXT: addl %r9d, %eax
; CHECK-X64-NEXT: addl %r8d, %eax ; CHECK-X64-NEXT: addl %r8d, %eax
; CHECK-X64-NEXT: addl %edx, %eax ; CHECK-X64-NEXT: addl %edx, %eax
; CHECK-X64-NEXT: addl %edi, %eax
; CHECK-X64-NEXT: movl %eax, 264(%rsp) ; CHECK-X64-NEXT: movl %eax, 264(%rsp)
; CHECK-X64-NEXT: movl %eax, 28664(%rsp) ; CHECK-X64-NEXT: movl %eax, 28664(%rsp)
; CHECK-X64-NEXT: addq $71872, %rsp # imm = 0x118C0 ; CHECK-X64-NEXT: addq $71872, %rsp # imm = 0x118C0
; CHECK-X64-NEXT: .cfi_def_cfa_offset 16 ; CHECK-X64-NEXT: .cfi_def_cfa_offset 16
; CHECK-X64-NEXT: popq %rax ; CHECK-X64-NEXT: popq %rax
; CHECK-X64-NEXT: .cfi_def_cfa_offset 8 ; CHECK-X64-NEXT: .cfi_def_cfa_offset 8
; CHECK-X64-NEXT: retq ; CHECK-X64-NEXT: retq
; ;
Show All 20 Lines
; CHECK-X86-NEXT: subl $2380, %esp # imm = 0x94C ; CHECK-X86-NEXT: subl $2380, %esp # imm = 0x94C
; CHECK-X86-NEXT: .cfi_def_cfa_register %esp ; CHECK-X86-NEXT: .cfi_def_cfa_register %esp
; CHECK-X86-NEXT: .cfi_def_cfa_offset 72032 ; CHECK-X86-NEXT: .cfi_def_cfa_offset 72032
; CHECK-X86-NEXT: .cfi_offset %eax, -20 ; CHECK-X86-NEXT: .cfi_offset %eax, -20
; CHECK-X86-NEXT: .cfi_offset %ecx, -16 ; CHECK-X86-NEXT: .cfi_offset %ecx, -16
; CHECK-X86-NEXT: .cfi_offset %edx, -12 ; CHECK-X86-NEXT: .cfi_offset %edx, -12
; CHECK-X86-NEXT: .cfi_offset %esi, -8 ; CHECK-X86-NEXT: .cfi_offset %esi, -8
; CHECK-X86-NEXT: movl 72056(%esp), %eax ; CHECK-X86-NEXT: movl 72056(%esp), %eax
; CHECK-X86-NEXT: movl 72048(%esp), %edx ; CHECK-X86-NEXT: movl 72048(%esp), %ecx
; CHECK-X86-NEXT: movl 72040(%esp), %ecx ; CHECK-X86-NEXT: movl 72040(%esp), %edx
; CHECK-X86-NEXT: movl 72032(%esp), %esi ; CHECK-X86-NEXT: movl 72032(%esp), %esi
; CHECK-X86-NEXT: addl 72036(%esp), %esi ; CHECK-X86-NEXT: addl 72036(%esp), %esi
; CHECK-X86-NEXT: addl 72044(%esp), %ecx ; CHECK-X86-NEXT: addl 72044(%esp), %edx
; CHECK-X86-NEXT: addl %esi, %ecx ; CHECK-X86-NEXT: addl 72052(%esp), %ecx
; CHECK-X86-NEXT: addl 72052(%esp), %edx
; CHECK-X86-NEXT: addl 72060(%esp), %eax ; CHECK-X86-NEXT: addl 72060(%esp), %eax
; CHECK-X86-NEXT: addl %edx, %eax
; CHECK-X86-NEXT: addl %ecx, %eax ; CHECK-X86-NEXT: addl %ecx, %eax
; CHECK-X86-NEXT: addl %edx, %eax
; CHECK-X86-NEXT: addl %esi, %eax
; CHECK-X86-NEXT: movl %eax, 392(%esp) ; CHECK-X86-NEXT: movl %eax, 392(%esp)
; CHECK-X86-NEXT: movl %eax, 28792(%esp) ; CHECK-X86-NEXT: movl %eax, 28792(%esp)
; CHECK-X86-NEXT: addl $72012, %esp # imm = 0x1194C ; CHECK-X86-NEXT: addl $72012, %esp # imm = 0x1194C
; CHECK-X86-NEXT: .cfi_def_cfa_offset 20 ; CHECK-X86-NEXT: .cfi_def_cfa_offset 20
; CHECK-X86-NEXT: popl %eax ; CHECK-X86-NEXT: popl %eax
; CHECK-X86-NEXT: .cfi_def_cfa_offset 16 ; CHECK-X86-NEXT: .cfi_def_cfa_offset 16
; CHECK-X86-NEXT: popl %ecx ; CHECK-X86-NEXT: popl %ecx
; CHECK-X86-NEXT: .cfi_def_cfa_offset 12 ; CHECK-X86-NEXT: .cfi_def_cfa_offset 12
Show All 17 Lines
; CHECK-X32-NEXT: cmpl %r11d, %esp ; CHECK-X32-NEXT: cmpl %r11d, %esp
; CHECK-X32-NEXT: jne .LBB1_1 ; CHECK-X32-NEXT: jne .LBB1_1
; CHECK-X32-NEXT: # %bb.2: ; CHECK-X32-NEXT: # %bb.2:
; CHECK-X32-NEXT: subl $2240, %esp # imm = 0x8C0 ; CHECK-X32-NEXT: subl $2240, %esp # imm = 0x8C0
; CHECK-X32-NEXT: .cfi_def_cfa_register %rsp ; CHECK-X32-NEXT: .cfi_def_cfa_register %rsp
; CHECK-X32-NEXT: .cfi_def_cfa_offset 71888 ; CHECK-X32-NEXT: .cfi_def_cfa_offset 71888
; CHECK-X32-NEXT: .cfi_offset %rax, -16 ; CHECK-X32-NEXT: .cfi_offset %rax, -16
; CHECK-X32-NEXT: movl 71888(%esp), %eax ; CHECK-X32-NEXT: movl 71888(%esp), %eax
; CHECK-X32-NEXT: addl %esi, %edi
; CHECK-X32-NEXT: addl %ecx, %edx ; CHECK-X32-NEXT: addl %ecx, %edx
; CHECK-X32-NEXT: addl %edi, %edx
; CHECK-X32-NEXT: addl %r9d, %r8d
; CHECK-X32-NEXT: addl 71896(%esp), %eax ; CHECK-X32-NEXT: addl 71896(%esp), %eax
; CHECK-X32-NEXT: addl %esi, %edx
; CHECK-X32-NEXT: addl %r9d, %eax
; CHECK-X32-NEXT: addl %r8d, %eax ; CHECK-X32-NEXT: addl %r8d, %eax
; CHECK-X32-NEXT: addl %edx, %eax ; CHECK-X32-NEXT: addl %edx, %eax
; CHECK-X32-NEXT: addl %edi, %eax
; CHECK-X32-NEXT: movl %eax, 264(%esp) ; CHECK-X32-NEXT: movl %eax, 264(%esp)
; CHECK-X32-NEXT: movl %eax, 28664(%esp) ; CHECK-X32-NEXT: movl %eax, 28664(%esp)
; CHECK-X32-NEXT: addl $71872, %esp # imm = 0x118C0 ; CHECK-X32-NEXT: addl $71872, %esp # imm = 0x118C0
; CHECK-X32-NEXT: .cfi_def_cfa_offset 16 ; CHECK-X32-NEXT: .cfi_def_cfa_offset 16
; CHECK-X32-NEXT: popq %rax ; CHECK-X32-NEXT: popq %rax
; CHECK-X32-NEXT: .cfi_def_cfa_offset 8 ; CHECK-X32-NEXT: .cfi_def_cfa_offset 8
; CHECK-X32-NEXT: retq ; CHECK-X32-NEXT: retq
%all = alloca i32, i64 18000, align 16 %all = alloca i32, i64 18000, align 16
Show All 15 Lines

llvm/test/CodeGen/X86/statepoint-live-in.ll

Show First 20 Lines • Show All 436 Lines • ▼ Show 20 Lines
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl %edi, %ebx ; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: movl %esi, %r15d ; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edx, %r12d ; CHECK-NEXT: movl %edx, %r12d
; CHECK-NEXT: movl %ecx, %r13d ; CHECK-NEXT: movl %ecx, %r13d
; CHECK-NEXT: movl %r8d, %ebp ; CHECK-NEXT: movl %r8d, %r14d
; CHECK-NEXT: movl %r9d, %r14d ; CHECK-NEXT: movl %r9d, %r15d
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: callq _bar ## 160-byte Folded Reload ; CHECK-NEXT: callq _bar ## 160-byte Folded Reload
; CHECK-NEXT: Ltmp13: ; CHECK-NEXT: Ltmp13:
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: addq %r12, %rbx ; CHECK-NEXT: addq %r12, %rbx
; CHECK-NEXT: addq %r13, %rbx ; CHECK-NEXT: addq %r13, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: addq %r14, %rbx ; CHECK-NEXT: addq %r14, %rbx
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
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; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: movq %rbx, %rax ; CHECK-NEXT: movq %rbx, %rax
; CHECK-NEXT: addq $168, %rsp ; CHECK-NEXT: addq $168, %rsp
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %r12 ; CHECK-NEXT: popq %r12
; CHECK-NEXT: popq %r13 ; CHECK-NEXT: popq %r13
; CHECK-NEXT: popq %r14 ; CHECK-NEXT: popq %r14
; CHECK-NEXT: popq %r15 ; CHECK-NEXT: popq %r15
; CHECK-NEXT: popq %rbp ; CHECK-NEXT: popq %rbp
▲ Show 20 Lines • Show All 149 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/statepoint-regs.ll

Show First 20 Lines • Show All 548 Lines • ▼ Show 20 Lines
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl %edi, %ebx ; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: movl %esi, %r15d ; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edx, %r12d ; CHECK-NEXT: movl %edx, %r12d
; CHECK-NEXT: movl %ecx, %r13d ; CHECK-NEXT: movl %ecx, %r13d
; CHECK-NEXT: movl %r8d, %ebp ; CHECK-NEXT: movl %r8d, %r14d
; CHECK-NEXT: movl %r9d, %r14d ; CHECK-NEXT: movl %r9d, %r15d
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill ; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
; CHECK-NEXT: callq _bar ## 160-byte Folded Reload ; CHECK-NEXT: callq _bar ## 160-byte Folded Reload
; CHECK-NEXT: Ltmp14: ; CHECK-NEXT: Ltmp14:
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: addq %r12, %rbx ; CHECK-NEXT: addq %r12, %rbx
; CHECK-NEXT: addq %r13, %rbx ; CHECK-NEXT: addq %r13, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: addq %r14, %rbx ; CHECK-NEXT: addq %r14, %rbx
; CHECK-NEXT: addq %r15, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
Show All 24 Lines
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: addq %rax, %rbx ; CHECK-NEXT: addq %rax, %rbx
; CHECK-NEXT: addq %rbp, %rbx
; CHECK-NEXT: movq %rbx, %rax ; CHECK-NEXT: movq %rbx, %rax
; CHECK-NEXT: addq $168, %rsp ; CHECK-NEXT: addq $168, %rsp
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %r12 ; CHECK-NEXT: popq %r12
; CHECK-NEXT: popq %r13 ; CHECK-NEXT: popq %r13
; CHECK-NEXT: popq %r14 ; CHECK-NEXT: popq %r14
; CHECK-NEXT: popq %r15 ; CHECK-NEXT: popq %r15
; CHECK-NEXT: popq %rbp ; CHECK-NEXT: popq %rbp
▲ Show 20 Lines • Show All 278 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/swift-return.ll

Show First 20 Lines • Show All 141 Lines • ▼ Show 20 Lines
; %edx, %ecx, %r8d. ; %edx, %ecx, %r8d.
define dso_local i32 @test3(i32 %key) #0 { define dso_local i32 @test3(i32 %key) #0 {
; CHECK-LABEL: test3: ; CHECK-LABEL: test3:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)
; CHECK-NEXT: callq gen3@PLT ; CHECK-NEXT: callq gen3@PLT
; CHECK-NEXT: addl %edx, %eax ; CHECK-NEXT: # kill: def $edx killed $edx def $rdx
; CHECK-NEXT: # kill: def $ecx killed $ecx def $rcx
; CHECK-NEXT: addl %edx, %ecx
; CHECK-NEXT: addl %r8d, %ecx
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %r8d, %eax
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK-O0-LABEL: test3: ; CHECK-O0-LABEL: test3:
; CHECK-O0: # %bb.0: # %entry ; CHECK-O0: # %bb.0: # %entry
; CHECK-O0-NEXT: pushq %rax ; CHECK-O0-NEXT: pushq %rax
; CHECK-O0-NEXT: .cfi_def_cfa_offset 16 ; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
▲ Show 20 Lines • Show All 192 Lines • ▼ Show 20 Lines
; CHECK-LABEL: test6: ; CHECK-LABEL: test6:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq gen6@PLT ; CHECK-NEXT: callq gen6@PLT
; CHECK-NEXT: addsd %xmm1, %xmm0 ; CHECK-NEXT: addsd %xmm1, %xmm0
; CHECK-NEXT: addsd %xmm2, %xmm0 ; CHECK-NEXT: addsd %xmm2, %xmm0
; CHECK-NEXT: addsd %xmm3, %xmm0 ; CHECK-NEXT: addsd %xmm3, %xmm0
; CHECK-NEXT: addq %rdx, %rax ; CHECK-NEXT: addq %rdx, %rcx
; CHECK-NEXT: addq %r8, %rcx
; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: addq %r8, %rax
; CHECK-NEXT: popq %rcx ; CHECK-NEXT: popq %rcx
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK-O0-LABEL: test6: ; CHECK-O0-LABEL: test6:
; CHECK-O0: # %bb.0: # %entry ; CHECK-O0: # %bb.0: # %entry
; CHECK-O0-NEXT: pushq %rax ; CHECK-O0-NEXT: pushq %rax
; CHECK-O0-NEXT: .cfi_def_cfa_offset 16 ; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
▲ Show 20 Lines • Show All 222 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/twoaddr-lea.ll

Show All 25 Lines
} }
; rdar://8977508 ; rdar://8977508
; The second add should not be transformed to leal nor should it be ; The second add should not be transformed to leal nor should it be
; commutted (which would require inserting a copy). ; commutted (which would require inserting a copy).
define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind { define i32 @test2(i32 inreg %a, i32 inreg %b, i32 %c, i32 %d) nounwind {
; CHECK-LABEL: test2: ; CHECK-LABEL: test2:
; CHECK: ## %bb.0: ## %entry ; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: ## kill: def $ecx killed $ecx def $rcx
; CHECK-NEXT: ## kill: def $edx killed $edx def $rdx
; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi ; CHECK-NEXT: ## kill: def $esi killed $esi def $rsi
; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi ; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi
; CHECK-NEXT: leal (%rdi,%rsi), %eax ; CHECK-NEXT: addl %edi, %esi
; CHECK-NEXT: addl %edx, %eax ; CHECK-NEXT: leal (%rdx,%rcx), %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %esi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%add = add i32 %b, %a %add = add i32 %b, %a
%add3 = add i32 %add, %c %add3 = add i32 %add, %c
%add5 = add i32 %add3, %d %add5 = add i32 %add3, %d
ret i32 %add5 ret i32 %add5
} }
▲ Show 20 Lines • Show All 117 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/umul-with-overflow.ll

Show First 20 Lines • Show All 87 Lines • ▼ Show 20 Lines
; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %esi, %ebp ; X86-NEXT: addl %esi, %ebp
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ebx, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %ecx, %ebx ; X86-NEXT: movl %ecx, %ebx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %edi, %esi ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
Show All 19 Lines
; X86-NEXT: adcl %ebp, %ebx ; X86-NEXT: adcl %ebp, %ebx
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %ebx, %esi ; X86-NEXT: addl %ebx, %esi
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: addl (%esp), %esi # 4-byte Folded Reload
; X86-NEXT: adcl (%esp), %edx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, (%esp) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edi, (%esp) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
Show All 12 Lines
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ebp, %ebx ; X86-NEXT: addl %ebp, %ebx
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ecx ; X86-NEXT: adcl %eax, %ecx
; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: addl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl (%esp), %edi # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: adcl (%esp), %ecx # 4-byte Folded Reload
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: setb (%esp) # 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %esi, %ebp ; X86-NEXT: addl %esi, %ebp
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: adcl %edi, %esi ; X86-NEXT: adcl %edi, %esi
; X86-NEXT: setb (%esp) # 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp) ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: addl %esi, %eax ; X86-NEXT: addl %esi, %eax
; X86-NEXT: movzbl (%esp), %esi # 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 1-byte Folded Reload
; X86-NEXT: adcl %esi, %edx ; X86-NEXT: adcl %esi, %edx
; X86-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl %ecx, %ebp ; X86-NEXT: adcl %ecx, %ebp
; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 1-byte Folded Reload ; X86-NEXT: movzbl (%esp), %ecx # 1-byte Folded Reload
; X86-NEXT: adcl %ecx, %eax ; X86-NEXT: adcl %ecx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %edx ; X86-NEXT: adcl $0, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ecx, %ebx ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %edi, %eax ; X86-NEXT: movl %ebx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: setb %bl
; X86-NEXT: movl %ebp, %eax
; X86-NEXT: mull %edi
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: mull %ebp ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %ebx
; X86-NEXT: addl %edi, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: adcl %esi, %ebx
; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ebp ; X86-NEXT: mull %ebp
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %ecx, %ebx
; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %edi, %ebp
; X86-NEXT: movl %edi, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: mull %edi
; X86-NEXT: movl %edx, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: movl %edx, %esi
; X86-NEXT: setb %bl ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: mull %ecx
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: mull %edi ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %ecx, %eax ; X86-NEXT: addl %esi, %ebp
; X86-NEXT: movzbl %bl, %ecx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: adcl %ecx, %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %edx, %esi
; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: setb %bl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %esi, %ecx
; X86-NEXT: movzbl %bl, %eax
; X86-NEXT: adcl %eax, %edx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, (%esp) # 4-byte Folded Spill ; X86-NEXT: adcl $0, (%esp) # 4-byte Folded Spill
; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl $0, %edi
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %edi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ecx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %esi, %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %edi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %esi ; X86-NEXT: movl %edx, %esi
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ebx, %edi
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: movl %ebp, %eax ; X86-NEXT: movl %ebp, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebp ; X86-NEXT: movl %edx, %ebp
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %edi, %eax
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: adcl %esi, %ebp ; X86-NEXT: adcl %esi, %ebp
; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill ; X86-NEXT: setb {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ebx
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %esi ; X86-NEXT: movl %eax, %esi
; X86-NEXT: addl %ebp, %esi ; X86-NEXT: addl %ebp, %esi
; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload ; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
; X86-NEXT: adcl %eax, %ebx ; X86-NEXT: adcl %eax, %ebx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Folded Reload ; X86-NEXT: addl %ecx, %ebp
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: addl (%esp), %esi # 4-byte Folded Reload ; X86-NEXT: addl (%esp), %esi # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %edx, %ecx ; X86-NEXT: imull %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %edi
; X86-NEXT: imull {{[0-9]+}}(%esp), %edi
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: movl %eax, %edx ; X86-NEXT: movl %eax, %edx
; X86-NEXT: addl %esi, %edx ; X86-NEXT: addl %esi, %edx
; X86-NEXT: adcl %ebx, %edi ; X86-NEXT: adcl %ebx, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: addl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: adcl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
Show All 34 Lines
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %ebx ; X86-NEXT: movl %edx, %ebx
; X86-NEXT: movl %eax, %ebp ; X86-NEXT: movl %eax, %ebp
; X86-NEXT: addl %edi, %ebp ; X86-NEXT: addl %edi, %ebp
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %edx, %edi ; X86-NEXT: movl %edx, %edi
; X86-NEXT: addl %ebp, %eax ; X86-NEXT: addl %ebp, %eax
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl %ebx, %edi ; X86-NEXT: adcl %ebx, %edi
; X86-NEXT: setb %cl ; X86-NEXT: setb %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %edi, %ebx ; X86-NEXT: addl %edi, %ebx
; X86-NEXT: movzbl %cl, %eax ; X86-NEXT: movzbl %cl, %eax
; X86-NEXT: adcl %eax, %edx ; X86-NEXT: adcl %eax, %edx
Show All 31 Lines
; X86-NEXT: adcl %eax, %edi ; X86-NEXT: adcl %eax, %edi
; X86-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill ; X86-NEXT: addl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %esi ; X86-NEXT: adcl $0, %esi
; X86-NEXT: adcl $0, %edi ; X86-NEXT: adcl $0, %edi
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: imull %ecx, %ebp ; X86-NEXT: imull %ecx, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl %ebx, %eax
; X86-NEXT: mull %ecx ; X86-NEXT: mull %ecx
; X86-NEXT: movl %eax, %ecx ; X86-NEXT: movl %eax, %ecx
; X86-NEXT: addl %edx, %ebp ; X86-NEXT: addl %edx, %ebx
; X86-NEXT: imull {{[0-9]+}}(%esp), %ebx
; X86-NEXT: addl %ebp, %ebx ; X86-NEXT: addl %ebp, %ebx
; X86-NEXT: addl %esi, %ecx ; X86-NEXT: addl %esi, %ecx
; X86-NEXT: adcl %edi, %ebx ; X86-NEXT: adcl %edi, %ebx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl (%esp), %eax # 4-byte Reload ; X86-NEXT: movl (%esp), %eax # 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, (%esp) # 4-byte Spill ; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ecx ; X86-NEXT: adcl $0, %ecx
; X86-NEXT: adcl $0, %ebx ; X86-NEXT: adcl $0, %ebx
; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp ; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %edx, %ebp ; X86-NEXT: imull %edx, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: movl %eax, %edi ; X86-NEXT: movl %eax, %edi
; X86-NEXT: addl %edx, %ebp ; X86-NEXT: addl %edx, %esi
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: addl %ebp, %esi ; X86-NEXT: addl %ebp, %esi
; X86-NEXT: addl %ecx, %edi ; X86-NEXT: addl %ecx, %edi
; X86-NEXT: adcl %ebx, %esi ; X86-NEXT: adcl %ebx, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %edx, %ecx ; X86-NEXT: imull %edx, %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %esi, %eax
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: movl %eax, %ebx ; X86-NEXT: movl %eax, %ebx
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: addl %edx, %esi
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: addl %ecx, %esi ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: imull %edx, %ebp ; X86-NEXT: imull %edx, %ebp
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: addl %edx, %ebp ; X86-NEXT: addl %edx, %ecx
; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ebp, %ecx ; X86-NEXT: addl %ebp, %ecx
; X86-NEXT: addl %ebx, %eax ; X86-NEXT: addl %ebx, %eax
; X86-NEXT: adcl %esi, %ecx ; X86-NEXT: adcl %esi, %ecx
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %edi, %eax
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload ; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 4(%edx) ; X86-NEXT: movl %esi, 4(%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, (%edx) ; X86-NEXT: movl %esi, (%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 8(%edx) ; X86-NEXT: movl %esi, 8(%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 12(%edx) ; X86-NEXT: movl %esi, 12(%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 16(%edx)
; X86-NEXT: movl (%esp), %esi # 4-byte Reload ; X86-NEXT: movl (%esp), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 16(%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 20(%edx) ; X86-NEXT: movl %esi, 20(%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 24(%edx) ; X86-NEXT: movl %esi, 24(%edx)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload ; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: movl %esi, 28(%edx) ; X86-NEXT: movl %esi, 28(%edx)
; X86-NEXT: movl %eax, 32(%edx) ; X86-NEXT: movl %eax, 32(%edx)
; X86-NEXT: andl $4095, %ecx # imm = 0xFFF ; X86-NEXT: andl $4095, %ecx # imm = 0xFFF
; X86-NEXT: movw %cx, 36(%edx) ; X86-NEXT: movw %cx, 36(%edx)
Show All 10 Lines
; X64-NEXT: pushq %rbp ; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %r15 ; X64-NEXT: pushq %r15
; X64-NEXT: pushq %r14 ; X64-NEXT: pushq %r14
; X64-NEXT: pushq %r13 ; X64-NEXT: pushq %r13
; X64-NEXT: pushq %r12 ; X64-NEXT: pushq %r12
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %rbx
; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r8, %r11 ; X64-NEXT: movq %r8, %r11
; X64-NEXT: movq %rdx, %r10 ; X64-NEXT: movq %rdx, %r8
; X64-NEXT: movq {{[0-9]+}}(%rsp), %r8 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %r10
; X64-NEXT: movq {{[0-9]+}}(%rsp), %r9 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %r9
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r10
; X64-NEXT: movq %rdx, %rbx ; X64-NEXT: movq %rdx, %rbx
; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r10
; X64-NEXT: movq %r8, %rbp ; X64-NEXT: movq %r10, %rbp
; X64-NEXT: movq %rdx, %r14 ; X64-NEXT: movq %rdx, %r14
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r15
; X64-NEXT: addq %rbx, %r15 ; X64-NEXT: addq %rbx, %r15
; X64-NEXT: adcq $0, %r14 ; X64-NEXT: adcq $0, %r14
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %rbx ; X64-NEXT: movq %rax, %rbx
; X64-NEXT: addq %r15, %rbx ; X64-NEXT: addq %r15, %rbx
; X64-NEXT: adcq %r14, %r12 ; X64-NEXT: adcq %r14, %r12
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: movzbl %al, %r8d ; X64-NEXT: movzbl %al, %r10d
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r15 ; X64-NEXT: movq %rdx, %r15
; X64-NEXT: movq %rax, %r13 ; X64-NEXT: movq %rax, %r13
; X64-NEXT: addq %r12, %r13 ; X64-NEXT: addq %r12, %r13
; X64-NEXT: adcq %r8, %r15 ; X64-NEXT: adcq %r10, %r15
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rdx, %r12 ; X64-NEXT: movq %rdx, %r12
; X64-NEXT: movq %rax, %r14 ; X64-NEXT: movq %rax, %r14
; X64-NEXT: movq %r11, %rax ; X64-NEXT: movq %r11, %rax
; X64-NEXT: mulq %rbp ; X64-NEXT: mulq %rbp
; X64-NEXT: movq %rdx, %rbp ; X64-NEXT: movq %rdx, %rbp
; X64-NEXT: movq %rax, %r8 ; X64-NEXT: movq %rax, %r10
; X64-NEXT: addq %r12, %r8 ; X64-NEXT: addq %r12, %r10
; X64-NEXT: adcq $0, %rbp ; X64-NEXT: adcq $0, %rbp
; X64-NEXT: movq %rcx, %rax ; X64-NEXT: movq %rcx, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rax, %r12 ; X64-NEXT: movq %rax, %r12
; X64-NEXT: addq %r8, %r12 ; X64-NEXT: addq %r10, %r12
; X64-NEXT: adcq %rbp, %rdx ; X64-NEXT: adcq %rbp, %rdx
; X64-NEXT: imulq %r9, %r11 ; X64-NEXT: imulq %r9, %r11
; X64-NEXT: movq {{[0-9]+}}(%rsp), %r9 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %r9
; X64-NEXT: addq %r13, %r14 ; X64-NEXT: addq %r13, %r14
; X64-NEXT: adcq %r15, %r12 ; X64-NEXT: adcq %r15, %r12
; X64-NEXT: adcq %rdx, %r11 ; X64-NEXT: adcq %rdx, %r11
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r8 ; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movq %rax, %r15 ; X64-NEXT: movq %rax, %r15
; X64-NEXT: movq %r10, %rax ; X64-NEXT: movq %r8, %rax
; X64-NEXT: mulq %r9 ; X64-NEXT: mulq %r9
; X64-NEXT: movq %rdx, %r13 ; X64-NEXT: movq %rdx, %r13
; X64-NEXT: movq %rax, %rbp ; X64-NEXT: movq %rax, %rbp
; X64-NEXT: addq %r8, %rbp ; X64-NEXT: addq %r10, %rbp
; X64-NEXT: adcq $0, %r13 ; X64-NEXT: adcq $0, %r13
; X64-NEXT: movq {{[0-9]+}}(%rsp), %r8 ; X64-NEXT: movq {{[0-9]+}}(%rsp), %r10
; X64-NEXT: movq %rsi, %rax ; X64-NEXT: movq %rsi, %rax
; X64-NEXT: mulq %r8 ; X64-NEXT: mulq %r10
; X64-NEXT: addq %rbp, %rax ; X64-NEXT: addq %rbp, %rax
; X64-NEXT: adcq %r13, %rdx ; X64-NEXT: adcq %r13, %rdx
; X64-NEXT: imulq %r8, %r10 ; X64-NEXT: imulq %r10, %r8
; X64-NEXT: addq %rdx, %r10 ; X64-NEXT: addq %rdx, %r8
; X64-NEXT: addq %r14, %r15 ; X64-NEXT: addq %r14, %r15
; X64-NEXT: adcq %r12, %rax ; X64-NEXT: adcq %r12, %rax
; X64-NEXT: adcq %r11, %r10 ; X64-NEXT: adcq %r11, %r8
; X64-NEXT: imulq %r9, %rcx ; X64-NEXT: imulq %r9, %rcx
; X64-NEXT: addq %r10, %rcx
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; X64-NEXT: imulq {{[0-9]+}}(%rsp), %rdx ; X64-NEXT: imulq {{[0-9]+}}(%rsp), %rdx
; X64-NEXT: imulq {{[0-9]+}}(%rsp), %rsi ; X64-NEXT: imulq {{[0-9]+}}(%rsp), %rsi
; X64-NEXT: addq %rdx, %rsi ; X64-NEXT: addq %rdx, %rsi
; X64-NEXT: addq %r8, %rsi
; X64-NEXT: addq %rcx, %rsi ; X64-NEXT: addq %rcx, %rsi
; X64-NEXT: movq %rbx, 8(%rdi) ; X64-NEXT: movq %rbx, 8(%rdi)
; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
; X64-NEXT: movq %rcx, (%rdi) ; X64-NEXT: movq %rcx, (%rdi)
; X64-NEXT: movq %r15, 16(%rdi) ; X64-NEXT: movq %r15, 16(%rdi)
; X64-NEXT: movq %rax, 24(%rdi) ; X64-NEXT: movq %rax, 24(%rdi)
; X64-NEXT: movl %esi, 32(%rdi) ; X64-NEXT: movl %esi, 32(%rdi)
; X64-NEXT: shrq $32, %rsi ; X64-NEXT: shrq $32, %rsi
Show All 14 Lines

llvm/test/CodeGen/X86/umul_fix.ll

Show First 20 Lines • Show All 179 Lines • ▼ Show 20 Lines
; X86-LABEL: func5: ; X86-LABEL: func5:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %esi ; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %esi ; X86-NEXT: mull %esi
; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx ; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: imull {{[0-9]+}}(%esp), %esi ; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %esi, %edx ; X86-NEXT: addl %esi, %edx
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: retl ; X86-NEXT: retl
%tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 0) %tmp = call i64 @llvm.umul.fix.i64(i64 %x, i64 %y, i32 0)
ret i64 %tmp ret i64 %tmp
} }
define i4 @func6(i4 %x, i4 %y) nounwind { define i4 @func6(i4 %x, i4 %y) nounwind {
▲ Show 20 Lines • Show All 191 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/urem-seteq-nonzero.ll

Show First 20 Lines • Show All 289 Lines • ▼ Show 20 Lines; X64-NEXT: retq
%urem = urem i8 %X, 3 %urem = urem i8 %X, 3
%cmp = icmp eq i8 %urem, 2 %cmp = icmp eq i8 %urem, 2
ret i1 %cmp ret i1 %cmp
} }
define i1 @t64_3_2(i64 %X) nounwind { define i1 @t64_3_2(i64 %X) nounwind {
; X86-LABEL: t64_3_2: ; X86-LABEL: t64_3_2:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $-1431655765, %edx # imm = 0xAAAAAAAB ; X86-NEXT: movl $-1431655765, %edx # imm = 0xAAAAAAAB
; X86-NEXT: movl %ecx, %eax ; X86-NEXT: movl %ecx, %eax
; X86-NEXT: mull %edx ; X86-NEXT: mull %edx
; X86-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA ; X86-NEXT: imull $-1431655766, %ecx, %ecx # imm = 0xAAAAAAAA
; X86-NEXT: addl %edx, %ecx ; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %esi # imm = 0xAAAAAAAB
; X86-NEXT: imull $-1431655765, {{[0-9]+}}(%esp), %edx # imm = 0xAAAAAAAB ; X86-NEXT: addl %ecx, %esi
; X86-NEXT: addl %ecx, %edx ; X86-NEXT: addl %edx, %esi
; X86-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA ; X86-NEXT: addl $-1431655766, %eax # imm = 0xAAAAAAAA
; X86-NEXT: adcl $-1431655766, %edx # imm = 0xAAAAAAAA ; X86-NEXT: adcl $-1431655766, %esi # imm = 0xAAAAAAAA
; X86-NEXT: cmpl $1431655765, %eax # imm = 0x55555555 ; X86-NEXT: cmpl $1431655765, %eax # imm = 0x55555555
; X86-NEXT: sbbl $1431655765, %edx # imm = 0x55555555 ; X86-NEXT: sbbl $1431655765, %esi # imm = 0x55555555
; X86-NEXT: setb %al ; X86-NEXT: setb %al
; X86-NEXT: popl %esi
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: t64_3_2: ; X64-LABEL: t64_3_2:
; X64: # %bb.0: ; X64: # %bb.0:
; X64-NEXT: movabsq $-6148914691236517205, %rax # imm = 0xAAAAAAAAAAAAAAAB ; X64-NEXT: movabsq $-6148914691236517205, %rax # imm = 0xAAAAAAAAAAAAAAAB
; X64-NEXT: imulq %rdi, %rax ; X64-NEXT: imulq %rdi, %rax
; X64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA ; X64-NEXT: movabsq $-6148914691236517206, %rcx # imm = 0xAAAAAAAAAAAAAAAA
; X64-NEXT: addq %rax, %rcx ; X64-NEXT: addq %rax, %rcx
; X64-NEXT: movabsq $6148914691236517205, %rax # imm = 0x5555555555555555 ; X64-NEXT: movabsq $6148914691236517205, %rax # imm = 0x5555555555555555
; X64-NEXT: cmpq %rax, %rcx ; X64-NEXT: cmpq %rax, %rcx
; X64-NEXT: setb %al ; X64-NEXT: setb %al
; X64-NEXT: retq ; X64-NEXT: retq
%urem = urem i64 %X, 3 %urem = urem i64 %X, 3
%cmp = icmp eq i64 %urem, 2 %cmp = icmp eq i64 %urem, 2
ret i1 %cmp ret i1 %cmp
} }

llvm/test/CodeGen/X86/vec_smulo.ll

Show First 20 Lines • Show All 3,303 Lines • ▼ Show 20 Lines
; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rbp ; SSE2-NEXT: movq {{[0-9]+}}(%rsp), %rbp
; SSE2-NEXT: movq %r11, %r12 ; SSE2-NEXT: movq %r11, %r12
; SSE2-NEXT: sarq $63, %r12 ; SSE2-NEXT: sarq $63, %r12
; SSE2-NEXT: movq %r14, %rbx ; SSE2-NEXT: movq %r14, %rbx
; SSE2-NEXT: imulq %r12, %rbx ; SSE2-NEXT: imulq %r12, %rbx
; SSE2-NEXT: movq %r14, %rax ; SSE2-NEXT: movq %r14, %rax
; SSE2-NEXT: mulq %r12 ; SSE2-NEXT: mulq %r12
; SSE2-NEXT: movq %rax, %rdi ; SSE2-NEXT: movq %rax, %rdi
; SSE2-NEXT: addq %rbx, %rdx
; SSE2-NEXT: imulq %r9, %r12 ; SSE2-NEXT: imulq %r9, %r12
; SSE2-NEXT: addq %rbx, %r12
; SSE2-NEXT: addq %rdx, %r12 ; SSE2-NEXT: addq %rdx, %r12
; SSE2-NEXT: movq %r9, %rbx ; SSE2-NEXT: movq %r9, %rbx
; SSE2-NEXT: sarq $63, %rbx ; SSE2-NEXT: sarq $63, %rbx
; SSE2-NEXT: movq %rbx, %r13 ; SSE2-NEXT: movq %rbx, %r13
; SSE2-NEXT: imulq %r11, %r13 ; SSE2-NEXT: imulq %r11, %r13
; SSE2-NEXT: movq %rbx, %rax ; SSE2-NEXT: movq %rbx, %rax
; SSE2-NEXT: mulq %r10 ; SSE2-NEXT: mulq %r10
; SSE2-NEXT: movq %rax, %r15 ; SSE2-NEXT: movq %rax, %r15
; SSE2-NEXT: addq %r13, %rdx
; SSE2-NEXT: imulq %r10, %rbx ; SSE2-NEXT: imulq %r10, %rbx
; SSE2-NEXT: addq %r13, %rbx
; SSE2-NEXT: addq %rdx, %rbx ; SSE2-NEXT: addq %rdx, %rbx
; SSE2-NEXT: addq %rdi, %r15 ; SSE2-NEXT: addq %rdi, %r15
; SSE2-NEXT: adcq %r12, %rbx ; SSE2-NEXT: adcq %r12, %rbx
; SSE2-NEXT: movq %r10, %rax ; SSE2-NEXT: movq %r10, %rax
; SSE2-NEXT: mulq %r14 ; SSE2-NEXT: mulq %r14
; SSE2-NEXT: movq %rdx, %r12 ; SSE2-NEXT: movq %rdx, %r12
; SSE2-NEXT: movq %rax, %rdi ; SSE2-NEXT: movq %rax, %rdi
; SSE2-NEXT: movq %r11, %rax ; SSE2-NEXT: movq %r11, %rax
Show All 26 Lines
; SSE2-NEXT: setne %r15b ; SSE2-NEXT: setne %r15b
; SSE2-NEXT: movq %rcx, %rbx ; SSE2-NEXT: movq %rcx, %rbx
; SSE2-NEXT: sarq $63, %rbx ; SSE2-NEXT: sarq $63, %rbx
; SSE2-NEXT: movq %rsi, %r10 ; SSE2-NEXT: movq %rsi, %r10
; SSE2-NEXT: imulq %rbx, %r10 ; SSE2-NEXT: imulq %rbx, %r10
; SSE2-NEXT: movq %rsi, %rax ; SSE2-NEXT: movq %rsi, %rax
; SSE2-NEXT: mulq %rbx ; SSE2-NEXT: mulq %rbx
; SSE2-NEXT: movq %rax, %r9 ; SSE2-NEXT: movq %rax, %r9
; SSE2-NEXT: addq %r10, %rdx
; SSE2-NEXT: imulq %rbp, %rbx ; SSE2-NEXT: imulq %rbp, %rbx
; SSE2-NEXT: addq %r10, %rbx
; SSE2-NEXT: addq %rdx, %rbx ; SSE2-NEXT: addq %rdx, %rbx
; SSE2-NEXT: movq %rbp, %r10 ; SSE2-NEXT: movq %rbp, %r10
; SSE2-NEXT: sarq $63, %r10 ; SSE2-NEXT: sarq $63, %r10
; SSE2-NEXT: movq %r10, %r14 ; SSE2-NEXT: movq %r10, %r14
; SSE2-NEXT: imulq %rcx, %r14 ; SSE2-NEXT: imulq %rcx, %r14
; SSE2-NEXT: movq %r10, %rax ; SSE2-NEXT: movq %r10, %rax
; SSE2-NEXT: mulq %r8 ; SSE2-NEXT: mulq %r8
; SSE2-NEXT: movq %rax, %r11 ; SSE2-NEXT: movq %rax, %r11
; SSE2-NEXT: addq %r14, %rdx
; SSE2-NEXT: imulq %r8, %r10 ; SSE2-NEXT: imulq %r8, %r10
; SSE2-NEXT: addq %r14, %r10
; SSE2-NEXT: addq %rdx, %r10 ; SSE2-NEXT: addq %rdx, %r10
; SSE2-NEXT: addq %r9, %r11 ; SSE2-NEXT: addq %r9, %r11
; SSE2-NEXT: adcq %rbx, %r10 ; SSE2-NEXT: adcq %rbx, %r10
; SSE2-NEXT: movq %r8, %rax ; SSE2-NEXT: movq %r8, %rax
; SSE2-NEXT: mulq %rsi ; SSE2-NEXT: mulq %rsi
; SSE2-NEXT: movq %rdx, %r9 ; SSE2-NEXT: movq %rdx, %r9
; SSE2-NEXT: movq %rax, %rbx ; SSE2-NEXT: movq %rax, %rbx
; SSE2-NEXT: movq %rcx, %rax ; SSE2-NEXT: movq %rcx, %rax
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; SSSE3-NEXT: movq {{[0-9]+}}(%rsp), %rbp ; SSSE3-NEXT: movq {{[0-9]+}}(%rsp), %rbp
; SSSE3-NEXT: movq %r11, %r12 ; SSSE3-NEXT: movq %r11, %r12
; SSSE3-NEXT: sarq $63, %r12 ; SSSE3-NEXT: sarq $63, %r12
; SSSE3-NEXT: movq %r14, %rbx ; SSSE3-NEXT: movq %r14, %rbx
; SSSE3-NEXT: imulq %r12, %rbx ; SSSE3-NEXT: imulq %r12, %rbx
; SSSE3-NEXT: movq %r14, %rax ; SSSE3-NEXT: movq %r14, %rax
; SSSE3-NEXT: mulq %r12 ; SSSE3-NEXT: mulq %r12
; SSSE3-NEXT: movq %rax, %rdi ; SSSE3-NEXT: movq %rax, %rdi
; SSSE3-NEXT: addq %rbx, %rdx
; SSSE3-NEXT: imulq %r9, %r12 ; SSSE3-NEXT: imulq %r9, %r12
; SSSE3-NEXT: addq %rbx, %r12
; SSSE3-NEXT: addq %rdx, %r12 ; SSSE3-NEXT: addq %rdx, %r12
; SSSE3-NEXT: movq %r9, %rbx ; SSSE3-NEXT: movq %r9, %rbx
; SSSE3-NEXT: sarq $63, %rbx ; SSSE3-NEXT: sarq $63, %rbx
; SSSE3-NEXT: movq %rbx, %r13 ; SSSE3-NEXT: movq %rbx, %r13
; SSSE3-NEXT: imulq %r11, %r13 ; SSSE3-NEXT: imulq %r11, %r13
; SSSE3-NEXT: movq %rbx, %rax ; SSSE3-NEXT: movq %rbx, %rax
; SSSE3-NEXT: mulq %r10 ; SSSE3-NEXT: mulq %r10
; SSSE3-NEXT: movq %rax, %r15 ; SSSE3-NEXT: movq %rax, %r15
; SSSE3-NEXT: addq %r13, %rdx
; SSSE3-NEXT: imulq %r10, %rbx ; SSSE3-NEXT: imulq %r10, %rbx
; SSSE3-NEXT: addq %r13, %rbx
; SSSE3-NEXT: addq %rdx, %rbx ; SSSE3-NEXT: addq %rdx, %rbx
; SSSE3-NEXT: addq %rdi, %r15 ; SSSE3-NEXT: addq %rdi, %r15
; SSSE3-NEXT: adcq %r12, %rbx ; SSSE3-NEXT: adcq %r12, %rbx
; SSSE3-NEXT: movq %r10, %rax ; SSSE3-NEXT: movq %r10, %rax
; SSSE3-NEXT: mulq %r14 ; SSSE3-NEXT: mulq %r14
; SSSE3-NEXT: movq %rdx, %r12 ; SSSE3-NEXT: movq %rdx, %r12
; SSSE3-NEXT: movq %rax, %rdi ; SSSE3-NEXT: movq %rax, %rdi
; SSSE3-NEXT: movq %r11, %rax ; SSSE3-NEXT: movq %r11, %rax
Show All 26 Lines
; SSSE3-NEXT: setne %r15b ; SSSE3-NEXT: setne %r15b
; SSSE3-NEXT: movq %rcx, %rbx ; SSSE3-NEXT: movq %rcx, %rbx
; SSSE3-NEXT: sarq $63, %rbx ; SSSE3-NEXT: sarq $63, %rbx
; SSSE3-NEXT: movq %rsi, %r10 ; SSSE3-NEXT: movq %rsi, %r10
; SSSE3-NEXT: imulq %rbx, %r10 ; SSSE3-NEXT: imulq %rbx, %r10
; SSSE3-NEXT: movq %rsi, %rax ; SSSE3-NEXT: movq %rsi, %rax
; SSSE3-NEXT: mulq %rbx ; SSSE3-NEXT: mulq %rbx
; SSSE3-NEXT: movq %rax, %r9 ; SSSE3-NEXT: movq %rax, %r9
; SSSE3-NEXT: addq %r10, %rdx
; SSSE3-NEXT: imulq %rbp, %rbx ; SSSE3-NEXT: imulq %rbp, %rbx
; SSSE3-NEXT: addq %r10, %rbx
; SSSE3-NEXT: addq %rdx, %rbx ; SSSE3-NEXT: addq %rdx, %rbx
; SSSE3-NEXT: movq %rbp, %r10 ; SSSE3-NEXT: movq %rbp, %r10
; SSSE3-NEXT: sarq $63, %r10 ; SSSE3-NEXT: sarq $63, %r10
; SSSE3-NEXT: movq %r10, %r14 ; SSSE3-NEXT: movq %r10, %r14
; SSSE3-NEXT: imulq %rcx, %r14 ; SSSE3-NEXT: imulq %rcx, %r14
; SSSE3-NEXT: movq %r10, %rax ; SSSE3-NEXT: movq %r10, %rax
; SSSE3-NEXT: mulq %r8 ; SSSE3-NEXT: mulq %r8
; SSSE3-NEXT: movq %rax, %r11 ; SSSE3-NEXT: movq %rax, %r11
; SSSE3-NEXT: addq %r14, %rdx
; SSSE3-NEXT: imulq %r8, %r10 ; SSSE3-NEXT: imulq %r8, %r10
; SSSE3-NEXT: addq %r14, %r10
; SSSE3-NEXT: addq %rdx, %r10 ; SSSE3-NEXT: addq %rdx, %r10
; SSSE3-NEXT: addq %r9, %r11 ; SSSE3-NEXT: addq %r9, %r11
; SSSE3-NEXT: adcq %rbx, %r10 ; SSSE3-NEXT: adcq %rbx, %r10
; SSSE3-NEXT: movq %r8, %rax ; SSSE3-NEXT: movq %r8, %rax
; SSSE3-NEXT: mulq %rsi ; SSSE3-NEXT: mulq %rsi
; SSSE3-NEXT: movq %rdx, %r9 ; SSSE3-NEXT: movq %rdx, %r9
; SSSE3-NEXT: movq %rax, %rbx ; SSSE3-NEXT: movq %rax, %rbx
; SSSE3-NEXT: movq %rcx, %rax ; SSSE3-NEXT: movq %rcx, %rax
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; SSE41-NEXT: movq {{[0-9]+}}(%rsp), %rbp ; SSE41-NEXT: movq {{[0-9]+}}(%rsp), %rbp
; SSE41-NEXT: movq %r11, %r12 ; SSE41-NEXT: movq %r11, %r12
; SSE41-NEXT: sarq $63, %r12 ; SSE41-NEXT: sarq $63, %r12
; SSE41-NEXT: movq %r14, %rbx ; SSE41-NEXT: movq %r14, %rbx
; SSE41-NEXT: imulq %r12, %rbx ; SSE41-NEXT: imulq %r12, %rbx
; SSE41-NEXT: movq %r14, %rax ; SSE41-NEXT: movq %r14, %rax
; SSE41-NEXT: mulq %r12 ; SSE41-NEXT: mulq %r12
; SSE41-NEXT: movq %rax, %rdi ; SSE41-NEXT: movq %rax, %rdi
; SSE41-NEXT: addq %rbx, %rdx
; SSE41-NEXT: imulq %r9, %r12 ; SSE41-NEXT: imulq %r9, %r12
; SSE41-NEXT: addq %rbx, %r12
; SSE41-NEXT: addq %rdx, %r12 ; SSE41-NEXT: addq %rdx, %r12
; SSE41-NEXT: movq %r9, %rbx ; SSE41-NEXT: movq %r9, %rbx
; SSE41-NEXT: sarq $63, %rbx ; SSE41-NEXT: sarq $63, %rbx
; SSE41-NEXT: movq %rbx, %r13 ; SSE41-NEXT: movq %rbx, %r13
; SSE41-NEXT: imulq %r11, %r13 ; SSE41-NEXT: imulq %r11, %r13
; SSE41-NEXT: movq %rbx, %rax ; SSE41-NEXT: movq %rbx, %rax
; SSE41-NEXT: mulq %r10 ; SSE41-NEXT: mulq %r10
; SSE41-NEXT: movq %rax, %r15 ; SSE41-NEXT: movq %rax, %r15
; SSE41-NEXT: addq %r13, %rdx
; SSE41-NEXT: imulq %r10, %rbx ; SSE41-NEXT: imulq %r10, %rbx
; SSE41-NEXT: addq %r13, %rbx
; SSE41-NEXT: addq %rdx, %rbx ; SSE41-NEXT: addq %rdx, %rbx
; SSE41-NEXT: addq %rdi, %r15 ; SSE41-NEXT: addq %rdi, %r15
; SSE41-NEXT: adcq %r12, %rbx ; SSE41-NEXT: adcq %r12, %rbx
; SSE41-NEXT: movq %r10, %rax ; SSE41-NEXT: movq %r10, %rax
; SSE41-NEXT: mulq %r14 ; SSE41-NEXT: mulq %r14
; SSE41-NEXT: movq %rdx, %r12 ; SSE41-NEXT: movq %rdx, %r12
; SSE41-NEXT: movq %rax, %rdi ; SSE41-NEXT: movq %rax, %rdi
; SSE41-NEXT: movq %r11, %rax ; SSE41-NEXT: movq %r11, %rax
Show All 26 Lines
; SSE41-NEXT: setne %r15b ; SSE41-NEXT: setne %r15b
; SSE41-NEXT: movq %rcx, %rbx ; SSE41-NEXT: movq %rcx, %rbx
; SSE41-NEXT: sarq $63, %rbx ; SSE41-NEXT: sarq $63, %rbx
; SSE41-NEXT: movq %rsi, %r10 ; SSE41-NEXT: movq %rsi, %r10
; SSE41-NEXT: imulq %rbx, %r10 ; SSE41-NEXT: imulq %rbx, %r10
; SSE41-NEXT: movq %rsi, %rax ; SSE41-NEXT: movq %rsi, %rax
; SSE41-NEXT: mulq %rbx ; SSE41-NEXT: mulq %rbx
; SSE41-NEXT: movq %rax, %r9 ; SSE41-NEXT: movq %rax, %r9
; SSE41-NEXT: addq %r10, %rdx
; SSE41-NEXT: imulq %rbp, %rbx ; SSE41-NEXT: imulq %rbp, %rbx
; SSE41-NEXT: addq %r10, %rbx
; SSE41-NEXT: addq %rdx, %rbx ; SSE41-NEXT: addq %rdx, %rbx
; SSE41-NEXT: movq %rbp, %r10 ; SSE41-NEXT: movq %rbp, %r10
; SSE41-NEXT: sarq $63, %r10 ; SSE41-NEXT: sarq $63, %r10
; SSE41-NEXT: movq %r10, %r14 ; SSE41-NEXT: movq %r10, %r14
; SSE41-NEXT: imulq %rcx, %r14 ; SSE41-NEXT: imulq %rcx, %r14
; SSE41-NEXT: movq %r10, %rax ; SSE41-NEXT: movq %r10, %rax
; SSE41-NEXT: mulq %r8 ; SSE41-NEXT: mulq %r8
; SSE41-NEXT: movq %rax, %r11 ; SSE41-NEXT: movq %rax, %r11
; SSE41-NEXT: addq %r14, %rdx
; SSE41-NEXT: imulq %r8, %r10 ; SSE41-NEXT: imulq %r8, %r10
; SSE41-NEXT: addq %r14, %r10
; SSE41-NEXT: addq %rdx, %r10 ; SSE41-NEXT: addq %rdx, %r10
; SSE41-NEXT: addq %r9, %r11 ; SSE41-NEXT: addq %r9, %r11
; SSE41-NEXT: adcq %rbx, %r10 ; SSE41-NEXT: adcq %rbx, %r10
; SSE41-NEXT: movq %r8, %rax ; SSE41-NEXT: movq %r8, %rax
; SSE41-NEXT: mulq %rsi ; SSE41-NEXT: mulq %rsi
; SSE41-NEXT: movq %rdx, %r9 ; SSE41-NEXT: movq %rdx, %r9
; SSE41-NEXT: movq %rax, %rbx ; SSE41-NEXT: movq %rax, %rbx
; SSE41-NEXT: movq %rcx, %rax ; SSE41-NEXT: movq %rcx, %rax
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rbp ; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rbp
; AVX-NEXT: movq %r11, %r12 ; AVX-NEXT: movq %r11, %r12
; AVX-NEXT: sarq $63, %r12 ; AVX-NEXT: sarq $63, %r12
; AVX-NEXT: movq %r14, %rbx ; AVX-NEXT: movq %r14, %rbx
; AVX-NEXT: imulq %r12, %rbx ; AVX-NEXT: imulq %r12, %rbx
; AVX-NEXT: movq %r14, %rax ; AVX-NEXT: movq %r14, %rax
; AVX-NEXT: mulq %r12 ; AVX-NEXT: mulq %r12
; AVX-NEXT: movq %rax, %rdi ; AVX-NEXT: movq %rax, %rdi
; AVX-NEXT: addq %rbx, %rdx
; AVX-NEXT: imulq %r9, %r12 ; AVX-NEXT: imulq %r9, %r12
; AVX-NEXT: addq %rbx, %r12
; AVX-NEXT: addq %rdx, %r12 ; AVX-NEXT: addq %rdx, %r12
; AVX-NEXT: movq %r9, %rbx ; AVX-NEXT: movq %r9, %rbx
; AVX-NEXT: sarq $63, %rbx ; AVX-NEXT: sarq $63, %rbx
; AVX-NEXT: movq %rbx, %r13 ; AVX-NEXT: movq %rbx, %r13
; AVX-NEXT: imulq %r11, %r13 ; AVX-NEXT: imulq %r11, %r13
; AVX-NEXT: movq %rbx, %rax ; AVX-NEXT: movq %rbx, %rax
; AVX-NEXT: mulq %r10 ; AVX-NEXT: mulq %r10
; AVX-NEXT: movq %rax, %r15 ; AVX-NEXT: movq %rax, %r15
; AVX-NEXT: addq %r13, %rdx
; AVX-NEXT: imulq %r10, %rbx ; AVX-NEXT: imulq %r10, %rbx
; AVX-NEXT: addq %r13, %rbx
; AVX-NEXT: addq %rdx, %rbx ; AVX-NEXT: addq %rdx, %rbx
; AVX-NEXT: addq %rdi, %r15 ; AVX-NEXT: addq %rdi, %r15
; AVX-NEXT: adcq %r12, %rbx ; AVX-NEXT: adcq %r12, %rbx
; AVX-NEXT: movq %r10, %rax ; AVX-NEXT: movq %r10, %rax
; AVX-NEXT: mulq %r14 ; AVX-NEXT: mulq %r14
; AVX-NEXT: movq %rdx, %r12 ; AVX-NEXT: movq %rdx, %r12
; AVX-NEXT: movq %rax, %rdi ; AVX-NEXT: movq %rax, %rdi
; AVX-NEXT: movq %r11, %rax ; AVX-NEXT: movq %r11, %rax
Show All 26 Lines
; AVX-NEXT: setne %r15b ; AVX-NEXT: setne %r15b
; AVX-NEXT: movq %rcx, %rbx ; AVX-NEXT: movq %rcx, %rbx
; AVX-NEXT: sarq $63, %rbx ; AVX-NEXT: sarq $63, %rbx
; AVX-NEXT: movq %rsi, %r10 ; AVX-NEXT: movq %rsi, %r10
; AVX-NEXT: imulq %rbx, %r10 ; AVX-NEXT: imulq %rbx, %r10
; AVX-NEXT: movq %rsi, %rax ; AVX-NEXT: movq %rsi, %rax
; AVX-NEXT: mulq %rbx ; AVX-NEXT: mulq %rbx
; AVX-NEXT: movq %rax, %r9 ; AVX-NEXT: movq %rax, %r9
; AVX-NEXT: addq %r10, %rdx
; AVX-NEXT: imulq %rbp, %rbx ; AVX-NEXT: imulq %rbp, %rbx
; AVX-NEXT: addq %r10, %rbx
; AVX-NEXT: addq %rdx, %rbx ; AVX-NEXT: addq %rdx, %rbx
; AVX-NEXT: movq %rbp, %r10 ; AVX-NEXT: movq %rbp, %r10
; AVX-NEXT: sarq $63, %r10 ; AVX-NEXT: sarq $63, %r10
; AVX-NEXT: movq %r10, %r14 ; AVX-NEXT: movq %r10, %r14
; AVX-NEXT: imulq %rcx, %r14 ; AVX-NEXT: imulq %rcx, %r14
; AVX-NEXT: movq %r10, %rax ; AVX-NEXT: movq %r10, %rax
; AVX-NEXT: mulq %r8 ; AVX-NEXT: mulq %r8
; AVX-NEXT: movq %rax, %r11 ; AVX-NEXT: movq %rax, %r11
; AVX-NEXT: addq %r14, %rdx
; AVX-NEXT: imulq %r8, %r10 ; AVX-NEXT: imulq %r8, %r10
; AVX-NEXT: addq %r14, %r10
; AVX-NEXT: addq %rdx, %r10 ; AVX-NEXT: addq %rdx, %r10
; AVX-NEXT: addq %r9, %r11 ; AVX-NEXT: addq %r9, %r11
; AVX-NEXT: adcq %rbx, %r10 ; AVX-NEXT: adcq %rbx, %r10
; AVX-NEXT: movq %r8, %rax ; AVX-NEXT: movq %r8, %rax
; AVX-NEXT: mulq %rsi ; AVX-NEXT: mulq %rsi
; AVX-NEXT: movq %rdx, %r9 ; AVX-NEXT: movq %rdx, %r9
; AVX-NEXT: movq %rax, %rbx ; AVX-NEXT: movq %rax, %rbx
; AVX-NEXT: movq %rcx, %rax ; AVX-NEXT: movq %rcx, %rax
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; AVX512F-NEXT: movq {{[0-9]+}}(%rsp), %rsi ; AVX512F-NEXT: movq {{[0-9]+}}(%rsp), %rsi
; AVX512F-NEXT: movq %rcx, %r12 ; AVX512F-NEXT: movq %rcx, %r12
; AVX512F-NEXT: sarq $63, %r12 ; AVX512F-NEXT: sarq $63, %r12
; AVX512F-NEXT: movq %r15, %rbx ; AVX512F-NEXT: movq %r15, %rbx
; AVX512F-NEXT: imulq %r12, %rbx ; AVX512F-NEXT: imulq %r12, %rbx
; AVX512F-NEXT: movq %r15, %rax ; AVX512F-NEXT: movq %r15, %rax
; AVX512F-NEXT: mulq %r12 ; AVX512F-NEXT: mulq %r12
; AVX512F-NEXT: movq %rax, %rcx ; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: addq %rbx, %rdx
; AVX512F-NEXT: imulq %rsi, %r12 ; AVX512F-NEXT: imulq %rsi, %r12
; AVX512F-NEXT: addq %rbx, %r12
; AVX512F-NEXT: addq %rdx, %r12 ; AVX512F-NEXT: addq %rdx, %r12
; AVX512F-NEXT: movq %rsi, %rbx ; AVX512F-NEXT: movq %rsi, %rbx
; AVX512F-NEXT: sarq $63, %rbx ; AVX512F-NEXT: sarq $63, %rbx
; AVX512F-NEXT: movq %rbx, %r13 ; AVX512F-NEXT: movq %rbx, %r13
; AVX512F-NEXT: imulq %r11, %r13 ; AVX512F-NEXT: imulq %r11, %r13
; AVX512F-NEXT: movq %rbx, %rax ; AVX512F-NEXT: movq %rbx, %rax
; AVX512F-NEXT: mulq %r10 ; AVX512F-NEXT: mulq %r10
; AVX512F-NEXT: movq %rax, %r14 ; AVX512F-NEXT: movq %rax, %r14
; AVX512F-NEXT: addq %r13, %rdx
; AVX512F-NEXT: imulq %r10, %rbx ; AVX512F-NEXT: imulq %r10, %rbx
; AVX512F-NEXT: addq %r13, %rbx
; AVX512F-NEXT: addq %rdx, %rbx ; AVX512F-NEXT: addq %rdx, %rbx
; AVX512F-NEXT: addq %rcx, %r14 ; AVX512F-NEXT: addq %rcx, %r14
; AVX512F-NEXT: adcq %r12, %rbx ; AVX512F-NEXT: adcq %r12, %rbx
; AVX512F-NEXT: movq %r10, %rax ; AVX512F-NEXT: movq %r10, %rax
; AVX512F-NEXT: mulq %r15 ; AVX512F-NEXT: mulq %r15
; AVX512F-NEXT: movq %rdx, %r12 ; AVX512F-NEXT: movq %rdx, %r12
; AVX512F-NEXT: movq %rax, %rcx ; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: movq %r11, %rax ; AVX512F-NEXT: movq %r11, %rax
Show All 26 Lines
; AVX512F-NEXT: kmovw %eax, %k0 ; AVX512F-NEXT: kmovw %eax, %k0
; AVX512F-NEXT: movq %r9, %rsi ; AVX512F-NEXT: movq %r9, %rsi
; AVX512F-NEXT: sarq $63, %rsi ; AVX512F-NEXT: sarq $63, %rsi
; AVX512F-NEXT: movq %r8, %r11 ; AVX512F-NEXT: movq %r8, %r11
; AVX512F-NEXT: imulq %rsi, %r11 ; AVX512F-NEXT: imulq %rsi, %r11
; AVX512F-NEXT: movq %r8, %rax ; AVX512F-NEXT: movq %r8, %rax
; AVX512F-NEXT: mulq %rsi ; AVX512F-NEXT: mulq %rsi
; AVX512F-NEXT: movq %rax, %r10 ; AVX512F-NEXT: movq %rax, %r10
; AVX512F-NEXT: addq %r11, %rdx
; AVX512F-NEXT: imulq %rbp, %rsi ; AVX512F-NEXT: imulq %rbp, %rsi
; AVX512F-NEXT: addq %r11, %rsi
; AVX512F-NEXT: addq %rdx, %rsi ; AVX512F-NEXT: addq %rdx, %rsi
; AVX512F-NEXT: movq %rbp, %r11 ; AVX512F-NEXT: movq %rbp, %r11
; AVX512F-NEXT: sarq $63, %r11 ; AVX512F-NEXT: sarq $63, %r11
; AVX512F-NEXT: movq %r11, %r14 ; AVX512F-NEXT: movq %r11, %r14
; AVX512F-NEXT: imulq %r9, %r14 ; AVX512F-NEXT: imulq %r9, %r14
; AVX512F-NEXT: movq %r11, %rax ; AVX512F-NEXT: movq %r11, %rax
; AVX512F-NEXT: mulq %rdi ; AVX512F-NEXT: mulq %rdi
; AVX512F-NEXT: movq %rax, %rbx ; AVX512F-NEXT: movq %rax, %rbx
; AVX512F-NEXT: addq %r14, %rdx
; AVX512F-NEXT: imulq %rdi, %r11 ; AVX512F-NEXT: imulq %rdi, %r11
; AVX512F-NEXT: addq %r14, %r11
; AVX512F-NEXT: addq %rdx, %r11 ; AVX512F-NEXT: addq %rdx, %r11
; AVX512F-NEXT: addq %r10, %rbx ; AVX512F-NEXT: addq %r10, %rbx
; AVX512F-NEXT: adcq %rsi, %r11 ; AVX512F-NEXT: adcq %rsi, %r11
; AVX512F-NEXT: movq %rdi, %rax ; AVX512F-NEXT: movq %rdi, %rax
; AVX512F-NEXT: mulq %r8 ; AVX512F-NEXT: mulq %r8
; AVX512F-NEXT: movq %rdx, %r10 ; AVX512F-NEXT: movq %rdx, %r10
; AVX512F-NEXT: movq %rax, %r14 ; AVX512F-NEXT: movq %rax, %r14
; AVX512F-NEXT: movq %r9, %rax ; AVX512F-NEXT: movq %r9, %rax
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rsi ; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rsi
; AVX512BW-NEXT: movq %rcx, %r12 ; AVX512BW-NEXT: movq %rcx, %r12
; AVX512BW-NEXT: sarq $63, %r12 ; AVX512BW-NEXT: sarq $63, %r12
; AVX512BW-NEXT: movq %r15, %rbx ; AVX512BW-NEXT: movq %r15, %rbx
; AVX512BW-NEXT: imulq %r12, %rbx ; AVX512BW-NEXT: imulq %r12, %rbx
; AVX512BW-NEXT: movq %r15, %rax ; AVX512BW-NEXT: movq %r15, %rax
; AVX512BW-NEXT: mulq %r12 ; AVX512BW-NEXT: mulq %r12
; AVX512BW-NEXT: movq %rax, %rcx ; AVX512BW-NEXT: movq %rax, %rcx
; AVX512BW-NEXT: addq %rbx, %rdx
; AVX512BW-NEXT: imulq %rsi, %r12 ; AVX512BW-NEXT: imulq %rsi, %r12
; AVX512BW-NEXT: addq %rbx, %r12
; AVX512BW-NEXT: addq %rdx, %r12 ; AVX512BW-NEXT: addq %rdx, %r12
; AVX512BW-NEXT: movq %rsi, %rbx ; AVX512BW-NEXT: movq %rsi, %rbx
; AVX512BW-NEXT: sarq $63, %rbx ; AVX512BW-NEXT: sarq $63, %rbx
; AVX512BW-NEXT: movq %rbx, %r13 ; AVX512BW-NEXT: movq %rbx, %r13
; AVX512BW-NEXT: imulq %r11, %r13 ; AVX512BW-NEXT: imulq %r11, %r13
; AVX512BW-NEXT: movq %rbx, %rax ; AVX512BW-NEXT: movq %rbx, %rax
; AVX512BW-NEXT: mulq %r10 ; AVX512BW-NEXT: mulq %r10
; AVX512BW-NEXT: movq %rax, %r14 ; AVX512BW-NEXT: movq %rax, %r14
; AVX512BW-NEXT: addq %r13, %rdx
; AVX512BW-NEXT: imulq %r10, %rbx ; AVX512BW-NEXT: imulq %r10, %rbx
; AVX512BW-NEXT: addq %r13, %rbx
; AVX512BW-NEXT: addq %rdx, %rbx ; AVX512BW-NEXT: addq %rdx, %rbx
; AVX512BW-NEXT: addq %rcx, %r14 ; AVX512BW-NEXT: addq %rcx, %r14
; AVX512BW-NEXT: adcq %r12, %rbx ; AVX512BW-NEXT: adcq %r12, %rbx
; AVX512BW-NEXT: movq %r10, %rax ; AVX512BW-NEXT: movq %r10, %rax
; AVX512BW-NEXT: mulq %r15 ; AVX512BW-NEXT: mulq %r15
; AVX512BW-NEXT: movq %rdx, %r12 ; AVX512BW-NEXT: movq %rdx, %r12
; AVX512BW-NEXT: movq %rax, %rcx ; AVX512BW-NEXT: movq %rax, %rcx
; AVX512BW-NEXT: movq %r11, %rax ; AVX512BW-NEXT: movq %r11, %rax
Show All 26 Lines
; AVX512BW-NEXT: kmovd %eax, %k0 ; AVX512BW-NEXT: kmovd %eax, %k0
; AVX512BW-NEXT: movq %r9, %rsi ; AVX512BW-NEXT: movq %r9, %rsi
; AVX512BW-NEXT: sarq $63, %rsi ; AVX512BW-NEXT: sarq $63, %rsi
; AVX512BW-NEXT: movq %r8, %r11 ; AVX512BW-NEXT: movq %r8, %r11
; AVX512BW-NEXT: imulq %rsi, %r11 ; AVX512BW-NEXT: imulq %rsi, %r11
; AVX512BW-NEXT: movq %r8, %rax ; AVX512BW-NEXT: movq %r8, %rax
; AVX512BW-NEXT: mulq %rsi ; AVX512BW-NEXT: mulq %rsi
; AVX512BW-NEXT: movq %rax, %r10 ; AVX512BW-NEXT: movq %rax, %r10
; AVX512BW-NEXT: addq %r11, %rdx
; AVX512BW-NEXT: imulq %rbp, %rsi ; AVX512BW-NEXT: imulq %rbp, %rsi
; AVX512BW-NEXT: addq %r11, %rsi
; AVX512BW-NEXT: addq %rdx, %rsi ; AVX512BW-NEXT: addq %rdx, %rsi
; AVX512BW-NEXT: movq %rbp, %r11 ; AVX512BW-NEXT: movq %rbp, %r11
; AVX512BW-NEXT: sarq $63, %r11 ; AVX512BW-NEXT: sarq $63, %r11
; AVX512BW-NEXT: movq %r11, %r14 ; AVX512BW-NEXT: movq %r11, %r14
; AVX512BW-NEXT: imulq %r9, %r14 ; AVX512BW-NEXT: imulq %r9, %r14
; AVX512BW-NEXT: movq %r11, %rax ; AVX512BW-NEXT: movq %r11, %rax
; AVX512BW-NEXT: mulq %rdi ; AVX512BW-NEXT: mulq %rdi
; AVX512BW-NEXT: movq %rax, %rbx ; AVX512BW-NEXT: movq %rax, %rbx
; AVX512BW-NEXT: addq %r14, %rdx
; AVX512BW-NEXT: imulq %rdi, %r11 ; AVX512BW-NEXT: imulq %rdi, %r11
; AVX512BW-NEXT: addq %r14, %r11
; AVX512BW-NEXT: addq %rdx, %r11 ; AVX512BW-NEXT: addq %rdx, %r11
; AVX512BW-NEXT: addq %r10, %rbx ; AVX512BW-NEXT: addq %r10, %rbx
; AVX512BW-NEXT: adcq %rsi, %r11 ; AVX512BW-NEXT: adcq %rsi, %r11
; AVX512BW-NEXT: movq %rdi, %rax ; AVX512BW-NEXT: movq %rdi, %rax
; AVX512BW-NEXT: mulq %r8 ; AVX512BW-NEXT: mulq %r8
; AVX512BW-NEXT: movq %rdx, %r10 ; AVX512BW-NEXT: movq %rdx, %r10
; AVX512BW-NEXT: movq %rax, %r14 ; AVX512BW-NEXT: movq %rax, %r14
; AVX512BW-NEXT: movq %r9, %rax ; AVX512BW-NEXT: movq %r9, %rax
▲ Show 20 Lines • Show All 47 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll

Show All 40 Lines
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload ; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %ecx ; X86-NEXT: kmovw %k0, %ecx
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload ; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload ; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %edx ; X86-NEXT: kmovw %k0, %edx
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload ; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload ; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %edi ; X86-NEXT: kmovw %k0, %edi
; X86-NEXT: addl %edi, %eax ; X86-NEXT: addl %eax, %ecx
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k2 # 2-byte Reload ; X86-NEXT: kmovw %k1, %eax
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k3 # 2-byte Reload
; X86-NEXT: kmovw %k2, %edi
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: kmovw %k1, %ecx
; X86-NEXT: addl %edi, %ecx
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: addl %edx, %eax ; X86-NEXT: addl %edx, %eax
; X86-NEXT: movw %ax, (%esi) ; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %edx
; X86-NEXT: addl %eax, %edx
; X86-NEXT: addl %ecx, %edx
; X86-NEXT: addl %edi, %edx
; X86-NEXT: movw %dx, (%esi)
; X86-NEXT: leal -8(%ebp), %esp ; X86-NEXT: leal -8(%ebp), %esp
; X86-NEXT: popl %esi ; X86-NEXT: popl %esi
; X86-NEXT: popl %edi ; X86-NEXT: popl %edi
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test: ; X64-LABEL: test:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
Show All 32 Lines
; X64-NEXT: kmovw %k0, %edx ; X64-NEXT: kmovw %k0, %edx
; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload ; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload
; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload ; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; X64-NEXT: kmovw %k0, %esi ; X64-NEXT: kmovw %k0, %esi
; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload ; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k0 # 2-byte Reload
; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload ; X64-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; X64-NEXT: kmovw %k0, %edi ; X64-NEXT: kmovw %k0, %edi
; X64-NEXT: kmovw %k1, %r8d ; X64-NEXT: kmovw %k1, %r8d
; X64-NEXT: addl %edi, %eax
; X64-NEXT: addl %ecx, %edx ; X64-NEXT: addl %ecx, %edx
; X64-NEXT: addl %r8d, %eax ; X64-NEXT: addl %r8d, %eax
; X64-NEXT: addl %esi, %eax ; X64-NEXT: addl %esi, %eax
; X64-NEXT: addl %edx, %eax ; X64-NEXT: addl %edx, %eax
; X64-NEXT: addl %edi, %eax
; X64-NEXT: movw %ax, (%rbx) ; X64-NEXT: movw %ax, (%rbx)
; X64-NEXT: leaq -8(%rbp), %rsp ; X64-NEXT: leaq -8(%rbp), %rsp
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: popq %rbp ; X64-NEXT: popq %rbp
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32> %a0, <16 x i32> %b0) %0 = call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32> %a0, <16 x i32> %b0)
%1 = call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32> %a1, <16 x i32> %b1) %1 = call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32> %a1, <16 x i32> %b1)
Show All 34 Lines

llvm/test/CodeGen/X86/win-smallparams.ll

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; WIN32: pushl $5 ; WIN32: pushl $5
; WIN32: pushl $4 ; WIN32: pushl $4
; WIN32: pushl $3 ; WIN32: pushl $3
; WIN32: pushl $2 ; WIN32: pushl $2
; WIN32: pushl $1 ; WIN32: pushl $1
; WIN32: calll _manyargs ; WIN32: calll _manyargs
; WIN32-LABEL: _manyargs: ; WIN32-LABEL: _manyargs:
; WIN32: pushl %ebx
; WIN32: pushl %edi ; WIN32: pushl %edi
; WIN32: pushl %esi ; WIN32: pushl %esi
; WIN32-DAG: movsbl 16(%esp), ; WIN32-DAG: movzwl 32(%esp),
; WIN32-DAG: movswl 20(%esp), ; WIN32-DAG: movzbl 28(%esp),
; WIN32-DAG: movzbl 24(%esp), ; WIN32-DAG: movzwl 24(%esp),
; WIN32-DAG: movzwl 28(%esp), ; WIN32-DAG: movzbl 20(%esp),
; WIN32-DAG: movzbl 32(%esp), ; WIN32-DAG: movswl 16(%esp),
; WIN32-DAG: movzwl 36(%esp), ; WIN32-DAG: movsbl 12(%esp),
; WIN32: retl ; WIN32: retl

llvm/test/CodeGen/X86/x86-cmov-converter.ll

Show First 20 Lines • Show All 760 Lines • ▼ Show 20 Lines
; CHECK-NEXT: movl %edx, %r8d ; CHECK-NEXT: movl %edx, %r8d
; CHECK-NEXT: cmpl %esi, %edi ; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: ja .LBB9_2 ; CHECK-NEXT: ja .LBB9_2
; CHECK-NEXT: # %bb.1: # %entry ; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: movl (%rcx), %edx ; CHECK-NEXT: movl (%rcx), %edx
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: movl %esi, %r8d ; CHECK-NEXT: movl %esi, %r8d
; CHECK-NEXT: .LBB9_2: # %entry ; CHECK-NEXT: .LBB9_2: # %entry
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %r8d, %eax ; CHECK-NEXT: addl %r8d, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK-FORCEALL-LABEL: test_cmov_memoperand_in_group: ; CHECK-FORCEALL-LABEL: test_cmov_memoperand_in_group:
; CHECK-FORCEALL: # %bb.0: # %entry ; CHECK-FORCEALL: # %bb.0: # %entry
; CHECK-FORCEALL-NEXT: movl %edx, %eax ; CHECK-FORCEALL-NEXT: movl %edx, %eax
; CHECK-FORCEALL-NEXT: movl %edx, %r8d ; CHECK-FORCEALL-NEXT: movl %edx, %r8d
; CHECK-FORCEALL-NEXT: cmpl %esi, %edi ; CHECK-FORCEALL-NEXT: cmpl %esi, %edi
; CHECK-FORCEALL-NEXT: ja .LBB9_2 ; CHECK-FORCEALL-NEXT: ja .LBB9_2
; CHECK-FORCEALL-NEXT: # %bb.1: # %entry ; CHECK-FORCEALL-NEXT: # %bb.1: # %entry
; CHECK-FORCEALL-NEXT: movl (%rcx), %edx ; CHECK-FORCEALL-NEXT: movl (%rcx), %edx
; CHECK-FORCEALL-NEXT: movl %edi, %eax ; CHECK-FORCEALL-NEXT: movl %edi, %eax
; CHECK-FORCEALL-NEXT: movl %esi, %r8d ; CHECK-FORCEALL-NEXT: movl %esi, %r8d
; CHECK-FORCEALL-NEXT: .LBB9_2: # %entry ; CHECK-FORCEALL-NEXT: .LBB9_2: # %entry
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: addl %r8d, %eax ; CHECK-FORCEALL-NEXT: addl %r8d, %eax
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: retq ; CHECK-FORCEALL-NEXT: retq
entry: entry:
%cond = icmp ugt i32 %a, %b %cond = icmp ugt i32 %a, %b
%y = load i32, ptr %y.ptr %y = load i32, ptr %y.ptr
%z1 = select i1 %cond, i32 %x, i32 %a %z1 = select i1 %cond, i32 %x, i32 %a
%z2 = select i1 %cond, i32 %x, i32 %y %z2 = select i1 %cond, i32 %x, i32 %y
%z3 = select i1 %cond, i32 %x, i32 %b %z3 = select i1 %cond, i32 %x, i32 %b
%s1 = add i32 %z1, %z2 %s1 = add i32 %z1, %z2
Show All 9 Lines
; CHECK-NEXT: movl %edx, %r8d ; CHECK-NEXT: movl %edx, %r8d
; CHECK-NEXT: cmpl %esi, %edi ; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: jbe .LBB10_2 ; CHECK-NEXT: jbe .LBB10_2
; CHECK-NEXT: # %bb.1: # %entry ; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: movl (%rcx), %edx ; CHECK-NEXT: movl (%rcx), %edx
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: movl %esi, %r8d ; CHECK-NEXT: movl %esi, %r8d
; CHECK-NEXT: .LBB10_2: # %entry ; CHECK-NEXT: .LBB10_2: # %entry
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %r8d, %eax ; CHECK-NEXT: addl %r8d, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK-FORCEALL-LABEL: test_cmov_memoperand_in_group2: ; CHECK-FORCEALL-LABEL: test_cmov_memoperand_in_group2:
; CHECK-FORCEALL: # %bb.0: # %entry ; CHECK-FORCEALL: # %bb.0: # %entry
; CHECK-FORCEALL-NEXT: movl %edx, %eax ; CHECK-FORCEALL-NEXT: movl %edx, %eax
; CHECK-FORCEALL-NEXT: movl %edx, %r8d ; CHECK-FORCEALL-NEXT: movl %edx, %r8d
; CHECK-FORCEALL-NEXT: cmpl %esi, %edi ; CHECK-FORCEALL-NEXT: cmpl %esi, %edi
; CHECK-FORCEALL-NEXT: jbe .LBB10_2 ; CHECK-FORCEALL-NEXT: jbe .LBB10_2
; CHECK-FORCEALL-NEXT: # %bb.1: # %entry ; CHECK-FORCEALL-NEXT: # %bb.1: # %entry
; CHECK-FORCEALL-NEXT: movl (%rcx), %edx ; CHECK-FORCEALL-NEXT: movl (%rcx), %edx
; CHECK-FORCEALL-NEXT: movl %edi, %eax ; CHECK-FORCEALL-NEXT: movl %edi, %eax
; CHECK-FORCEALL-NEXT: movl %esi, %r8d ; CHECK-FORCEALL-NEXT: movl %esi, %r8d
; CHECK-FORCEALL-NEXT: .LBB10_2: # %entry ; CHECK-FORCEALL-NEXT: .LBB10_2: # %entry
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: addl %r8d, %eax ; CHECK-FORCEALL-NEXT: addl %r8d, %eax
; CHECK-FORCEALL-NEXT: addl %edx, %eax
; CHECK-FORCEALL-NEXT: retq ; CHECK-FORCEALL-NEXT: retq
entry: entry:
%cond = icmp ugt i32 %a, %b %cond = icmp ugt i32 %a, %b
%y = load i32, ptr %y.ptr %y = load i32, ptr %y.ptr
%z2 = select i1 %cond, i32 %a, i32 %x %z2 = select i1 %cond, i32 %a, i32 %x
%z1 = select i1 %cond, i32 %y, i32 %x %z1 = select i1 %cond, i32 %y, i32 %x
%z3 = select i1 %cond, i32 %b, i32 %x %z3 = select i1 %cond, i32 %b, i32 %x
%s1 = add i32 %z1, %z2 %s1 = add i32 %z1, %z2
▲ Show 20 Lines • Show All 226 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll

Show All 32 Lines
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movaps %xmm0, %xmm1 ; CHECK-NEXT: movaps %xmm0, %xmm1
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: movl %edi, %edx ; CHECK-NEXT: movl %edi, %edx
; CHECK-NEXT: callq bar@PLT ; CHECK-NEXT: callq bar@PLT
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: addl %ecx, %eax ; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: addl %edx, %eax
; CHECK-NEXT: xorps %xmm0, %xmm0 ; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cvtsi2ss %eax, %xmm0 ; CHECK-NEXT: cvtsi2ss %eax, %xmm0
; CHECK-NEXT: addss %xmm1, %xmm0 ; CHECK-NEXT: addss %xmm1, %xmm0
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%call = call i32 @bar(i32 %a0, i32 %a1, float %b0) %call = call i32 @bar(i32 %a0, i32 %a1, float %b0)
%c0 = add i32 %a0, %call %c0 = add i32 %a0, %call
%c1 = add i32 %c0, %a1 %c1 = add i32 %c0, %a1
%c2 = sitofp i32 %c1 to float %c2 = sitofp i32 %c1 to float
%c3 = fadd float %c2, %b0 %c3 = fadd float %c2, %b0
ret float %c3 ret float %c3
} }
attributes #0 = { "no_caller_saved_registers" } attributes #0 = { "no_caller_saved_registers" }

llvm/test/CodeGen/X86/xmulo.ll

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; ;
; WIN32-LABEL: smuloi64: ; WIN32-LABEL: smuloi64:
; WIN32: # %bb.0: ; WIN32: # %bb.0:
; WIN32-NEXT: pushl %ebp ; WIN32-NEXT: pushl %ebp
; WIN32-NEXT: pushl %ebx ; WIN32-NEXT: pushl %ebx
; WIN32-NEXT: pushl %edi ; WIN32-NEXT: pushl %edi
; WIN32-NEXT: pushl %esi ; WIN32-NEXT: pushl %esi
; WIN32-NEXT: subl $8, %esp ; WIN32-NEXT: subl $8, %esp
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %ecx, %edi ; WIN32-NEXT: movl %ecx, %ebx
; WIN32-NEXT: sarl $31, %edi ; WIN32-NEXT: sarl $31, %ebx
; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: imull %edi, %esi
; WIN32-NEXT: mull %edi
; WIN32-NEXT: movl %eax, %ebx
; WIN32-NEXT: addl %esi, %edx
; WIN32-NEXT: movl %ebp, %esi ; WIN32-NEXT: movl %ebp, %esi
; WIN32-NEXT: imull %ebp, %edi ; WIN32-NEXT: imull %ebx, %esi
; WIN32-NEXT: addl %edx, %edi ; WIN32-NEXT: movl %ebp, %eax
; WIN32-NEXT: mull %ebx
; WIN32-NEXT: movl %eax, %edi
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: imull %eax, %ebx
; WIN32-NEXT: addl %esi, %ebx
; WIN32-NEXT: addl %edx, %ebx
; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: sarl $31, %esi ; WIN32-NEXT: sarl $31, %esi
; WIN32-NEXT: movl %esi, %ebp ; WIN32-NEXT: movl %esi, %edx
; WIN32-NEXT: imull %ecx, %ebp ; WIN32-NEXT: imull %ecx, %edx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %esi, %eax ; WIN32-NEXT: movl %esi, %eax
; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %ebp, %edx
; WIN32-NEXT: imull %ecx, %esi ; WIN32-NEXT: imull %ecx, %esi
; WIN32-NEXT: addl %edx, %esi ; WIN32-NEXT: addl %edx, %esi
; WIN32-NEXT: addl %ebx, %eax ; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %edx, %esi
; WIN32-NEXT: addl %edi, %eax
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill
; WIN32-NEXT: adcl %edi, %esi ; WIN32-NEXT: adcl %ebx, %esi
; WIN32-NEXT: movl %ecx, %eax ; WIN32-NEXT: movl %ecx, %eax
; WIN32-NEXT: movl %ecx, %edi ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl %edx, %ebx
; WIN32-NEXT: mull %ecx
; WIN32-NEXT: movl %edx, %ebp
; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull %ecx ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: movl %edx, %ebx ; WIN32-NEXT: movl %edx, %edi
; WIN32-NEXT: movl %eax, %ecx ; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: addl %ebp, %ecx ; WIN32-NEXT: addl %ebx, %ecx
; WIN32-NEXT: adcl $0, %ebx ; WIN32-NEXT: adcl $0, %edi
; WIN32-NEXT: movl %edi, %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull {{[0-9]+}}(%esp) ; WIN32-NEXT: mull {{[0-9]+}}(%esp)
; WIN32-NEXT: movl %edx, %edi ; WIN32-NEXT: movl %edx, %ebx
; WIN32-NEXT: movl %eax, %ebp ; WIN32-NEXT: movl %eax, %ebp
; WIN32-NEXT: addl %ecx, %ebp ; WIN32-NEXT: addl %ecx, %ebp
; WIN32-NEXT: adcl %ebx, %edi ; WIN32-NEXT: adcl %edi, %ebx
; WIN32-NEXT: setb %cl ; WIN32-NEXT: setb %cl
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull {{[0-9]+}}(%esp) ; WIN32-NEXT: mull {{[0-9]+}}(%esp)
; WIN32-NEXT: addl %edi, %eax ; WIN32-NEXT: addl %ebx, %eax
; WIN32-NEXT: movzbl %cl, %ecx ; WIN32-NEXT: movzbl %cl, %ecx
; WIN32-NEXT: adcl %ecx, %edx ; WIN32-NEXT: adcl %ecx, %edx
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; WIN32-NEXT: adcl %esi, %edx ; WIN32-NEXT: adcl %esi, %edx
; WIN32-NEXT: movl %ebp, %ecx ; WIN32-NEXT: movl %ebp, %ecx
; WIN32-NEXT: sarl $31, %ecx ; WIN32-NEXT: sarl $31, %ecx
; WIN32-NEXT: xorl %ecx, %edx ; WIN32-NEXT: xorl %ecx, %edx
; WIN32-NEXT: xorl %eax, %ecx ; WIN32-NEXT: xorl %eax, %ecx
▲ Show 20 Lines • Show All 299 Lines • ▼ Show 20 Lines
; WIN32: # %bb.0: ; WIN32: # %bb.0:
; WIN32-NEXT: pushl %ebp ; WIN32-NEXT: pushl %ebp
; WIN32-NEXT: pushl %ebx ; WIN32-NEXT: pushl %ebx
; WIN32-NEXT: pushl %edi ; WIN32-NEXT: pushl %edi
; WIN32-NEXT: pushl %esi ; WIN32-NEXT: pushl %esi
; WIN32-NEXT: pushl %eax ; WIN32-NEXT: pushl %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: sarl $31, %ecx ; WIN32-NEXT: sarl $31, %ecx
; WIN32-NEXT: movl %ebp, %edi ; WIN32-NEXT: movl %ebp, %edi
; WIN32-NEXT: imull %ecx, %edi ; WIN32-NEXT: imull %ecx, %edi
; WIN32-NEXT: movl %ebp, %eax ; WIN32-NEXT: movl %ebp, %eax
; WIN32-NEXT: mull %ecx ; WIN32-NEXT: mull %ecx
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: addl %edi, %edx
; WIN32-NEXT: imull %ebx, %ecx ; WIN32-NEXT: imull %ebx, %ecx
; WIN32-NEXT: addl %edi, %ecx
; WIN32-NEXT: addl %edx, %ecx ; WIN32-NEXT: addl %edx, %ecx
; WIN32-NEXT: sarl $31, %ebx ; WIN32-NEXT: sarl $31, %ebx
; WIN32-NEXT: movl %ebx, %edi ; WIN32-NEXT: movl %ebx, %edx
; WIN32-NEXT: imull %esi, %edi ; WIN32-NEXT: imull {{[0-9]+}}(%esp), %edx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %esi ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: movl %ebx, %eax ; WIN32-NEXT: movl %ebx, %eax
; WIN32-NEXT: mull %esi ; WIN32-NEXT: imull %edi, %ebx
; WIN32-NEXT: addl %edi, %edx
; WIN32-NEXT: movl %esi, %edi
; WIN32-NEXT: imull %esi, %ebx
; WIN32-NEXT: addl %edx, %ebx ; WIN32-NEXT: addl %edx, %ebx
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; WIN32-NEXT: mull %edi
; WIN32-NEXT: addl %edx, %ebx
; WIN32-NEXT: addl %esi, %eax
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill
; WIN32-NEXT: adcl %ecx, %ebx ; WIN32-NEXT: adcl %ecx, %ebx
; WIN32-NEXT: movl %edi, %eax ; WIN32-NEXT: movl %edi, %eax
; WIN32-NEXT: mull %ebp ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: movl %edx, %esi ; WIN32-NEXT: movl %edx, %esi
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull %ebp ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: movl %edx, %ecx ; WIN32-NEXT: movl %edx, %ecx
; WIN32-NEXT: movl %eax, %ebp ; WIN32-NEXT: movl %eax, %edi
; WIN32-NEXT: addl %esi, %ebp ; WIN32-NEXT: addl %esi, %edi
; WIN32-NEXT: adcl $0, %ecx ; WIN32-NEXT: adcl $0, %ecx
; WIN32-NEXT: movl %edi, %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull {{[0-9]+}}(%esp) ; WIN32-NEXT: mull {{[0-9]+}}(%esp)
; WIN32-NEXT: movl %edx, %edi ; WIN32-NEXT: movl %edx, %ebp
; WIN32-NEXT: movl %eax, %esi ; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: addl %ebp, %esi ; WIN32-NEXT: addl %edi, %esi
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: adcl %ecx, %edi ; WIN32-NEXT: adcl %ecx, %ebp
; WIN32-NEXT: setb %cl ; WIN32-NEXT: setb %cl
; WIN32-NEXT: movl %ebp, %eax ; WIN32-NEXT: movl %edi, %eax
; WIN32-NEXT: mull {{[0-9]+}}(%esp) ; WIN32-NEXT: mull {{[0-9]+}}(%esp)
; WIN32-NEXT: addl %edi, %eax ; WIN32-NEXT: addl %ebp, %eax
; WIN32-NEXT: movzbl %cl, %ecx ; WIN32-NEXT: movzbl %cl, %ecx
; WIN32-NEXT: adcl %ecx, %edx ; WIN32-NEXT: adcl %ecx, %edx
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; WIN32-NEXT: adcl %ebx, %edx ; WIN32-NEXT: adcl %ebx, %edx
; WIN32-NEXT: sarl $31, %esi ; WIN32-NEXT: sarl $31, %esi
; WIN32-NEXT: xorl %esi, %edx ; WIN32-NEXT: xorl %esi, %edx
; WIN32-NEXT: xorl %eax, %esi ; WIN32-NEXT: xorl %eax, %esi
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: orl %edx, %esi ; WIN32-NEXT: orl %edx, %esi
; WIN32-NEXT: jne LBB12_2 ; WIN32-NEXT: jne LBB12_2
; WIN32-NEXT: # %bb.1: ; WIN32-NEXT: # %bb.1:
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: LBB12_2: ; WIN32-NEXT: LBB12_2:
; WIN32-NEXT: movl %ebp, %edx ; WIN32-NEXT: movl %edi, %edx
; WIN32-NEXT: addl $4, %esp ; WIN32-NEXT: addl $4, %esp
; WIN32-NEXT: popl %esi ; WIN32-NEXT: popl %esi
; WIN32-NEXT: popl %edi ; WIN32-NEXT: popl %edi
; WIN32-NEXT: popl %ebx ; WIN32-NEXT: popl %ebx
; WIN32-NEXT: popl %ebp ; WIN32-NEXT: popl %ebp
; WIN32-NEXT: retl ; WIN32-NEXT: retl
%t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2) %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
%obit = extractvalue {i64, i1} %t, 1 %obit = extractvalue {i64, i1} %t, 1
▲ Show 20 Lines • Show All 345 Lines • ▼ Show 20 Lines
; ;
; WIN32-LABEL: smulobri64: ; WIN32-LABEL: smulobri64:
; WIN32: # %bb.0: ; WIN32: # %bb.0:
; WIN32-NEXT: pushl %ebp ; WIN32-NEXT: pushl %ebp
; WIN32-NEXT: pushl %ebx ; WIN32-NEXT: pushl %ebx
; WIN32-NEXT: pushl %edi ; WIN32-NEXT: pushl %edi
; WIN32-NEXT: pushl %esi ; WIN32-NEXT: pushl %esi
; WIN32-NEXT: pushl %eax ; WIN32-NEXT: pushl %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %ecx, %edi ; WIN32-NEXT: movl %ecx, %edi
; WIN32-NEXT: sarl $31, %edi ; WIN32-NEXT: sarl $31, %edi
; WIN32-NEXT: movl %eax, %esi ; WIN32-NEXT: movl %ebp, %esi
; WIN32-NEXT: imull %edi, %esi ; WIN32-NEXT: imull %edi, %esi
; WIN32-NEXT: movl %ebp, %eax
; WIN32-NEXT: mull %edi ; WIN32-NEXT: mull %edi
; WIN32-NEXT: movl %eax, %ebp ; WIN32-NEXT: movl %eax, %ebx
; WIN32-NEXT: addl %esi, %edx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %ebx, %esi ; WIN32-NEXT: imull %eax, %edi
; WIN32-NEXT: imull %ebx, %edi ; WIN32-NEXT: addl %esi, %edi
; WIN32-NEXT: addl %edx, %edi ; WIN32-NEXT: addl %edx, %edi
; WIN32-NEXT: movl %eax, %esi
; WIN32-NEXT: sarl $31, %esi ; WIN32-NEXT: sarl $31, %esi
; WIN32-NEXT: movl %esi, %ebx ; WIN32-NEXT: movl %esi, %edx
; WIN32-NEXT: imull %ecx, %ebx ; WIN32-NEXT: imull %ecx, %edx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %esi, %eax ; WIN32-NEXT: movl %esi, %eax
; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %ebx, %edx
; WIN32-NEXT: imull %ecx, %esi ; WIN32-NEXT: imull %ecx, %esi
; WIN32-NEXT: addl %edx, %esi ; WIN32-NEXT: addl %edx, %esi
; WIN32-NEXT: addl %ebp, %eax ; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %edx, %esi
; WIN32-NEXT: addl %ebx, %eax
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill
; WIN32-NEXT: adcl %edi, %esi ; WIN32-NEXT: adcl %edi, %esi
; WIN32-NEXT: movl %ecx, %eax ; WIN32-NEXT: movl %ecx, %eax
; WIN32-NEXT: movl %ecx, %edi ; WIN32-NEXT: movl %ecx, %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: mull %ecx ; WIN32-NEXT: movl %edx, %edi
; WIN32-NEXT: movl %edx, %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull %ecx ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: movl %edx, %ebp ; WIN32-NEXT: movl %edx, %ebp
; WIN32-NEXT: movl %eax, %ecx ; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: addl %ebx, %ecx ; WIN32-NEXT: addl %edi, %ecx
; WIN32-NEXT: adcl $0, %ebp ; WIN32-NEXT: adcl $0, %ebp
; WIN32-NEXT: movl %edi, %eax ; WIN32-NEXT: movl %ebx, %eax
; WIN32-NEXT: mull {{[0-9]+}}(%esp) ; WIN32-NEXT: mull {{[0-9]+}}(%esp)
; WIN32-NEXT: movl %edx, %edi ; WIN32-NEXT: movl %edx, %ebx
; WIN32-NEXT: movl %eax, %ebx ; WIN32-NEXT: movl %eax, %edi
; WIN32-NEXT: addl %ecx, %ebx ; WIN32-NEXT: addl %ecx, %edi
; WIN32-NEXT: adcl %ebp, %edi ; WIN32-NEXT: adcl %ebp, %ebx
; WIN32-NEXT: setb %cl ; WIN32-NEXT: setb %cl
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull {{[0-9]+}}(%esp) ; WIN32-NEXT: mull {{[0-9]+}}(%esp)
; WIN32-NEXT: addl %edi, %eax ; WIN32-NEXT: addl %ebx, %eax
; WIN32-NEXT: movzbl %cl, %ecx ; WIN32-NEXT: movzbl %cl, %ecx
; WIN32-NEXT: adcl %ecx, %edx ; WIN32-NEXT: adcl %ecx, %edx
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; WIN32-NEXT: adcl %esi, %edx ; WIN32-NEXT: adcl %esi, %edx
; WIN32-NEXT: sarl $31, %ebx ; WIN32-NEXT: sarl $31, %edi
; WIN32-NEXT: xorl %ebx, %edx ; WIN32-NEXT: xorl %edi, %edx
; WIN32-NEXT: xorl %eax, %ebx ; WIN32-NEXT: xorl %eax, %edi
; WIN32-NEXT: orl %edx, %ebx ; WIN32-NEXT: orl %edx, %edi
; WIN32-NEXT: jne LBB18_1 ; WIN32-NEXT: jne LBB18_1
; WIN32-NEXT: # %bb.3: # %continue ; WIN32-NEXT: # %bb.3: # %continue
; WIN32-NEXT: movb $1, %al ; WIN32-NEXT: movb $1, %al
; WIN32-NEXT: LBB18_2: # %overflow ; WIN32-NEXT: LBB18_2: # %overflow
; WIN32-NEXT: addl $4, %esp ; WIN32-NEXT: addl $4, %esp
; WIN32-NEXT: popl %esi ; WIN32-NEXT: popl %esi
; WIN32-NEXT: popl %edi ; WIN32-NEXT: popl %edi
; WIN32-NEXT: popl %ebx ; WIN32-NEXT: popl %ebx
▲ Show 20 Lines • Show All 646 Lines • ▼ Show 20 Lines
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl (%eax), %esi ; WIN32-NEXT: movl (%eax), %esi
; WIN32-NEXT: movl 4(%eax), %ebp ; WIN32-NEXT: movl 4(%eax), %ebp
; WIN32-NEXT: sarl $31, %ebx ; WIN32-NEXT: sarl $31, %ebx
; WIN32-NEXT: movl %ebx, %ecx ; WIN32-NEXT: movl %ebx, %ecx
; WIN32-NEXT: imull %ebp, %ecx ; WIN32-NEXT: imull %ebp, %ecx
; WIN32-NEXT: movl %ebx, %eax ; WIN32-NEXT: movl %ebx, %eax
; WIN32-NEXT: imull %esi, %ebx
; WIN32-NEXT: addl %ecx, %ebx
; WIN32-NEXT: mull %esi ; WIN32-NEXT: mull %esi
; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: addl %ecx, %edx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: imull %esi, %ebx
; WIN32-NEXT: addl %edx, %ebx ; WIN32-NEXT: addl %edx, %ebx
; WIN32-NEXT: movl %ebp, %ecx ; WIN32-NEXT: movl %ebp, %ecx
; WIN32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: sarl $31, %ecx ; WIN32-NEXT: sarl $31, %ecx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %eax, %edi ; WIN32-NEXT: movl %eax, %edi
; WIN32-NEXT: imull %ecx, %edi ; WIN32-NEXT: imull %ecx, %edi
; WIN32-NEXT: mull %ecx ; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %edi, %edx
; WIN32-NEXT: imull {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: imull {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: addl %edi, %ecx
; WIN32-NEXT: addl %edx, %ecx ; WIN32-NEXT: addl %edx, %ecx
; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: adcl %ebx, %ecx ; WIN32-NEXT: adcl %ebx, %ecx
; WIN32-NEXT: movl %esi, %eax ; WIN32-NEXT: movl %esi, %eax
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; WIN32-NEXT: mull %edi ; WIN32-NEXT: mull %edi
; WIN32-NEXT: movl %edx, %ebx ; WIN32-NEXT: movl %edx, %ebx
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; WIN64-NEXT: retq ; WIN64-NEXT: retq
; ;
; WIN32-LABEL: smuloi64_load2: ; WIN32-LABEL: smuloi64_load2:
; WIN32: # %bb.0: ; WIN32: # %bb.0:
; WIN32-NEXT: pushl %ebp ; WIN32-NEXT: pushl %ebp
; WIN32-NEXT: pushl %ebx ; WIN32-NEXT: pushl %ebx
; WIN32-NEXT: pushl %edi ; WIN32-NEXT: pushl %edi
; WIN32-NEXT: pushl %esi ; WIN32-NEXT: pushl %esi
; WIN32-NEXT: subl $12, %esp ; WIN32-NEXT: subl $16, %esp
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl (%eax), %ebp ; WIN32-NEXT: movl (%eax), %ebx
; WIN32-NEXT: movl 4(%eax), %ebx ; WIN32-NEXT: movl 4(%eax), %ebp
; WIN32-NEXT: movl %ecx, %edi ; WIN32-NEXT: movl %ecx, %edi
; WIN32-NEXT: sarl $31, %edi ; WIN32-NEXT: sarl $31, %edi
; WIN32-NEXT: movl %ebp, %esi ; WIN32-NEXT: movl %ebx, %esi
; WIN32-NEXT: imull %edi, %esi ; WIN32-NEXT: imull %edi, %esi
; WIN32-NEXT: movl %ebp, %eax ; WIN32-NEXT: movl %ebx, %eax
; WIN32-NEXT: mull %edi ; WIN32-NEXT: mull %edi
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill
; WIN32-NEXT: addl %esi, %edx ; WIN32-NEXT: imull %ebp, %edi
; WIN32-NEXT: movl %ebx, %esi ; WIN32-NEXT: addl %esi, %edi
; WIN32-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: imull %ebx, %edi
; WIN32-NEXT: addl %edx, %edi ; WIN32-NEXT: addl %edx, %edi
; WIN32-NEXT: movl %ebp, %esi
; WIN32-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: sarl $31, %esi ; WIN32-NEXT: sarl $31, %esi
; WIN32-NEXT: movl %esi, %ebx ; WIN32-NEXT: movl %esi, %edx
; WIN32-NEXT: imull %ecx, %ebx ; WIN32-NEXT: imull %ecx, %edx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; WIN32-NEXT: movl %esi, %eax ; WIN32-NEXT: movl %esi, %eax
; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %ebx, %edx
; WIN32-NEXT: imull %ecx, %esi ; WIN32-NEXT: imull %ecx, %esi
; WIN32-NEXT: addl %edx, %esi ; WIN32-NEXT: addl %edx, %esi
; WIN32-NEXT: mull %ecx
; WIN32-NEXT: addl %edx, %esi
; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload ; WIN32-NEXT: addl (%esp), %eax # 4-byte Folded Reload
; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; WIN32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: adcl %edi, %esi ; WIN32-NEXT: adcl %edi, %esi
; WIN32-NEXT: movl %ecx, %eax ; WIN32-NEXT: movl %ecx, %eax
; WIN32-NEXT: mull %ebp ; WIN32-NEXT: mull %ebx
; WIN32-NEXT: movl %edx, %edi ; WIN32-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill ; WIN32-NEXT: movl %eax, (%esp) # 4-byte Spill
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull %ebp ; WIN32-NEXT: mull %ebx
; WIN32-NEXT: movl %edx, %ebx ; WIN32-NEXT: movl %edx, %edi
; WIN32-NEXT: movl %eax, %ecx ; WIN32-NEXT: movl %eax, %ecx
; WIN32-NEXT: addl %edi, %ecx ; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
; WIN32-NEXT: adcl $0, %ebx ; WIN32-NEXT: adcl $0, %edi
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload ; WIN32-NEXT: mull %ebp
; WIN32-NEXT: movl %edx, %edi ; WIN32-NEXT: movl %edx, %ebx
; WIN32-NEXT: movl %eax, %ebp ; WIN32-NEXT: movl %eax, %ebp
; WIN32-NEXT: addl %ecx, %ebp ; WIN32-NEXT: addl %ecx, %ebp
; WIN32-NEXT: adcl %ebx, %edi ; WIN32-NEXT: adcl %edi, %ebx
; WIN32-NEXT: setb %cl ; WIN32-NEXT: setb %cl
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload ; WIN32-NEXT: mull {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
; WIN32-NEXT: addl %edi, %eax ; WIN32-NEXT: addl %ebx, %eax
; WIN32-NEXT: movzbl %cl, %ecx ; WIN32-NEXT: movzbl %cl, %ecx
; WIN32-NEXT: adcl %ecx, %edx ; WIN32-NEXT: adcl %ecx, %edx
; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload ; WIN32-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
; WIN32-NEXT: adcl %esi, %edx ; WIN32-NEXT: adcl %esi, %edx
; WIN32-NEXT: movl %ebp, %ecx ; WIN32-NEXT: movl %ebp, %ecx
; WIN32-NEXT: sarl $31, %ecx ; WIN32-NEXT: sarl $31, %ecx
; WIN32-NEXT: xorl %ecx, %edx ; WIN32-NEXT: xorl %ecx, %edx
; WIN32-NEXT: xorl %eax, %ecx ; WIN32-NEXT: xorl %eax, %ecx
; WIN32-NEXT: orl %edx, %ecx ; WIN32-NEXT: orl %edx, %ecx
; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax ; WIN32-NEXT: movl {{[0-9]+}}(%esp), %eax
; WIN32-NEXT: movl %ebp, 4(%eax) ; WIN32-NEXT: movl %ebp, 4(%eax)
; WIN32-NEXT: movl (%esp), %ecx # 4-byte Reload ; WIN32-NEXT: movl (%esp), %ecx # 4-byte Reload
; WIN32-NEXT: movl %ecx, (%eax) ; WIN32-NEXT: movl %ecx, (%eax)
; WIN32-NEXT: setne %al ; WIN32-NEXT: setne %al
; WIN32-NEXT: addl $12, %esp ; WIN32-NEXT: addl $16, %esp
RKSimonUnsubmitted
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Annoying - normally I'd expect reassociation to help us reduce stack use

RKSimon: Annoying - normally I'd expect reassociation to help us reduce stack use
CarrotAuthorUnsubmitted
Done
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Agree it is annoying.
But I think the impact of reassociation to register allocation is quite randomly, it depends on if the operands can be killed by the first instruction, and later be scheduled earlier to shorten the operands' live range.

In this specific case, although it increases stack use, it reduces register spill/reload instructions.

$ git diff origin/main xmulo.ll | grep "+;" | wc
    104     518    3715
$ git diff origin/main xmulo.ll | grep "\-;" | wc
    108     542    3846
Carrot: Agree it is annoying. But I think the impact of reassociation to register allocation is quite…
; WIN32-NEXT: popl %esi ; WIN32-NEXT: popl %esi
; WIN32-NEXT: popl %edi ; WIN32-NEXT: popl %edi
; WIN32-NEXT: popl %ebx ; WIN32-NEXT: popl %ebx
; WIN32-NEXT: popl %ebp ; WIN32-NEXT: popl %ebp
; WIN32-NEXT: retl ; WIN32-NEXT: retl
%v2 = load i64, ptr %ptr2 %v2 = load i64, ptr %ptr2
%t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2) %t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
%val = extractvalue {i64, i1} %t, 0 %val = extractvalue {i64, i1} %t, 0
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llvm/test/CodeGen/X86/mul-constant-i64.ll