This is an archive of the discontinued LLVM Phabricator instance.

Add MC support of RISCV Zcd Extension
ClosedPublic

Authored by VincentWu on Sep 19 2022, 5:23 AM.

Details

Summary

This patch add the instructions of Zcd extension.

Zcd is a subset of C Ext which include the double-precision floating-point instructions (c.fld, c.fldsp, c.fsd, c.fsdsp).

Diff Detail

Event Timeline

VincentWu created this revision.Sep 19 2022, 5:23 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 19 2022, 5:23 AM
VincentWu requested review of this revision.Sep 19 2022, 5:23 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptSep 19 2022, 5:23 AM

Need to add Zcd command lines to compress-rv32d.s

clang/test/Preprocessor/riscv-target-features.c
47–48

Need to update this too.

llvm/lib/Target/RISCV/RISCVInstrInfoC.td
881

CompressPats need their predicates updated too. They are used by the assembler so they are MC layer.

llvm/test/MC/RISCV/rv32dc-valid.s
1

Need to add Zcd command lines

craig.topper added inline comments.Sep 21 2022, 6:15 PM
llvm/lib/Target/RISCV/RISCV.td
366

This predicate isn't used

VincentWu updated this revision to Diff 462721.Sep 25 2022, 4:44 AM
VincentWu marked 3 inline comments as done.

address comments

VincentWu updated this revision to Diff 462727.Sep 25 2022, 7:04 AM

fix testcase

craig.topper requested changes to this revision.Sep 26 2022, 9:43 AM

Need to add Zcd command lines to compress-rv32d.s

This revision now requires changes to proceed.Sep 26 2022, 9:43 AM
VincentWu updated this revision to Diff 463202.Sep 27 2022, 5:39 AM

address comment

This revision is now accepted and ready to land.Sep 30 2022, 9:23 AM
This revision was automatically updated to reflect the committed changes.