[IR] Don't use blockaddresses as callbr arguments

[nikic]

Summary

Following some recent discussions, this changes the representation of callbrs in IR. The current blockaddress arguments are replaced with ! label constraints that refer directly to callbr indirect destinations:

; Before:
%res = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,i,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* blockaddress(@test8, %foo))
to label %asm.fallthrough [label %foo]
; After:
%res = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,!i,~{dirflag},~{fpsr},~{flags}"(i8* %0)
to label %asm.fallthrough [label %foo]

The benefit of this is that we can easily update the successors of a callbr, without having to worry about also updating blockaddress references. This should allow us to remove some limitations:

• Allow unrolling/peeling/rotation of callbr, or any other clone-based optimizations (https://github.com/llvm/llvm-project/issues/41834)
• Allow duplicate successors (https://github.com/llvm/llvm-project/issues/45248)

This is just the IR representation change though, I will follow up with patches to remove limtations in various transformation passes that are no longer needed.

[jyknight]

Can't we remove blocks from the callbr target list in some circumstances? E.g. if we merge two blocks maybe?

[nikic]

In D129288#3635732, @jyknight wrote:

Can't we remove blocks from the callbr target list in some circumstances? E.g. if we merge two blocks maybe?

I believe we currently don't allow doing that, see e.g. the check in https://github.com/llvm/llvm-project/blob/26f369393d4e60c78d872c4cafcbf3fd929b9004/llvm/lib/Transforms/Utils/Local.cpp#L1092. This is because we currently don't allow callbr to have the same successor multiple times (though I think we should allow that, to allow transforms like these.)

[jyknight]

Why the poison placeholders? This makes it easy to satisfy the existing inlineasm infrastructure. It would be cleaner to omit the placeholder arguments and just say that trailing inlinasm constraints refer to the indirect target labels. InlineAsm itself doesn't have knowledge about those though, so it would not be possible to verify InlineAsm constraints in isolation.

I'm really uncomfortable with this hack. If we're going to introduce a new kind of input which doesn't come from the arglist, I think it'd be better to introduce a new constraint modifier symbol which can be used with input constraints to indicate that...then, the parsed InlineAsm will have the expected count of those separately, and the the verifier can verify the count matches at the appropriate time (during call/callbr verification), and we can propagate this into SDag, etc...

E.g., we could choose the symbol '!' for that, so you might have e.g.:
callbr void asm sideeffect "", "!i,r,!i,~{dirflag},~{fpsr},~{flags}"(i32 4) to label %1 [label %2, label %3]

In D129288#3635747, @nikic wrote:

In D129288#3635732, @jyknight wrote:

Can't we remove blocks from the callbr target list in some circumstances? E.g. if we merge two blocks maybe?

I believe we currently don't allow doing that, see e.g. the check in https://github.com/llvm/llvm-project/blob/26f369393d4e60c78d872c4cafcbf3fd929b9004/llvm/lib/Transforms/Utils/Local.cpp#L1092. This is because we currently don't allow callbr to have the same successor multiple times (though I think we should allow that, to allow transforms like these.)

Huh. I would've expected us to previously have coalesced duplicates, not prohibit rewrites that would create duplicates. Anyways, NOW we should definitely allow duplicates in the list -- it's now actually an ordered list, not a set as it theoretically was before. If you've gone through the code to ensure that nothing ever modifies the order of entries, or adds/removes entries from the list, we'll probably be okay after that change.

[nickdesaulniers]

In D129288#3635747, @nikic wrote:

In D129288#3635732, @jyknight wrote:

Can't we remove blocks from the callbr target list in some circumstances? E.g. if we merge two blocks maybe?

I believe we currently don't allow doing that, see e.g. the check in https://github.com/llvm/llvm-project/blob/26f369393d4e60c78d872c4cafcbf3fd929b9004/llvm/lib/Transforms/Utils/Local.cpp#L1092. This is because we currently don't allow callbr to have the same successor multiple times (though I think we should allow that, to allow transforms like these.)

I agree that we should allow duplicate BBs in the IR operand list for callbr. While the higher level language prevents such cases (asm goto will error if the same label appears more than once), it leads to dumb compilation failures when optimizing, such as: https://github.com/llvm/llvm-project/issues/45248.

The main issue is that if the same operand appears in the operand list twice, we need to be careful not to remove instances; the inline asm string still needs to correspond to the same number of operands (but this isn't being proposed; I'm attacking a strawman).

[nickdesaulniers]

In D129288#3636534, @nickdesaulniers wrote:

In D129288#3635747, @nikic wrote:

In D129288#3635732, @jyknight wrote:

Can't we remove blocks from the callbr target list in some circumstances? E.g. if we merge two blocks maybe?

I believe we currently don't allow doing that, see e.g. the check in https://github.com/llvm/llvm-project/blob/26f369393d4e60c78d872c4cafcbf3fd929b9004/llvm/lib/Transforms/Utils/Local.cpp#L1092. This is because we currently don't allow callbr to have the same successor multiple times (though I think we should allow that, to allow transforms like these.)

The main issue is that if the same operand appears in the operand list twice, we need to be careful not to remove instances; the inline asm string still needs to correspond to the same number of operands (but this isn't being proposed; I'm attacking a strawman).

Oh, I think that _is_ what @jyknight is proposing. We'd need to rewrite the asm string in that case. For example:

callbr void asm sideeffect "${0:l} ${1:l}", "!i,!i"()
 to label %1 [label %4, label %4]

would have to become:

callbr void asm sideeffect "${0:l} ${0:l}", "!i,!i"()
 to label %1 [label %4]

What happens if the inline asm uses identifier names rather than numeric references? (Maybe clang boils these away when lowering; haven't checked, but that question comes immediately to mind).

[nikic]

@nickdesaulniers Why would we need to rewrite the asm string? I'd expect things to stay in the form

callbr void asm sideeffect "${0:l} ${1:l}", "!i,!i"()
to label %1 [label %4, label %4]

where the two inline asm arguments just happen to refer to the same label.

[nickdesaulniers]

In D129288#3636812, @nikic wrote:

@nickdesaulniers Why would we need to rewrite the asm string? I'd expect things to stay in the form

callbr void asm sideeffect "${0:l} ${1:l}", "!i,!i"()
to label %1 [label %4, label %4]

where the two inline asm arguments just happen to refer to the same label.

The case you describe looks fine to me, but it also seems different than what @jyknight was describing when he said:

Can't we remove blocks from the callbr target list in some circumstances? E.g. if we merge two blocks maybe?

You'll notice in my (poorly formatted, now fixed) example, I noted that if an operand was removed, say because the two operands were equivalent, the asm string would also need to be updated. I think for immediates like labels or integer constant expressions, it doesn't make a difference whether the asm operand list has operands merged or not; I don't think that will provide any optimization for the register allocator for instance.

[nickdesaulniers]

I think this approach will have a nice side effect wrt. inlining:
https://github.com/ClangBuiltLinux/linux/issues/263
https://github.com/llvm/llvm-project/issues/38908

[nickdesaulniers]

In D129288#3636297, @jyknight wrote:

Why the poison placeholders? This makes it easy to satisfy the existing inlineasm infrastructure. It would be cleaner to omit the placeholder arguments and just say that trailing inlinasm constraints refer to the indirect target labels. InlineAsm itself doesn't have knowledge about those though, so it would not be possible to verify InlineAsm constraints in isolation.

I'm really uncomfortable with this hack. If we're going to introduce a new kind of input which doesn't come from the arglist, I think it'd be better to introduce a new constraint modifier symbol which can be used with input constraints to indicate that...then, the parsed InlineAsm will have the expected count of those separately, and the the verifier can verify the count matches at the appropriate time (during call/callbr verification), and we can propagate this into SDag, etc...

E.g., we could choose the symbol '!' for that, so you might have e.g.:
callbr void asm sideeffect "", "!i,r,!i,~{dirflag},~{fpsr},~{flags}"(i32 4) to label %1 [label %2, label %3]

I like this suggestion because to me it is homogenous with outputs. Outputs also do not appear in the operand list, yet are represented in the constraint string. As an example:

; Before:
%res = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,i,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* blockaddress(@test8, %foo))
to label %asm.fallthrough [label %foo]
; After:
%res = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,!i,~{dirflag},~{fpsr},~{flags}"(i8* %0)
to label %asm.fallthrough [label %foo]

(where "=r" applies to %res and isn't listed in the asm string, 0 refers to %0 and also isn't listed in the asm string, then !i refers to label %foo and ${2:l} in the asm string, just to be overly specific).

Does the langref mention any llvm-specific constraint string symbols? Regardless, such a change should be documented very explicitly since it doesn't collide with any constraint string AFAIK today, but theoretically could in the future should the higher level languages implementing extended inline asm choose such a character as the constraint representation.

[nikic]

Introduce label constraints, remove limitation on duplicate destinations. I'm quite happy with this version.

[nikic]

Update MIR test

[jyknight]

While it makes me a bit sad to "lose" theoretical possibilities of the original design (e.g. I always thought it might be nice if someday we could use callbr to represent the potential control-transfer from a function call in a setjmp function back to the setjmp), I do think this is absolutely better for the ACTUAL current use-cases, and we'd've been better-off doing this from the get-go. Oops...my bad...

In D129288#3637110, @nickdesaulniers wrote:

Does the langref mention any llvm-specific constraint string symbols? Regardless, such a change should be documented very explicitly since it doesn't collide with any constraint string AFAIK today, but theoretically could in the future should the higher level languages implementing extended inline asm choose such a character as the constraint representation.

This isn't an issue. In fact, the syntax is entirely llvm-specific, and is separate from the frontend syntax parsed by Clang. It bears some resemblance to the GCC constraint syntax, but it is not the same.

Other comments:

• Clang won't emit them, but I'd like to see a test-case that uses different constraints for label args than just !i. E.g. !r, or !0. (Given the code structure, I expect it should just work, already.)

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

5513

I'd put if (isa<InlineAsm>(Callee)) around this whole upgrade section. While we only currently support inlineasm calee, the reader code is otherwise agnostic to the type of the callee, and it seems better to preserve that.

Also, this upgrade code seems potentially problematic -- a user could write the C code:
int foo() { label: asm goto("" : : "r"(&&label) : : label2); return 1; label2: return 2; }
which turns into

callbr void asm sideeffect "", "r,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %2), i8* blockaddress(@foo, %4)) #1
        to label %3 [label %4]

and this would error out on it.

(I'm not sure _why_ a user would write that, but we shouldn't fail in the bitcode reader if they do!)

I think it needs to:

1. Only do anything if the constraint string doesn't contain label constraints (so we don't run this code on new bitcode).
2. Only validate and remove the last IndirectDests.size() arguments -- not other blockaddress values that may appear earlier in the arglist.

(And of course, a test-case. Are there any test-cases for this code? I didn't see one.)

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

8680

Why is this removed?

8690

I'm not sure we actually need to create a BlockAddress in SDAG either. But, fine to leave it for now, to keep the patch size down.

llvm/lib/IR/InlineAsm.cpp

296

Should still check:
if (NumClobbers) return false; // inputs before clobbers.

llvm/lib/IR/Verifier.cpp

2232–2238

Need to verify that there's zero indirect dests when there's no label constraints. Maybe like this?

llvm/test/CodeGen/X86/callbr-asm-errors.ll

0

This is no longer an "error" test, as per filename. Maybe merge into the "callbr-asm-destinations.ll" file?

[nickdesaulniers]

Also, if we eliminate blockaddress operands from callbr, I wonder if we can revert the bitcode reader+writer changes added recently in:

• 23ec5782c3cc0d77b5e44285e5124cd4a3ffeeef
• 6baaad740a5abb4bfcff022a8114abb4eea66a2d

Perhaps while retaining their tests.

I think this approach will have a nice side effect wrt. inlining:

NVM, that case has blockaddress, but not callbr. So we should strike

Allow inlining of callbr (https://github.com/llvm/llvm-project/issues/38908 / https://github.com/ClangBuiltLinux/linux/issues/263)

from the commit description.

Also, I left a few comments like: `s/!X/!i/. In 79ebc3b0dd130d759bf637c71c2a6aa039f0bd8f I meant to clean all of these up. Maybe a few slipped through the cracks, but while you're touching these lines anyways I would appreciate it if we could eradicate uses of X for the labels in our test cases.

Finally, I'm very happy with this cleanup. It seems like a great simplification that fixes many things that made working with callbr exceptional; now callbr seems like it fits in much better with the IR as we have much less special casing. We will need some time to test our kernel builds with a change of this nature.

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

8690

I assume we still need blockaddress in the MIR representation? This change is just creating them much later in the compilation pipeline. Or did I misunderstand your point?

llvm/test/Analysis/BasicAA/pr52735.ll

14

s/!X/!i/

21

s/!X/!i/

llvm/test/CodeGen/X86/callbr-asm-outputs.ll

221

s/!X/!i/

llvm/test/CodeGen/X86/speculation-hardening-sls.ll

67

s/!X/!i/

llvm/test/Transforms/CodeExtractor/PartialInlinePGOMultiRegion.ll

104

s/!X/!i/

llvm/test/Transforms/IROutliner/illegal-callbr.ll

19

Nice, so callbr will no longer inhibit outlining?

llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting2.ll

18–19

I wonder if this comment is stale from some of your recent changes @nikic ?

llvm/unittests/IR/InstructionsTest.cpp

1501

I think this test doesn't care about having any inputs at all. Consider dropping the arguments, rather than using i8* poison.

[nikic]

In D129288#3639440, @nickdesaulniers wrote:

Also, if we eliminate blockaddress operands from callbr, I wonder if we can revert the bitcode reader+writer changes added recently in:

• 23ec5782c3cc0d77b5e44285e5124cd4a3ffeeef
• 6baaad740a5abb4bfcff022a8114abb4eea66a2d

Perhaps while retaining their tests.

I don't think so. These cases are related to &&labels (without callbr).

As a side note, this kind of usage of block labels is not supported by LLVM blockaddress semantics. &&labels are only supported in conjunction with computed goto (indirectbr). If the function with the label doesn't contain any computed goto, then LLVM is free to DCE all these blockaddresses. I believe the only reason why this currently doesn't happen is that we have a bunch of non-principled hasAddressTaken() checks strewn over the codebase that really shouldn't be there. If we drop those, _THIS_IP_ will probably become equal to 1 in most cases.

I think the kernel would be much better served by a new intrinsic llvm.instructionpointer or so (and a corresponding clang builtin). As far as I understand, _THIS_IP_ is only used as debugging information. Importantly, this address will never be used as an actual jump target. This usage really just wants to get the current instruction pointer at the point of the call, and doesn't need any of the blockaddress baggage that both inhibits a lot of optimization and only works by accident in the first place.

But well, this is kind of getting off topic...

[nikic]

Address review comments.

[nikic]

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

5513

I've changed the code to only upgrade the trailing arguments. There's test coverage for this in llvm/test/Bitcode/callbr.ll.

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

8680

This was a leftover from a previous version.

It's rather suspicious that this doesn't break anything -- apparently, most of the code here is redundant. I've prepared a patch to clean it up (https://gist.github.com/nikic/219eec68f61b02fa4b22024307a50f84) and rely on TargetLowering::ParseConstraints() instead. Once I land that the label handling code added here will also move into that function.

llvm/test/Transforms/IROutliner/illegal-callbr.ll

19

Yes, in the sense that the indirect dest blocks are no longer address taken, so can be outlined. The callbr itself can't be outlined yet, because the outliner generally doesn't support outlining terminators.

llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting2.ll

18–19

From what I can tell, we don't perform any critical edge splitting here (we do perform it in the function below though).

llvm/unittests/IR/InstructionsTest.cpp

1501

This was a leftover from a previous patch.

[nickdesaulniers]

We should still strike

Allow inlining of callbr

From the commit description.

This was already done in
commit 639b29b1b59f ("[INLINER] allow inlining of blockaddresses if sole uses are callbrs")
(I wonder if it's now safe to revert 639b29b1b59f, too? Keeping the test case though.)

---

Patch LGTM; but please don't land until we've had more time to test this. It's the kind of change that has the potential to regress our kernel builds. I'm tied up today, tomorrow, and most of Wednesday, but @nathanchance and I will hammer on this and get you a green light by EOW. Thanks for the work here!

llvm/test/Verifier/callbr.ll

67–76

I think we want to retain this test? The important part is that to label %both [label %both] not be modified.

llvm/test/Verifier/inline-asm-label-before-outputs.ll

3 ↗

(On Diff #443646)

Does the assembler stop emitting diagnostics after the first? If not, consider adding this to llvm/test/Verifier/inline-asm-label-after-clobbers.ll and maybe renaming the test file.

llvm/test/tools/llvm-diff/callbr.ll

24

I was never really sure what the intent of this test was...

[nikic]

In D129288#3643331, @nickdesaulniers wrote:

We should still strike

Allow inlining of callbr

From the commit description.

This was already done in
commit 639b29b1b59f ("[INLINER] allow inlining of blockaddresses if sole uses are callbrs")
(I wonder if it's now safe to revert 639b29b1b59f, too? Keeping the test case though.)

Ah yes, I got confused by this check here: https://github.com/llvm/llvm-project/blob/f0cd5389850589fbf8a3ce77cea2539579bd8028/llvm/lib/Transforms/Utils/InlineFunction.cpp#L1763 But that one guards against inlining a callbr call itself, rather than a call to a function that contains callbr.

llvm/test/Verifier/callbr.ll

67–76

Do you mean as a CHECK-NOT test, to check that duplicate successors are allowed now?

llvm/test/Verifier/inline-asm-label-before-outputs.ll

3 ↗

(On Diff #443646)

Yeah, these errors are thrown as part of IR parsing rather than the verifier, and that one stops on first error. (As a side note, we should probably make InlineAsm::Verify return an Error so we can produce a more specific error message for different cases. The current one leaves something to be desired...)

[nickdesaulniers]

llvm/test/Verifier/callbr.ll

67–76

Ah, nevermind. I see we have test coverage of that in @duplicate_normal_and_indirect_dest in duplicate_normal_and_indirect_dest.

[nikic]

Rebase over code cleanup and diagnostic improvements.

[nathanchance]

I tested diff 443646 and saw no regressions with my Linux kernel build and QEMU boot tests. I can test the latest revision if that would be useful. I can test bare metal later today.

[nickdesaulniers]

Thanks for this cleanup, it's really nice to see.

clang/lib/CodeGen/CGStmt.cpp

void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
   llvm::BasicBlock *Fallthrough = nullptr;
   bool IsGCCAsmGoto = false;
   if (const auto *GS =  dyn_cast<GCCAsmStmt>(&S)) {
     IsGCCAsmGoto = GS->isAsmGoto();
     if (IsGCCAsmGoto) {
       for (const auto *E : GS->labels()) {
         JumpDest Dest = getJumpDestForLabel(E->getLabel());
         Transfer.push_back(Dest.getBlock());
-        llvm::BlockAddress *BA =
-            llvm::BlockAddress::get(CurFn, Dest.getBlock());
-        Args.push_back(BA);
-        ArgTypes.push_back(BA->getType());
-        ArgElemTypes.push_back(nullptr);
         if (!Constraints.empty())
           Constraints += ',';
-        Constraints += 'i';
+        Constraints += "!i";
       }
       Fallthrough = createBasicBlock("asm.fallthrough");
     }
   }
 
   bool HasUnwindClobber = false;
 
   // Clobbers

clang/test/CodeGen/asm-goto.c

 loop:
   return 0;
 label_true:
   return 1;
 }
 
 int test4(int out1, int out2) {
   // CHECK-LABEL: define{{.*}} i32 @test4(
-  // CHECK: callbr { i32, i32 } asm sideeffect "jne ${5:l}", "={si},={di},r,0,1,i,i
+  // CHECK: callbr { i32, i32 } asm sideeffect "jne ${5:l}", "={si},={di},r,0,1,!i,!i
   // CHECK: to label %asm.fallthrough [label %label_true, label %loop]
   // CHECK-LABEL: asm.fallthrough:
   if (out1 < out2)
     asm volatile goto("jne %l5" : "+S"(out1), "+D"(out2) : "r"(out1) :: label_true, loop);
   else
     asm volatile goto("jne %l7" : "+S"(out1), "+D"(out2) : "r"(out1), "r"(out2) :: label_true, loop);
-  // CHECK: callbr { i32, i32 } asm sideeffect "jne ${7:l}", "={si},={di},r,r,0,1,i,i
+  // CHECK: callbr { i32, i32 } asm sideeffect "jne ${7:l}", "={si},={di},r,r,0,1,!i,!i
   // CHECK: to label %asm.fallthrough2 [label %label_true, label %loop]
   // CHECK-LABEL: asm.fallthrough2:
   return out1 + out2;
 loop:
   return -1;
 label_true:
   return -2;
 }
 
 int test5(int addr, int size, int limit) {
   // CHECK-LABEL: define{{.*}} i32 @test5(
-  // CHECK: callbr i32 asm "add $1,$0 ; jc ${4:l} ; cmp $2,$0 ; ja ${4:l} ; ", "=r,imr,imr,0,i
+  // CHECK: callbr i32 asm "add $1,$0 ; jc ${4:l} ; cmp $2,$0 ; ja ${4:l} ; ", "=r,imr,imr,0,!i
   // CHECK: to label %asm.fallthrough [label %t_err]
   // CHECK-LABEL: asm.fallthrough:
   asm goto(
       "add %1,%0 ; "
       "jc %l[t_err] ; "
       "cmp %2,%0 ; "
       "ja %l[t_err] ; "
       : "+r" (addr)
       : "g" (size), "g" (limit)
       : : t_err);
   return 0;
 t_err:
   return 1;
 }
 
 int test6(int out1) {
   // CHECK-LABEL: define{{.*}} i32 @test6(
-  // CHECK: callbr i32 asm sideeffect "testl $0, $0; testl $1, $1; jne ${3:l}", "={si},r,0,i,i,{{.*}} i8* blockaddress(@test6, %label_true), i8* blockaddress(@test6, %landing)
+  // CHECK: callbr i32 asm sideeffect "testl $0, $0; testl $1, $1; jne ${3:l}", "={si},r,0,!i,!i,{{.*}}
   // CHECK: to label %asm.fallthrough [label %label_true, label %landing]
   // CHECK-LABEL: asm.fallthrough:
   // CHECK-LABEL: landing:
   int out2 = 42;
   asm volatile goto("testl %0, %0; testl %1, %1; jne %l3" : "+S"(out2) : "r"(out1) :: label_true, landing);
 landing:
   return out1 + out2;
 label_true:
   return -2;
 }
 
 // test7 - For the output templates in the asm string (%0, %l2), GCC places
 // hidden inputs tied to outputs ("+r" constraint) BEFORE labels. Test that foo
 // is $2 (or rather ${2:l} because of the l output template) in the emitted asm
 // string, not $1.
 void *test7(void) {
   // CHECK-LABEL: define{{.*}} i8* @test7(
-  // CHECK: %1 = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,i,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* blockaddress(@test7, %foo))
+  // CHECK: %1 = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,!i,~{dirflag},~{fpsr},~{flags}"(i8* %0)
   // CHECK-NEXT: to label %asm.fallthrough [label %foo]
   void *p = &&foo;
   asm goto ("# %0\n\t# %l2":"+r"(p):::foo);
 foo:
   return p;
 }
 
 // test8 - the same as test7, but this time we use symbolic names rather than
 // numbered outputs.
 void *test8(void) {
   // CHECK-LABEL: define{{.*}} i8* @test8(
-  // CHECK: %1 = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,i,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* blockaddress(@test8, %foo))
+  // CHECK: %1 = callbr i8* asm "# $0\0A\09# ${2:l}", "=r,0,!i,~{dirflag},~{fpsr},~{flags}"(i8* %0)
   // CHECK-NEXT: to label %asm.fallthrough [label %foo]
   void *p = &&foo;
   asm goto ("# %0\n\t# %l[foo]":"+r"(p):::foo);
 foo:
   return p;
 }

clang/test/CodeGen/asm.c

void t31(int len) {
   // CHECK: @t31
   // CHECK: call void asm sideeffect "", "=*%rm,=*rm,0,1,~{dirflag},~{fpsr},~{flags}"
 }
 
 // CHECK: @t32
 int t32(int cond)
 {
   asm goto("testl %0, %0; jne %l1;" :: "r"(cond)::label_true, loop);
-  // CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@t32, %label_true), i8* blockaddress(@t32, %loop)) #1
+  // CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) #1
+  // CHECK-NEXT: to label %asm.fallthrough [label %label_true, label %loop]
   return 0;
 loop:
   return 0;
 label_true:
   return 1;
 }
 
 void *t33(void *ptr)
 {
   void *ret;
   asm ("lea %1, %0" : "=r" (ret) : "p" (ptr));
   return ret;
 
   // CHECK: @t33
   // CHECK: %1 = call i8* asm "lea $1, $0", "=r,p,~{dirflag},~{fpsr},~{flags}"(i8* %0)
 }

clang/test/Modules/asm-goto.c

 // RUN: rm -rf %t
 // RUN: %clang_cc1 -fmodules -fno-implicit-modules -x c -I%S/Inputs/asm-goto -emit-module %S/Inputs/asm-goto/module.modulemap -fmodule-name=a -o %t/a.pcm
 // RUN: %clang_cc1 -fmodules -fno-implicit-modules -x c -I%S/Inputs/asm-goto -emit-llvm -o - %s -fmodule-file=%t/a.pcm | FileCheck %s
 #include "a.h"
 
 // CHECK-LABEL: define {{.*}} @foo(
-// CHECK: callbr {{.*}} "=r,i{{.*}} blockaddress(@foo, %indirect))
+// CHECK: callbr {{.*}} "=r,!i{{.*}}()
 // CHECK-NEXT: to label %asm.fallthrough [label %indirect]
 
 int bar(void) {
   return foo();
 }

llvm/docs/LangRef.rst

 constraints, e.g. "``~{eax}``". The one exception is that a clobber string of
 "``~{memory}``" indicates that the assembly writes to arbitrary undeclared
 memory locations -- not only the memory pointed to by a declared indirect
 output.
 
 Note that clobbering named registers that are also present in output
 constraints is not legal.
 
+Label constraints
+"""""""""""""""""
+
+A label constraint is indicated by a "``!``" prefix and typically used in the
+form ``"!i"``. Instead of consuming call arguments, label constraints consume
+indirect destination labels of ``callbr`` instructions.
+
+Label constraints can only be used in conjunction with ``callbr`` and the
+number of label constraints must match the number of indirect destination
+labels in the ``callbr`` instruction.
+
 
 Constraint Codes
 """"""""""""""""
 After a potential prefix comes constraint code, or codes.
 
 A Constraint Code is either a single letter (e.g. "``r``"), a "``^``" character
 followed by two letters (e.g. "``^wc``"), or "``{``" register-name "``}``"
 (e.g. "``{eax}``").

 #. '``function args``': argument list whose types match the function
    signature argument types and parameter attributes. All arguments must
    be of :ref:`first class <t_firstclass>` type. If the function signature
    indicates the function accepts a variable number of arguments, the
    extra arguments can be specified.
 #. '``fallthrough label``': the label reached when the inline assembly's
    execution exits the bottom.
 #. '``indirect labels``': the labels reached when a callee transfers control
-   to a location other than the '``fallthrough label``'. The blockaddress
-   constant for these should also be in the list of '``function args``'.
+   to a location other than the '``fallthrough label``'. Label constraints
+   refer to these destinations.
 #. The optional :ref:`function attributes <fnattrs>` list.
 #. The optional :ref:`operand bundles <opbundles>` list.
 
 Semantics:
 """"""""""
 
 This instruction is designed to operate as a standard '``call``'
 instruction in most regards. The primary difference is that it
 establishes an association with additional labels to define where control
 flow goes after the call.
 
 The output values of a '``callbr``' instruction are available only to
 the '``fallthrough``' block, not to any '``indirect``' blocks(s).
 
 The only use of this today is to implement the "goto" feature of gcc inline
 assembly where additional labels can be provided as locations for the inline
 assembly to jump to.
 
 Example:
 """"""""
 
 .. code-block:: llvm
 
       ; "asm goto" without output constraints.
-      callbr void asm "", "r,X"(i32 %x, i8 *blockaddress(@foo, %indirect))
+      callbr void asm "", "r,!i"(i32 %x)
                   to label %fallthrough [label %indirect]
 
       ; "asm goto" with output constraints.
-      <result> = callbr i32 asm "", "=r,r,X"(i32 %x, i8 *blockaddress(@foo, %indirect))
+      <result> = callbr i32 asm "", "=r,r,!i"(i32 %x)
                   to label %fallthrough [label %indirect]
 
 .. _i_resume:
 
 '``resume``' Instruction
 ^^^^^^^^^^^^^^^^^^^^^^^^
 
 Syntax:

llvm/docs/ReleaseNotes.rst

* The constant expression variants of the following instructions have been
   * ``fadd``
   * ``fsub``
   * ``fmul``
   * ``fdiv``
   * ``frem``
 * Added the support for ``fmax`` and ``fmin`` in ``atomicrmw`` instruction. The
   comparison is expected to match the behavior of ``llvm.maxnum.*`` and
   ``llvm.minnum.*`` respectively.
+* ``callbr`` instructions no longer use ``blockaddress`` arguments for labels.
+  Instead, label constraints starting with ``!`` refer directly to entries in
+  the ``callbr`` indirect destination list.
+
+.. code-block:: llvm
+
+    ; Old representation
+    %res = callbr i32 asm "", "=r,r,i"(i32 %x, i8 *blockaddress(@foo, %indirect))
+          to label %fallthrough [label %indirect]
+    ; New representation
+    %res = callbr i32 asm "", "=r,r,!i"(i32 %x)
+          to label %fallthrough [label %indirect]
 
 Changes to building LLVM
 ------------------------
 
 * Omitting ``CMAKE_BUILD_TYPE`` when using a single configuration generator is now
   an error. You now have to pass ``-DCMAKE_BUILD_TYPE=<type>`` in order to configure
   LLVM. This is done to help new users of LLVM select the correct type: since building
   LLVM in Debug mode is very resource intensive, we want to make sure that new users

llvm/include/llvm/IR/InlineAsm.h

public:
   /// This static method can be used by the parser to check to see if the
   /// specified constraint string is legal for the type.
   static Error verify(FunctionType *Ty, StringRef Constraints);
 
   // Constraint String Parsing
   enum ConstraintPrefix {
     isInput,            // 'x'
     isOutput,           // '=x'
-    isClobber           // '~x'
+    isClobber,          // '~x'
+    isLabel,            // '!x'
   };
 
   using ConstraintCodeVector = std::vector<std::string>;
 
   struct SubConstraintInfo {
     /// MatchingInput - If this is not -1, this is an output constraint where an
     /// input constraint is required to match it (e.g. "0").  The value is the
     /// constraint number that matches this one (for example, if this is
     /// constraint #0 and constraint #4 has the value "0", this will be 4).
     int MatchingInput = -1;
 
     /// Code - The constraint code, either the register name (in braces) or the
     /// constraint letter/number.
     ConstraintCodeVector Codes;
 
     /// Default constructor.
     SubConstraintInfo() = default;
   };
 
   using SubConstraintInfoVector = std::vector<SubConstraintInfo>;
   struct ConstraintInfo;
   using ConstraintInfoVector = std::vector<ConstraintInfo>;
 
   struct ConstraintInfo {
-    /// Type - The basic type of the constraint: input/output/clobber
+    /// Type - The basic type of the constraint: input/output/clobber/label
     ///
     ConstraintPrefix Type = isInput;
 
     /// isEarlyClobber - "&": output operand writes result before inputs are all
     /// read.  This is only ever set for an output operand.
     bool isEarlyClobber = false;
 
     /// MatchingInput - If this is not -1, this is an output constraint where an

llvm/include/llvm/IR/Instructions.h

 #include <cstdint>
 #include <iterator>
 
 namespace llvm {
 
 class APFloat;
 class APInt;
 class BasicBlock;
+class BlockAddress;
 class ConstantInt;
 class DataLayout;
 class StringRef;
 class Type;
 class Value;
 
 //===----------------------------------------------------------------------===//
 //                                AllocaInst Class
inline CallBrInst(FunctionType *Ty, Value *Func, BasicBlock *DefaultDest,
                     ArrayRef<Value *> Args,
                     ArrayRef<OperandBundleDef> Bundles, int NumOperands,
                     const Twine &NameStr, BasicBlock *InsertAtEnd);
 
   void init(FunctionType *FTy, Value *Func, BasicBlock *DefaultDest,
             ArrayRef<BasicBlock *> IndirectDests, ArrayRef<Value *> Args,
             ArrayRef<OperandBundleDef> Bundles, const Twine &NameStr);
 
-  /// Should the Indirect Destinations change, scan + update the Arg list.
-  void updateArgBlockAddresses(unsigned i, BasicBlock *B);
-
   /// Compute the number of operands to allocate.
   static int ComputeNumOperands(int NumArgs, int NumIndirectDests,
                                 int NumBundleInputs = 0) {
     // We need one operand for the called function, plus our extra operands and
     // the input operand counts provided.
     return 2 + NumIndirectDests + NumArgs + NumBundleInputs;
   }
 
SmallVector<BasicBlock *, 16> getIndirectDests() const {
     for (unsigned i = 0, e = getNumIndirectDests(); i < e; ++i)
       IndirectDests.push_back(getIndirectDest(i));
     return IndirectDests;
   }
   void setDefaultDest(BasicBlock *B) {
     *(&Op<-1>() - getNumIndirectDests() - 1) = reinterpret_cast<Value *>(B);
   }
   void setIndirectDest(unsigned i, BasicBlock *B) {
-    updateArgBlockAddresses(i, B);
     *(&Op<-1>() - getNumIndirectDests() + i) = reinterpret_cast<Value *>(B);
   }
 
   BasicBlock *getSuccessor(unsigned i) const {
     assert(i < getNumSuccessors() + 1 &&
            "Successor # out of range for callbr!");
     return i == 0 ? getDefaultDest() : getIndirectDest(i - 1);
   }
 
   void setSuccessor(unsigned i, BasicBlock *NewSucc) {
     assert(i < getNumIndirectDests() + 1 &&
            "Successor # out of range for callbr!");
     return i == 0 ? setDefaultDest(NewSucc) : setIndirectDest(i - 1, NewSucc);
   }
 
   unsigned getNumSuccessors() const { return getNumIndirectDests() + 1; }
 
+  BlockAddress *getBlockAddressForIndirectDest(unsigned DestNo) const;
+
   // Methods for support type inquiry through isa, cast, and dyn_cast:
   static bool classof(const Instruction *I) {
     return (I->getOpcode() == Instruction::CallBr);
   }
   static bool classof(const Value *V) {
     return isa<Instruction>(V) && classof(cast<Instruction>(V));
   }
 

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

case bitc::FUNC_CODE_INST_CALLBR: {
           ArgTyIDs.push_back(OpTypeID);
         }
       }
 
       // Upgrade the bundles if needed.
       if (!OperandBundles.empty())
         UpgradeOperandBundles(OperandBundles);
 
+      if (auto *IA = dyn_cast<InlineAsm>(Callee)) {
+        InlineAsm::ConstraintInfoVector ConstraintInfo = IA->ParseConstraints();
+        auto IsLabelConstraint = [](const InlineAsm::ConstraintInfo &CI) {
+          return CI.Type == InlineAsm::isLabel;
+        };
+        if (none_of(ConstraintInfo, IsLabelConstraint)) {
+          // Upgrade explicit blockaddress arguments to label constraints.
+          // Verify that the last arguments are blockaddress arguments that
+          // match the indirect destinations. Clang always generates callbr
+          // in this form. We could support reordering with more effort.
+          unsigned FirstBlockArg = Args.size() - IndirectDests.size();
+          for (unsigned ArgNo = FirstBlockArg; ArgNo < Args.size(); ++ArgNo) {
+            unsigned LabelNo = ArgNo - FirstBlockArg;
+            auto *BA = dyn_cast<BlockAddress>(Args[ArgNo]);
+            if (!BA || BA->getFunction() != F ||
+                LabelNo > IndirectDests.size() ||
+                BA->getBasicBlock() != IndirectDests[LabelNo])
+              return error("callbr argument does not match indirect dest");
+          }
+
+          // Remove blockaddress arguments.
+          Args.erase(Args.begin() + FirstBlockArg, Args.end());
+          ArgTyIDs.erase(ArgTyIDs.begin() + FirstBlockArg, ArgTyIDs.end());
+
+          // Recreate the function type with less arguments.
+          SmallVector<Type *> ArgTys;
+          for (Value *Arg : Args)
+            ArgTys.push_back(Arg->getType());
+          FTy =
+              FunctionType::get(FTy->getReturnType(), ArgTys, FTy->isVarArg());
+
+          // Update constraint string to use label constraints.
+          std::string Constraints = IA->getConstraintString();
+          unsigned ArgNo = 0;
+          size_t Pos = 0;
+          for (const auto &CI : ConstraintInfo) {
+            if (CI.hasArg()) {
+              if (ArgNo >= FirstBlockArg)
+                Constraints.insert(Pos, "!");
+              ++ArgNo;
+            }
+
+            // Go to next constraint in string.
+            Pos = Constraints.find(',', Pos);
+            if (Pos == std::string::npos)
+              break;
+            ++Pos;
+          }
+
+          Callee = InlineAsm::get(FTy, IA->getAsmString(), Constraints,
+                                  IA->hasSideEffects(), IA->isAlignStack(),
+                                  IA->getDialect(), IA->canThrow());
+        }
+      }
+
       I = CallBrInst::Create(FTy, Callee, DefaultDest, IndirectDests, Args,
                              OperandBundles);
       ResTypeID = getContainedTypeID(FTyID);
       OperandBundles.clear();
       InstructionList.push_back(I);
       cast<CallBrInst>(I)->setCallingConv(
           static_cast<CallingConv::ID>((0x7ff & CCInfo) >> bitc::CALL_CCONV));
       cast<CallBrInst>(I)->setAttributes(PAL);

llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp

if (OpInfo.hasArg()) {
             TLI->getSimpleValueType(DL, STy->getElementType(ResNo));
       } else {
         assert(ResNo == 0 && "Asm only has one result!");
         OpInfo.ConstraintVT =
             TLI->getAsmOperandValueType(DL, Call.getType()).getSimpleVT();
       }
       ++ResNo;
     } else {
+      assert(OpInfo.Type != InlineAsm::isLabel &&
+             "GlobalISel currently doesn't support callbr");
       OpInfo.ConstraintVT = MVT::Other;
     }
 
     if (OpInfo.ConstraintVT == MVT::i64x8)
       return false;
 
     // Compute the constraint code and ConstraintType to use.
     computeConstraintToUse(TLI, OpInfo);
case InlineAsm::isOutput:
                           (OpInfo.isEarlyClobber ? RegState::EarlyClobber : 0));
         }
 
         // Remember this output operand for later processing
         OutputOperands.push_back(OpInfo);
       }
 
       break;
-    case InlineAsm::isInput: {
+    case InlineAsm::isInput:
+    case InlineAsm::isLabel: {
       if (OpInfo.isMatchingInputConstraint()) {
         unsigned DefIdx = OpInfo.getMatchedOperand();
         // Find operand with register def that corresponds to DefIdx.
         unsigned InstFlagIdx = StartIdx;
         for (unsigned i = 0; i < DefIdx; ++i)
           InstFlagIdx += getNumOpRegs(*Inst, InstFlagIdx) + 1;
         assert(getNumOpRegs(*Inst, InstFlagIdx) == 1 && "Wrong flag");
 

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

assert(!I.hasOperandBundlesOtherThan(
              {LLVMContext::OB_deopt, LLVMContext::OB_funclet}) &&
          "Cannot lower callbrs with arbitrary operand bundles yet!");
 
   assert(I.isInlineAsm() && "Only know how to handle inlineasm callbr");
   visitInlineAsm(I);
   CopyToExportRegsIfNeeded(&I);
 
   // Retrieve successors.
+  SmallPtrSet<BasicBlock *, 8> Dests;
+  Dests.insert(I.getDefaultDest());
   MachineBasicBlock *Return = FuncInfo.MBBMap[I.getDefaultDest()];
 
   // Update successor info.
   addSuccessorWithProb(CallBrMBB, Return, BranchProbability::getOne());
   for (unsigned i = 0, e = I.getNumIndirectDests(); i < e; ++i) {
-    MachineBasicBlock *Target = FuncInfo.MBBMap[I.getIndirectDest(i)];
-    addSuccessorWithProb(CallBrMBB, Target, BranchProbability::getZero());
+    BasicBlock *Dest = I.getIndirectDest(i);
+    MachineBasicBlock *Target = FuncInfo.MBBMap[Dest];
     Target->setIsInlineAsmBrIndirectTarget();
+    Target->setHasAddressTaken();
+    // Don't add duplicate machine successors.
+    if (Dests.insert(Dest).second)
+      addSuccessorWithProb(CallBrMBB, Target, BranchProbability::getZero());
   }
   CallBrMBB->normalizeSuccProbs();
 
   // Drop into default successor.
   DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(),
                           MVT::Other, getControlRoot(),
                           DAG.getBasicBlock(Return)));
 }
void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
   // AsmDialect, MayLoad, MayStore).
   bool HasSideEffect = IA->hasSideEffects();
   ExtraFlags ExtraInfo(Call);
 
   for (auto &T : TargetConstraints) {
     ConstraintOperands.push_back(SDISelAsmOperandInfo(T));
     SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
 
     if (OpInfo.CallOperandVal)
       OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
 
     if (!HasSideEffect)
       HasSideEffect = OpInfo.hasMemory(TLI);
 
     // Determine if this InlineAsm MayLoad or MayStore based on the constraints.
     // FIXME: Could we compute this on OpInfo rather than T?
 
     // Compute the constraint code and ConstraintType to use.
     TLI.ComputeConstraintToUse(T, SDValue());
 
     if (T.ConstraintType == TargetLowering::C_Immediate &&
case InlineAsm::isOutput:
         // set.
         OpInfo.AssignedRegs.AddInlineAsmOperands(
             OpInfo.isEarlyClobber ? InlineAsm::Kind_RegDefEarlyClobber
                                   : InlineAsm::Kind_RegDef,
             false, 0, getCurSDLoc(), DAG, AsmNodeOperands);
       }
       break;
 
-    case InlineAsm::isInput: {
+    case InlineAsm::isInput:
+    case InlineAsm::isLabel: {
       SDValue InOperandVal = OpInfo.CallOperand;
 
       if (OpInfo.isMatchingInputConstraint()) {
         // If this is required to match an output register we have already set,
         // just use its register.
         auto CurOp = findMatchingInlineAsmOperand(OpInfo.getMatchedOperand(),
                                                   AsmNodeOperands);
         unsigned OpFlag =

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

TargetLowering::ParseConstraints(const DataLayout &DL,
   AsmOperandInfoVector ConstraintOperands;
   const InlineAsm *IA = cast<InlineAsm>(Call.getCalledOperand());
   unsigned maCount = 0; // Largest number of multiple alternative constraints.
 
   // Do a prepass over the constraints, canonicalizing them, and building up the
   // ConstraintOperands list.
   unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
   unsigned ResNo = 0; // ResNo - The result number of the next output.
+  unsigned LabelNo = 0; // LabelNo - CallBr indirect dest number.
 
   for (InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) {
     ConstraintOperands.emplace_back(std::move(CI));
     AsmOperandInfo &OpInfo = ConstraintOperands.back();
 
     // Update multiple alternative constraint count.
     if (OpInfo.multipleAlternatives.size() > maCount)
       maCount = OpInfo.multipleAlternatives.size();
case InlineAsm::isOutput:
         OpInfo.ConstraintVT =
             getAsmOperandValueType(DL, Call.getType()).getSimpleVT();
       }
       ++ResNo;
       break;
     case InlineAsm::isInput:
       OpInfo.CallOperandVal = Call.getArgOperand(ArgNo);
       break;
+    case InlineAsm::isLabel:
+      OpInfo.CallOperandVal =
+          cast<CallBrInst>(&Call)->getBlockAddressForIndirectDest(LabelNo);
+      OpInfo.ConstraintVT =
+          getAsmOperandValueType(DL, OpInfo.CallOperandVal->getType())
+              .getSimpleVT();
+      ++LabelNo;
+      continue;
     case InlineAsm::isClobber:
       // Nothing to do.
       break;
     }
 
     if (OpInfo.CallOperandVal) {
       llvm::Type *OpTy = OpInfo.CallOperandVal->getType();
       if (OpInfo.isIndirect) {

llvm/lib/IR/InlineAsm.cpp

if (*I == '~') {
     ++I;
 
     // '{' must immediately follow '~'.
     if (I != E && *I != '{')
       return true;
   } else if (*I == '=') {
     ++I;
     Type = isOutput;
+  } else if (*I == '!') {
+    ++I;
+    Type = isLabel;
   }
 
   if (*I == '*') {
     isIndirect = true;
     ++I;
   }
 
   if (I == E) return true;  // Just a prefix, like "==" or "~".
Error InlineAsm::verify(FunctionType *Ty, StringRef ConstStr) {
 
   ConstraintInfoVector Constraints = ParseConstraints(ConstStr);
 
   // Error parsing constraints.
   if (Constraints.empty() && !ConstStr.empty())
     return makeStringError("failed to parse constraints");
 
   unsigned NumOutputs = 0, NumInputs = 0, NumClobbers = 0;
-  unsigned NumIndirect = 0;
+  unsigned NumIndirect = 0, NumLabels = 0;
 
   for (const ConstraintInfo &Constraint : Constraints) {
     switch (Constraint.Type) {
     case InlineAsm::isOutput:
-      if ((NumInputs-NumIndirect) != 0 || NumClobbers != 0)
-        return makeStringError("output constraint occurs after input "
-                               "or clobber constraint");
+      if ((NumInputs-NumIndirect) != 0 || NumClobbers != 0 || NumLabels != 0)
+        return makeStringError("output constraint occurs after input, "
+                               "clobber or label constraint");
 
       if (!Constraint.isIndirect) {
         ++NumOutputs;
         break;
       }
       ++NumIndirect;
       LLVM_FALLTHROUGH; // We fall through for Indirect Outputs.
     case InlineAsm::isInput:
       if (NumClobbers)
         return makeStringError("input constraint occurs after clobber "
                                "constraint");
       ++NumInputs;
       break;
     case InlineAsm::isClobber:
       ++NumClobbers;
       break;
+    case InlineAsm::isLabel:
+      if (NumClobbers)
+        return makeStringError("label constraint occurs after clobber "
+                               "constraint");
+
+      ++NumLabels;
+      break;
     }
   }
 
   switch (NumOutputs) {
   case 0:
     if (!Ty->getReturnType()->isVoidTy())
       return makeStringError("inline asm without outputs must return void");
     break;
   case 1:
     if (Ty->getReturnType()->isStructTy())
       return makeStringError("inline asm with one output cannot return struct");
     break;
   default:
     StructType *STy = dyn_cast<StructType>(Ty->getReturnType());
     if (!STy || STy->getNumElements() != NumOutputs)
       return makeStringError("number of output constraints does not match "
                              "number of return struct elements");
     break;
   }
 
   if (Ty->getNumParams() != NumInputs)
     return makeStringError("number of input constraints does not match number "
                            "of parameters");
+
+  // We don't have access to labels here, NumLabels will be checked separately.
   return Error::success();
 }

llvm/lib/IR/Instructions.cpp

#endif
 
   auto It = populateBundleOperandInfos(Bundles, Args.size());
   (void)It;
   assert(It + 2 + IndirectDests.size() == op_end() && "Should add up!");
 
   setName(NameStr);
 }
 
-void CallBrInst::updateArgBlockAddresses(unsigned i, BasicBlock *B) {
-  assert(getNumIndirectDests() > i && "IndirectDest # out of range for callbr");
-  if (BasicBlock *OldBB = getIndirectDest(i)) {
-    BlockAddress *Old = BlockAddress::get(OldBB);
-    BlockAddress *New = BlockAddress::get(B);
-    for (unsigned ArgNo = 0, e = arg_size(); ArgNo != e; ++ArgNo)
-      if (dyn_cast<BlockAddress>(getArgOperand(ArgNo)) == Old)
-        setArgOperand(ArgNo, New);
-  }
+BlockAddress *
+CallBrInst::getBlockAddressForIndirectDest(unsigned DestNo) const {
+  return BlockAddress::get(const_cast<Function *>(getFunction()),
+                           getIndirectDest(DestNo));
 }
 
 CallBrInst::CallBrInst(const CallBrInst &CBI)
     : CallBase(CBI.Attrs, CBI.FTy, CBI.getType(), Instruction::CallBr,
                OperandTraits<CallBase>::op_end(this) - CBI.getNumOperands(),
                CBI.getNumOperands()) {
   setCallingConv(CBI.getCallingConv());
   std::copy(CBI.op_begin(), CBI.op_end(), op_begin());

llvm/lib/IR/Verifier.cpp

bool Verifier::verifyAttributeCount(AttributeList Attrs, unsigned Params) {
   // There shouldn't be more attribute sets than there are parameters plus the
   // function and return value.
   return Attrs.getNumAttrSets() <= Params + 2;
 }
 
 void Verifier::verifyInlineAsmCall(const CallBase &Call) {
   const InlineAsm *IA = cast<InlineAsm>(Call.getCalledOperand());
   unsigned ArgNo = 0;
+  unsigned LabelNo = 0;
   for (const InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) {
+    if (CI.Type == InlineAsm::isLabel) {
+      ++LabelNo;
+      continue;
+    }
+
     // Only deal with constraints that correspond to call arguments.
     if (!CI.hasArg())
       continue;
 
     if (CI.isIndirect) {
       const Value *Arg = Call.getArgOperand(ArgNo);
       Check(Arg->getType()->isPointerTy(),
             "Operand for indirect constraint must have pointer type", &Call);
 
       Check(Call.getParamElementType(ArgNo),
             "Operand for indirect constraint must have elementtype attribute",
             &Call);
     } else {
       Check(!Call.paramHasAttr(ArgNo, Attribute::ElementType),
             "Elementtype attribute can only be applied for indirect "
             "constraints",
             &Call);
     }
 
     ArgNo++;
   }
+
+  if (auto *CallBr = dyn_cast<CallBrInst>(&Call)) {
+    Check(LabelNo == CallBr->getNumIndirectDests(),
+          "Number of label constraints does not match number of callbr dests",
+          &Call);
+  } else {
+    Check(LabelNo == 0, "Label constraints can only be used with callbr",
+          &Call);
+  }
 }
 
 /// Verify that statepoint intrinsic is well formed.
 void Verifier::verifyStatepoint(const CallBase &Call) {
   assert(Call.getCalledFunction() &&
          Call.getCalledFunction()->getIntrinsicID() ==
              Intrinsic::experimental_gc_statepoint);
 
void Verifier::visitIndirectBrInst(IndirectBrInst &BI) {
 
   visitTerminator(BI);
 }
 
 void Verifier::visitCallBrInst(CallBrInst &CBI) {
   Check(CBI.isInlineAsm(), "Callbr is currently only used for asm-goto!", &CBI);
   const InlineAsm *IA = cast<InlineAsm>(CBI.getCalledOperand());
   Check(!IA->canThrow(), "Unwinding from Callbr is not allowed");
-  for (unsigned i = 0, e = CBI.getNumSuccessors(); i != e; ++i)
-    Check(CBI.getSuccessor(i)->getType()->isLabelTy(),
-          "Callbr successors must all have pointer type!", &CBI);
-  for (unsigned i = 0, e = CBI.getNumOperands(); i != e; ++i) {
-    Check(i >= CBI.arg_size() || !isa<BasicBlock>(CBI.getOperand(i)),
-          "Using an unescaped label as a callbr argument!", &CBI);
-    if (isa<BasicBlock>(CBI.getOperand(i)))
-      for (unsigned j = i + 1; j != e; ++j)
-        Check(CBI.getOperand(i) != CBI.getOperand(j),
-              "Duplicate callbr destination!", &CBI);
-  }
-  {
-    SmallPtrSet<BasicBlock *, 4> ArgBBs;
-    for (Value *V : CBI.args())
-      if (auto *BA = dyn_cast<BlockAddress>(V))
-        ArgBBs.insert(BA->getBasicBlock());
-    for (BasicBlock *BB : CBI.getIndirectDests())
-      Check(ArgBBs.count(BB), "Indirect label missing from arglist.", &CBI);
-  }
 
   verifyInlineAsmCall(CBI);
   visitTerminator(CBI);
 }
 
 void Verifier::visitSelectInst(SelectInst &SI) {
   Check(!SelectInst::areInvalidOperands(SI.getOperand(0), SI.getOperand(1),
                                         SI.getOperand(2)),

llvm/test/Analysis/BasicAA/pr52735.ll

 ; RUN: opt %s -aa-pipeline=basic-aa -passes=aa-eval -print-all-alias-modref-info -disable-output 2>&1 | FileCheck %s
 ;
 ; Generated from:
 ;
 ; int foo() {
 ;   int v;
 ;   asm goto("movl $1, %0" : "=m"(v)::: out);
 ; out:
 ;   return v;
 ; }
 
 target triple = "x86_64-unknown-linux-gnu"
 
-; CHECK: Both ModRef:  Ptr: i32* %v  <->  callbr void asm "movl $$1, $0", "=*m,X,~{dirflag},~{fpsr},~{flags}"(i32* nonnull elementtype(i32) %v, i8* blockaddress(@foo, %out))
+; CHECK: Both ModRef:  Ptr: i32* %v <->  callbr void asm "movl $$1, $0", "=*m,!i,~{dirflag},~{fpsr},~{flags}"(i32* nonnull elementtype(i32) %v)
 
 
 define dso_local i32 @foo() {
 entry:
   %v = alloca i32, align 4
   %0 = bitcast i32* %v to i8*
-  callbr void asm "movl $$1, $0", "=*m,X,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) nonnull %v, i8* blockaddress(@foo, %out))
+  callbr void asm "movl $$1, $0", "=*m,!i,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) nonnull %v)
           to label %asm.fallthrough [label %out]
 
 asm.fallthrough:
   br label %out
 
 out:
   %1 = load i32, i32* %v, align 4
   ret i32 %1
 }

llvm/test/Assembler/call-arg-is-callee.ll

exception:
   landingpad { i8*, i32 } cleanup
   ret void
 }
 
 ; Check order for callbr instruction. Cannot reuse labels in the test since the
 ; verifier prevents duplicating callbr destinations.
 define void @callbr() {
 entry:
-  callbr i32 asm "", "=r,r,i,i"(i32 0,
-                                i8 *blockaddress(@callbr, %two),
-                                i8 *blockaddress(@callbr, %three))
+  callbr i32 asm "", "=r,r,!i,!i"(i32 0)
               to label %one [label %two, label %three]
 one:
   ret void
 two:
   ret void
 three:
   ret void
 }

llvm/test/Assembler/inline-asm-constraint-error.ll

 ; RUN: split-file %s %t
 ; RUN: not llvm-as < %t/parse-fail.ll 2>&1 | FileCheck %s --check-prefix=CHECK-PARSE-FAIL
 ; RUN: not llvm-as < %t/input-before-output.ll 2>&1 | FileCheck %s --check-prefix=CHECK-INPUT-BEFORE-OUTPUT
 ; RUN: not llvm-as < %t/input-after-clobber.ll 2>&1 | FileCheck %s --check-prefix=CHECK-INPUT-AFTER-CLOBBER
 ; RUN: not llvm-as < %t/must-return-void.ll 2>&1 | FileCheck %s --check-prefix=CHECK-MUST-RETURN-VOID
 ; RUN: not llvm-as < %t/cannot-be-struct.ll 2>&1 | FileCheck %s --check-prefix=CHECK-CANNOT-BE-STRUCT
 ; RUN: not llvm-as < %t/incorrect-struct-elements.ll 2>&1 | FileCheck %s --check-prefix=CHECK-INCORRECT-STRUCT-ELEMENTS
 ; RUN: not llvm-as < %t/incorrect-arg-num.ll 2>&1 | FileCheck %s --check-prefix=CHECK-INCORRECT-ARG-NUM
+; RUN: not llvm-as < %t/label-after-clobber.ll 2>&1 | FileCheck %s --check-prefix=CHECK-LABEL-AFTER-CLOBBER
+; RUN: not llvm-as < %t/output-after-label.ll 2>&1 | FileCheck %s --check-prefix=CHECK-OUTPUT-AFTER-LABEL
 
 ;--- parse-fail.ll
 ; CHECK-PARSE-FAIL: failed to parse constraints
 define void @foo() {
   ; "~x{21}" is not a valid clobber constraint.
   call void asm sideeffect "mov x0, #42", "~{x0},~{x19},~x{21}"()
   ret void
 }
 
 ;--- input-before-output.ll
-; CHECK-INPUT-BEFORE-OUTPUT: output constraint occurs after input or clobber constraint
+; CHECK-INPUT-BEFORE-OUTPUT: output constraint occurs after input, clobber or label constraint
 define void @foo() {
   call void asm sideeffect "mov x0, #42", "r,=r"()
   ret void
 }
 
 ;--- input-after-clobber.ll
 ; CHECK-INPUT-AFTER-CLOBBER: input constraint occurs after clobber constraint
 define void @foo() {

 }
 
 ;--- incorrect-arg-num.ll
 ; CHECK-INCORRECT-ARG-NUM: number of input constraints does not match number of parameters
 define void @foo() {
   call void asm sideeffect "mov x0, #42", "r"()
   ret void
 }
+
+;--- label-after-clobber.ll
+; CHECK-LABEL-AFTER-CLOBBER: label constraint occurs after clobber constraint
+define void @foo() {
+  callbr void asm sideeffect "", "~{flags},!i"()
+  to label %1 [label %2]
+1:
+  ret void
+2:
+  ret void
+}
+
+;--- output-after-label.ll
+; CHECK-OUTPUT-AFTER-LABEL: output constraint occurs after input, clobber or label constraint
+define void @foo() {
+  %res = callbr i32 asm sideeffect "", "!i,=r,~{flags}"()
+  to label %1 [label %2]
+1:
+  ret void
+2:
+  ret void
+}

llvm/test/Bitcode/callbr.ll

 ; RUN:  llvm-dis < %s.bc | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED
 ; callbr.ll.bc was generated by passing this file to llvm-as.
 
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED
 ; RUN: llvm-as -opaque-pointers < %s | llvm-dis -opaque-pointers | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE
 
 define i32 @test_asm_goto(i32 %x){
 entry:
-; CHECK-TYPED:      callbr void asm "", "r,i"(i32 %x, i8* blockaddress(@test_asm_goto, %fail))
-; CHECK-OPAQUE:     callbr void asm "", "r,i"(i32 %x, ptr blockaddress(@test_asm_goto, %fail))
+; CHECK: callbr void asm "", "r,!i"(i32 %x)
 ; CHECK-NEXT: to label %normal [label %fail]
-  callbr void asm "", "r,i"(i32 %x, i8* blockaddress(@test_asm_goto, %fail)) to label %normal [label %fail]
+  callbr void asm "", "r,!i"(i32 %x) to label %normal [label %fail]
 normal:
   ret i32 1
 fail:
   ret i32 0
 }
 
 define i32 @test_asm_goto2(i32 %x){
 entry:
-; CHECK-TYPED:      callbr void asm "", "r,i,i"(i32 %x, i8* blockaddress(@test_asm_goto2, %fail), i8* blockaddress(@test_asm_goto2, %fail2))
-; CHECK-OPAQUE:     callbr void asm "", "r,i,i"(i32 %x, ptr blockaddress(@test_asm_goto2, %fail), ptr blockaddress(@test_asm_goto2, %fail2))
+; CHECK: callbr void asm "", "r,!i,!i"(i32 %x)
 ; CHECK-NEXT: to label %normal [label %fail, label %fail2]
-  callbr void asm "", "r,i,i"(i32 %x, i8* blockaddress(@test_asm_goto2, %fail), i8* blockaddress(@test_asm_goto2, %fail2)) to label %normal [label %fail, label %fail2]
+  callbr void asm "", "r,!i,!i"(i32 %x) to label %normal [label %fail, label %fail2]
 normal:
   ret i32 1
 fail:
   ret i32 0
 fail2:
   ret i32 2
 }
 
 define i32 @test_asm_goto3(i32 %x){
 entry:
-; CHECK-TYPED:      callbr void asm "", "r,i,i"(i32 %x, i8* blockaddress(@test_asm_goto3, %unrelated), i8* blockaddress(@test_asm_goto3, %fail))
-; CHECK-OPAQUE:     callbr void asm "", "r,i,i"(i32 %x, ptr blockaddress(@test_asm_goto3, %unrelated), ptr blockaddress(@test_asm_goto3, %fail))
+; CHECK-TYPED:      callbr void asm "", "r,i,!i"(i32 %x, i8* blockaddress(@test_asm_goto3, %unrelated))
+; CHECK-OPAQUE:     callbr void asm "", "r,i,!i"(i32 %x, ptr blockaddress(@test_asm_goto3, %unrelated))
 ; CHECK-NEXT: to label %normal [label %fail]
-  callbr void asm "", "r,i,i"(i32 %x, i8* blockaddress(@test_asm_goto3, %unrelated), i8* blockaddress(@test_asm_goto3, %fail)) to label %normal [label %fail]
+  callbr void asm "", "r,i,!i"(i32 %x, i8* blockaddress(@test_asm_goto3, %unrelated)) to label %normal [label %fail]
 normal:
   ret i32 1
 fail:
   ret i32 0
 unrelated:
   ret i32 2
 }

llvm/test/CodeGen/AArch64/callbr-asm-label.ll

 ; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
 
 @X = common local_unnamed_addr global i32 0, align 4
 
 define i32 @test1() {
 ; CHECK-LABEL: test1:
 ; CHECK:         .word b
 ; CHECK-NEXT:    .word .Ltmp0
 ; CHECK: // %bb.1:
 ; CHECK: .Ltmp0:
 ; CHECK: .LBB0_2: // %indirect
 entry:
-  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "i"(i8* blockaddress(@test1, %indirect))
+  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "!i"()
           to label %cleanup [label %indirect]
 
 indirect:
   br label %cleanup
 
 cleanup:
   %retval.0 = phi i32 [ 1, %indirect ], [ 0, %entry ]
   ret i32 %retval.0
 }
 
 define void @test2() {
 ; CHECK-LABEL: test2:
 entry:
   %0 = load i32, i32* @X, align 4
   %and = and i32 %0, 1
   %tobool = icmp eq i32 %and, 0
   br i1 %tobool, label %if.end10, label %if.then
 
 if.then:
 ; CHECK:       .word b
 ; CHECK-NEXT:  .word .Ltmp2
 ; CHECK:       .Ltmp2:
 ; CHECK-NEXT:  .LBB1_3: // %if.end6
-  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "i"(i8* blockaddress(@test2, %if.end6))
+  callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "!i"()
           to label %if.then4 [label %if.end6]
 
 if.then4:
   %call5 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   br label %if.end6
 
 if.end6:
   %.pre = load i32, i32* @X, align 4
   %.pre13 = and i32 %.pre, 1
   %phitmp = icmp eq i32 %.pre13, 0
   br i1 %phitmp, label %if.end10, label %if.then9
 
 if.then9:
 ; CHECK: .Ltmp4:
 ; CHECK-NEXT:  .LBB1_5: // %l_yes
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@test2, %l_yes))
+  callbr void asm sideeffect "", "!i"()
           to label %if.end10 [label %l_yes]
 
 if.end10:
   br label %l_yes
 
 l_yes:
   ret void
 }
 
 declare i32 @g(...)

llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll

 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret
 define hidden i32 @test1() {
   %1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %5
 
 3:                                                ; preds = %0
-  callbr void asm sideeffect "1: nop\0A\09.quad a\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,i"(i32* null, i8* blockaddress(@test1, %7))
+  callbr void asm sideeffect "1: nop\0A\09.quad a\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,!i"(i32* null)
           to label %4 [label %7]
 
 4:                                                ; preds = %3
   br label %7
 
 5:                                                ; preds = %0
   %6 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   br label %7
define hidden i32 @test2() local_unnamed_addr {
   br i1 %2, label %10, label %3
 
 3:                                                ; preds = %0
   %4 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %5 = icmp eq i32 %4, 0
   br i1 %5, label %6, label %7
 
 6:                                                ; preds = %3
-  callbr void asm sideeffect "1: nop\0A\09.quad b\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,i"(i32* null, i8* blockaddress(@test2, %7))
+  callbr void asm sideeffect "1: nop\0A\09.quad b\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,!i"(i32* null)
           to label %10 [label %7]
 
 7:                                                ; preds = %3
   %8 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   br label %10
 
 9:                                                ; preds = %6
   br label %10

 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret
 define internal i1 @test3() {
   %1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %5
 
 3:                                                ; preds = %0
-  callbr void asm sideeffect "1: nop\0A\09.quad c\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,i"(i32* null, i8* blockaddress(@test3, %8))
+  callbr void asm sideeffect "1: nop\0A\09.quad c\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,!i"(i32* null)
           to label %4 [label %8]
 
 4:                                                ; preds = %3
   br label %8
 
 5:                                                ; preds = %0
   %6 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   %7 = icmp ne i32 %6, 0
   br label %8
 
 8:                                                ; preds = %3, %4, %5
   %9 = phi i1 [ %7, %5 ], [ false, %4 ], [ false, %3 ]
   ret i1 %9
 }

llvm/test/CodeGen/AArch64/speculation-hardening-sls.ll

 ; SB-NEXT:     {{ sb$}}
 ; CHECK-NEXT: .Lfunc_end
     ret i32 %a
 }
 
 define i32 @asmgoto() {
 entry:
 ; CHECK-LABEL: asmgoto:
-  callbr void asm sideeffect "B $0", "i"(i8* blockaddress(@asmgoto, %d))
+  callbr void asm sideeffect "B $0", "!i"()
             to label %asm.fallthrough [label %d]
      ; The asm goto above produces a direct branch:
 ; CHECK:           //APP
 ; CHECK-NEXT:      {{^[ \t]+b }}
 ; CHECK-NEXT:      //NO_APP
      ; For direct branches, no mitigation is needed.
 ; ISDDSB-NOT: dsb sy
 ; SB-NOT:     {{ sb$}}

llvm/test/CodeGen/ARM/speculation-hardening-sls.ll

 ; ISBDSB-NEXT: isb
 ; SB-NEXT:     {{ sb$}}
 ; CHECK-NEXT: .Lfunc_end
 }
 
 define i32 @asmgoto() {
 entry:
 ; CHECK-LABEL: asmgoto:
-  callbr void asm sideeffect "B $0", "i"(i8* blockaddress(@asmgoto, %d))
+  callbr void asm sideeffect "B $0", "!i"()
             to label %asm.fallthrough [label %d]
      ; The asm goto above produces a direct branch:
 ; CHECK:           @APP
 ; CHECK-NEXT:      {{^[ \t]+b }}
 ; CHECK-NEXT:      @NO_APP
      ; For direct branches, no mitigation is needed.
 ; ISDDSB-NOT: dsb sy
 ; SB-NOT:     {{ sb$}}

llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll

 ; PPC64BE-NEXT:    ld r0, 16(r1)
 ; PPC64BE-NEXT:    mtlr r0
 ; PPC64BE-NEXT:    blr
 ; PPC64BE-NEXT:  .Ltmp0: # Block address taken
 ; PPC64BE-NEXT:  .LBB3_2: # %return_early
 ; PPC64BE-NEXT:    li r3, 0
 ; PPC64BE-NEXT:    b .LBB3_1
 entry:
-  callbr void asm sideeffect "nop", "i,~{lr}"(i8* blockaddress(@ClobberLR_BR, %return_early))
+  callbr void asm sideeffect "nop", "!i,~{lr}"()
           to label %return [label %return_early]
 
 return_early:
   br label %return
 
 return:
   %retval.0 = phi i32 [ 0, %return_early ], [ %in, %entry ]
   ret i32 %retval.0

 ; PPC64BE-NEXT:    extsw r3, r3
 ; PPC64BE-NEXT:    blr
 ; PPC64BE-NEXT:  .Ltmp1: # Block address taken
 ; PPC64BE-NEXT:  .LBB4_2: # %return_early
 ; PPC64BE-NEXT:    li r3, 0
 ; PPC64BE-NEXT:    extsw r3, r3
 ; PPC64BE-NEXT:    blr
 entry:
-  callbr void asm sideeffect "nop", "i,~{r5}"(i8* blockaddress(@ClobberR5_BR, %return_early))
+  callbr void asm sideeffect "nop", "!i,~{r5}"()
           to label %return [label %return_early]
 
 return_early:
   br label %return
 
 return:
   %retval.0 = phi i32 [ 0, %return_early ], [ %in, %entry ]
   ret i32 %retval.0

llvm/test/CodeGen/SystemZ/asm-20.ll

 ; Test that asm goto can be compiled.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14
 
 define i32 @c() {
 entry:
-  callbr void asm sideeffect "j d", "i"(i8* blockaddress(@c, %d))
+  callbr void asm sideeffect "j d", "!i"()
           to label %asm.fallthrough [label %d]
 
 asm.fallthrough:               ; preds = %entry
   br label %d
 
 d:                             ; preds = %asm.fallthrough, %entry
   ret i32 undef
 }

llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll

 ; CHECK-NEXT: t12: ch = CopyToReg t0, Register:i32 %0, t10
 ; CHECK-NEXT: t6: i32,ch = CopyFromReg t0, Register:i32 %4
 ; CHECK-NEXT: t13: i32 = add t6, Constant:i32<1>
 ; CHECK-NEXT: t15: ch = CopyToReg t0, Register:i32 %1, t13
 ; CHECK-NEXT: t17: ch = TokenFactor t12, t15
 ; CHECK-NEXT: t2: i32,ch = CopyFromReg t0, Register:i32 %2
 ; CHECK-NEXT: t8: i32 = add t2, Constant:i32<4>
 ; CHECK-NEXT: t22: ch,glue = CopyToReg t17, Register:i32 %5, t8
-; CHECK-NEXT: t30: ch,glue = inlineasm_br t22, TargetExternalSymbol:i64'xorl $0, $0; jmp ${1:l}', MDNode:ch<null>, TargetConstant:i64<8>, TargetConstant:i32<2359305>, Register:i32 %5, TargetConstant:i64<13>, TargetBlockAddress:i64<@test, %fail> 0, TargetConstant:i32<12>, Register:i32 $df, TargetConstant:i32<12>, Register:i16 $fpsw, TargetConstant:i32<12>, Register:i32 $eflags, t22:1
+; CHECK-NEXT: t30: ch,glue = inlineasm_br t22, TargetExternalSymbol:i64'xorl $0, $0; jmp ${1:l}', MDNode:ch<null>, TargetConstant:i64<0>, TargetConstant:i32<2359305>, Register:i32 %5, TargetConstant:i64<13>, TargetBlockAddress:i64<@test, %fail> 0, TargetConstant:i32<12>, Register:i32 $df, TargetConstant:i32<12>, Register:i16 $fpsw, TargetConstant:i32<12>, Register:i32 $eflags, t22:1
 
 define i32 @test(i32 %a, i32 %b, i32 %c) {
 entry:
   %0 = add i32 %a, 4
   %1 = add i32 %b, 1
   %2 = add i32 %c, 1
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, ptr blockaddress(@test, %fail)) to label %normal [label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail]
 
 normal:
   ret i32 %1
 
 fail:
   ret i32 %2
 }

llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll

bb8:                                              ; preds = %bb8, %bb5
   %tmp13 = add i64 undef, -2305847407260205056
   call void @hoge(i64 %tmp12)
   %tmp14 = icmp eq i32 0, 0
   br i1 %tmp14, label %bb15, label %bb8
 
 bb15:                                             ; preds = %bb8
   %tmp16 = getelementptr [0 x %struct.wibble], ptr @global, i64 0, i64 %tmp4, i32 2
   store ptr %tmp9, ptr %tmp16
-  callbr void asm sideeffect "", "i"(ptr blockaddress(@foo, %bb18))
+  callbr void asm sideeffect "", "!i"()
           to label %bb17 [label %bb18]
 
 bb17:                                             ; preds = %bb15
   call void @widget()
   br label %bb18
 
 bb18:                                             ; preds = %bb17, %bb15, %bb
   %tmp19 = add i64 %tmp, 14

llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll

if.end8:                                          ; preds = %r, %if.end
   %tobool10 = icmp eq i32 %call, 0
   br i1 %tobool10, label %if.end12, label %r
 
 if.end12:                                         ; preds = %if.end8
   %tobool13 = icmp eq i32 %or, 0
   br i1 %tobool13, label %if.else, label %if.then14
 
 if.then14:                                        ; preds = %if.end12
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@n, %if.then20.critedge))
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %cleanup [label %if.then20.critedge]
 
 if.then20.critedge:                               ; preds = %if.then14
   %1 = load i32, ptr @j
   %conv21 = sext i32 %u to i64
   %call22 = tail call i32 @k(i32 %1, i64 1, ptr %o, i64 %conv21)
   br label %cleanup
 

llvm/test/CodeGen/X86/callbr-asm-destinations.ll

-; RUN: not llc -mtriple=i686-- < %s 2> %t
-; RUN: FileCheck %s < %t
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=i686-- -verify-machineinstrs < %s | FileCheck %s
 
-; CHECK: Duplicate callbr destination
+define i32 @duplicate_normal_and_indirect_dest(i32 %a) {
+; CHECK-LABEL: duplicate_normal_and_indirect_dest:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    addl $4, %eax
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    jmp .Ltmp0
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:  .Ltmp0: # Block address taken
+; CHECK-NEXT:  # %bb.1: # %fail
+; CHECK-NEXT:    movl $1, %eax
+; CHECK-NEXT:    retl
+entry:
+  %0 = add i32 %a, 4
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %fail [label %fail]
 
-; A test for asm-goto duplicate labels limitation
+fail:
+  ret i32 1
+}
 
-define i32 @test(i32 %a) {
+define i32 @duplicate_indirect_dest(i32 %a) {
+; CHECK-LABEL: duplicate_indirect_dest:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    addl $4, %eax
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    jmp .Ltmp1
+; CHECK-NEXT:    jmp .Ltmp1
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:  # %bb.1: # %normal
+; CHECK-NEXT:    retl
+; CHECK-NEXT:  .Ltmp1: # Block address taken
+; CHECK-NEXT:  .LBB1_2: # %fail
+; CHECK-NEXT:    movl $1, %eax
+; CHECK-NEXT:    retl
 entry:
   %0 = add i32 %a, 4
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, ptr blockaddress(@test, %fail)) to label %fail [label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}; jmp ${2:l}", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail, label %fail]
+
+normal:
+  ret i32 %0
 
 fail:
   ret i32 1
 }

llvm/test/CodeGen/X86/callbr-asm-errors.ll

-; RUN: not llc -mtriple=i686-- < %s 2> %t
-; RUN: FileCheck %s < %t
-
-; CHECK: Duplicate callbr destination
-
-; A test for asm-goto duplicate labels limitation
-
-define i32 @test(i32 %a) {
-entry:
-  %0 = add i32 %a, 4
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, ptr blockaddress(@test, %fail), ptr blockaddress(@test, %fail)) to label %normal [label %fail, label %fail]
-
-normal:
-  ret i32 %0
-
-fail:
-  ret i32 1
-}

llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll

entry:
   %1 = load i64, ptr @page_offset_base, align 8
   %add = add i64 %and.i, %1
   %2 = inttoptr i64 %add to ptr
   %3 = load i32, ptr @pgdir_shift, align 4
   %sh_prom = zext i32 %3 to i64
   %shr = lshr i64 %addr, %sh_prom
   %and = and i64 %shr, 511
   %arrayidx = getelementptr %struct.pgd_t, ptr %2, i64 %and
-  callbr void asm sideeffect "1: jmp 6f\0A2:\0A.skip -(((5f-4f) - (2b-1b)) > 0) * ((5f-4f) - (2b-1b)),0x90\0A3:\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 4f - .\0A .word ${1:P}\0A .byte 3b - 1b\0A .byte 5f - 4f\0A .byte 3b - 2b\0A.previous\0A.section .altinstr_replacement,\22ax\22\0A4: jmp ${5:l}\0A5:\0A.previous\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 0\0A .word ${0:P}\0A .byte 3b - 1b\0A .byte 0\0A .byte 0\0A.previous\0A.section .altinstr_aux,\22ax\22\0A6:\0A testb $2,$3\0A jnz ${4:l}\0A jmp ${5:l}\0A.previous\0A", "i,i,i,*m,i,i,~{dirflag},~{fpsr},~{flags}"(i16 528, i32 117, i32 1, ptr elementtype(i8) getelementptr inbounds (%struct.cpuinfo_x86, ptr @boot_cpu_data, i64 0, i32 12, i32 1, i64 58), ptr blockaddress(@early_ioremap_pmd, %if.end.i), ptr blockaddress(@early_ioremap_pmd, %if.then.i))
+  callbr void asm sideeffect "1: jmp 6f\0A2:\0A.skip -(((5f-4f) - (2b-1b)) > 0) * ((5f-4f) - (2b-1b)),0x90\0A3:\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 4f - .\0A .word ${1:P}\0A .byte 3b - 1b\0A .byte 5f - 4f\0A .byte 3b - 2b\0A.previous\0A.section .altinstr_replacement,\22ax\22\0A4: jmp ${5:l}\0A5:\0A.previous\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 0\0A .word ${0:P}\0A .byte 3b - 1b\0A .byte 0\0A .byte 0\0A.previous\0A.section .altinstr_aux,\22ax\22\0A6:\0A testb $2,$3\0A jnz ${4:l}\0A jmp ${5:l}\0A.previous\0A", "i,i,i,*m,!i,!i,~{dirflag},~{fpsr},~{flags}"(i16 528, i32 117, i32 1, ptr elementtype(i8) getelementptr inbounds (%struct.cpuinfo_x86, ptr @boot_cpu_data, i64 0, i32 12, i32 1, i64 58))
           to label %_static_cpu_has.exit.thread.i [label %if.end.i, label %if.then.i]
 
 _static_cpu_has.exit.thread.i:                    ; preds = %entry
   br label %if.end.i
 
 if.then.i:                                        ; preds = %entry
   br label %p4d_offset.exit
 

llvm/test/CodeGen/X86/callbr-asm-kill.mir

--- |
   define void @test1(i8* %arg, i8** %mem) #0 {
   entry:
     br label %loop
 
   loop:                                             ; preds = %loop, %entry
     %a = phi i8* [ %arg, %entry ], [ %b, %loop ]
     %b = load i8*, i8** %mem, align 8
     call void @foo(i8* %a)
-    callbr void asm sideeffect "", "*m,i"(i8* elementtype(i8) %b, i8* blockaddress(@test1, %loop))
+    callbr void asm sideeffect "", "*m,!i"(i8* elementtype(i8) %b)
             to label %end [label %loop]
 
   end:                                              ; preds = %loop
     ret void
   }
 
   attributes #0 = { nounwind }
 

llvm/test/CodeGen/X86/callbr-asm-label-addr.ll

 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 
 define i32 @test1(i32 %x) {
 ; CHECK-LABEL: test1:
 ; CHECK:         .quad .Ltmp0
 ; CHECK-NEXT:    .quad .Ltmp1
 ; CHECK: .Ltmp1:
 ; CHECK-NEXT: # %bb.1: # %bar
 ; CHECK-NEXT:    callq foo
 ; CHECK-NEXT: .Ltmp0:
 ; CHECK-NEXT:  # %bb.2: # %baz
 entry:
-  callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test1, %baz), ptr blockaddress(@test1, %bar))
+  callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,!i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test1, %baz))
           to label %asm.fallthrough [label %bar]
 
 asm.fallthrough:
   br label %bar
 
 bar:
   %call = tail call i32 @foo(i32 %x)
   br label %baz

llvm/test/CodeGen/X86/callbr-asm-obj-file.ll

 ; RUN: llc < %s -mtriple=x86_64-linux-gnu -filetype=obj -o - \
 ; RUN:  | llvm-objdump --triple=x86_64-linux-gnu -d - \
 ; RUN:  | FileCheck %s
 
 ; CHECK: 0000000000000000 <test1>:
 ; CHECK-NEXT:   0: 74 00 je 0x2 <test1+0x2>
 ; CHECK-NEXT:   2: c3    retq
 
 define void @test1() {
 entry:
-  callbr void asm sideeffect "je ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test1, %a.b.normal.jump))
+  callbr void asm sideeffect "je ${0:l}", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough [label %a.b.normal.jump]
 
 asm.fallthrough:
   ret void
 
 a.b.normal.jump:
   ret void
 }

llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll

 
 @.str = private unnamed_addr constant [26 x i8] c"inline asm#1 returned %d\0A\00", align 1
 @.str.2 = private unnamed_addr constant [26 x i8] c"inline asm#2 returned %d\0A\00", align 1
 @str = private unnamed_addr constant [30 x i8] c"inline asm#1 caused exception\00", align 1
 @str.4 = private unnamed_addr constant [30 x i8] c"inline asm#2 caused exception\00", align 1
 
 ; Function Attrs: nounwind uwtable
 define dso_local i32 @main(i32 %0, ptr nocapture readnone %1) #0 {
-  %3 = callbr i32 asm "jmp ${1:l}", "=r,i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@main, %11)) #3
+  %3 = callbr i32 asm "jmp ${1:l}", "=r,!i,~{dirflag},~{fpsr},~{flags}"() #3
           to label %4 [label %11]
 
 4:                                                ; preds = %2
   %5 = tail call i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str, i32 %3)
-  %6 = callbr i32 asm "jmp ${1:l}", "=r,i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@main, %7)) #3
+  %6 = callbr i32 asm "jmp ${1:l}", "=r,!i,~{dirflag},~{fpsr},~{flags}"() #3
           to label %9 [label %7]
 
 7:                                                ; preds = %4
   %8 = tail call i32 @puts(ptr nonnull dereferenceable(1) @str.4)
   br label %13
 
 9:                                                ; preds = %4
   %10 = tail call i32 (ptr, ...) @printf(ptr nonnull dereferenceable(1) @.str.2, i32 %6)

llvm/test/CodeGen/X86/callbr-asm-outputs.ll

 ; CHECK-NEXT:  # %bb.1: # %normal
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp0: # Block address taken
 ; CHECK-NEXT:  .LBB0_2: # %abnormal
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
 entry:
   %add = add nsw i32 %x, 4
-  %ret = callbr i32 asm "xorl $1, $0; jmp ${2:l}", "=r,r,i,~{dirflag},~{fpsr},~{flags}"(i32 %add, ptr blockaddress(@test1, %abnormal))
+  %ret = callbr i32 asm "xorl $1, $0; jmp ${2:l}", "=r,r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %add)
           to label %normal [label %abnormal]
 
 normal:
   ret i32 %ret
 
 abnormal:
   ret i32 1
 }

 ; CHECK-NEXT:    .cfi_def_cfa_offset 12
 ; CHECK-NEXT:    movl $-2, %eax
 ; CHECK-NEXT:    jmp .LBB1_5
 entry:
   %cmp = icmp slt i32 %out1, %out2
   br i1 %cmp, label %if.then, label %if.else
 
 if.then:                                          ; preds = %entry
-  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "={si},={di},r,i,i,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, ptr blockaddress(@test2, %label_true), ptr blockaddress(@test2, %return), i32 %out1, i32 %out2)
+  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "={si},={di},r,!i,!i,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i32 %out1, i32 %out2)
           to label %if.end [label %label_true, label %return]
 
 if.else:                                          ; preds = %entry
-  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "={si},={di},r,r,i,i,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i32 %out2, ptr blockaddress(@test2, %label_true), ptr blockaddress(@test2, %return), i32 %out1, i32 %out2)
+  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "={si},={di},r,r,!i,!i,0,1,~{dirflag},~{fpsr},~{flags}"(i32 %out1, i32 %out2, i32 %out1, i32 %out2)
           to label %if.end [label %label_true, label %return]
 
 if.end:                                           ; preds = %if.else, %if.then
   %.sink11 = phi { i32, i32 } [ %0, %if.then ], [ %1, %if.else ]
   %asmresult3 = extractvalue { i32, i32 } %.sink11, 0
   %asmresult4 = extractvalue { i32, i32 } %.sink11, 1
   %add = add nsw i32 %asmresult4, %asmresult3
   br label %return

 ; CHECK-NEXT:  .LBB2_6: # %indirect
 ; CHECK-NEXT:    .cfi_def_cfa_offset 12
 ; CHECK-NEXT:    movl $42, %eax
 ; CHECK-NEXT:    jmp .LBB2_5
 entry:
   br i1 %cmp, label %true, label %false
 
 true:
-  %0 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={si},={di},i" (ptr blockaddress(@test3, %indirect)) to label %asm.fallthrough [label %indirect]
+  %0 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={si},={di},!i" () to label %asm.fallthrough [label %indirect]
 
 false:
-  %1 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={ax},={dx},i" (ptr blockaddress(@test3, %indirect)) to label %asm.fallthrough [label %indirect]
+  %1 = callbr { i32, i32 } asm sideeffect ".word $0, $1", "={ax},={dx},!i" () to label %asm.fallthrough [label %indirect]
 
 asm.fallthrough:
   %vals = phi { i32, i32 } [ %0, %true ], [ %1, %false ]
   %v = extractvalue { i32, i32 } %vals, 1
   ret i32 %v
 
 indirect:
   ret i32 42

 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp4: # Block address taken
 ; CHECK-NEXT:  .LBB3_3: # %label_true
 ; CHECK-NEXT:    movl $-2, %eax
 ; CHECK-NEXT:  .Ltmp5: # Block address taken
 ; CHECK-NEXT:  .LBB3_4: # %return
 ; CHECK-NEXT:    retl
 entry:
-  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "=r,=r,r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %out1, ptr blockaddress(@test4, %label_true), ptr blockaddress(@test4, %return))
+  %0 = callbr { i32, i32 } asm sideeffect "testl $0, $0; testl $1, $2; jne ${3:l}", "=r,=r,r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %out1)
           to label %asm.fallthrough [label %label_true, label %return]
 
 asm.fallthrough:                                  ; preds = %entry
   %asmresult = extractvalue { i32, i32 } %0, 0
   %asmresult1 = extractvalue { i32, i32 } %0, 1
-  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "=r,=r,r,r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %asmresult, i32 %asmresult1, ptr blockaddress(@test4, %label_true), ptr blockaddress(@test4, %return))
+  %1 = callbr { i32, i32 } asm sideeffect "testl $0, $1; testl $2, $3; jne ${5:l}", "=r,=r,r,r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %asmresult, i32 %asmresult1)
           to label %asm.fallthrough2 [label %label_true, label %return]
 
 asm.fallthrough2:                                 ; preds = %asm.fallthrough
   %asmresult3 = extractvalue { i32, i32 } %1, 0
   %asmresult4 = extractvalue { i32, i32 } %1, 1
   %add = add nsw i32 %asmresult3, %asmresult4
   br label %return
 

 ; CHECK-LABEL: test5:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  .Ltmp6: # Block address taken
 ; CHECK-NEXT:  # %bb.1:
 ; CHECK-NEXT:    retl
   %1 = call i32 @llvm.read_register.i32(metadata !3)
-  %2 = callbr i32 asm "", "={esp},X,{esp},~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test5, %4), i32 %1)
+  %2 = callbr i32 asm "", "={esp},!i,{esp},~{dirflag},~{fpsr},~{flags}"(i32 %1)
           to label %3 [label %4]
 
 3:
   call void @llvm.write_register.i32(metadata !3, i32 %2)
   br label %4
 
 4:
   ret void
 }
 
 declare i32 @llvm.read_register.i32(metadata)
 declare void @llvm.write_register.i32(metadata, i32)
 !3 = !{!"esp"}

llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll

 ; CHECK-NEXT:    retq
 entry:
   br label %loop
 
 loop:
   %a = phi ptr [ %arg, %entry ], [ %b, %loop ]
   %b = load ptr, ptr %mem, align 8
   call void @foo(ptr %a)
-  callbr void asm sideeffect "", "*m,i"(ptr elementtype(i8) %b, ptr blockaddress(@test1, %loop))
+  callbr void asm sideeffect "", "*m,!i"(ptr elementtype(i8) %b)
           to label %end [label %loop]
 
 end:
   ret void
 }

llvm/test/CodeGen/X86/callbr-asm-sink.ll

 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  # %bb.2:
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:  .Ltmp0: # Block address taken
 ; CHECK-NEXT:  .LBB0_1:
 ; CHECK-NEXT:    movq $0, -8(%rax)
 ; CHECK-NEXT:    retq
   %2 = getelementptr inbounds %struct1, %struct1* %0, i64 0, i32 1
-  callbr void asm sideeffect "# $0 $1", "*m,i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %2, i8* blockaddress(@klist_dec_and_del, %3))
+  callbr void asm sideeffect "# $0 $1", "*m,!i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %2)
           to label %6 [label %3]
 
 3:
   %4 = getelementptr i32, i32* %2, i64 -2
   %5 = bitcast i32* %4 to i8**
   store i8* null, i8** %5, align 8
   br label %6
 
 6:
   ret void
 }

llvm/test/CodeGen/X86/callbr-asm.ll

 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp0: # Block address taken
 ; CHECK-NEXT:  .LBB0_2: # %fail
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
 entry:
   %0 = add i32 %a, 4
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, ptr blockaddress(@test1, %fail)) to label %normal [label %fail]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail]
 
 normal:
   ret i32 0
 
 fail:
   ret i32 1
 }
 

 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  .Ltmp1: # Block address taken
 ; CHECK-NEXT:  .LBB1_2: # %fail
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    retl
 entry:
   %0 = add i32 %a, 4
-  callbr void asm inteldialect "xor $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, ptr blockaddress(@test1b, %fail)) to label %normal [label %fail]
+  callbr void asm inteldialect "xor $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail]
 
 normal:
   ret i32 0
 
 fail:
   ret i32 1
 }
 
 ; Test 2 - callbr terminates an unreachable block, function gets simplified
 ; to a trivial zero return.
 define i32 @test2(i32 %a) {
 ; CHECK-LABEL: test2:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retl
 entry:
   br label %normal
 
 unreachableasm:
   %0 = add i32 %a, 4
-  callbr void asm sideeffect "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, ptr blockaddress(@test2, %fail)) to label %normal [label %fail]
+  callbr void asm sideeffect "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail]
 
 normal:
   ret i32 0
 
 fail:
   ret i32 1
 }
 
label02:                                          ; preds = %normal0, %label04, %label01
   %add = add nsw i32 %0, 4
   store i32 %add, ptr %a.addr, align 4
   br label %label03
 
 label03:                                          ; preds = %normal0, %label04, %label02
   br label %label04
 
 label04:                                          ; preds = %normal0, %label03
-  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}", "i,i,i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test3, %label01), ptr blockaddress(@test3, %label02), ptr blockaddress(@test3, %label03))
+  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}", "!i,!i,!i,~{dirflag},~{fpsr},~{flags}"()
           to label %normal0 [label %label01, label %label02, label %label03]
 
 normal0:                                          ; preds = %label04
-  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}; jmp ${3:l}", "i,i,i,i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test3, %label01), ptr blockaddress(@test3, %label02), ptr blockaddress(@test3, %label03), ptr blockaddress(@test3, %label04))
+  callbr void asm sideeffect "jmp ${0:l}; jmp ${1:l}; jmp ${2:l}; jmp ${3:l}", "!i,!i,!i,!i,~{dirflag},~{fpsr},~{flags}"()
           to label %normal1 [label %label01, label %label02, label %label03, label %label04]
 
 normal1:                                          ; preds = %normal0
   %1 = load i32, ptr %a.addr, align 4
   ret i32 %1
 }
 
 ; Test 4 - asm-goto referenced with the 'l' (ell) modifier and not.
 define void @test4() {
 ; CHECK-LABEL: test4:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    ja .Ltmp6
 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  # %bb.1: # %asm.fallthrough
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    ja .Ltmp6
 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:  .Ltmp6: # Block address taken
 ; CHECK-NEXT:  .LBB4_3: # %quux
 ; CHECK-NEXT:    retl
 entry:
-  callbr void asm sideeffect "ja $0", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test4, %quux))
+  callbr void asm sideeffect "ja $0", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough [label %quux]
 
 asm.fallthrough:                                  ; preds = %entry
-  callbr void asm sideeffect "ja ${0:l}", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test4, %quux))
+  callbr void asm sideeffect "ja ${0:l}", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %cleanup [label %quux]
 
 quux:                                             ; preds = %asm.fallthrough, %entry
   br label %cleanup
 
 cleanup:                                          ; preds = %asm.fallthrough, %quux
   ret void
 }

llvm/test/CodeGen/X86/callbr-codegenprepare.ll

 ;; RUN: opt -S -codegenprepare < %s | FileCheck %s
 
 ;; Ensure that codegenprepare (via InstSimplify) doesn't eliminate the
 ;; phi here (which would cause a module verification error).
 
 ;; CHECK: phi
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 declare void @foo(i32)
 
 define dso_local i32 @futex_lock_pi_atomic() local_unnamed_addr {
 entry:
-  %0 = callbr i32 asm "", "=r,i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@futex_lock_pi_atomic, %b.exit))
+  %0 = callbr i32 asm "", "=r,!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough.i [label %b.exit]
 
 asm.fallthrough.i:
   br label %b.exit
 
 b.exit:
   %g.0 = phi i32 [ %0, %asm.fallthrough.i ], [ undef, %entry ]
   tail call void @foo(i32 %g.0)
   ret i32 undef
 }
 

llvm/test/CodeGen/X86/inline-asm-pic.ll

 ; CHECK-NEXT:    ## Ltmp0
 ; CHECK-EMPTY:
 ; CHECK-NEXT:    ## InlineAsm End
 ; CHECK-NEXT:  ## %bb.2: ## %return
 ; CHECK-NEXT:    retl
 ; CHECK-NEXT:  Ltmp0: ## Block address taken
 ; CHECK-NEXT:  LBB1_1: ## %overflow
 ; CHECK-NEXT:    retl
-  callbr void asm "#  ${0:l}\0A", "i"(ptr blockaddress(@x, %overflow))
+  callbr void asm "#  ${0:l}\0A", "!i"()
           to label %return [label %overflow]
 
 overflow:
   br label %return
 
 return:
   ret void
 }

llvm/test/CodeGen/X86/shrinkwrap-callbr.ll

entry:
   %tobool = icmp eq i32 %v, 0
   br i1 %tobool, label %ret0, label %if.end
 
 ret0:
   ret i32 0
 
 if.end:
   %call = tail call i32 @fn()
-  callbr void asm sideeffect "# jump to $0", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test1, %two))
+  callbr void asm sideeffect "# jump to $0", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %return [label %two]
 
 two:
   %call1 = tail call i32 @fn()
   br label %return
 
 return:
   %retval.1 = phi i32 [ %call1, %two ], [ 4, %if.end ]
   ret i32 %retval.1
 }

llvm/test/CodeGen/X86/speculation-hardening-sls.ll

 ; CHECK-NOT:     int3
 ; CHECK:         retq
 ; RET-NEXT:      int3
 ; IJMP-NOT:      int3
 ; CHECK:         retq
 ; RET-NEXT:      int3
 ; IJMP-NOT:      int3
 entry:
-  callbr void asm sideeffect "jmp $0", "X"(ptr blockaddress(@asmgoto, %d))
+  callbr void asm sideeffect "jmp $0", "!i"()
             to label %asm.fallthrough [label %d]
      ; The asm goto above produces a direct branch:
 
 asm.fallthrough:               ; preds = %entry
   ret i32 0
 
 d:                             ; preds = %asm.fallthrough, %entry
   ret i32 1

llvm/test/CodeGen/X86/tail-dup-asm-goto.ll

bb100:                                            ; preds = %bb
   br label %bb110
 
 bb106:                                            ; preds = %bb
   call void @foo()
   br label %bb110
 
 bb110:                                            ; preds = %bb106, %bb100
   %i10.1 = phi ptr [ %arg2, %bb106 ], [ %i28.i, %bb100 ]
-  callbr void asm sideeffect "#$0 $1 $2", "i,i,i,~{dirflag},~{fpsr},~{flags}"(i32 42, i1 false, ptr blockaddress(@test1, %bb17.i.i.i))
+  callbr void asm sideeffect "#$0 $1 $2", "i,i,!i,~{dirflag},~{fpsr},~{flags}"(i32 42, i1 false)
           to label %kmem_cache_has_cpu_partial.exit [label %bb17.i.i.i]
 
 bb17.i.i.i:                                       ; preds = %bb110
   br label %kmem_cache_has_cpu_partial.exit
 
 kmem_cache_has_cpu_partial.exit:                  ; preds = %bb110
   ret ptr %i10.1
 }

llvm/test/Instrumentation/MemorySanitizer/msan_asm_conservative.ll

 ;    return 0;
 ;  skip_label:
 ;    return 1;
 ;  }
 ; asm goto statements can't have outputs, so just make sure we check the input
 ; and the compiler doesn't crash.
 define dso_local i32 @asm_goto(i32 %n) sanitize_memory {
 entry:
-  callbr void asm sideeffect "cmp $0, $1; jnz ${2:l}", "r,r,i,~{dirflag},~{fpsr},~{flags}"(i32 %n, i32 1, i8* blockaddress(@asm_goto, %skip_label))
+  callbr void asm sideeffect "cmp $0, $1; jnz ${2:l}", "r,r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %n, i32 1)
           to label %cleanup [label %skip_label]
 
 skip_label:                                       ; preds = %entry
   br label %cleanup
 
 cleanup:                                          ; preds = %entry, %skip_label
   %retval.0 = phi i32 [ 2, %skip_label ], [ 1, %entry ]
   ret i32 %retval.0
 }
 
 ; CHECK-LABEL: @asm_goto
 ; CHECK: [[LOAD_ARG:%.*]] = load {{.*}} %_msarg
 ; CHECK: [[CMP:%.*]] = icmp ne {{.*}} [[LOAD_ARG]], 0
 ; CHECK: br {{.*}} [[CMP]], label %[[LABEL:.*]], label
 ; CHECK: [[LABEL]]:
 ; CHECK-NEXT: call void @__msan_warning

llvm/test/Transforms/CallSiteSplitting/callsite-split-callbr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
 ; RUN: opt -callsite-splitting -S -o - < %s | FileCheck %s
 
 ; Check that we can split the critical edge between Top and CallSiteBB, and
 ; rewrite the first callbr's indirect destination correctly.
 
 define void @caller() {
 ; CHECK-LABEL: define {{[^@]+}}@caller() {
 ; CHECK-NEXT:  Top:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@caller, [[TOP_SPLIT:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
 ; CHECK-NEXT:    to label [[NEXTCOND:%.*]] [label %Top.split]
 ; CHECK:       Top.split:
 ; CHECK-NEXT:    call void @callee(i1 false)
 ; CHECK-NEXT:    br label [[CALLSITEBB:%.*]]
 ; CHECK:       NextCond:
 ; CHECK-NEXT:    br label [[NEXTCOND_SPLIT:%.*]]
 ; CHECK:       NextCond.split:
 ; CHECK-NEXT:    call void @callee(i1 true)
 ; CHECK-NEXT:    br label [[CALLSITEBB]]
 ; CHECK:       CallSiteBB:
-; CHECK-NEXT:    [[PHI:%.*]] = phi i1 [ false, [[TOP_SPLIT]] ], [ true, [[NEXTCOND_SPLIT]] ]
-; CHECK-NEXT:    callbr void asm sideeffect "", "r,i,~{dirflag},~{fpsr},~{flags}"(i1 [[PHI]], i8* blockaddress(@caller, [[END2:%.*]]))
+; CHECK-NEXT:    [[PHI:%.*]] = phi i1 [ false, [[TOP_SPLIT:%.*]] ], [ true, [[NEXTCOND_SPLIT]] ]
+; CHECK-NEXT:    callbr void asm sideeffect "", "r,!i,~{dirflag},~{fpsr},~{flags}"(i1 [[PHI]])
 ; CHECK-NEXT:    to label [[END:%.*]] [label %End2]
 ; CHECK:       End:
 ; CHECK-NEXT:    ret void
 ; CHECK:       End2:
 ; CHECK-NEXT:    ret void
 ;
 Top:
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@caller, %CallSiteBB))
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
   to label %NextCond [label %CallSiteBB]
 
 NextCond:
   br label %CallSiteBB
 
 CallSiteBB:
   %phi = phi i1 [0, %Top],[1, %NextCond]
   call void @callee(i1 %phi)
-  callbr void asm sideeffect "", "r,i,~{dirflag},~{fpsr},~{flags}"(i1 %phi, i8* blockaddress(@caller, %End2))
+  callbr void asm sideeffect "", "r,!i,~{dirflag},~{fpsr},~{flags}"(i1 %phi)
   to label %End [label %End2]
 
 End:
   ret void
 End2:
   ret void
 }
 
 define void @callee(i1 %b) {
 ; CHECK-LABEL: define {{[^@]+}}@callee
 ; CHECK-SAME: (i1 [[B:%.*]]) {
 ; CHECK-NEXT:    ret void
 ;
   ret void
 }

llvm/test/Transforms/CodeExtractor/PartialInlinePGOMultiRegion.ll

 
 for.inc2:                                          ; preds = %if.end2
   %19 = load i32, i32* %i, align 4
   %inc2 = add nsw i32 %19, 1
   store i32 %inc2, i32* %i, align 4
   br label %for.cond2
 
 for.end:                                          ; preds = %for.cond2
-  callbr void asm sideeffect "1: nop\0A\09.quad b, ${0:l}, $$5\0A\09", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@bar, %l_yes))
+  callbr void asm sideeffect "1: nop\0A\09.quad b, ${0:l}, $$5\0A\09", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough [label %l_yes]
 asm.fallthrough:                                  ; preds = %for.end
   br label %l_yes
 
 l_yes:
   %20 = load i32, i32* %sum, align 4
   ret i32 %20
 }

llvm/test/Transforms/Coroutines/coro-debug.ll

 sw.default:                                       ; preds = %entry
   br label %coro_Suspend, !dbg !18
 
 sw.epilog:                                        ; preds = %sw.bb
   call void @llvm.dbg.declare(metadata i8* %new_storgae, metadata !31, metadata !13), !dbg !16
   %4 = load i32, i32* %x.addr, align 4, !dbg !20
   %add = add nsw i32 %4, 1, !dbg !21
   store i32 %add, i32* %x.addr, align 4, !dbg !22
-  %asm_res = callbr i32 asm "", "=r,r,i"(i32 %x, i8* blockaddress(@f, %indirect.dest))
+  %asm_res = callbr i32 asm "", "=r,r,!i"(i32 %x)
           to label %coro_Cleanup [label %indirect.dest]
 
 indirect.dest:
   call void @log(), !dbg !18
   br label %coro_Cleanup
 
 coro_Cleanup:                                     ; preds = %sw.epilog, %sw.bb1
   %5 = load i8*, i8** %coro_hdl, align 8, !dbg !24

llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -gvn -S | FileCheck %s
 
 ; This test checks that we don't hang trying to split a critical edge in loadpre
 ; when the control flow uses a callbr instruction.
 
 %struct.pluto = type <{ i8, i8 }>
 
 define void @widget(%struct.pluto** %tmp1) {
 ; CHECK-LABEL: @widget(
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i,i"(i8* blockaddress(@widget, [[BB5:%.*]]), i8* blockaddress(@widget, [[BB_BB8_CRIT_EDGE:%.*]]))
-; CHECK-NEXT:    to label [[BB4:%.*]] [label [[BB5]], label %bb.bb8_crit_edge]
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i,!i"()
+; CHECK-NEXT:    to label [[BB4:%.*]] [label [[BB5:%.*]], label %bb.bb8_crit_edge]
 ; CHECK:       bb.bb8_crit_edge:
 ; CHECK-NEXT:    [[TMP10_PRE:%.*]] = load %struct.pluto*, %struct.pluto** [[TMP1:%.*]], align 8
 ; CHECK-NEXT:    br label [[BB8:%.*]]
 ; CHECK:       bb4:
 ; CHECK-NEXT:    br label [[BB5]]
 ; CHECK:       bb5:
 ; CHECK-NEXT:    [[TMP6:%.*]] = load %struct.pluto*, %struct.pluto** [[TMP1]], align 8
 ; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_PLUTO:%.*]], %struct.pluto* [[TMP6]], i64 0, i32 1
 ; CHECK-NEXT:    br label [[BB8]]
 ; CHECK:       bb8:
-; CHECK-NEXT:    [[TMP10:%.*]] = phi %struct.pluto* [ [[TMP6]], [[BB5]] ], [ [[TMP10_PRE]], [[BB_BB8_CRIT_EDGE]] ]
+; CHECK-NEXT:    [[TMP10:%.*]] = phi %struct.pluto* [ [[TMP6]], [[BB5]] ], [ [[TMP10_PRE]], [[BB_BB8_CRIT_EDGE:%.*]] ]
 ; CHECK-NEXT:    [[TMP9:%.*]] = phi i8* [ [[TMP7]], [[BB5]] ], [ null, [[BB_BB8_CRIT_EDGE]] ]
 ; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_PLUTO]], %struct.pluto* [[TMP10]], i64 0, i32 0
 ; CHECK-NEXT:    [[TMP12:%.*]] = load i8, i8* [[TMP11]], align 1
 ; CHECK-NEXT:    tail call void @spam(i8* [[TMP9]], i8 [[TMP12]])
 ; CHECK-NEXT:    ret void
 ;
 bb:
-  callbr void asm sideeffect "", "i,i"(i8* blockaddress(@widget, %bb5), i8* blockaddress(@widget, %bb8))
+  callbr void asm sideeffect "", "!i,!i"()
   to label %bb4 [label %bb5, label %bb8]
 
 bb4:                                              ; preds = %bb
   br label %bb5
 
 bb5:                                              ; preds = %bb4, %bb
   %tmp6 = load %struct.pluto*, %struct.pluto** %tmp1
   %tmp7 = getelementptr inbounds %struct.pluto, %struct.pluto* %tmp6, i64 0, i32 1

llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -gvn -S | FileCheck %s
 
 ; This test checks that we don't hang trying to split a critical edge in scalar
 ; PRE when the control flow uses a callbr instruction.
 
 define void @wombat(i64 %arg, i64* %arg1, i64 %arg2, i32* %arg3) {
 ; CHECK-LABEL: @wombat(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    [[TMP5:%.*]] = or i64 [[ARG2:%.*]], [[ARG:%.*]]
-; CHECK-NEXT:    callbr void asm sideeffect "", "i,i"(i8* blockaddress(@wombat, [[BB7:%.*]]), i8* blockaddress(@wombat, [[BB_BB9_CRIT_EDGE:%.*]]))
-; CHECK-NEXT:    to label [[BB6:%.*]] [label [[BB7]], label %bb.bb9_crit_edge]
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i,!i"()
+; CHECK-NEXT:    to label [[BB6:%.*]] [label [[BB7:%.*]], label %bb.bb9_crit_edge]
 ; CHECK:       bb.bb9_crit_edge:
 ; CHECK-NEXT:    [[DOTPRE:%.*]] = trunc i64 [[TMP5]] to i32
 ; CHECK-NEXT:    br label [[BB9:%.*]]
 ; CHECK:       bb6:
 ; CHECK-NEXT:    br label [[BB7]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    [[TMP8:%.*]] = trunc i64 [[TMP5]] to i32
 ; CHECK-NEXT:    tail call void @barney(i32 [[TMP8]])
 ; CHECK-NEXT:    br label [[BB9]]
 ; CHECK:       bb9:
-; CHECK-NEXT:    [[TMP10_PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], [[BB_BB9_CRIT_EDGE]] ], [ [[TMP8]], [[BB7]] ]
+; CHECK-NEXT:    [[TMP10_PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], [[BB_BB9_CRIT_EDGE:%.*]] ], [ [[TMP8]], [[BB7]] ]
 ; CHECK-NEXT:    store i32 [[TMP10_PRE_PHI]], i32* [[ARG3:%.*]], align 4
 ; CHECK-NEXT:    ret void
 ;
 bb:
   %tmp5 = or i64 %arg2, %arg
-  callbr void asm sideeffect "", "i,i"(i8* blockaddress(@wombat, %bb7), i8* blockaddress(@wombat, %bb9))
+  callbr void asm sideeffect "", "!i,!i"()
   to label %bb6 [label %bb7, label %bb9]
 
 bb6:                                              ; preds = %bb
   br label %bb7
 
 bb7:                                              ; preds = %bb6, %bb
   %tmp8 = trunc i64 %tmp5 to i32
   tail call void @barney(i32 %tmp8)

llvm/test/Transforms/GVN/critical-edge-split-failure.ll

 
 if.then:                                          ; preds = %for.cond
   %ns = bitcast %struct.sk_buff* %storemerge to i32*
   %3 = load i32, i32* %ns, align 4
   store i32 %3, i32* @l2tp_recv_dequeue_session_0, align 4
 ; Splitting the critical edge from if.then to if.end will fail, but should not
 ; cause an infinite loop in GVN. If we can one day split edges of callbr
 ; indirect targets, great!
-; CHECK: callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@l2tp_recv_dequeue, %if.end))
+; CHECK: callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
 ; CHECK-NEXT: to label %asm.fallthrough.i [label %if.end]
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@l2tp_recv_dequeue, %if.end))
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough.i [label %if.end]
 
 asm.fallthrough.i:                                ; preds = %if.then
   br label %if.end
 
 if.end:                                           ; preds = %asm.fallthrough.i, %if.then, %for.cond
   %ns1 = bitcast %struct.sk_buff* %storemerge to i32*
   %4 = load i32, i32* %ns1, align 4
   %tobool2.not = icmp eq i32 %4, 0
   tail call void @llvm.assume(i1 %tobool2.not)
   br label %for.cond
 }
 

llvm/test/Transforms/IROutliner/illegal-callbr.ll

 ; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[A:%.*]], 4
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B:%.*]])
 ; CHECK-NEXT:    callbr void asm "xorl $0, $0
 ; CHECK-NEXT:    to label [[NORMAL:%.*]] [label %fail1]
 ; CHECK:       normal:
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B]])
 ; CHECK-NEXT:    ret i32 0
 ; CHECK:       fail1:
-; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[B]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[B]], 1
+; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B]])
 ; CHECK-NEXT:    ret i32 0
 ;
 bb0:
   %0 = add i32 %a, 4
   %1 = add i32 %b, 1
   %2 = add i32 %b, 1
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@function1, %fail1)) to label %normal [label %fail1]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail1]
 normal:
   %3 = add i32 %b, 1
   %4 = add i32 %b, 1
   ret i32 0
 fail1:
   %5 = add i32 %b, 1
   %6 = add i32 %b, 1
   ret i32 0
 }
 
 define i32 @function2(i32 %a, i32 %b) {
 ; CHECK-LABEL: @function2(
 ; CHECK-NEXT:  bb0:
 ; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[A:%.*]], 4
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B:%.*]])
 ; CHECK-NEXT:    callbr void asm "xorl $0, $0
 ; CHECK-NEXT:    to label [[NORMAL:%.*]] [label %fail1]
 ; CHECK:       normal:
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B]])
 ; CHECK-NEXT:    ret i32 0
 ; CHECK:       fail1:
-; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[B]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = add i32 [[B]], 1
+; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[B]])
 ; CHECK-NEXT:    ret i32 0
 ;
 bb0:
   %0 = add i32 %a, 4
   %1 = add i32 %b, 1
   %2 = add i32 %b, 1
-  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,i,~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* blockaddress(@function2, %fail1)) to label %normal [label %fail1]
+  callbr void asm "xorl $0, $0; jmp ${1:l}", "r,!i,~{dirflag},~{fpsr},~{flags}"(i32 %0) to label %normal [label %fail1]
 normal:
   %3 = add i32 %b, 1
   %4 = add i32 %b, 1
   ret i32 0
 fail1:
   %5 = add i32 %b, 1
   %6 = add i32 %b, 1
   ret i32 0
 }

llvm/test/Transforms/Inline/blockaddress.ll

 ; even if it contains a callbr. We might be able to relax this in the future
 ; as long as the global blockaddress is updated correctly.
 @ba = internal global i8* blockaddress(@foo, %7), align 8
 define internal i32 @foo(i32) {
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   store i32 %0, i32* %3, align 4
   %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@foo, %7), i8* blockaddress(@foo, %6)) #1
+  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %4) #1
           to label %5 [label %7, label %6]
 
 ; <label>:5:                                      ; preds = %1
   store i32 0, i32* %2, align 4
   br label %8
 
 ; <label>:6:                                      ; preds = %1
   store i32 1, i32* %2, align 4

 
 @my_foo = dso_local global %struct.foo { i8* blockaddress(@baz, %7) }
 
 define internal i32 @baz(i32) {
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   store i32 %0, i32* %3, align 4
   %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@baz, %7), i8* blockaddress(@baz, %6)) #1
+  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %4) #1
           to label %5 [label %7, label %6]
 
 ; <label>:5:                                      ; preds = %1
   store i32 0, i32* %2, align 4
   br label %8
 
 ; <label>:6:                                      ; preds = %1
   store i32 1, i32* %2, align 4

llvm/test/Transforms/Inline/callbr.ll

 ; RUN: opt -inline -S < %s | FileCheck %s
 ; RUN: opt -passes='cgscc(inline)' -S < %s | FileCheck %s
 ; RUN: opt -passes='module-inline' -S < %s | FileCheck %s
 
 define dso_local i32 @main() #0 {
   %1 = alloca i32, align 4
   store i32 0, i32* %1, align 4
   %2 = call i32 @t32(i32 0)
   ret i32 %2
 }
 
 define internal i32 @t32(i32) #0 {
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   store i32 %0, i32* %3, align 4
   %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %4, i8* blockaddress(@t32, %7), i8* blockaddress(@t32, %6)) #1
+  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %4) #1
           to label %5 [label %7, label %6]
 
 ; <label>:5:                                      ; preds = %1
   store i32 0, i32* %2, align 4
   br label %8
 
 ; <label>:6:                                      ; preds = %1
   store i32 1, i32* %2, align 4
   br label %8
 
 ; <label>:7:                                      ; preds = %1
   store i32 2, i32* %2, align 4
   br label %8
 
 ; <label>:8:                                      ; preds = %7, %6, %5
   %9 = load i32, i32* %2, align 4
   ret i32 %9
 }
 
 ; Check that @t32 no longer exists after inlining, as it has now been inlined
 ; into @main.
 
 ; CHECK-NOT: @t32
 ; CHECK: define dso_local i32 @main
-; CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,i,i,~{dirflag},~{fpsr},~{flags}"(i32 %6, i8* blockaddress(@main, %9), i8* blockaddress(@main, %8))
+; CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %6)
 ; CHECK: to label %7 [label %9, label %8]
 ; CHECK: 7:
 ; CHECK-NEXT: store i32 0, i32* %1, align 4
 ; CHECK-NEXT: br label %t32.exit
 ; CHECK: 8:
 ; CHECK-NEXT: store i32 1, i32* %1, align 4
 ; CHECK-NEXT: br label %t32.exit
 ; CHECK: 9:
 ; CHECK-NEXT: store i32 2, i32* %1, align 4
 ; CHECK-NEXT: br label %t32.exit
 ; CHECK: t32.exit:
 ; CHECK-NEXT: %10 = load i32, i32* %1, align 4
 ; CHECK: ret i32 %10

llvm/test/Transforms/JumpThreading/callbr-edge-split.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -S -jump-threading | FileCheck %s
 
 ; This test used to cause jump threading to try to split an edge of a callbr.
 
 @a = global i32 0
 
 define i32 @c() {
 ; CHECK-LABEL: @c(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = load i32, i32* @a, align 4
 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
 ; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_ELSE:%.*]], label [[IF_END:%.*]]
 ; CHECK:       if.else:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i"(i8* blockaddress(@c, [[IF_THEN2:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i"()
 ; CHECK-NEXT:    to label [[NORMAL:%.*]] [label %if.then2]
 ; CHECK:       normal:
-; CHECK-NEXT:    br label [[IF_THEN2]]
+; CHECK-NEXT:    br label [[IF_THEN2:%.*]]
 ; CHECK:       if.end:
 ; CHECK-NEXT:    [[CALL:%.*]] = call i32 @b()
 ; CHECK-NEXT:    [[PHITMP:%.*]] = icmp ne i32 [[CALL]], 0
 ; CHECK-NEXT:    br i1 [[PHITMP]], label [[IF_THEN2]], label [[IF_END4:%.*]]
 ; CHECK:       if.then2:
 ; CHECK-NEXT:    [[CALL3:%.*]] = call i32 @b()
 ; CHECK-NEXT:    br label [[IF_END4]]
 ; CHECK:       if.end4:
 ; CHECK-NEXT:    ret i32 undef
 ;
 entry:
   %0 = load i32, i32* @a
   %tobool = icmp eq i32 %0, 0
   br i1 %tobool, label %if.else, label %if.then
 
 if.then:                                          ; preds = %entry
   %call = call i32 @b() #2
   %phitmp = icmp ne i32 %call, 0
   br label %if.end
 
 if.else:                                          ; preds = %entry
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@c, %if.end)) #2
+  callbr void asm sideeffect "", "!i"() #2
   to label %normal [label %if.end]
 
 normal:                                           ; preds = %if.else
   br label %if.end
 
 if.end:                                           ; preds = %if.else, %normal, %if.then
   %d.0 = phi i1 [ %phitmp, %if.then ], [ undef, %normal ], [ undef, %if.else ]
   br i1 %d.0, label %if.then2, label %if.end4

llvm/test/Transforms/JumpThreading/pr46857-callbr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -jump-threading -S | FileCheck %s
 
 ; CHECK-ALL-LABEL: @func(
 
 define i1 @func(i1 %arg, i32 %arg1, i1 %arg2) {
 ; CHECK-LABEL: @func(
 ; CHECK-NEXT:  bb:
 ; CHECK-NEXT:    br i1 [[ARG:%.*]], label [[BB7:%.*]], label [[BB4:%.*]]
 ; CHECK:       bb4:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i"(i8* blockaddress(@func, [[BB7_THR_COMM:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i"()
 ; CHECK-NEXT:    to label [[BB5:%.*]] [label %bb7.thr_comm]
 ; CHECK:       bb5:
-; CHECK-NEXT:    br label [[BB7_THR_COMM]]
+; CHECK-NEXT:    br label [[BB7_THR_COMM:%.*]]
 ; CHECK:       bb7.thr_comm:
 ; CHECK-NEXT:    [[I91:%.*]] = xor i1 [[ARG2:%.*]], [[ARG]]
 ; CHECK-NEXT:    br i1 [[I91]], label [[BB11:%.*]], label [[BB11]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    [[I:%.*]] = icmp eq i32 [[ARG1:%.*]], 0
 ; CHECK-NEXT:    [[I9:%.*]] = xor i1 [[I]], [[ARG]]
 ; CHECK-NEXT:    br i1 [[I9]], label [[BB11]], label [[BB11]]
 ; CHECK:       bb11:
 ; CHECK-NEXT:    [[I93:%.*]] = phi i1 [ [[I91]], [[BB7_THR_COMM]] ], [ [[I9]], [[BB7]] ], [ [[I91]], [[BB7_THR_COMM]] ], [ [[I9]], [[BB7]] ]
 ; CHECK-NEXT:    ret i1 [[I93]]
 ;
 bb:
   br i1 %arg, label %bb3, label %bb4
 
 bb3:
   %i = icmp eq i32 %arg1, 0
   br label %bb7
 
 bb4:
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@func, %bb6))
+  callbr void asm sideeffect "", "!i"()
   to label %bb5 [label %bb6]
 
 bb5:
   br label %bb6
 
 bb6:
   br label %bb7
 

llvm/test/Transforms/LICM/callbr-crash.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -licm < %s | FileCheck %s
 
 define i32 @j() {
 ; CHECK-LABEL: @j(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_COND:%.*]]
 ; CHECK:       for.cond:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@j, [[FOR_END_SPLIT_LOOP_EXIT1:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
 ; CHECK-NEXT:    to label [[COND_TRUE_I:%.*]] [label %for.end.split.loop.exit1]
 ; CHECK:       cond.true.i:
 ; CHECK-NEXT:    br i1 true, label [[FOR_END_SPLIT_LOOP_EXIT:%.*]], label [[FOR_COND]]
 ; CHECK:       for.end.split.loop.exit:
 ; CHECK-NEXT:    [[ASMRESULT1_I_I_LE:%.*]] = extractvalue { i8, i32 } zeroinitializer, 1
 ; CHECK-NEXT:    br label [[FOR_END:%.*]]
 ; CHECK:       for.end.split.loop.exit1:
 ; CHECK-NEXT:    [[PHI_PH2:%.*]] = phi i32 [ undef, [[FOR_COND]] ]
 ; CHECK-NEXT:    br label [[FOR_END]]
 ; CHECK:       for.end:
-; CHECK-NEXT:    [[PHI:%.*]] = phi i32 [ [[ASMRESULT1_I_I_LE]], [[FOR_END_SPLIT_LOOP_EXIT]] ], [ [[PHI_PH2]], [[FOR_END_SPLIT_LOOP_EXIT1]] ]
+; CHECK-NEXT:    [[PHI:%.*]] = phi i32 [ [[ASMRESULT1_I_I_LE]], [[FOR_END_SPLIT_LOOP_EXIT]] ], [ [[PHI_PH2]], [[FOR_END_SPLIT_LOOP_EXIT1:%.*]] ]
 ; CHECK-NEXT:    ret i32 [[PHI]]
 ;
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %cond.true.i, %entry
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@j, %for.end))
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
   to label %cond.true.i [label %for.end]
 
 cond.true.i:                                      ; preds = %for.cond
   %asmresult1.i.i = extractvalue { i8, i32 } zeroinitializer, 1
   br i1 undef, label %for.end, label %for.cond
 
 for.end:                                          ; preds = %cond.true.i, %for.cond
   %phi = phi i32 [ %asmresult1.i.i, %cond.true.i ], [ undef, %for.cond ]
   ret i32 %phi
 }

llvm/test/Transforms/LoopDeletion/two-predecessors.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -loop-deletion -S | FileCheck %s
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64-unknown-linux-gnu"
 
 define dso_local i32 @hoge() local_unnamed_addr #0 {
 ; CHECK-LABEL: @hoge(
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i"(i8* blockaddress(@hoge, [[BB2:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i"()
 ; CHECK-NEXT:    to label [[BB1:%.*]] [label %bb2]
 ; CHECK:       bb1:
-; CHECK-NEXT:    br label [[BB2]]
+; CHECK-NEXT:    br label [[BB2:%.*]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[TMP:%.*]] = phi i32 [ undef, [[BB1]] ], [ [[TMP3:%.*]], [[BB2]] ], [ undef, [[BB:%.*]] ]
 ; CHECK-NEXT:    [[TMP3]] = tail call i32 bitcast (i32 (...)* @widget to i32 (i32)*)(i32 [[TMP]])
 ; CHECK-NEXT:    br label [[BB2]]
 ;
 bb:
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@hoge, %bb2)) #1
+  callbr void asm sideeffect "", "!i"() #1
   to label %bb1 [label %bb2]
 
 bb1:                                              ; preds = %bb
   br label %bb2
 
 bb2:                                              ; preds = %bb2, %bb1, %bb
   %tmp = phi i32 [ undef, %bb1 ], [ %tmp3, %bb2 ], [ undef, %bb ]
   %tmp3 = tail call i32 bitcast (i32 (...)* @widget to i32 (i32)*)(i32 %tmp) #1
   br label %bb2
 }
 
 declare dso_local i32 @widget(...) local_unnamed_addr #0

llvm/test/Transforms/LoopRotate/callbr.ll

 ; CHECK-NEXT:    br i1 [[TMP11]], label [[THREAD_PRE_SPLIT:%.*]], label [[DOT_CRIT_EDGE:%.*]]
 ; CHECK:       thread-pre-split:
 ; CHECK-NEXT:    [[DOTPR:%.*]] = load i32, i32* @i, align 4
 ; CHECK-NEXT:    [[TMP12:%.*]] = icmp eq i32 [[DOTPR]], 0
 ; CHECK-NEXT:    br i1 [[TMP12]], label [[M_EXIT]], label [[DOTLR_PH:%.*]]
 ; CHECK:       .lr.ph:
 ; CHECK-NEXT:    br label [[TMP13:%.*]]
 ; CHECK:         [[DOT11:%.*]] = phi i32 [ undef, [[DOTLR_PH]] ], [ [[TMP14:%.*]], [[J_EXIT_I:%.*]] ]
-; CHECK-NEXT:    callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, [[M_EXIT]])) #1
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"() #1
 ; CHECK-NEXT:    to label [[J_EXIT_I]] [label %m.exit]
 ; CHECK:       j.exit.i:
 ; CHECK-NEXT:    [[TMP14]] = tail call i32 asm "", "={ax},~{dirflag},~{fpsr},~{flags}"() #2
 ; CHECK-NEXT:    br i1 [[TMP12]], label [[DOTM_EXIT_CRIT_EDGE:%.*]], label [[TMP13]]
 ; CHECK:       .m.exit_crit_edge:
 ; CHECK-NEXT:    [[SPLIT:%.*]] = phi i32 [ [[TMP14]], [[J_EXIT_I]] ]
 ; CHECK-NEXT:    br label [[M_EXIT]]
 ; CHECK:       m.exit:
thread-pre-split:                                 ; preds = %6
   br label %12
 
 ; <label>:12:                                     ; preds = %j.exit.i, %thread-pre-split
   %.1 = phi i32 [ %15, %j.exit.i ], [ undef, %thread-pre-split ]
   %13 = icmp eq i32 %.pr, 0
   br i1 %13, label %m.exit, label %14
 
 ; <label>:14:                                     ; preds = %12
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@o, %m.exit)) #1
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"() #1
   to label %j.exit.i [label %m.exit]
 
 j.exit.i:                                         ; preds = %14
   %15 = tail call i32 asm "", "={ax},~{dirflag},~{fpsr},~{flags}"() #2
   br label %12
 
 m.exit:                                           ; preds = %14, %12
   %.1.lcssa = phi i32 [ %.1, %14 ], [ %.1, %12 ]

llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -loop-reduce %s -o - -S | FileCheck %s --check-prefix=LEGACYPM
 ; RUN: opt -passes='loop(loop-reduce)' %s -o - -S | FileCheck %s --check-prefix=NEWPM
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 
 define dso_local i32 @test1() local_unnamed_addr {
 ; LEGACYPM-LABEL: @test1(
 ; LEGACYPM-NEXT:  entry:
 ; LEGACYPM-NEXT:    br label [[FOR_COND:%.*]]
 ; LEGACYPM:       for.cond:
-; LEGACYPM-NEXT:    callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, [[COND_TRUE_I:%.*]]), i8* blockaddress(@test1, [[FOR_ENDSPLIT:%.*]]))
-; LEGACYPM-NEXT:    to label [[ASM_FALLTHROUGH_I_I:%.*]] [label [[COND_TRUE_I]], label %for.endsplit]
+; LEGACYPM-NEXT:    callbr void asm sideeffect "", "!i,!i,~{dirflag},~{fpsr},~{flags}"()
+; LEGACYPM-NEXT:    to label [[ASM_FALLTHROUGH_I_I:%.*]] [label [[COND_TRUE_I:%.*]], label %for.endsplit]
 ; LEGACYPM:       asm.fallthrough.i.i:
 ; LEGACYPM-NEXT:    unreachable
 ; LEGACYPM:       cond.true.i:
 ; LEGACYPM-NEXT:    br label [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE:%.*]]
 ; LEGACYPM:       do.body.i.i.do.body.i.i_crit_edge:
 ; LEGACYPM-NEXT:    [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE]] ], [ undef, [[COND_TRUE_I]] ]
 ; LEGACYPM-NEXT:    [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 1
 ; LEGACYPM-NEXT:    br i1 true, label [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE:%.*]], label [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE]]
 ; LEGACYPM:       do.body.i.i.rdrand_int.exit.i_crit_edge:
 ; LEGACYPM-NEXT:    br i1 true, label [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE_FOR_END_CRIT_EDGE:%.*]], label [[FOR_INC:%.*]]
 ; LEGACYPM:       do.body.i.i.rdrand_int.exit.i_crit_edge.for.end_crit_edge:
 ; LEGACYPM-NEXT:    br label [[FOR_END:%.*]]
 ; LEGACYPM:       for.inc:
 ; LEGACYPM-NEXT:    br label [[FOR_COND]]
 ; LEGACYPM:       for.endsplit:
 ; LEGACYPM-NEXT:    br label [[FOR_END]]
 ; LEGACYPM:       for.end:
-; LEGACYPM-NEXT:    [[PGOCOUNT_PROMOTED24:%.*]] = phi i64 [ [[LSR_IV_NEXT]], [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE_FOR_END_CRIT_EDGE]] ], [ undef, [[FOR_ENDSPLIT]] ]
+; LEGACYPM-NEXT:    [[PGOCOUNT_PROMOTED24:%.*]] = phi i64 [ [[LSR_IV_NEXT]], [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE_FOR_END_CRIT_EDGE]] ], [ undef, [[FOR_ENDSPLIT:%.*]] ]
 ; LEGACYPM-NEXT:    ret i32 undef
 ;
 ; NEWPM-LABEL: @test1(
 ; NEWPM-NEXT:  entry:
 ; NEWPM-NEXT:    br label [[FOR_COND:%.*]]
 ; NEWPM:       for.cond:
-; NEWPM-NEXT:    callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, [[COND_TRUE_I:%.*]]), i8* blockaddress(@test1, [[FOR_END:%.*]]))
-; NEWPM-NEXT:    to label [[ASM_FALLTHROUGH_I_I:%.*]] [label [[COND_TRUE_I]], label %for.end]
+; NEWPM-NEXT:    callbr void asm sideeffect "", "!i,!i,~{dirflag},~{fpsr},~{flags}"()
+; NEWPM-NEXT:    to label [[ASM_FALLTHROUGH_I_I:%.*]] [label [[COND_TRUE_I:%.*]], label %for.end]
 ; NEWPM:       asm.fallthrough.i.i:
 ; NEWPM-NEXT:    unreachable
 ; NEWPM:       cond.true.i:
 ; NEWPM-NEXT:    br label [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE:%.*]]
 ; NEWPM:       do.body.i.i.do.body.i.i_crit_edge:
 ; NEWPM-NEXT:    br i1 true, label [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE:%.*]], label [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE]]
 ; NEWPM:       do.body.i.i.rdrand_int.exit.i_crit_edge:
 ; NEWPM-NEXT:    [[TMP0:%.*]] = add i64 1, undef
-; NEWPM-NEXT:    br i1 true, label [[FOR_END]], label [[FOR_INC:%.*]]
+; NEWPM-NEXT:    br i1 true, label [[FOR_END:%.*]], label [[FOR_INC:%.*]]
 ; NEWPM:       for.inc:
 ; NEWPM-NEXT:    br label [[FOR_COND]]
 ; NEWPM:       for.end:
 ; NEWPM-NEXT:    [[PGOCOUNT_PROMOTED24:%.*]] = phi i64 [ undef, [[FOR_COND]] ], [ [[TMP0]], [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE]] ]
 ; NEWPM-NEXT:    ret i32 undef
 ;
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %for.inc, %entry
 ; It's ok to modify this test in the future should we be able to split critical
 ; edges here, just noting that this is the critical edge that we care about.
-  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %cond.true.i), i8* blockaddress(@test1, %for.end))
+  callbr void asm sideeffect "", "!i,!i,~{dirflag},~{fpsr},~{flags}"()
   to label %asm.fallthrough.i.i [label %cond.true.i, label %for.end]
 
 asm.fallthrough.i.i:                              ; preds = %for.cond
   unreachable
 
 cond.true.i:                                      ; preds = %for.cond
   br label %do.body.i.i.do.body.i.i_crit_edge
 

llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting2.ll

 
 define dso_local i32 @b() {
 entry:
   %call = tail call i32 @a()
   %tobool.not = icmp eq i32 %call, 0
   br i1 %tobool.not, label %cleanup.cont.critedge, label %if.then
 
 if.then:                                          ; preds = %entry
 ; It's ok to modify this test in the future should be able to split critical
 ; edges here, just noting that this is the critical edge that we care about.
-; CHECK: callbr void asm sideeffect "", "i"(i8* blockaddress(@b, %cleanup.cont.critedge))
+; CHECK: callbr void asm sideeffect "", "!i"()
 ; CHECK-NEXT: to label %return [label %cleanup.cont.critedge]
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@b, %cleanup.cont.critedge))
+  callbr void asm sideeffect "", "!i"()
           to label %return [label %cleanup.cont.critedge]
 
 cleanup.cont.critedge:                            ; preds = %entry, %if.then
   br label %return
 
 return:                                           ; preds = %if.then, %cleanup.cont.critedge
   %retval.0 = phi i32 [ 4, %cleanup.cont.critedge ], [ 0, %if.then ]
   ret i32 %retval.0
for.cond:                                         ; preds = %if.end3, %entry
   br i1 %tobool.not, label %if.end3, label %if.then
 
 if.then:                                          ; preds = %for.cond
   %call.i = tail call i32 @a()
   %tobool.not.i = icmp eq i32 %call.i, 0
   br i1 %tobool.not.i, label %if.then2, label %if.then.i
 
 if.then.i:                                        ; preds = %if.then
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@do_pages_move_nr_pages, %if.then2))
+  callbr void asm sideeffect "", "!i"()
           to label %if.end3 [label %if.then2]
 
 if.then2:                                         ; preds = %if.then, %if.then.i
   %g.0.lcssa = phi i32 [ %g.0, %if.then ], [ %g.0, %if.then.i ]
   %call4 = tail call i32 @e(i32 %g.0.lcssa)
   ret i32 undef
 
 if.end3:                                          ; preds = %for.cond, %if.then.i
   %inc = add nsw i32 %g.0, 1
   br label %for.cond
 }
 

llvm/test/Transforms/LoopStrengthReduce/remove_scev_indvars.ll

 dead:                                             ; No predecessors!
   br label %for.cond6403
 }
 
 
 ; Check that this doesn't crash
 define void @kernfs_path_from_node() {
 entry:
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@kernfs_path_from_node, %while.body))
+  callbr void asm sideeffect "", "!i"()
           to label %asm.fallthrough [label %while.body]
 
 asm.fallthrough:                                  ; preds = %entry
   br label %while.body
 
 while.body:                                       ; preds = %while.body, %asm.fallthrough, %entry
   %depth.04 = phi i32 [ %inc, %while.body ], [ 0, %asm.fallthrough ], [ 0, %entry ]
   %inc = add i32 %depth.04, 1
   br i1 false, label %while.end, label %while.body
 
 while.end:                                        ; preds = %while.body
   %inc.lcssa = phi i32 [ %depth.04, %while.body ]
   store i32 %inc.lcssa, i32* null, align 4
   ret void
 }

llvm/test/Transforms/LoopUnroll/callbr.ll

for.cond.cleanup:                                 ; preds = %for.inc
   ret void
 
 for.body:                                         ; preds = %for.inc, %entry
   %e.04 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
   %tobool = icmp eq i32 %e.04, 0
   br i1 %tobool, label %for.inc, label %if.then
 
 if.then:                                          ; preds = %for.body
-  callbr void asm sideeffect "1: nop\0A\09.quad b, ${0:l}, $$5\0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@d, %l_yes))
+  callbr void asm sideeffect "1: nop\0A\09.quad b, ${0:l}, $$5\0A\09", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough [label %l_yes]
 
 asm.fallthrough:                                  ; preds = %if.then
   br label %l_yes
 
 l_yes:                                            ; preds = %asm.fallthrough, %if.then
   %call = tail call i32 (...) @g()
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body, %l_yes
   %inc = add nuw nsw i32 %e.04, 1
   %exitcond = icmp eq i32 %inc, 3
   br i1 %exitcond, label %for.cond.cleanup, label %for.body
 }
 
 declare dso_local i32 @g(...) local_unnamed_addr

llvm/test/Transforms/PGOProfile/callbr.ll

 ; RUN: opt -passes=pgo-instr-gen -S 2>&1 < %s | FileCheck %s
 
 define i32 @a() {
 entry:
 ; CHECK-NOT: ptrtoint void (i8*)* asm sideeffect
 ; CHECK: callbr void asm sideeffect
   %retval = alloca i32, align 4
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@a, %b)) #1
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"() #1
           to label %asm.fallthrough [label %b]
 
 asm.fallthrough:
   br label %b
 
 b:
   %0 = load i32, i32* %retval, align 4
   ret i32 %0
 }

llvm/test/Transforms/SimpleLoopUnswitch/not-safe-to-clone.ll

 ; RUN: opt -passes='simple-loop-unswitch<nontrivial>' %s -S | FileCheck %s
 
 declare i1 @foo()
 
 ; CHECK: define {{.*}} @mem_cgroup_node_nr_lru_pages
 define i32 @mem_cgroup_node_nr_lru_pages(i1 %tree) {
 entry:
   br label %for.cond
 
 for.cond:                                         ; preds = %if.end8, %entry
   br i1 %tree, label %if.end8, label %if.else
 
 if.else:                                          ; preds = %for.cond
-  callbr void asm sideeffect ".pushsection __jump_table,  \22aw\22 \0A\09.popsection \0A\09", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@mem_cgroup_node_nr_lru_pages, %for.cond5))
+  callbr void asm sideeffect ".pushsection __jump_table,  \22aw\22 \0A\09.popsection \0A\09", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %if.end8 [label %for.cond5]
 
 for.cond5:                                        ; preds = %if.else, %for.cond5
   %call6 = call i1 @foo()
   br i1 %call6, label %if.end8.loopexit, label %for.cond5
 
 if.end8.loopexit:                                 ; preds = %for.cond5
   br label %if.end8
 
 if.end8:                                          ; preds = %if.end8.loopexit, %if.else, %for.cond
   br label %for.cond
 }
 

llvm/test/Transforms/SimplifyCFG/callbr-destinations.ll

 ; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
 ;
 ; Test that SimplifyCFG does not cause CallBr instructions to have duplicate
 ; destinations, which will cause the verifier to assert.
 
 define void @fun0() {
 entry:
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@fun0, %bb1))
+  callbr void asm sideeffect "", "!i"()
           to label %bb2 [label %bb1]
 
 bb1:                                              ; preds = %bb
   ret void
 
 bb2:                                             ; preds = %bb
   ret void
 }
 
 define void @fun1() {
 entry:
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@fun1, %bb1))
+  callbr void asm sideeffect "", "!i"()
           to label %bb2 [label %bb1]
 
 bb2:                                             ; preds = %bb
   ret void
 
 bb1:                                              ; preds = %bb
   ret void
 }

llvm/test/Transforms/SimplifyCFG/jump-threading.ll

 
 exit:
   ret void
 }
 
 define void @callbr() {
 ; CHECK-LABEL: @callbr(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@callbr, [[TARGET:%.*]]))
+; CHECK-NEXT:    callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
 ; CHECK-NEXT:    to label [[IF_END:%.*]] [label %target]
 ; CHECK:       target:
 ; CHECK-NEXT:    br label [[IF_END]]
 ; CHECK:       if.end:
 ; CHECK-NEXT:    ret void
 ;
 entry:
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@callbr, %target))
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
   to label %join [label %target]
 
 target:
   br label %join
 
 join:
   %phi = phi i1 [ false, %target ], [ false, %entry ]
   br i1 %phi, label %if.then, label %if.end
 
 if.then:
   call void @foo()
   br label %if.end
 
 if.end:
   ret void
 }

llvm/test/Verifier/callbr.ll

 ; RUN: not opt -S %s -verify 2>&1 | FileCheck %s
 
-; CHECK: Indirect label missing from arglist.
-; CHECK-NEXT: #test1
-define void @test1() {
-  ; The %4 in the indirect label list is not found in the blockaddresses in the
-  ; arg list (bad).
-  callbr void asm sideeffect "#test1", "i,i"(i8* blockaddress(@test1, %3), i8* blockaddress(@test1, %2))
-  to label %1 [label %4, label %2]
+; CHECK: Number of label constraints does not match number of callbr dests
+; CHECK-NEXT: #too_few_label_constraints
+define void @too_few_label_constraints() {
+  callbr void asm sideeffect "#too_few_label_constraints", "!i"()
+  to label %1 [label %2, label %3]
 1:
   ret void
 2:
   ret void
 3:
   ret void
-4:
-  ret void
 }
 
-; CHECK-NOT: Indirect label missing from arglist.
-define void @test2() {
-  ; %4 and %2 are both in the indirect label list and the arg list (good).
-  callbr void asm sideeffect "${0:l} ${1:l}", "i,i"(i8* blockaddress(@test2, %4), i8* blockaddress(@test2, %2))
-  to label %1 [label %4, label %2]
+; CHECK-NOT: Number of label constraints does not match number of callbr dests
+define void @correct_label_constraints() {
+  callbr void asm sideeffect "${0:l} ${1:l}", "!i,!i"()
+  to label %1 [label %2, label %3]
 1:
   ret void
 2:
   ret void
 3:
   ret void
-4:
-  ret void
 }
 
-; CHECK-NOT: Indirect label missing from arglist.
-define void @test3() {
-  ; note %2 blockaddress. Such a case is possible when passing the address of
-  ; a label as an input to the inline asm (both address of label and asm goto
-  ; use blockaddress constants; we're testing that the indirect label list from
-  ; the asm goto is in the arg list to the asm).
-  callbr void asm sideeffect "${0:l} ${1:l} ${2:l}", "i,X,i"(i8* blockaddress(@test3, %4), i8* blockaddress(@test3, %2), i8* blockaddress(@test3, %3))
-  to label %1 [label %3, label %4]
+; CHECK: Number of label constraints does not match number of callbr dests
+; CHECK-NEXT: #too_many_label_constraints
+define void @too_many_label_constraints() {
+  callbr void asm sideeffect "#too_many_label_constraints", "!i,!i,!i"()
+  to label %1 [label %2, label %3]
 1:
   ret void
 2:
   ret void
 3:
   ret void
-4:
+}
+
+; CHECK: Label constraints can only be used with callbr
+; CHECK-NEXT: #label_constraint_without_callbr
+define void @label_constraint_without_callbr() {
+  call void asm sideeffect "#label_constraint_without_callbr", "!i"()
+  ret void
+}
+
+; CHECK: Number of label constraints does not match number of callbr dests
+; CHECK-NEXT: #callbr_without_label_constraint
+define void @callbr_without_label_constraint() {
+  callbr void asm sideeffect "#callbr_without_label_constraint", ""()
+  to label %1 [label %2]
+1:
+  ret void
+2:
   ret void
 }
 
 ;; Ensure you cannot use the return value of a callbr in indirect targets.
 ; CHECK: Instruction does not dominate all uses!
 ; CHECK-NEXT: #test4
 define i32 @test4(i1 %var) {
 entry:
-  %ret = callbr i32 asm sideeffect "#test4", "=r,i"(i8* blockaddress(@test4, %abnormal)) to label %normal [label %abnormal]
+  %ret = callbr i32 asm sideeffect "#test4", "=r,!i"() to label %normal [label %abnormal]
 
 normal:
   ret i32 0
 
 abnormal:
   ret i32 %ret
 }
-
-;; Ensure you cannot specify the same label as both normal and indirect targets.
-; CHECK: Duplicate callbr destination!
-; CHECK-NEXT: #test5
-define i32 @test5() {
-entry:
-  %ret = callbr i32 asm sideeffect "#test5", "=r,i"(i8* blockaddress(@test5, %both)) to label %both [label %both]
-
-both:
-  ret i32 0
-}

llvm/test/Verifier/dominates.ll

next:
   ret void
 ; CHECK: Instruction does not dominate all uses!
 ; CHECK-NEXT:  %y = phi i32 [ 0, %entry ]
 ; CHECK-NEXT:  %x = phi i32 [ %y, %entry ]
 }
 
 define i32 @f6(i32 %x) {
 bb0:
-  %y1 = callbr i32 asm "", "=r"() to label %bb1 [label %bb2]
+  %y1 = callbr i32 asm "", "=r,!i"() to label %bb1 [label %bb2]
 bb1:
   ret i32 0
 bb2:
   ret i32 %y1
 ; CHECK: Instruction does not dominate all uses!
-; CHECK-NEXT:  %y1 = callbr i32 asm "", "=r"()
+; CHECK-NEXT:  %y1 = callbr i32 asm "", "=r,!i"()
 ; CHECK-NEXT:        to label %bb1 [label %bb2]
 ; CHECK-NEXT:  ret i32 %y1
 }

llvm/test/tools/llvm-diff/callbr.ll

-; RUN: not llvm-diff %s %s 2>&1 | FileCheck %s
+; RUN: llvm-diff %s %s
 
 define void @foo() {
 entry:
-  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %return), i8* blockaddress(@foo, %t_no))
+  callbr void asm sideeffect "", "!i,!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough [label %return, label %t_no]
 
 asm.fallthrough:
   br label %return
 
 t_no:
   br label %return
 
 return:
   ret void
 }
 
-; CHECK:      in function bar:
-; CHECK-NOT:  in function foo:
-; CHECK-NEXT:  in block %entry:
-; CHECK-NEXT:    >   callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
-; CHECK-NEXT:          to label %asm.fallthrough [label %return, label %t_no]
-; CHECK-NEXT:    <   callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
-; CHECK-NEXT:          to label %asm.fallthrough [label %return, label %t_no]
-
 define void @bar() {
 entry:
-  callbr void asm sideeffect "", "i,i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %t_no), i8* blockaddress(@foo, %return))
+  callbr void asm sideeffect "", "!i,!i,~{dirflag},~{fpsr},~{flags}"()
           to label %asm.fallthrough [label %return, label %t_no]
 
 asm.fallthrough:
   br label %return
 
 t_no:
   br label %return
 
 return:
   ret void
 }

llvm/test/tools/llvm-diff/phinode.ll

 ; RUN: rm -f %t.ll
 ; RUN: cat %s | sed -e 's/ 0, %2 / 1, %2 /' > %t.ll
 ; RUN: not llvm-diff %s %t.ll 2>&1 | FileCheck %s
 
 ; CHECK:       in function foo:
 ; CHECK-NEXT:   in block %6 / %6:
 ; CHECK-NEXT:    >   %7 = phi i32 [ 1, %2 ], [ -1, %1 ]
 ; CHECK-NEXT:    >   ret i32 %7
 ; CHECK-NEXT:    <   %7 = phi i32 [ 0, %2 ], [ -1, %1 ]
 ; CHECK-NEXT:    <   ret i32 %7
 define i32 @foo(i32 %0) #0 {
-  callbr void asm sideeffect "", "i,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@foo, %6))
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"()
           to label %2 [label %6]
 
 2:
   %3 = icmp eq i32 %0, 0
   br i1 %3, label %6, label %4
 
 4:
   br label %5
 
 5:
   br label %5
 
 6:
   %7 = phi i32 [ 0, %2 ], [ -1, %1 ]
   ret i32 %7
 }

llvm/test/tools/llvm-reduce/remove-function-arguments-of-funcs-used-in-blockaddress.ll

 ; RUN: llvm-reduce --delta-passes=arguments --test FileCheck --test-arg --check-prefixes=CHECK-ALL,CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t
 ; RUN: cat %t | FileCheck --check-prefixes=CHECK-ALL,CHECK-FINAL %s
 
 ; CHECK-INTERESTINGNESS: define void @func(
 ; CHECK-FINAL: define void @func()
 define void @func(i1 %arg) {
-; CHECK-ALL: bb:
-; CHECK-ALL: br label %bb4
-bb:
-  br label %bb4
-
-; CHECK-ALL: bb4
-bb4:
-; CHECK-INTERESTINGNESS: callbr void asm
-; CHECK-INTERESTINGNESS-SAME: blockaddress
-; CHECK-FINAL: callbr void asm sideeffect "", "i"(i8* blockaddress(@func, %bb11))
-; CHECK-ALL: to label %bb5 [label %bb11]
-  callbr void asm sideeffect "", "i"(i8* blockaddress(@func, %bb11))
-          to label %bb5 [label %bb11]
+; CHECK-ALL: entry:
+; CHECK-INTERESTINGNESS: call void @foo({{.*}}blockaddress
+; CHECK-FINAL: call void @foo(i8* blockaddress(@func, %bb5))
+entry:
+  call void @foo(i8* blockaddress(@func, %bb5))
+  ret void
 
 ; CHECK-ALL: bb5:
-; CHECK-ALL: br label %bb11
-bb5:
-  br label %bb11
-
-; CHECK-ALL: bb11:
 ; CHECK-ALL: ret void
-bb11:
+bb5:
   ret void
 }
+
+declare void @foo(i8*)

llvm/unittests/IR/InstructionsTest.cpp

TEST(InstructionsTest, FNegInstruction) {
   FNeg->deleteValue();
 }
 
 TEST(InstructionsTest, CallBrInstruction) {
   LLVMContext Context;
   std::unique_ptr<Module> M = parseIR(Context, R"(
 define void @foo() {
 entry:
-  callbr void asm sideeffect "// XXX: ${0:l}", "X"(i8* blockaddress(@foo, %branch_test.exit))
+  callbr void asm sideeffect "// XXX: ${0:l}", "!i"()
           to label %land.rhs.i [label %branch_test.exit]
 
 land.rhs.i:
   br label %branch_test.exit
 
 branch_test.exit:
   %0 = phi i1 [ true, %entry ], [ false, %land.rhs.i ]
   br i1 %0, label %if.end, label %if.then
)");
   BasicBlock &BranchTestExit = *BBs;
   ++BBs;
   BasicBlock &IfThen = *BBs;
 
   // Test that setting the first indirect destination of callbr updates the dest
   EXPECT_EQ(&BranchTestExit, CBI.getIndirectDest(0));
   CBI.setIndirectDest(0, &IfThen);
   EXPECT_EQ(&IfThen, CBI.getIndirectDest(0));
-
-  // Further, test that changing the indirect destination updates the arg
-  // operand to use the block address of the new indirect destination basic
-  // block. This is a critical invariant of CallBrInst.
-  BlockAddress *IndirectBA = BlockAddress::get(CBI.getIndirectDest(0));
-  BlockAddress *ArgBA = cast<BlockAddress>(CBI.getArgOperand(0));
-  EXPECT_EQ(IndirectBA, ArgBA)
-      << "After setting the indirect destination, callbr had an indirect "
-         "destination of '"
-      << CBI.getIndirectDest(0)->getName() << "', but a argument of '"
-      << ArgBA->getBasicBlock()->getName() << "'. These should always match:\n"
-      << CBI;
-  EXPECT_EQ(IndirectBA->getBasicBlock(), &IfThen);
-  EXPECT_EQ(ArgBA->getBasicBlock(), &IfThen);
 }
 
 TEST(InstructionsTest, UnaryOperator) {
   LLVMContext Context;
   IRBuilder<> Builder(Context);
   Instruction *I = Builder.CreatePHI(Builder.getDoubleTy(), 0);
   Value *F = Builder.CreateFNeg(I);
 

polly/test/ScopDetect/callbr.ll

 ; RUN: opt %loadPolly -polly-detect -polly-detect-track-failures -disable-output -pass-remarks-missed=polly-detect < %s 2>&1 | FileCheck %s --check-prefix=REMARK
 ; RUN: opt %loadPolly -polly-detect -polly-detect-track-failures -disable-output -stats                            < %s 2>&1 | FileCheck %s --check-prefix=STAT
 ; REQUIRES: asserts
 
 ; REMARK: Branch from indirect terminator.
 
 ; STAT: 1 polly-detect - Number of rejected regions: Branch from indirect terminator
 
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 define void @func(i32 %n, double* noalias nonnull %A) {
 entry:
-  callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@func, %for)) #1
+  callbr void asm sideeffect "", "!i,~{dirflag},~{fpsr},~{flags}"() #1
           to label %fallthrough [label %for]
 
 fallthrough:
   br label %for
 
 for:
   %j = phi i32 [0, %entry], [0, %fallthrough], [%j.inc, %inc]
   %j.cmp = icmp slt i32 %j, %n