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void (Bill Wendling)
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User Since
Dec 3 2012, 10:22 AM (445 w, 4 d)

Sent here from the planet Zvddw, Bill's mission is to conquer the world by staying at home and occasionally (read: always) playing poker.

In his spare time, he works on LLVM-related things.

Recent Activity

Yesterday

void accepted D104475: [Clang][Codegen] Add GNU function attribute 'no_profile' and lower it to noprofile.
Fri, Jun 18, 11:58 AM · Restricted Project

Thu, Jun 17

void added inline comments to D104475: [Clang][Codegen] Add GNU function attribute 'no_profile' and lower it to noprofile.
Thu, Jun 17, 11:45 AM · Restricted Project

Mon, Jun 14

void added a comment to D104253: [Clang][Codegen] emit noprofile IR Fn Attr for no_instrument_function Fn Attr.

What are your thoughts on adding a noprofile function attribute in the FE? @MaskRay suggested filing a bug with gcov (below) to get their take on it.

Mon, Jun 14, 12:05 PM · Restricted Project

Apr 23 2021

void added inline comments to D101129: [gcov] Set nounwind and respect module flags metadata "frame-pointer" & "uwtable" for synthesized functions.
Apr 23 2021, 2:14 PM · Restricted Project

Feb 25 2021

void committed rGa9f9ceb35f81: [X86] Use correct padding when in 16-bit mode (authored by void).
[X86] Use correct padding when in 16-bit mode
Feb 25 2021, 8:06 PM
void closed D97268: [X86] Use correct padding when in 16-bit mode.
Feb 25 2021, 8:06 PM · Restricted Project, Restricted Project
void updated the diff for D97268: [X86] Use correct padding when in 16-bit mode.

Use "hasFeature"

Feb 25 2021, 3:40 PM · Restricted Project, Restricted Project
void added inline comments to D97268: [X86] Use correct padding when in 16-bit mode.
Feb 25 2021, 3:37 PM · Restricted Project, Restricted Project

Feb 24 2021

void updated the diff for D97268: [X86] Use correct padding when in 16-bit mode.

Test all nop sizes.

Feb 24 2021, 8:38 PM · Restricted Project, Restricted Project
void updated the diff for D97268: [X86] Use correct padding when in 16-bit mode.

Reduce testcase.

Feb 24 2021, 3:22 PM · Restricted Project, Restricted Project
void updated the diff for D97268: [X86] Use correct padding when in 16-bit mode.

Rework 16-bit nops to use existing loop.

Feb 24 2021, 2:22 PM · Restricted Project, Restricted Project
void added a comment to D97268: [X86] Use correct padding when in 16-bit mode.

That...shouldn't matter since a NOP is a NOP. Regardless, I removed that modification to simplify the patch.

It _does_ matter. To start with it can affect performance (marginally).

But more importantly, if you're doing tricky things with runtime code modification, it's a correctness issue. A trap won't leave the instruction pointer in the middle of a long-nop instruction (which you may be about to replace with another instruction), but it can leave it between two distinct nops.

Feb 24 2021, 1:21 PM · Restricted Project, Restricted Project

Feb 23 2021

void added a comment to D97268: [X86] Use correct padding when in 16-bit mode.

This change also modifies (breaks!) the 32-bit NOP set, definitely shouldn't do that. (But I think all that can be reverted, in any case).

Which part did it break?

It replaced the single-instruction NOPs with new sequences consisting of multiple instructions.

Feb 23 2021, 3:45 PM · Restricted Project, Restricted Project
void added a comment to D97268: [X86] Use correct padding when in 16-bit mode.

This change also modifies (breaks!) the 32-bit NOP set, definitely shouldn't do that. (But I think all that can be reverted, in any case).

Which part did it break?

It replaced the single-instruction NOPs with new sequences consisting of multiple instructions.

Feb 23 2021, 3:38 PM · Restricted Project, Restricted Project
void updated the diff for D97268: [X86] Use correct padding when in 16-bit mode.

Correct comments with proper disassembly.

Feb 23 2021, 2:55 PM · Restricted Project, Restricted Project
void updated the diff for D97268: [X86] Use correct padding when in 16-bit mode.

Reduce size and effect of patch.

Feb 23 2021, 12:40 PM · Restricted Project, Restricted Project
void added a comment to D97268: [X86] Use correct padding when in 16-bit mode.

This change also modifies (breaks!) the 32-bit NOP set, definitely shouldn't do that. (But I think all that can be reverted, in any case).

Feb 23 2021, 12:11 PM · Restricted Project, Restricted Project
void requested review of D97268: [X86] Use correct padding when in 16-bit mode.
Feb 23 2021, 2:45 AM · Restricted Project, Restricted Project

Jan 21 2021

void accepted D94996: [GVN] do not repeat PRE on failure to split critical edge.
Jan 21 2021, 3:55 PM · Restricted Project

Jan 19 2021

void committed rGe22295385c7f: [X86] Add segment and address-size override prefixes (authored by void).
[X86] Add segment and address-size override prefixes
Jan 19 2021, 11:55 PM
void closed D94726: [X86] Add segment and address-size override prefixes.
Jan 19 2021, 11:55 PM · Restricted Project

Jan 17 2021

void added inline comments to D94726: [X86] Add segment and address-size override prefixes.
Jan 17 2021, 11:37 PM · Restricted Project
void updated the diff for D94726: [X86] Add segment and address-size override prefixes.

Fixed variable name and removed excess test lines.

Jan 17 2021, 11:37 PM · Restricted Project

Jan 15 2021

void abandoned D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
Jan 15 2021, 2:06 PM · Restricted Project
void accepted D88438: BreakCriticalEdges: do not split the critical edge from a CallBr indirect successor.
Jan 15 2021, 11:38 AM · Restricted Project

Jan 14 2021

void requested review of D94726: [X86] Add segment and address-size override prefixes.
Jan 14 2021, 2:38 PM · Restricted Project
void updated the diff for D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
  • Add FileCheck to testcase.
Jan 14 2021, 1:03 PM · Restricted Project

Jan 12 2021

void added inline comments to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
Jan 12 2021, 3:57 PM · Restricted Project
void added inline comments to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
Jan 12 2021, 3:14 PM · Restricted Project
void updated the diff for D94470: [LSR] Don't break a critical edge if parent ends with "callbr".

Move testcase.

Jan 12 2021, 2:52 PM · Restricted Project
void added inline comments to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
Jan 12 2021, 2:18 PM · Restricted Project
void added inline comments to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
Jan 12 2021, 2:03 PM · Restricted Project
void added a comment to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".

The test should be added in test/Transforms/PGOProfile/, see D87435

The error isn't in opt but in llc though. In fact, I don't think it's specific to PGO, but only triggered by it.

Then it should be in llvm/test/Transforms/LoopStrengthReduce/

Jan 12 2021, 2:00 PM · Restricted Project
void added a comment to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".

I guess the presence of the profile data makes it difficult to use bugpoint to reduce the test case more?

It looks like I was able to reduce it. PTAL.

The test case passes for me on ToT; was it over-reduced perhaps?

Jan 12 2021, 1:10 PM · Restricted Project
void added a comment to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".

I guess the presence of the profile data makes it difficult to use bugpoint to reduce the test case more?

Jan 12 2021, 12:11 PM · Restricted Project
void updated the diff for D94470: [LSR] Don't break a critical edge if parent ends with "callbr".

Reduce the testcase.

Jan 12 2021, 12:10 PM · Restricted Project
void added a comment to D94470: [LSR] Don't break a critical edge if parent ends with "callbr".

The test should be added in test/Transforms/PGOProfile/, see D87435

Jan 12 2021, 12:07 PM · Restricted Project

Jan 11 2021

void requested review of D94470: [LSR] Don't break a critical edge if parent ends with "callbr".
Jan 11 2021, 10:05 PM · Restricted Project

Dec 22 2020

void added a comment to D92156: [PowerPC] Add support for "tlbiel" with two arguments.

Also, looks like there is bug for tlbie as well, there is NO one operand mnemonic, only 5 or 2.

tlbie serves as both a basic and an extended mne-monic.  The Assembler will recognize a tlbie mne-monic with five operands as the basic form, and a tlbie mnemonic with two operands as the extended form.    In  the  extended  form  the  RIC,  PRS,  and  Roperands are omitted and assumed to be 0.
Dec 22 2020, 1:05 PM · Restricted Project

Dec 12 2020

void added a comment to D92156: [PowerPC] Add support for "tlbiel" with two arguments.

Ping #2.

Dec 12 2020, 7:18 PM · Restricted Project

Dec 2 2020

void added a comment to D92156: [PowerPC] Add support for "tlbiel" with two arguments.

Ping.

Dec 2 2020, 11:29 AM · Restricted Project

Nov 25 2020

void requested review of D92156: [PowerPC] Add support for "tlbiel" with two arguments.
Nov 25 2020, 11:08 PM · Restricted Project
void accepted D91836: [PowerPC] Delete remnant Darwin code in PPCAsmParser.
Nov 25 2020, 4:04 PM · Restricted Project

Nov 20 2020

void added a comment to D91816: [Inline] prevent inlining on stack protector mismatch.

Are there tests to ensure that the appropriate stack protector level is added to the function after inlining?

Nov 20 2020, 12:17 AM · Restricted Project

Nov 19 2020

void added inline comments to D91836: [PowerPC] Delete remnant Darwin code in PPCAsmParser.
Nov 19 2020, 6:21 PM · Restricted Project
void committed rGb2f663073917: [PowerPC] Allow a '%' prefix for registers in CFI directives (authored by void).
[PowerPC] Allow a '%' prefix for registers in CFI directives
Nov 19 2020, 6:20 PM
void closed D91735: [PowerPC] Allow a '%' prefix for registers in CFI directives.
Nov 19 2020, 6:20 PM · Restricted Project
void updated the diff for D91735: [PowerPC] Allow a '%' prefix for registers in CFI directives.

Move % eater to MatchRegisterName.

Nov 19 2020, 5:24 PM · Restricted Project

Nov 18 2020

void added a comment to D91735: [PowerPC] Allow a '%' prefix for registers in CFI directives.

I was thinking "would it be better to move this logic down into PPCAsmParser::MatchRegisterName? Well, I would suppose that would depend on if the % prefix on registers is valid in other contexts, for instance maybe other places that directly call PPCAsmParser::MatchRegisterName rather than `PPCAsmParser::tryParseRegister which you've modified here.

Nov 18 2020, 3:37 PM · Restricted Project
void requested review of D91735: [PowerPC] Allow a '%' prefix for registers in CFI directives.
Nov 18 2020, 12:41 PM · Restricted Project

Nov 12 2020

void added inline comments to D90194: [Driver] split LangOptions::SSPOff into SSPOFF and SSPUnspecified.
Nov 12 2020, 2:10 PM · Restricted Project

Nov 4 2020

void added inline comments to D90194: [Driver] split LangOptions::SSPOff into SSPOFF and SSPUnspecified.
Nov 4 2020, 5:43 PM · Restricted Project

Oct 26 2020

void accepted D90177: [BitCode] decode nossp fn attr.
Oct 26 2020, 12:48 PM · Restricted Project

Oct 22 2020

void added a comment to D87956: [IR] add fn attr for no_stack_protector; prevent inlining on mismatch.

In phab here, it looks like my newly added clang/test/Frontend/optimization-remark-missed-inline-stack-protectors.c fails on windows because I redirect stdout to /dev/null. How does that work for other tests? I see other tests in that dir write to /dev/null. Oh, I guess -o /dev/null will just create a file called "/dev/null" on Windows? So I should do that rather than 1> /dev/null?

Oct 22 2020, 2:06 PM · Restricted Project, Restricted Project

Oct 21 2020

void accepted D87956: [IR] add fn attr for no_stack_protector; prevent inlining on mismatch.

Only a couple of nits, but I think this looks good.

Oct 21 2020, 3:44 PM · Restricted Project, Restricted Project

Oct 20 2020

void added inline comments to D87956: [IR] add fn attr for no_stack_protector; prevent inlining on mismatch.
Oct 20 2020, 8:12 PM · Restricted Project, Restricted Project

Oct 6 2020

void committed rGd2c61d2bf9bd: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR (authored by void).
[CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR
Oct 6 2020, 6:45 PM
void closed D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.
Oct 6 2020, 6:45 PM · Restricted Project
void updated the diff for D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Rerun with the correct llc.

Oct 6 2020, 6:08 PM · Restricted Project
void updated the diff for D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Update comment and testcase.

Oct 6 2020, 5:59 PM · Restricted Project
void updated the summary of D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.
Oct 6 2020, 4:11 PM · Restricted Project
void reclaimed D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Okay. Abandoning this change.

Sorry, maybe I buried the lede too far into the message? "I think the fix you have here is OK" was at the end. :)

One thing, I believe we're trying to turn "asm goto" into something it was never meant to be. If you look at gcc's output for this code.

Okay. I'll reclaim this revision.

Oct 6 2020, 4:05 PM · Restricted Project

Oct 5 2020

void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

One thing, I believe we're trying to turn "asm goto" into something it was never meant to be. If you look at gcc's output for this code:

Oct 5 2020, 11:50 PM · Restricted Project
void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Okay. Abandoning this change.

Oct 5 2020, 11:29 PM · Restricted Project
void abandoned D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.
Oct 5 2020, 11:26 PM · Restricted Project
void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Here are the relevant parts of the original issue in get_partial_node. Blocks bb.16.bb100 and bb.17.bb106 are the sources of the values in the PHI node in bb.18.bb110. The bb.19.bb17.i.i.i block is the indirect destination and bb.20.bb113 the default destination.

Oct 5 2020, 8:21 PM · Restricted Project
void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

When we go to resolve this PHI node, there's no place to put the put the values that works in all situations; we can't split the critical edges and it's not valid to place the resolved instructions at the ends of the predecessor blocks.

We can (at least: should be able to) handle a PHI node in the indirect targets of an INLINEASM_BR, for any value which is not the output of the INLINEASM_BR itself. We place the required register copies prior to the INLINEASM_BR, rather than after it. This is handled by findPHICopyInsertPoint -- where we did have a bug already, fixed in f7a53d82c0902147909f28a9295a9d00b4b27d38.

Oct 5 2020, 7:58 PM · Restricted Project
void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

%9:gr32 = PHI %0:gr32, %bb.1, %5:gr32, %bb.2

The problem is this PHI here. We don't have a way to resolve PHI nodes in the entry block to an indirect destination. (This is the reason we don't allow "asm goto" outputs on the indirect paths.) When we go to resolve this PHI node, there's no place to put the put the values that works in all situations; we can't split the critical edges and it's not valid to place the resolved instructions at the ends of the predecessor blocks.

We're also not using "asm goto" outputs in this test case, so I still don't understand why this PHI is problematic.

That doesn't matter. It's problematic because of the PHI in the block with the INLINEASM_BR. As I mentioned, the result of the tail duplication is that that PHI is more-or-less moved *down* into the indirect and default destinations. Look at those PHIs and you'll see that they have the same values coming into them.

Oct 5 2020, 7:52 PM · Restricted Project
void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

I confirmed that this patch does fix the kernel panic observed in https://github.com/ClangBuiltLinux/linux/issues/1125#issuecomment-703890483.

I don't understand the bug though. Looking at the output of:

llc -mtriple=i686-- -stop-after=early-tailduplication -print-after-all llvm/test/CodeGen/X86/tail-dup-asm-goto.ll -o - 2>&1 | less

Before/After IR Dump After Early Tail Duplication before rebuilding clang with this patch applied (so still in a bad state), but nothing looks wrong to me. So what precisely is the bug?

Before early tail dup:

bb.0.bb:
  successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)

  %2:gr32 = IMPLICIT_DEF
  %0:gr32 = MOV32rm killed %2:gr32, 1, $noreg, 0, $noreg :: (load 4 from `i8** undef`, align 8)
  %3:gr32_abcd = MOV32r0 implicit-def dead $eflags
  %4:gr8 = COPY %3.sub_8bit:gr32_abcd
  TEST8rr %4:gr8, %4:gr8, implicit-def $eflags
  JCC_1 %bb.2, 5, implicit $eflags
  JMP_1 %bb.1

bb.1.bb100:
; predecessors: %bb.0
  successors: %bb.3(0x80000000); %bb.3(100.00%)

  %6:gr32 = IMPLICIT_DEF
  MOV32mi killed %6:gr32, 1, $noreg, 0, $noreg, 0 :: (store 4 into `i8** undef`, align 8)
  JMP_1 %bb.3

bb.2.bb106:
; predecessors: %bb.0
  successors: %bb.3(0x80000000); %bb.3(100.00%)

  ADJCALLSTACKDOWN32 0, 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
  CALLpcrel32 @foo, <regmask $bh $bl $bp $bph $bpl $bx $di $dih $dil $ebp $ebx $edi $esi $hbp $hbx $hdi $hsi $si $sih $sil>, implicit $esp, implicit $ssp, implicit-def $esp, implicit-def 
$ssp
  ADJCALLSTACKUP32 0, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $esp, implicit $ssp
  %5:gr32 = MOV32r0 implicit-def dead $eflags

bb.3.bb110:
; predecessors: %bb.2, %bb.1
  successors: %bb.5(0x80000000), %bb.4(0x00000000); %bb.5(100.00%), %bb.4(0.00%)

  %1:gr32 = PHI %5:gr32, %bb.2, %0:gr32, %bb.1
Oct 5 2020, 2:57 PM · Restricted Project
void added a comment to D88813: [CodeGen] Postprocess PHI nodes for callbr.

test case looks reasonable (I haven't run it pre-patch to see what goes wrong yet). Just curious, is this CL related to D88823?

Oct 5 2020, 1:24 PM · Restricted Project
void updated the summary of D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.
Oct 5 2020, 12:40 PM · Restricted Project
void added a comment to D88813: [CodeGen] Postprocess PHI nodes for callbr.

@jyknight This doesn't have the loop refactored like you asked for. I'll work on that today.

Oct 5 2020, 12:37 PM · Restricted Project
void updated the diff for D88813: [CodeGen] Postprocess PHI nodes for callbr.

Update with missing elements so that it works.

Oct 5 2020, 12:36 PM · Restricted Project
void added a comment to D88813: [CodeGen] Postprocess PHI nodes for callbr.

test?

Oct 5 2020, 12:31 PM · Restricted Project
void updated the diff for D88813: [CodeGen] Postprocess PHI nodes for callbr.

Add testcase.

Oct 5 2020, 12:31 PM · Restricted Project
void updated the diff for D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Add testcase.

Oct 5 2020, 11:10 AM · Restricted Project
void updated the diff for D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Improve comment on why we're limiting tail duplication on INLINEASM_BR instruction.

Oct 5 2020, 10:08 AM · Restricted Project
void added a comment to D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.

Hm, it doesn't seem like it should be a problem to duplicate an inlineasm_br instruction. I'm interested to see what's going wrong here.

Oct 5 2020, 10:01 AM · Restricted Project
void requested review of D88823: [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR.
Oct 5 2020, 4:24 AM · Restricted Project
void requested review of D88813: [CodeGen] Postprocess PHI nodes for callbr.
Oct 5 2020, 2:37 AM · Restricted Project

Sep 30 2020

void added a comment to D88438: BreakCriticalEdges: do not split the critical edge from a CallBr indirect successor.

I believe that a critical edge may be split on the default path, but not the indirect path.

I don't think https://github.com/llvm/llvm-project/commit/2fe457690da0fc38bc7f9f1d0aee2ba6a6a16ada made a similar distinction?

Yeah. I made an error there...

Sep 30 2020, 7:23 PM · Restricted Project
void added a comment to D88438: BreakCriticalEdges: do not split the critical edge from a CallBr indirect successor.

The concept of splitting a critical edge is still relatively new to me; any thoughts on *why* it would not be ok to split a critical branch of an indirect-like jump?

The problem has to do with blockaddress.

For normal branches, splitting an edge is usually straightforward: you just introduce a new block that branches to the original block, and then you rewrite the branch in the predecessor. But suppose you have a block with two indirectbr predecessors, and you want to split the edge. In that case, the "rewrite the branch" step doesn't work: you can't rewrite the address argument to the indirectbr. (Or at least, you can't without performing some invasive rewrite like indirectbr->switch lowering.)

Sep 30 2020, 7:18 PM · Restricted Project
void added a comment to D88438: BreakCriticalEdges: do not split the critical edge from a CallBr indirect successor.

I believe that a critical edge may be split on the default path, but not the indirect path.

Sep 30 2020, 4:34 PM · Restricted Project
void added inline comments to D87956: [IR] add fn attr for no_stack_protector; prevent inlining on mismatch.
Sep 30 2020, 3:17 AM · Restricted Project, Restricted Project

Sep 24 2020

void committed rGc9b53b3bf20d: Fix regex in test. (authored by void).
Fix regex in test.
Sep 24 2020, 3:21 PM
void added a comment to D86260: [CodeGen] Postprocess PHI nodes for callbr.

Erm...Reverted...Sorry.

Sep 24 2020, 2:36 PM · Restricted Project
void added a reverting change for D86260: [CodeGen] Postprocess PHI nodes for callbr: rG0c0c57f7b21b: Revert "[CodeGen] Postprocess PHI nodes for callbr".
Sep 24 2020, 2:36 PM · Restricted Project
void added a reverting change for rG7f4c940bd0b5: [CodeGen] Postprocess PHI nodes for callbr: rG0c0c57f7b21b: Revert "[CodeGen] Postprocess PHI nodes for callbr".
Sep 24 2020, 2:36 PM
void committed rG0c0c57f7b21b: Revert "[CodeGen] Postprocess PHI nodes for callbr" (authored by void).
Revert "[CodeGen] Postprocess PHI nodes for callbr"
Sep 24 2020, 2:35 PM
void committed rGf97b68ef4ddd: Fix testcase. (authored by void).
Fix testcase.
Sep 24 2020, 2:35 PM
void committed rG7f4c940bd0b5: [CodeGen] Postprocess PHI nodes for callbr (authored by void).
[CodeGen] Postprocess PHI nodes for callbr
Sep 24 2020, 2:34 PM
void closed D86260: [CodeGen] Postprocess PHI nodes for callbr.
Sep 24 2020, 2:34 PM · Restricted Project
void committed rG34ca5b3392ce: Remove stale assert. (authored by void).
Remove stale assert.
Sep 24 2020, 2:00 PM
void closed D88195: Remove stale assert..
Sep 24 2020, 1:59 PM · Restricted Project
void updated the summary of D88195: Remove stale assert..
Sep 24 2020, 1:55 PM · Restricted Project
void updated the diff for D88195: Remove stale assert..

Clarify commit message.

Sep 24 2020, 1:30 PM · Restricted Project
void added a comment to D88195: Remove stale assert..

I'm super confused between the commit message and initial hunk, that seem to make sense and probably should go in clang-11 if it's not too late, and the additional tests for modules which the commit message does not address. Were these meant to be separate commits, because otherwise it looks like you uploaded unrelated stuff. Are C++20 modules broken with asm goto, or are you just adding additional test coverage for that?

The assert only triggers for modules, so yeah modules are broken with "asm goto", but only if asserts are enabled.

The assert was removed from AST/Stmt.cpp; it doesn't look module related. Wouldn't it be triggered by ANY GCCAsmStmt? (I have patches that use ASM goto w/ outputs on the kernel, let me try an assertions enabled build). It's not obvious to me why the method modified would only trigger for modules.

Yes, but that particular function is only called during serialization reading. It would trigger for any serialization, this just happens to be for modules. I'll edit the commit message to be clearer.

Sep 24 2020, 1:28 PM · Restricted Project
void added a comment to D88195: Remove stale assert..

I'm super confused between the commit message and initial hunk, that seem to make sense and probably should go in clang-11 if it's not too late, and the additional tests for modules which the commit message does not address. Were these meant to be separate commits, because otherwise it looks like you uploaded unrelated stuff. Are C++20 modules broken with asm goto, or are you just adding additional test coverage for that?

Sep 24 2020, 1:01 PM · Restricted Project
void updated the diff for D88195: Remove stale assert..

Fix test.

Sep 24 2020, 12:59 PM · Restricted Project

Sep 23 2020

void added inline comments to D88195: Remove stale assert..
Sep 23 2020, 9:50 PM · Restricted Project