Add new architectures ‘spirv32’ and ‘spirv64’ in Triple, ported from
LLVM SPIR-V Backend repository
(https://github.com/KhronosGroup/LLVM-SPIRV-Backend). Add basic and
code generation target info for ‘spirv32’ and ‘spirv64’ and, thus,
enabling clang (LLVM IR) code emission to SPIR-V target. The target
information for SPIR-V is mostly reused from the SPIR target info as
Clang code generation output is mostly same as SPIR. Added and updated
tests for parts that are different between SPIR and SPIR-V now.