[mac/arm] Fix rtti codegen tests when running on an arm mac

[thakis]

Summary

[mac/arm] Fix rtti codegen tests when running on an arm mac

shouldRTTIBeUnique() returns false for iOS64CXXABI, which causes
RTTI objects to be emitted hidden. Update two tests that didn't
expect this to happen for the default triple.

Also rename iOS64CXXABI to AppleARM64CXXABI, since it's used for
arm64-apple-macos triples too.

Part of PR46644.

[hans]

lgtm

clang/include/clang/Basic/TargetCXXABI.h

enum Kind {
     ///
     /// Essentially, the iOS ABI includes the ARM changes to:
     ///   - member function pointers,
     ///   - guard variables,
     ///   - array cookies, and
     ///   - constructor/destructor signatures.
     iOS,
 
-    /// The iOS 64-bit ABI is follows ARM's published 64-bit ABI more
-    /// closely, but we don't guarantee to follow it perfectly.
+    /// The iOS 64-bit and macOS 64-bit ARM ABI follows ARM's published 64-bit
+    /// ABI more closely, but we don't guarantee to follow it perfectly.
     ///
     /// It is documented here:
     ///    http://infocenter.arm.com
     ///                  /help/topic/com.arm.doc.ihi0059a/IHI0059A_cppabi64.pdf
-    iOS64,
+    AppleARM64,
 
     /// WatchOS is a modernisation of the iOS ABI, which roughly means it's
-    /// the iOS64 ABI ported to 32-bits. The primary difference from iOS64 is
-    /// that RTTI objects must still be unique at the moment.
+    /// the AppleARM64 ABI ported to 32-bits. The primary difference from
+    /// AppleARM64 is that RTTI objects must still be unique at the moment.
     WatchOS,
 
     /// The generic AArch64 ABI is also a modified version of the Itanium ABI,
     /// but it has fewer divergences than the 32-bit ARM ABI.
     ///
     /// The relevant changes from the generic ABI in this case are:
     ///   - representation of member function pointers adjusted as in ARM.
     ///   - guard variables  are smaller.
enum Kind {
     ///
     /// The changes from the Itanium ABI are:
     ///   - representation of member function pointers is adjusted, as in ARM;
     ///   - member functions are not specially aligned;
     ///   - constructors and destructors return 'this', as in ARM;
     ///   - guard variables are 32-bit on wasm32, as in ARM;
     ///   - unused bits of guard variables are reserved, as in ARM;
     ///   - inline functions are never key functions, as in ARM;
-    ///   - C++11 POD rules are used for tail padding, as in iOS64.
+    ///   - C++11 POD rules are used for tail padding, as in AppleARM64.
     ///
     /// TODO: At present the WebAssembly ABI is not considered stable, so none
     /// of these details is necessarily final yet.
     WebAssembly,
 
     /// The Fuchsia ABI is a modified version of the Itanium ABI.
     ///
     /// The relevant changes from the Itanium ABI are:
void set(Kind kind) {
     TheKind = kind;
   }
 
   Kind getKind() const { return TheKind; }
 
   /// Does this ABI generally fall into the Itanium family of ABIs?
   bool isItaniumFamily() const {
     switch (getKind()) {
+    case AppleARM64:
     case Fuchsia:
     case GenericAArch64:
     case GenericItanium:
     case GenericARM:
     case iOS:
-    case iOS64:
     case WatchOS:
     case GenericMIPS:
     case WebAssembly:
     case XL:
       return true;
 
     case Microsoft:
       return false;
     }
     llvm_unreachable("bad ABI kind");
   }
 
   /// Is this ABI an MSVC-compatible ABI?
   bool isMicrosoft() const {
     switch (getKind()) {
+    case AppleARM64:
     case Fuchsia:
     case GenericAArch64:
     case GenericItanium:
     case GenericARM:
     case iOS:
-    case iOS64:
     case WatchOS:
     case GenericMIPS:
     case WebAssembly:
     case XL:
       return false;
 
     case Microsoft:
       return true;
public:
   /// some Itanium-style C++ ABIs differentiate between virtual and non-virtual
   /// functions via other means, and consequently don't require that member
   /// functions be aligned.
   bool areMemberFunctionsAligned() const {
     switch (getKind()) {
     case WebAssembly:
       // WebAssembly doesn't require any special alignment for member functions.
       return false;
+    case AppleARM64:
     case Fuchsia:
     case GenericARM:
     case GenericAArch64:
     case GenericMIPS:
       // TODO: ARM-style pointers to member functions put the discriminator in
       //       the this adjustment, so they don't require functions to have any
       //       special alignment and could therefore also return false.
     case GenericItanium:
     case iOS:
-    case iOS64:
     case WatchOS:
     case Microsoft:
     case XL:
       return true;
     }
     llvm_unreachable("bad ABI kind");
   }
 
public:
   ///
   /// Because this changes the rules for emitting type data,
   /// it can cause type data to be emitted with both weak and strong
   /// linkage, which is not allowed on all platforms.  Therefore,
   /// exploiting this observation requires an ABI break and cannot be
   /// done on a generic Itanium platform.
   bool canKeyFunctionBeInline() const {
     switch (getKind()) {
+    case AppleARM64:
     case Fuchsia:
     case GenericARM:
-    case iOS64:
     case WebAssembly:
     case WatchOS:
       return false;
 
     case GenericAArch64:
     case GenericItanium:
     case iOS:   // old iOS compilers did not follow this rule
     case Microsoft:
TailPaddingUseRules getTailPaddingUseRules() const {
     case GenericItanium:
     case GenericAArch64:
     case GenericARM:
     case iOS:
     case GenericMIPS:
     case XL:
       return UseTailPaddingUnlessPOD03;
 
-    // iOS on ARM64 and WebAssembly use the C++11 POD rules.  They do not honor
+    // AppleARM64 and WebAssembly use the C++11 POD rules.  They do not honor
     // the Itanium exception about classes with over-large bitfields.
+    case AppleARM64:
     case Fuchsia:
-    case iOS64:
     case WebAssembly:
     case WatchOS:
       return UseTailPaddingUnlessPOD11;
 
     // MSVC always allocates fields in the tail-padding of a base class
     // subobject, even if they're POD.
     case Microsoft:
       return AlwaysUseTailPadding;

clang/lib/AST/ASTContext.cpp

ASTContext::getCanonicalTemplateTemplateParmDecl(
   CanonTemplateTemplateParms.InsertNode(Canonical, InsertPos);
   return CanonTTP;
 }
 
 CXXABI *ASTContext::createCXXABI(const TargetInfo &T) {
   if (!LangOpts.CPlusPlus) return nullptr;
 
   switch (T.getCXXABI().getKind()) {
+  case TargetCXXABI::AppleARM64:
   case TargetCXXABI::Fuchsia:
   case TargetCXXABI::GenericARM: // Same as Itanium at this level
   case TargetCXXABI::iOS:
-  case TargetCXXABI::iOS64:
   case TargetCXXABI::WatchOS:
   case TargetCXXABI::GenericAArch64:
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::XL:
     return CreateItaniumCXXABI(*this);
   case TargetCXXABI::Microsoft:
VTableContextBase *ASTContext::getVTableContext() {
   }
   return VTContext.get();
 }
 
 MangleContext *ASTContext::createMangleContext(const TargetInfo *T) {
   if (!T)
     T = Target;
   switch (T->getCXXABI().getKind()) {
+  case TargetCXXABI::AppleARM64:
   case TargetCXXABI::Fuchsia:
   case TargetCXXABI::GenericAArch64:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::GenericARM:
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::iOS:
-  case TargetCXXABI::iOS64:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::WatchOS:
   case TargetCXXABI::XL:
     return ItaniumMangleContext::create(*this, getDiagnostics());
   case TargetCXXABI::Microsoft:
     return MicrosoftMangleContext::create(*this, getDiagnostics());
   }
   llvm_unreachable("Unsupported ABI");

clang/lib/Basic/Targets/AArch64.cpp

DarwinAArch64TargetInfo::DarwinAArch64TargetInfo(const llvm::Triple &Triple,
   UseZeroLengthBitfieldAlignment = false;
 
   if (getTriple().isArch32Bit()) {
     UseBitFieldTypeAlignment = false;
     ZeroLengthBitfieldBoundary = 32;
     UseZeroLengthBitfieldAlignment = true;
     TheCXXABI.set(TargetCXXABI::WatchOS);
   } else
-    TheCXXABI.set(TargetCXXABI::iOS64);
+    TheCXXABI.set(TargetCXXABI::AppleARM64);
 }
 
 void DarwinAArch64TargetInfo::getOSDefines(const LangOptions &Opts,
                                            const llvm::Triple &Triple,
                                            MacroBuilder &Builder) const {
   Builder.defineMacro("__AARCH64_SIMD__");
   if (Triple.isArch32Bit())
     Builder.defineMacro("__ARM64_ARCH_8_32__");

clang/lib/CodeGen/CodeGenModule.cpp

static llvm::cl::opt<bool> LimitedCoverage(
     "limited-coverage-experimental", llvm::cl::ZeroOrMore, llvm::cl::Hidden,
     llvm::cl::desc("Emit limited coverage mapping information (experimental)"),
     llvm::cl::init(false));
 
 static const char AnnotationSection[] = "llvm.metadata";
 
 static CGCXXABI *createCXXABI(CodeGenModule &CGM) {
   switch (CGM.getTarget().getCXXABI().getKind()) {
+  case TargetCXXABI::AppleARM64:
   case TargetCXXABI::Fuchsia:
   case TargetCXXABI::GenericAArch64:
   case TargetCXXABI::GenericARM:
   case TargetCXXABI::iOS:
-  case TargetCXXABI::iOS64:
   case TargetCXXABI::WatchOS:
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::XL:
     return CreateItaniumCXXABI(CGM);
   case TargetCXXABI::Microsoft:
     return CreateMicrosoftCXXABI(CGM);

clang/lib/CodeGen/ItaniumCXXABI.cpp

Address InitializeArrayCookie(CodeGenFunction &CGF,
                                 Address NewPtr,
                                 llvm::Value *NumElements,
                                 const CXXNewExpr *expr,
                                 QualType ElementType) override;
   llvm::Value *readArrayCookieImpl(CodeGenFunction &CGF, Address allocPtr,
                                    CharUnits cookieSize) override;
 };
 
-class iOS64CXXABI : public ARMCXXABI {
+class AppleARM64CXXABI : public ARMCXXABI {
 public:
-  iOS64CXXABI(CodeGen::CodeGenModule &CGM) : ARMCXXABI(CGM) {
+  AppleARM64CXXABI(CodeGen::CodeGenModule &CGM) : ARMCXXABI(CGM) {
     Use32BitVTableOffsetABI = true;
   }
 
   // ARM64 libraries are prepared for non-unique RTTI.
   bool shouldRTTIBeUnique() const override { return false; }
 };
 
 class FuchsiaCXXABI final : public ItaniumCXXABI {
CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
   switch (CGM.getTarget().getCXXABI().getKind()) {
   // For IR-generation purposes, there's no significant difference
   // between the ARM and iOS ABIs.
   case TargetCXXABI::GenericARM:
   case TargetCXXABI::iOS:
   case TargetCXXABI::WatchOS:
     return new ARMCXXABI(CGM);
 
-  case TargetCXXABI::iOS64:
-    return new iOS64CXXABI(CGM);
+  case TargetCXXABI::AppleARM64:
+    return new AppleARM64CXXABI(CGM);
 
   case TargetCXXABI::Fuchsia:
     return new FuchsiaCXXABI(CGM);
 
   // Note that AArch64 uses the generic ItaniumCXXABI class since it doesn't
   // include the other 32-bit ARM oddities: constructor/destructor return values
   // and array cookies.
   case TargetCXXABI::GenericAArch64:

clang/test/CodeGenCXX/weak-extern-typeinfo.cpp

 };
 
 class V2 : public virtual V1 {
   virtual void foo();
 };
 void V1::foo() { }
 void V2::foo() { }
 
-// CHECK: @_ZTS1A = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1A = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS1B = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1B = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS1C = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS2T1 = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI2T1 = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS1T = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1T = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1C = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS2V1 = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI2V1 = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS2V2 = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI2V2 = weak_odr {{(dso_local )?}}constant
+// CHECK: @_ZTS1A = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1A = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS1B = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1B = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS1C = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS2T1 = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI2T1 = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS1T = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1T = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1C = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS2V1 = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI2V1 = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS2V2 = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI2V2 = weak_odr {{(dso_local|hidden )?}}constant

clang/test/SemaCXX/typeid-ref.cpp

 // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm -o - %s | FileCheck %s
 namespace std {
   class type_info;
 }
 
 struct X { };
 
 void f() {
-  // CHECK: @_ZTS1X = linkonce_odr {{(dso_local )?}}constant
-  // CHECK: @_ZTI1X = linkonce_odr {{(dso_local )?}}constant 
+  // CHECK: @_ZTS1X = linkonce_odr {{(dso_local|hidden )?}}constant
+  // CHECK: @_ZTI1X = linkonce_odr {{(dso_local|hidden )?}}constant
   (void)typeid(X&);
 }