[FPEnv] Intrinsics for access to FP control modes

[sepavloff]

Summary

The change introduces intrinsics 'get_fpmode', 'set_fpmode' and
'reset_fpmode'. They manage all target dynamic floating-point control
modes, which include, for instance, rounding direction, precision,
treatment of denormals and so on. The intrinsics do the same
operations as the C library functions 'fegetmode' and 'fesetmode'. By
default they are lowered to calls to these functions.

Two main use cases are supported by this implementation.

1. Local modification of the control modes. In this case the code

usually has a pattern (in pseudocode):

saved_modes = get_fpmode()
set_fpmode(<new_modes>)
...
<do operations with new modes>
...
set_fpmode(saved_modes)

In the case when it is known that the current FP environment is default,
the code may be shorter:

set_fpmode(<new_modes>)
...
<do operations with new modes>
...
reset_fpmode()

Such patterns appear not only in user code but also in implementations
of various FP controlling pragmas. In particular, the implementation of
#pragma STDC FENV_ROUND requires similar code if the target does not
support static rounding mode.

2. Portable control of FP modes. Usually FP control modes are set by

write to some control register. Different targets have different
layout of this register, the way the register is accessed also may be
different. Using set of target-specific definitions for the control
register bits together with these intrinsic functions provides enough
portable way to handle control modes across wide range of hardware.

This change defines only llvm intrinsic function, which implement the
access required for the aforementioned use cases.

[sepavloff]

Fixed legalization of SET_FPMODE

[sepavloff]

Missed change

[sepavloff]

Rebased patch

[sepavloff]

Ping.

[sepavloff]

Rebased patch

[sepavloff]

Rebased patch

[sepavloff]

Get rid of clang-tidy warnings

[sepavloff]

Ping.

[sepavloff]

Rebased and simplified a bit.

[lebedev.ri]

From langref it isn't obvious if the following transform is valid or not

%z = fadd_strict %x, %y
call @llvm.set.fpmode.i16(i16 %fpenv)
  =>
call @llvm.set.fpmode.i16(i16 %fpenv)
%z = fadd_strict %x, %y

[craig.topper]

llvm/test/CodeGen/Generic/fpenv.ll

36

Is this missing the instructions that copy %fpenv into the stack temporary?

[craig.topper]

Is there any guarantee that femode_t will be the same layout for a given target in different C library implementations?

[sepavloff]

Extended documentation, fixed chain treatment.

[sepavloff]

In D82525#2599988, @lebedev.ri wrote:

From langref it isn't obvious if the following transform is valid or not

%z = fadd_strict %x, %y
call @llvm.set.fpmode.i16(i16 %fpenv)
  =>
call @llvm.set.fpmode.i16(i16 %fpenv)
%z = fadd_strict %x, %y

Short mention about function ordering is added to the paragraph "Floating Point Environment Manipulation intrinsics".

In D82525#2600598, @craig.topper wrote:

Is there any guarantee that femode_t will be the same layout for a given target in different C library implementations?

Strictly speaking there is no such guarantee. However the obvious implementation of femode_t is the type used to store content of FP control register. Most of 16 targets supported by glibc use unsigned int as femode_t. Exceptions are alpha, ia64, sparc (unsigned long) and powerpc (double). In these cases femode_t is identical to fenv_t.

llvm/test/CodeGen/Generic/fpenv.ll

36

Indeed, due to incorrect chain argument supplied to the library function call, the store to stack disappeared.

Thank you for the catch!

[craig.topper]

In D82525#2603275, @sepavloff wrote:

In D82525#2599988, @lebedev.ri wrote:

From langref it isn't obvious if the following transform is valid or not

%z = fadd_strict %x, %y
call @llvm.set.fpmode.i16(i16 %fpenv)
  =>
call @llvm.set.fpmode.i16(i16 %fpenv)
%z = fadd_strict %x, %y

Short mention about function ordering is added to the paragraph "Floating Point Environment Manipulation intrinsics".

In D82525#2600598, @craig.topper wrote:

Is there any guarantee that femode_t will be the same layout for a given target in different C library implementations?

Strictly speaking there is no such guarantee. However the obvious implementation of femode_t is the type used to store content of FP control register. Most of 16 targets supported by glibc use unsigned int as femode_t. Exceptions are alpha, ia64, sparc (unsigned long) and powerpc (double). In these cases femode_t is identical to fenv_t.

Isn't X86 using this struct which is 8 bytes?

typedef struct
  {
    unsigned short int __control_word;
    unsigned short int __glibc_reserved;
    unsigned int __mxcsr;
  }
femode_t;

[sepavloff]

In D82525#2603611, @craig.topper wrote:

In D82525#2603275, @sepavloff wrote:

In D82525#2600598, @craig.topper wrote:

Is there any guarantee that femode_t will be the same layout for a given target in different C library implementations?

Strictly speaking there is no such guarantee. However the obvious implementation of femode_t is the type used to store content of FP control register. Most of 16 targets supported by glibc use unsigned int as femode_t. Exceptions are alpha, ia64, sparc (unsigned long) and powerpc (double). In these cases femode_t is identical to fenv_t.

Isn't X86 using this struct which is 8 bytes?

typedef struct
  {
    unsigned short int __control_word;
    unsigned short int __glibc_reserved;
    unsigned int __mxcsr;
  }
femode_t;

Sure. I forget to mention x86.

There are cases when size of fenv_t differs in different libraries. ARM uses unsigned int in glibc but unsigned long in musl.

[craig.topper]

In D82525#2605358, @sepavloff wrote:

In D82525#2603611, @craig.topper wrote:

In D82525#2603275, @sepavloff wrote:

In D82525#2600598, @craig.topper wrote:

Is there any guarantee that femode_t will be the same layout for a given target in different C library implementations?

Strictly speaking there is no such guarantee. However the obvious implementation of femode_t is the type used to store content of FP control register. Most of 16 targets supported by glibc use unsigned int as femode_t. Exceptions are alpha, ia64, sparc (unsigned long) and powerpc (double). In these cases femode_t is identical to fenv_t.

Isn't X86 using this struct which is 8 bytes?

typedef struct
  {
    unsigned short int __control_word;
    unsigned short int __glibc_reserved;
    unsigned int __mxcsr;
  }
femode_t;

Sure. I forget to mention x86.

There are cases when size of fenv_t differs in different libraries. ARM uses unsigned int in glibc but unsigned long in musl.

Is unsigned long 32-bits in this case?

[sepavloff]

In D82525#2605442, @craig.topper wrote:

In D82525#2605358, @sepavloff wrote:

In D82525#2603611, @craig.topper wrote:

In D82525#2603275, @sepavloff wrote:

In D82525#2600598, @craig.topper wrote:

Is there any guarantee that femode_t will be the same layout for a given target in different C library implementations?

There are cases when size of fenv_t differs in different libraries. ARM uses unsigned int in glibc but unsigned long in musl.

Is unsigned long 32-bits in this case?

Yes, ARM gcc 10.2(linux) generates 4 for sizeof(unsigned long).

[sepavloff]

Added helper functions

These are methods of IRBuilder: createGetFPMode, which get size of fp modes from
DataLayout, createSetFPMode and createResetFPMode.

[sepavloff]

Rebased patch

[sepavloff]

Ping.

[sepavloff]

Any feedback?

[sepavloff]

Ping.

[sepavloff]

Updated patch

• Rebased.
• Get rid of using DataLayout to determine the size of control modes. It limits the usage of the intrinsics to some extent, because an IR transformation that would create a call to llvm.get.fpmode or llvm.set.fpmode must somehow know the size for current target. But for the main use cases it should be enough, only TargetInfo needs to be extended so that clang could know the size.
• The test that checks default lowering was rewritten using soft-float option.

[arsenm]

Can this be abandoned with get_fpenv / set_fpenv already pushed?

[sepavloff]

Rebased patch

[sepavloff]

In D82525#4425234, @arsenm wrote:

Can this be abandoned with get_fpenv / set_fpenv already pushed?

These are different intrinsics, and they correspond to different C functions. Control modes are a part of FP environment, but the latter contains also status bits. If a target has single FP status and control register, both fegetenv and fegetmode are implemented as reading from that register in glibc, but in fegetmode bits not related to control modes are cleared. If a target have different status and control registers, or FP environment is large in size (as on X86), get_fpmode/set_fpmode can be have faster implementation than get_fpenv/set_fpenv.

[arsenm]

I just realized how much I had confused this with llvm.get.fpenv. I think I implemented this one as llvm.get.fpenv in D152710. Can you clarify in the LangRef for get/set fpenv what the "current floating-point environment" means? I was interpreting this as the mode register, not including the dynamic exception mask

[arsenm]

Could you also handle GlobalISel?

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

4351–4353

You don't need to bother with this typed pointer dance anymore

[arsenm]

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

4327

This should be getStack, not getFixedStack

4341

This should be getStack, not getFixedStack

[sepavloff]

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

4341

Could you please explain a bit, why it should be getStack? It is not used anywhere in this file. Function PerformInsertVectorEltInMemory uses getFixedStack for temporary space, what is the difference between it and these cases?

[sepavloff]

Rebase, define custom SDNodes for the intrinsics and use opaque pointer

[arsenm]

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

4341

Nevermind this is correct. We have confusing overlapping terminology. MachineFrameInfo refers to fixed stack objects as frame indexes as known fixed offsets for incoming stack arguments but apparently MachineMemOperand uses getFixedStack for any FrameIndex reference and getStack for offsets from SP

4351–4353

Don't think the alloca address space is correct for this. I guess use the default? Also just use TLI.getPointerTy, you don't need to go through the IR type

[sepavloff]

Address reviewer's notes

[arsenm]

LGTM

llvm/docs/LangRef.rst

::
     1  - to nearest, ties to even
     2  - toward positive infinity
     3  - toward negative infinity
     4  - to nearest, ties away from zero
 
 Other values may be used to represent additional rounding modes, supported by a
 target. These values are target-specific.
 
+'``llvm.get.fpmode``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+This is an overloaded intrinsic. The overloaded type is an integer type used by
+particular target to represent floating-point control modes.
+
+::
+
+      declare i8 @llvm.get.fpmode.i8()
+      declare i16 @llvm.get.fpmode.i16()
+      declare i32 @llvm.get.fpmode.i32()
+      declare i64 @llvm.get.fpmode.i64()
+
+Overview:
+"""""""""
+
+The '``llvm.get.fpmode``' intrinsic reads floating-point control modes.
+
+Arguments:
+""""""""""
+
+None.
+
+Semantics:
+""""""""""
+
+The '``llvm.get.fpmode``' intrinsic reads the current floating-point control
+modes, such as rounding direction, precision, treatment of denormals and so on.
+It is similar to C library function 'fegetmode', however this function does not
+store the set of control modes into memory but returns it as an integer value.
+Interpretation of the bits in this value is target-dependent.
+
+'``llvm.set.fpmode``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+This is an overloaded intrinsic. The overloaded type is an integer type used by
+particular target to represent floating-point control modes.
+
+::
+
+      declare void @llvm.set.fpmode.i8(i8 <val>)
+      declare void @llvm.set.fpmode.i16(i16 <val>)
+      declare void @llvm.set.fpmode.i32(i32 <val>)
+      declare void @llvm.set.fpmode.i64(i64 <val>)
+
+Overview:
+"""""""""
+
+The '``llvm.set.fpmode``' intrinsic sets floating-point control modes.
+
+Arguments:
+""""""""""
+
+The argument is a set of floating-point control modes.
+
+Semantics:
+""""""""""
+
+The '``llvm.set.fpmode``' intrinsic sets the current dynamic floating-point
+control modes to the state specified by the argument, which must be obtained by
+call to '``llvm.get.fpmode``' or constructed in a target-specific way. It is
+similar to C library function 'fesetmode', however this function does not read
+set of control modes from memory but gets it as integer value.
+
+'``llvm.reset.fpmode``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+      declare void @llvm.reset.fpmode()
+
+Overview:
+"""""""""
+
+The '``llvm.reset.fpmode``' intrinsic sets default dynamic floating-point control
+modes.
+
+Arguments:
+""""""""""
+
+None.
+
+Semantics:
+""""""""""
+
+The '``llvm.reset.fpmode``' intrinsic sets the current dynamic floating-point
+environment to default state. It is similar to the call 'fesetmode(FE_DFL_MODE)',
+however this function does not return any value.
+
+
 General Intrinsics
 ------------------
 
 This class of intrinsics is designed to be generic and has no specific
 purpose.
 
 '``llvm.var.annotation``' Intrinsic
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

llvm/include/llvm/CodeGen/ISDOpcodes.h

enum NodeType {
   /// as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
   /// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
   FMINIMUM,
   FMAXIMUM,
 
   /// FSINCOS - Compute both fsin and fcos as a single operation.
   FSINCOS,
 
+  /// Reads current dynamic floating-point control modes. The argument is token
+  /// chain.
+  GET_FPMODE,
+
+  /// Sets current dynamic floating-point control modes. The first argument is
+  /// token chain, the second is control modes represented as integer value.
+  SET_FPMODE,
+
+  /// Sets default dynamic floating-point control modes. The argument is token
+  /// chain.
+  RESET_FPMODE,
+
   /// LOAD and STORE have token chains as their first operand, then the same
   /// operands as an LLVM load/store instruction, then an offset node that
   /// is added / subtracted from the base pointer to form the address (for
   /// indexed memory ops).
   LOAD,
   STORE,
 
   /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned

llvm/include/llvm/IR/IRBuilder.h

CallInst *CreateMinimum(Value *LHS, Value *RHS, const Twine &Name = "") {
     return CreateBinaryIntrinsic(Intrinsic::minimum, LHS, RHS, nullptr, Name);
   }
 
   /// Create call to the maximum intrinsic.
   CallInst *CreateMaximum(Value *LHS, Value *RHS, const Twine &Name = "") {
     return CreateBinaryIntrinsic(Intrinsic::maximum, LHS, RHS, nullptr, Name);
   }
 
+  /// Create call to the get_fpmode intrinsic.
+  /// \param ModeTy Integer type used by target to represent floating-point
+  ///               control modes.
+  CallInst *CreateGetFPMode(Type *ModeTy, const Twine &Name = "") {
+    return CreateIntrinsic(Intrinsic::get_fpmode, {ModeTy}, {}, nullptr, Name);
+  }
+
+  /// Create call to the set_fpmode intrinsic.
+  CallInst *CreateSetFPMode(Value *Modes, const Twine &Name = "") {
+    return CreateIntrinsic(Intrinsic::set_fpmode, {Modes->getType()}, {Modes},
+                           nullptr, Name);
+  }
+
+  /// Create call to the reset_fpmode intrinsic.
+  CallInst *CreateResetFPMode(const Twine &Name = "") {
+    return CreateIntrinsic(Intrinsic::reset_fpmode, {}, {}, nullptr, Name);
+  }
+
 private:
   /// Create a call to a masked intrinsic with given Id.
   CallInst *CreateMaskedIntrinsic(Intrinsic::ID Id, ArrayRef<Value *> Ops,
                                   ArrayRef<Type *> OverloadedTypes,
                                   const Twine &Name = "");
 
   Value *getCastedInt8PtrValue(Value *Ptr);
 

llvm/include/llvm/IR/Intrinsics.td

 
 //===--------------- Access to Floating Point Environment -----------------===//
 //
 
 let IntrProperties = [IntrInaccessibleMemOnly, IntrWillReturn] in {
   def int_flt_rounds    : Intrinsic<[llvm_i32_ty], []>;
 }
 
+def int_get_fpmode    : Intrinsic<[llvm_anyint_ty], [],
+                                  [IntrWillReturn, IntrReadMem, IntrNoSync,
+                                   IntrInaccessibleMemOnly]>;
+def int_set_fpmode    : Intrinsic<[], [llvm_anyint_ty],
+                                  [IntrWillReturn, IntrWriteMem, IntrNoSync,
+                                   IntrInaccessibleMemOnly]>;
+def int_reset_fpmode  : Intrinsic<[], [],
+                                  [IntrWillReturn, IntrWriteMem, IntrNoSync,
+                                   IntrInaccessibleMemOnly]>;
+
+
 //===--------------- Constrained Floating Point Intrinsics ----------------===//
 //
 
 let IntrProperties = [IntrInaccessibleMemOnly, IntrWillReturn] in {
   def int_experimental_constrained_fadd : Intrinsic<[ llvm_anyfloat_ty ],
                                                     [ LLVMMatchType<0>,
                                                       LLVMMatchType<0>,
                                                       llvm_metadata_ty,

llvm/include/llvm/IR/RuntimeLibcalls.def

 HANDLE_LIBCALL(LRINT_F128, "lrintl")
 HANDLE_LIBCALL(LRINT_PPCF128, "lrintl")
 HANDLE_LIBCALL(LLRINT_F32, "llrintf")
 HANDLE_LIBCALL(LLRINT_F64, "llrint")
 HANDLE_LIBCALL(LLRINT_F80, "llrintl")
 HANDLE_LIBCALL(LLRINT_F128, "llrintl")
 HANDLE_LIBCALL(LLRINT_PPCF128, "llrintl")
 
+// Floating point environment
+HANDLE_LIBCALL(FEGETMODE, "fegetmode")
+HANDLE_LIBCALL(FESETMODE, "fesetmode")
+
 // Conversion
 HANDLE_LIBCALL(FPEXT_F32_PPCF128, "__gcc_stoq")
 HANDLE_LIBCALL(FPEXT_F64_PPCF128, "__gcc_dtoq")
 HANDLE_LIBCALL(FPEXT_F80_F128, "__extendxftf2")
 HANDLE_LIBCALL(FPEXT_F64_F128, "__extenddftf2")
 HANDLE_LIBCALL(FPEXT_F32_F128, "__extendsftf2")
 HANDLE_LIBCALL(FPEXT_F32_F64, "__extendsfdf2")
 HANDLE_LIBCALL(FPEXT_F16_F32, "__gnu_h2f_ieee")

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

private:
 
   SDValue ExpandBITREVERSE(SDValue Op, const SDLoc &dl);
   SDValue ExpandBSWAP(SDValue Op, const SDLoc &dl);
 
   SDValue ExpandExtractFromVectorThroughStack(SDValue Op);
   SDValue ExpandInsertToVectorThroughStack(SDValue Op);
   SDValue ExpandVectorBuildThroughStack(SDNode* Node);
 
+  SDValue makeStateFunctionCall(SDNode *Node, RTLIB::Libcall LC, SDValue MemOp);
+
   SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP);
   SDValue ExpandConstant(ConstantSDNode *CP);
 
   // if ExpandNode returns false, LegalizeOp falls back to ConvertNodeToLibcall
   bool ExpandNode(SDNode *Node);
   void ConvertNodeToLibcall(SDNode *Node);
   void PromoteNode(SDNode *Node);
 
#endif
   case ISD::VECREDUCE_SMIN:
   case ISD::VECREDUCE_UMAX:
   case ISD::VECREDUCE_UMIN:
   case ISD::VECREDUCE_FMAX:
   case ISD::VECREDUCE_FMIN:
     Action = TLI.getOperationAction(
         Node->getOpcode(), Node->getOperand(0).getValueType());
     break;
+  case ISD::SET_FPMODE:
+    Action = TLI.getOperationAction(Node->getOpcode(),
+                                    Node->getOperand(1).getValueType());
+    break;
   default:
     if (Node->getOpcode() >= ISD::BUILTIN_OP_END) {
       Action = TargetLowering::Legal;
     } else {
       Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));
     }
     break;
   }
if (!Stores.empty())    // Not all undef elements?
     StoreChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
   else
     StoreChain = DAG.getEntryNode();
 
   // Result is a load from the stack slot.
   return DAG.getLoad(VT, dl, StoreChain, FIPtr, PtrInfo);
 }
 
+// Helper used to make call to a library function that has one argument of
+// pointer type. Return value is void or ignored. Such functions include
+// 'fegetmode', 'fesetenv' and others, which are used to get or set state.
+// Returns outgoing token chain.
+SDValue SelectionDAGLegalize::makeStateFunctionCall(SDNode *Node,
+                                                    RTLIB::Libcall LC,
+                                                    SDValue MemOp) {
+  SDLoc DLoc(Node);
+  TargetLowering::ArgListTy Args;
+  TargetLowering::ArgListEntry Entry;
+  Entry.Node = MemOp;
+  Entry.Ty = MemOp.getValueType().getTypeForEVT(*DAG.getContext());
+  Args.push_back(Entry);
+  SDValue Callee = DAG.getExternalSymbol(TLI.getLibcallName(LC),
+                                         TLI.getPointerTy(DAG.getDataLayout()));
+  TargetLowering::CallLoweringInfo CLI(DAG);
+  CLI.setDebugLoc(DLoc)
+      .setChain(Node->getOperand(0))
+      .setLibCallee(TLI.getLibcallCallingConv(LC),
+                    Type::getVoidTy(*DAG.getContext()), Callee,
+                    std::move(Args));
+  return TLI.LowerCallTo(CLI).second;
+}
+
 /// Bitcast a floating-point value to an integer value. Only bitcast the part
 /// containing the sign bit if the target has no integer value capable of
 /// holding all bits of the floating-point value.
 void SelectionDAGLegalize::getSignAsIntValue(FloatSignAsInt &State,
                                              const SDLoc &DL,
                                              SDValue Value) const {
   EVT FloatVT = Value.getValueType();
   unsigned NumBits = FloatVT.getSizeInBits();
case ISD::CTLZ_ZERO_UNDEF:
     case MVT::i64:
       Results.push_back(ExpandLibCall(RTLIB::CTLZ_I64, Node, false));
       break;
     case MVT::i128:
       Results.push_back(ExpandLibCall(RTLIB::CTLZ_I128, Node, false));
       break;
     }
     break;
+  case ISD::GET_FPMODE: {
+    // Call fegetmode, which saves control modes into stack slot. Then load
+    // the value to return from the stack.
+    SDValue StackPtr = DAG.CreateStackTemporary(Node->getValueType(0));
+    int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
+    SDValue Chain = makeStateFunctionCall(Node, RTLIB::FEGETMODE, StackPtr);
+    SDValue LdInst = DAG.getLoad(
+        StackPtr.getValueType(), dl, Chain, StackPtr,
+        MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI));
+    Results.push_back(LdInst);
+    Results.push_back(LdInst.getValue(1));
+    break;
+  }
+  case ISD::SET_FPMODE: {
+    // Move control modes to stack slot and then call fesetmode with the pointer
+    // to the slot as argument.
+    SDValue Mode = Node->getOperand(1);
+    EVT ModeVT = Mode.getValueType();
+    SDValue StackPtr = DAG.CreateStackTemporary(ModeVT);
+    int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
+    SDValue StInst = DAG.getStore(
+        Node->getOperand(0), dl, Mode, StackPtr,
+        MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI));
+    Results.push_back(makeStateFunctionCall(Node, RTLIB::FESETMODE, StackPtr));
+    break;
+  }
+  case ISD::RESET_FPMODE: {
+    // It is legalized to call 'fesetmode(FE_DFL_MODE)'. On most targets
+    // FE_DFL_MODE is defined as '((const femode_t *) -1)' in glibc.
+    const DataLayout &DL = DAG.getDataLayout();
+    Type *ByteTy = EVT(MVT::i8).getTypeForEVT(*DAG.getContext());
+    auto *PtrTy = PointerType::get(ByteTy, DL.getAllocaAddrSpace());
+    Type *IntTy = DL.getIntPtrType(PtrTy);
+    SDValue Mode = DAG.getConstant(-1LL, dl, MVT::getVT(IntTy));
+    Results.push_back(makeStateFunctionCall(Node, RTLIB::FESETMODE, Mode));
+    break;
+  }
   }
 
   // Replace the original node with the legalized result.
   if (!Results.empty()) {
     LLVM_DEBUG(dbgs() << "Successfully converted node to libcall\n");
     ReplaceNode(Node, Results.data());
   } else
     LLVM_DEBUG(dbgs() << "Could not convert node to libcall\n");

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

setValue(&I, DAG.getNode(ISD::BITCAST, sdl, MVT::i16,
                                                                MVT::i32))));
     return;
   case Intrinsic::convert_from_fp16:
     setValue(&I, DAG.getNode(ISD::FP_EXTEND, sdl,
                              TLI.getValueType(DAG.getDataLayout(), I.getType()),
                              DAG.getNode(ISD::BITCAST, sdl, MVT::f16,
                                          getValue(I.getArgOperand(0)))));
     return;
+  case Intrinsic::get_fpmode:
+    Res = DAG.getNode(
+        ISD::GET_FPMODE, sdl,
+        DAG.getVTList(TLI.getValueType(DAG.getDataLayout(), I.getType()),
+                      MVT::Other),
+        DAG.getRoot());
+    setValue(&I, Res);
+    DAG.setRoot(Res.getValue(1));
+    return;
+  case Intrinsic::set_fpmode:
+    Res = DAG.getNode(ISD::SET_FPMODE, sdl, MVT::Other, {DAG.getRoot()},
+                      getValue(I.getArgOperand(0)));
+    DAG.setRoot(Res);
+    return;
+  case Intrinsic::reset_fpmode: {
+    Res = DAG.getNode(ISD::RESET_FPMODE, sdl, MVT::Other, getRoot());
+    DAG.setRoot(Res);
+    return;
+  }
   case Intrinsic::pcmarker: {
     SDValue Tmp = getValue(I.getArgOperand(0));
     DAG.setRoot(DAG.getNode(ISD::PCMARKER, sdl, MVT::Other, getRoot(), Tmp));
     return;
   }
   case Intrinsic::readcyclecounter: {
     SDValue Op = getRoot();
     Res = DAG.getNode(ISD::READCYCLECOUNTER, sdl,

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

#endif
   case ISD::GC_TRANSITION_END:          return "gc_transition.end";
   case ISD::GET_DYNAMIC_AREA_OFFSET:    return "get.dynamic.area.offset";
   case ISD::FREEZE:                     return "freeze";
   case ISD::PREALLOCATED_SETUP:
     return "call_setup";
   case ISD::PREALLOCATED_ARG:
     return "call_alloc";
 
+  // Environment manipulation
+  case ISD::GET_FPMODE:                 return "get_fpmode";
+  case ISD::SET_FPMODE:                 return "set_fpmode";
+  case ISD::RESET_FPMODE:               return "reset_fpmode";
+
   // Bit manipulation
   case ISD::ABS:                        return "abs";
   case ISD::BITREVERSE:                 return "bitreverse";
   case ISD::BSWAP:                      return "bswap";
   case ISD::CTPOP:                      return "ctpop";
   case ISD::CTTZ:                       return "cttz";
   case ISD::CTTZ_ZERO_UNDEF:            return "cttz_zero_undef";
   case ISD::CTLZ:                       return "ctlz";

llvm/lib/CodeGen/TargetLoweringBase.cpp

#include "llvm/IR/ConstrainedOps.def"
   }
 
   // Default ISD::TRAP to expand (which turns it into abort).
   setOperationAction(ISD::TRAP, MVT::Other, Expand);
 
   // On most systems, DEBUGTRAP and TRAP have no difference. The "Expand"
   // here is to inform DAG Legalizer to replace DEBUGTRAP with TRAP.
   setOperationAction(ISD::DEBUGTRAP, MVT::Other, Expand);
+
+  // Environment operations default to expand to library calls.
+  for (MVT VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64})
+    setOperationAction(ISD::GET_FPMODE, VT, Expand);
+  for (MVT VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64})
+    setOperationAction(ISD::SET_FPMODE, VT, Expand);
+  setOperationAction(ISD::RESET_FPMODE, MVT::Other, Expand);
 }
 
 MVT TargetLoweringBase::getScalarShiftAmountTy(const DataLayout &DL,
                                                EVT) const {
   return MVT::getIntegerVT(DL.getPointerSizeInBits(0));
 }
 
 EVT TargetLoweringBase::getShiftAmountTy(EVT LHSTy, const DataLayout &DL,

llvm/test/CodeGen/Generic/fpenv.ll

+; RUN: llc -mtriple=msp430 -o - < %s | FileCheck %s
+
+; This test checks default lowering of the intrinsics operating floating point
+; environment. MSP430 is used as a target in this test because it does not have
+; native FP support, so it hopefully won't get custom lowering for these
+; intrinsics.
+;
+; REQUIRES: msp430-registered-target
+
+target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
+target triple = "msp430---elf"
+
+
+define i16 @func_01() {
+entry:
+  %fpenv = call i16 @llvm.get.fpmode.i16()
+  ret i16 %fpenv
+}
+; CHECK-LABEL: func_01:
+; CHECK:      sub  #2, r1
+; CHECK-NEXT: mov  r1, r12
+; CHECK-NEXT: call #fegetmode
+; CHECK-NEXT: mov  0(r1), r12
+; CHECK-NEXT: add  #2, r1
+; CHECK-NEXT: ret
+
+
+define void @func_02(i16 %fpenv) {
+entry:
+  call void @llvm.set.fpmode.i16(i16 %fpenv)
+  ret void
+}
+; CHECK-LABEL: func_02:
+; CHECK:      sub  #2, r1
+; CHECK-NEXT: mov  r1, r12
+; CHECK-NEXT: call #fesetmode
+; CHECK-NEXT: add  #2, r1
+; CHECK-NEXT: ret
+
+
+define void @func_03() {
+entry:
+  call void @llvm.reset.fpmode()
+  ret void
+}
+; CHECK-LABEL: func_03:
+; CHECK:      mov  #-1, r12
+; CHECK-NEXT: call #fesetmode
+; CHECK-NEXT: ret
+
+declare i16 @llvm.get.fpmode.i16()
+declare void @llvm.set.fpmode.i16(i16 %fpenv)
+declare void @llvm.reset.fpmode()

llvm/unittests/IR/IRBuilderTest.cpp

 }
 
 TEST_F(IRBuilderTest, NoFolderNames) {
   IRBuilder<NoFolder> Builder(BB);
   auto *Add =
       Builder.CreateAdd(Builder.getInt32(1), Builder.getInt32(2), "add");
   EXPECT_EQ(Add->getName(), "add");
 }
+
+TEST_F(IRBuilderTest, FPEnvironment) {
+  IRBuilder<> Builder(BB);
+  CallInst *Call;
+  IntrinsicInst *II;
+
+  Call = Builder.CreateResetFPMode();
+  II = cast<IntrinsicInst>(Call);
+  EXPECT_EQ(Intrinsic::reset_fpmode, II->getIntrinsicID());
+
+  Call = Builder.CreateGetFPMode(Builder.getInt32Ty());
+  II = cast<IntrinsicInst>(Call);
+  EXPECT_EQ(Intrinsic::get_fpmode, II->getIntrinsicID());
+  EXPECT_EQ(Call->getType(), Builder.getInt32Ty());
+
+  AllocaInst *Var1 = Builder.CreateAlloca(Builder.getInt32Ty());
+  Call = Builder.CreateSetFPMode(Var1);
+  II = cast<IntrinsicInst>(Call);
+  EXPECT_EQ(Intrinsic::set_fpmode, II->getIntrinsicID());
+}
 }