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sepavloff (Serge Pavlov)
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User Since
Mar 13 2013, 7:26 AM (431 w, 5 d)

Recent Activity

Fri, Jun 18

sepavloff added a comment to D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Is there anything I can do for this patch?

Fri, Jun 18, 8:53 AM · Restricted Project

Wed, Jun 16

sepavloff updated the diff for D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Rebased

Wed, Jun 16, 9:05 AM · Restricted Project

Mon, Jun 14

sepavloff added inline comments to D103169: [FPEnv][InstSimplify] Constrained FP support for NaN.
Mon, Jun 14, 10:21 AM · Restricted Project

Wed, Jun 9

sepavloff committed rG8ff36aab69ec: [ConstantFolding] Enable folding of min/max/copysign for all floats (authored by sepavloff).
[ConstantFolding] Enable folding of min/max/copysign for all floats
Wed, Jun 9, 9:58 PM
sepavloff closed D103956: [ConstantFolding] Enable folding of min/max/copysign for all floats.
Wed, Jun 9, 9:58 PM · Restricted Project
sepavloff updated the diff for D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Swap sequence of patches

Wed, Jun 9, 11:01 AM · Restricted Project
sepavloff added a comment to D103956: [ConstantFolding] Enable folding of min/max/copysign for all floats.

But would it be better to push this first since it is an extension to the existing functionality, then add the changes for constrained ops on top of this?

Wed, Jun 9, 10:59 AM · Restricted Project
sepavloff updated the diff for D103956: [ConstantFolding] Enable folding of min/max/copysign for all floats.

Swap sequence of patches

Wed, Jun 9, 10:58 AM · Restricted Project
sepavloff requested review of D103956: [ConstantFolding] Enable folding of min/max/copysign for all floats.
Wed, Jun 9, 5:20 AM · Restricted Project
sepavloff added inline comments to D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.
Wed, Jun 9, 12:56 AM · Restricted Project
sepavloff updated the diff for D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Move common code into separate function

Wed, Jun 9, 12:51 AM · Restricted Project

Tue, Jun 8

sepavloff added a comment to D103169: [FPEnv][InstSimplify] Constrained FP support for NaN.

Could you please split this patch so that folding Nans would be separated from treatment of poison and undefs?

Tue, Jun 8, 9:15 AM · Restricted Project

Mon, Jun 7

sepavloff added inline comments to D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.
Mon, Jun 7, 4:05 AM · Restricted Project
sepavloff updated the diff for D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Addressed reviewers' comments, rebased

Mon, Jun 7, 3:51 AM · Restricted Project

Tue, Jun 1

sepavloff added inline comments to D103169: [FPEnv][InstSimplify] Constrained FP support for NaN.
Tue, Jun 1, 10:28 AM · Restricted Project
sepavloff added inline comments to D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.
Tue, Jun 1, 3:35 AM · Restricted Project
sepavloff updated the diff for D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Allow folding for 'maytrap'. Rebased

Tue, Jun 1, 2:48 AM · Restricted Project

Mon, May 31

sepavloff committed rG4d788fb80ff3: [PowerPC] Split tests for constrained intrinsics (authored by sepavloff).
[PowerPC] Split tests for constrained intrinsics
Mon, May 31, 10:32 PM
sepavloff closed D103259: [PowerPC] Split tests for constrained intrinsics.
Mon, May 31, 10:31 PM · Restricted Project
sepavloff added a comment to D103259: [PowerPC] Split tests for constrained intrinsics.

This patch contains changes requested by reviewers in the review of D102673.

Mon, May 31, 4:24 AM · Restricted Project
sepavloff abandoned D101429: PR45879: Use LValue object to evaluate active union members.

Alternative implementation in in https://reviews.llvm.org/D103395.

Mon, May 31, 4:10 AM · Restricted Project
sepavloff requested review of D103395: PR45879: Keep evaluated expression in LValue object.
Mon, May 31, 4:09 AM · Restricted Project

Thu, May 27

sepavloff added a comment to D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Changes to the test llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll are presented in D103259.

Thu, May 27, 8:46 AM · Restricted Project
sepavloff requested review of D103259: [PowerPC] Split tests for constrained intrinsics.
Thu, May 27, 8:42 AM · Restricted Project

Mon, May 24

sepavloff updated the diff for D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.

Rebased

Mon, May 24, 3:37 AM · Restricted Project

May 21 2021

sepavloff committed rGc9c05a91c484: [ConstantFolding] Use APFloat for constant folding. NFC (authored by sepavloff).
[ConstantFolding] Use APFloat for constant folding. NFC
May 21 2021, 11:01 PM
sepavloff closed D102672: [ConstantFolding] Use APFloat for constant folding. NFC.
May 21 2021, 11:01 PM · Restricted Project

May 20 2021

sepavloff committed rGc162f086ba63: [APFloat] convertToDouble/Float can work on shorter types (authored by sepavloff).
[APFloat] convertToDouble/Float can work on shorter types
May 20 2021, 9:39 PM
sepavloff closed D102671: [APFloat] convertToDouble/Float can work on shorter types.
May 20 2021, 9:39 PM · Restricted Project

May 19 2021

sepavloff added inline comments to D102672: [ConstantFolding] Use APFloat for constant folding. NFC.
May 19 2021, 10:15 PM · Restricted Project

May 18 2021

sepavloff added inline comments to D102672: [ConstantFolding] Use APFloat for constant folding. NFC.
May 18 2021, 10:40 PM · Restricted Project
sepavloff added a comment to D102672: [ConstantFolding] Use APFloat for constant folding. NFC.

It looks like this is just refactoring, besides the changes to the floating-point compares. That's okay, but not really consistent with the commit message; do you have some future work planned?

May 18 2021, 10:10 AM · Restricted Project
sepavloff added inline comments to D102671: [APFloat] convertToDouble/Float can work on shorter types.
May 18 2021, 7:50 AM · Restricted Project
sepavloff updated the diff for D102671: [APFloat] convertToDouble/Float can work on shorter types.

Use EXPECT_EQ in checks for infinity

May 18 2021, 7:47 AM · Restricted Project
sepavloff updated the diff for D102671: [APFloat] convertToDouble/Float can work on shorter types.

Use meaningful variable names. Fixed some errors.

May 18 2021, 7:15 AM · Restricted Project
sepavloff requested review of D102673: [ConstantFolding] Fold constrained arithmetic intrinsics.
May 18 2021, 1:39 AM · Restricted Project
sepavloff requested review of D102672: [ConstantFolding] Use APFloat for constant folding. NFC.
May 18 2021, 1:31 AM · Restricted Project
sepavloff requested review of D102671: [APFloat] convertToDouble/Float can work on shorter types.
May 18 2021, 1:15 AM · Restricted Project

May 13 2021

sepavloff committed rG12537ab77227: [FPEnv][X86] Implement lowering of llvm.set.rounding (authored by sepavloff).
[FPEnv][X86] Implement lowering of llvm.set.rounding
May 13 2021, 12:34 AM
sepavloff closed D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.
May 13 2021, 12:33 AM · Restricted Project

May 4 2021

sepavloff updated the diff for D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.

Rebased

May 4 2021, 2:02 AM · Restricted Project

Apr 28 2021

sepavloff requested review of D101429: PR45879: Use LValue object to evaluate active union members.
Apr 28 2021, 12:49 AM · Restricted Project
sepavloff requested review of D101425: Make LValuePathEntry a discriminated union.
Apr 28 2021, 12:26 AM · Restricted Project

Apr 27 2021

sepavloff added a comment to D82525: [FPEnv] Intrinsics for access to FP control modes.

Ping.

Apr 27 2021, 9:09 AM · Restricted Project

Apr 26 2021

sepavloff added a comment to D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.

This patch LGTM, but I'd like other sign off.

Apr 26 2021, 11:11 AM · Restricted Project

Apr 22 2021

sepavloff added inline comments to D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.
Apr 22 2021, 7:47 AM · Restricted Project
sepavloff updated the diff for D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.

Added check for Subtarget.hasX87() to support -mno-80387

Apr 22 2021, 7:41 AM · Restricted Project
sepavloff committed rG740962e5d024: [RISCV] Custom lowering of SET_ROUNDING (authored by sepavloff).
[RISCV] Custom lowering of SET_ROUNDING
Apr 22 2021, 1:06 AM
sepavloff closed D91242: [RISCV] Custom lowering of SET_ROUNDING.
Apr 22 2021, 1:05 AM · Restricted Project

Apr 21 2021

sepavloff committed rG6e63dfdae27a: [RISCV] Custom lowering of FLT_ROUNDS_ (authored by sepavloff).
[RISCV] Custom lowering of FLT_ROUNDS_
Apr 21 2021, 9:40 PM
sepavloff closed D90854: [RISCV] Custom lowering of FLT_ROUNDS_.
Apr 21 2021, 9:40 PM · Restricted Project
sepavloff added inline comments to D90854: [RISCV] Custom lowering of FLT_ROUNDS_.
Apr 21 2021, 8:40 PM · Restricted Project
sepavloff updated the diff for D90854: [RISCV] Custom lowering of FLT_ROUNDS_.

Remove superfluous include

Apr 21 2021, 9:42 AM · Restricted Project
sepavloff added inline comments to D91242: [RISCV] Custom lowering of SET_ROUNDING.
Apr 21 2021, 8:55 AM · Restricted Project
sepavloff updated the diff for D91242: [RISCV] Custom lowering of SET_ROUNDING.

Aligned the implementation with that of FLT_ROUNDS_

Apr 21 2021, 8:49 AM · Restricted Project
sepavloff added inline comments to D90854: [RISCV] Custom lowering of FLT_ROUNDS_.
Apr 21 2021, 7:47 AM · Restricted Project
sepavloff updated the diff for D90854: [RISCV] Custom lowering of FLT_ROUNDS_.

Added missed change

Apr 21 2021, 6:36 AM · Restricted Project
sepavloff updated the diff for D90854: [RISCV] Custom lowering of FLT_ROUNDS_.

Addressed reviewer's notes

Apr 21 2021, 6:24 AM · Restricted Project

Apr 20 2021

sepavloff committed rGd20a2376d843: [RISCV] Introduce floating point control and state registers (authored by sepavloff).
[RISCV] Introduce floating point control and state registers
Apr 20 2021, 10:57 PM
sepavloff closed D99083: [RISCV] Introduce floating point control and state registers.
Apr 20 2021, 10:56 PM · Restricted Project
sepavloff added a comment to D99083: [RISCV] Introduce floating point control and state registers.

I don't think we should have unused pseudo instructions since they should all have lit tests. So if they can't be tested soon, they should be added when they are needed.

Patches that implement FLT_ROUNDS_ (D90854) and SET_ROUNDING (D91242) use these instructions and they have tests. It it enough?

You said that there no patches ready that use the Swap pseudos or the fflags pseudos. Are those patches going to be created soon or should we remove the pseudos until they are used?

Apr 20 2021, 10:27 AM · Restricted Project
sepavloff updated the diff for D99083: [RISCV] Introduce floating point control and state registers.

Remove pseudos that are not used in pending patches

Apr 20 2021, 10:24 AM · Restricted Project
sepavloff added inline comments to D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.
Apr 20 2021, 9:48 AM · Restricted Project
sepavloff updated the diff for D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.

Lower set_rounding only if soft-float is off

Apr 20 2021, 9:18 AM · Restricted Project
sepavloff added a comment to D99083: [RISCV] Introduce floating point control and state registers.

I don't think we should have unused pseudo instructions since they should all have lit tests. So if they can't be tested soon, they should be added when they are needed.

Apr 20 2021, 1:40 AM · Restricted Project
sepavloff updated the diff for D91242: [RISCV] Custom lowering of SET_ROUNDING.

Repased patch

Apr 20 2021, 1:28 AM · Restricted Project
sepavloff updated the diff for D90854: [RISCV] Custom lowering of FLT_ROUNDS_.

Rebased patch

Apr 20 2021, 1:25 AM · Restricted Project
sepavloff updated the diff for D99083: [RISCV] Introduce floating point control and state registers.

Rebased patch

Apr 20 2021, 1:23 AM · Restricted Project

Apr 19 2021

sepavloff added a comment to D99083: [RISCV] Introduce floating point control and state registers.

Does this patch require other changes?

Apr 19 2021, 2:20 AM · Restricted Project

Apr 14 2021

sepavloff added a comment to D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.

Is there anything I can do to facilitate the review process?

Apr 14 2021, 7:43 PM · Restricted Project

Apr 12 2021

sepavloff added a comment to D82525: [FPEnv] Intrinsics for access to FP control modes.

Any feedback?

Apr 12 2021, 8:39 AM · Restricted Project

Apr 8 2021

sepavloff added a comment to D74730: [FPEnv][X86] Implement lowering of llvm.set.rounding.

Ping.

Apr 8 2021, 4:06 AM · Restricted Project

Apr 7 2021

sepavloff updated the diff for D99083: [RISCV] Introduce floating point control and state registers.

Use zero for encoding of FFLAGS, FRM and FCSR. Rebased.

Apr 7 2021, 11:18 PM · Restricted Project
sepavloff added inline comments to D99083: [RISCV] Introduce floating point control and state registers.
Apr 7 2021, 8:48 PM · Restricted Project
sepavloff added inline comments to D99083: [RISCV] Introduce floating point control and state registers.
Apr 7 2021, 8:47 PM · Restricted Project
sepavloff committed rG65b1103798df: [RISCV] DAG nodes and pseudo instructions for CSR access (authored by sepavloff).
[RISCV] DAG nodes and pseudo instructions for CSR access
Apr 7 2021, 8:37 PM
sepavloff closed D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.
Apr 7 2021, 8:37 PM · Restricted Project
sepavloff added inline comments to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.
Apr 7 2021, 1:35 AM · Restricted Project
sepavloff updated the diff for D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.

Addressed reviewer's notes and rebased

Apr 7 2021, 1:33 AM · Restricted Project

Apr 5 2021

sepavloff added a comment to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.

Any feedback?

Apr 5 2021, 9:26 PM · Restricted Project

Apr 4 2021

sepavloff added a comment to D82525: [FPEnv] Intrinsics for access to FP control modes.

Ping.

Apr 4 2021, 9:09 PM · Restricted Project

Apr 1 2021

sepavloff updated the diff for D99083: [RISCV] Introduce floating point control and state registers.

Rebased ad added variants with immediate

Apr 1 2021, 11:43 PM · Restricted Project
sepavloff updated the diff for D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.

Rebased and added variants with immediate

Apr 1 2021, 11:24 PM · Restricted Project
sepavloff added inline comments to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.
Apr 1 2021, 10:01 AM · Restricted Project

Mar 31 2021

sepavloff added inline comments to D99083: [RISCV] Introduce floating point control and state registers.
Mar 31 2021, 11:50 PM · Restricted Project
sepavloff updated the diff for D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.

Removed instructions Read_CSR, Write_CSR and Swap_CSR

Mar 31 2021, 8:51 AM · Restricted Project
sepavloff added a comment to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.
In D98936#2661228, @asb wrote:

Are there ever any cases where you _wouldn't_ want a CSR-specific pseudo in order to have control over the scheduling of it specifically? This feels a bit like a middle-ground that's the worst of both worlds to me.

Hi @jrtc27 - could you please elaborate a little on the concern that the approach in this path might be the worst of both worlds? I'm not sure I fully follow. Thanks.

If you want to have different scheduling for different CSRs, do you not need per-CSR pseudos in order to express that? This diff is ostensibly to allow for that in future, but is at a much coarser read/write/swap granularity, so doesn't really get you much over and above just scheduling CSRRW itself as a whole, just adds more complexity for little gain. IMO any CSRs we need scheduling info for should just get their own dedicated read/write/swap pseudos as and when they're needed.

The patch D99083 demonstrates the solution for FP state/control resisters. Every register and every access get separate pseudos, each of which can have their own scheduling properties.

That looks like the kind of thing I'm imagining. So can we remove the Read/Write/Swap_CSR defs from this diff and just keep the Read/Write/SwapSysReg classes for use with such pseudos?

Mar 31 2021, 7:57 AM · Restricted Project
sepavloff added a comment to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.
In D98936#2661228, @asb wrote:

Are there ever any cases where you _wouldn't_ want a CSR-specific pseudo in order to have control over the scheduling of it specifically? This feels a bit like a middle-ground that's the worst of both worlds to me.

Hi @jrtc27 - could you please elaborate a little on the concern that the approach in this path might be the worst of both worlds? I'm not sure I fully follow. Thanks.

If you want to have different scheduling for different CSRs, do you not need per-CSR pseudos in order to express that? This diff is ostensibly to allow for that in future, but is at a much coarser read/write/swap granularity, so doesn't really get you much over and above just scheduling CSRRW itself as a whole, just adds more complexity for little gain. IMO any CSRs we need scheduling info for should just get their own dedicated read/write/swap pseudos as and when they're needed.

Mar 31 2021, 7:47 AM · Restricted Project
sepavloff added a comment to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.

Ping.

Mar 31 2021, 5:48 AM · Restricted Project
sepavloff updated the summary of D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.
Mar 31 2021, 5:15 AM · Restricted Project
sepavloff updated the diff for D94163: [RISCV] Set dependency on floating point CSRs, 1/3.

Updated patch for alternative CSR solution

Mar 31 2021, 3:03 AM · Restricted Project

Mar 30 2021

sepavloff updated the diff for D83036: [X86][FPEnv] Lowering of {get,set,reset}_fpmode.

Changed mode type in test fpenv32.ll from i32 to i64 to match glibc types

Mar 30 2021, 10:04 PM · Restricted Project
sepavloff updated the diff for D83036: [X86][FPEnv] Lowering of {get,set,reset}_fpmode.

Rebased patch. Fixed issue of getConstantPool.

Mar 30 2021, 7:46 AM · Restricted Project
sepavloff updated the diff for D82525: [FPEnv] Intrinsics for access to FP control modes.

Rebased patch

Mar 30 2021, 3:16 AM · Restricted Project

Mar 24 2021

sepavloff committed rGddb0bcbdff03: Add missing cases in RISCVMCExpr::getVariantKindName (authored by sepavloff).
Add missing cases in RISCVMCExpr::getVariantKindName
Mar 24 2021, 10:58 PM
sepavloff closed D98929: Add missing cases in RISCVMCExpr::getVariantKindName.
Mar 24 2021, 10:58 PM · Restricted Project
sepavloff updated the diff for D98929: Add missing cases in RISCVMCExpr::getVariantKindName.

Remove changes in RISCVMCExpr::getVariantKindForName

Mar 24 2021, 4:30 AM · Restricted Project

Mar 23 2021

sepavloff added a comment to D98929: Add missing cases in RISCVMCExpr::getVariantKindName.

Does this tiny patch require some additional changes?

Mar 23 2021, 9:08 PM · Restricted Project
sepavloff updated the diff for D90854: [RISCV] Custom lowering of FLT_ROUNDS_.

Adapted the patch for alternative CSR implementation

Mar 23 2021, 8:12 AM · Restricted Project
sepavloff added a comment to D98936: [RISCV] DAG nodes and pseudo instructions for CSR access.

Are there ever any cases where you _wouldn't_ want a CSR-specific pseudo in order to have control over the scheduling of it specifically? This feels a bit like a middle-ground that's the worst of both worlds to me.

Mar 23 2021, 2:30 AM · Restricted Project