[AIX][TLS][clang] Add -maix-small-local-exec-tls clang option.

[amyk]

Summary

This patch adds the clang portion of an AIX-specific option to inform
the compiler that it can use a faster access sequence for the local-exec
TLS model (formally named aix-small-local-exec-tls).

This patch only adds the frontend portion of the option, building upon:

• Backend portion of the option (D156203)
• Backend patch that utilizes this option to actually produce the faster access sequence (D155600)

[DiggerLin]

llvm/test/CodeGen/PowerPC/check-aix-small-local-exec-tls-opt.ll

15 ↗

(On Diff #541320)

since the patch only add a new option "aix-small-local-exec-tls" , the the backend implementation for this option in not in the patch, the behavior of the CodeGen do not change in the patch, I do not think we need the test case.

[stefanp]

I think this patch makes sense to me.
LGTM.

llvm/test/CodeGen/PowerPC/check-aix-small-local-exec-tls-opt.ll

15 ↗

(On Diff #541320)

I would actually prefer to have a test case here. We do need to check to make sure that the backend produces the correct error on Linux and produces valid codegen on AIX.

[hubert.reinterpretcast]

Patch should not land before back-end patch. I also suggest having the patch incorporate the new option into the Clang release notes before it lands.

llvm/lib/Target/PowerPC/PPC.td

324 ↗

(On Diff #541320)

As agreed offline:
thread pointer value -> TLS base

llvm/lib/Target/PowerPC/PPCSubtarget.cpp

127 ↗

(On Diff #541320)

There should be no confusion over how tightly ! binds over &&.

[hubert.reinterpretcast]

clang/include/clang/Driver/Options.td

4729

Same comment: use "TLS base".

clang/test/Driver/aix-small-local-exec-tls.c

3

It was agreed in offline discussion that 32-bit AIX should generate a message about the option because the general semantics are meaningful in that context but there is no implementation.

llvm/test/CodeGen/PowerPC/check-aix-small-local-exec-tls-opt.ll

6 ↗

(On Diff #541320)

Same comment re: 32-bit AIX.

[amyk]

In D155544#4523536, @hubert.reinterpretcast wrote:

Patch should not land before back-end patch. I also suggest having the patch incorporate the new option into the Clang release notes before it lands.

I'm currently addressing reviews for the back-end patch but just wanted to clarify because I might be misunderstanding something.

Wouldn't this patch need to land before the back-end patch, because I introduce the option here, and then I use it in the backend patch?
In terms of checking for a 32-bit diagnostic within check-aix-small-local-exec-tls-opt.ll, the RUN lines in that test currently are 64-bit RUN lines. Perhaps in the backend patch, I should just add the 32-bit lines to show the diagnostic?

[hubert.reinterpretcast]

In D155544#4523857, @amyk wrote:

Wouldn't this patch need to land before the back-end patch, because I introduce the option here, and then I use it in the backend patch?

Please move the llvm/ changes into the back-end patch or land them separately first.

In terms of checking for a 32-bit diagnostic within check-aix-small-local-exec-tls-opt.ll, the RUN lines in that test currently are 64-bit RUN lines. Perhaps in the backend patch, I should just add the 32-bit lines to show the diagnostic?

This seems to be the test designed to cover the non-codegen aspects of the attribute. In that light, the 32-bit run line belongs here.

[amyk]

Address review comments from Hubert and update this patch to be only the clang portion of the option.

[hubert.reinterpretcast]

LGTM for landing after D156203 and D155600.

clang/docs/ReleaseNotes.rst

 ^^^^^^^^^^^^^^^^^^^^^^^^^
 
 CUDA Support
 ^^^^^^^^^^^^
 
 AIX Support
 ^^^^^^^^^^^
 
+- Introduced the ``-maix-small-local-exec-tls`` option to produce a faster
+  access sequence for local-exec TLS variables where the offset from the TLS
+  base is encoded as an immediate operand.
+  This access sequence is not used for TLS variables larger than 32KB, and is
+  currently only supported on 64-bit mode.
+
 WebAssembly Support
 ^^^^^^^^^^^^^^^^^^^
 
 AVR Support
 ^^^^^^^^^^^
 
 DWARF Support in Clang
 ----------------------

clang/include/clang/Driver/Options.td

def mno_longcall : Flag<["-"], "mno-longcall">,
     Group<m_ppc_Features_Group>;
 def mmma: Flag<["-"], "mmma">, Group<m_ppc_Features_Group>;
 def mno_mma: Flag<["-"], "mno-mma">, Group<m_ppc_Features_Group>;
 def mrop_protect : Flag<["-"], "mrop-protect">,
     Group<m_ppc_Features_Group>;
 def mprivileged : Flag<["-"], "mprivileged">,
     Group<m_ppc_Features_Group>;
 } // let Flags = [TargetSpecific]
+def maix_small_local_exec_tls : Flag<["-"], "maix-small-local-exec-tls">,
+  Group<m_ppc_Features_Group>,
+  HelpText<"Produce a faster access sequence for local-exec TLS variables "
+           "where the offset from the TLS base is encoded as an "
+           "immediate operand (AIX 64-bit only). "
+           "This access sequence is not used for variables larger than 32KB.">;
 def maix_struct_return : Flag<["-"], "maix-struct-return">,
   Group<m_Group>, Visibility<[ClangOption, CC1Option]>,
   HelpText<"Return all structs in memory (PPC32 only)">,
   DocBrief<"Override the default ABI for 32-bit targets to return all "
            "structs in memory, as in the Power 32-bit ABI for Linux (2011), "
            "and on AIX and Darwin.">;
 def msvr4_struct_return : Flag<["-"], "msvr4-struct-return">,
   Group<m_Group>, Visibility<[ClangOption, CC1Option]>,

clang/lib/Basic/Targets/PPC.h

class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
   std::string CPU;
   enum PPCFloatABI { HardFloat, SoftFloat } FloatABI;
 
   // Target cpu features.
   bool HasAltivec = false;
   bool HasMMA = false;
   bool HasROPProtect = false;
   bool HasPrivileged = false;
+  bool HasAIXSmallLocalExecTLS = false;
   bool HasVSX = false;
   bool UseCRBits = false;
   bool HasP8Vector = false;
   bool HasP8Crypto = false;
   bool HasDirectMove = false;
   bool HasHTM = false;
   bool HasBPERMD = false;
   bool HasExtDiv = false;

clang/lib/Basic/Targets/PPC.cpp

for (const auto &Feature : Features) {
     } else if (Feature == "+paired-vector-memops") {
       PairedVectorMemops = true;
     } else if (Feature == "+mma") {
       HasMMA = true;
     } else if (Feature == "+rop-protect") {
       HasROPProtect = true;
     } else if (Feature == "+privileged") {
       HasPrivileged = true;
+    } else if (Feature == "+aix-small-local-exec-tls") {
+      HasAIXSmallLocalExecTLS = true;
     } else if (Feature == "+isa-v206-instructions") {
       IsISA2_06 = true;
     } else if (Feature == "+isa-v207-instructions") {
       IsISA2_07 = true;
     } else if (Feature == "+isa-v30-instructions") {
       IsISA3_0 = true;
     } else if (Feature == "+isa-v31-instructions") {
       IsISA3_1 = true;
Features["htm"] = llvm::StringSwitch<bool>(CPU)
                         .Case("pwr8", true)
                         .Default(false);
 
   // ROP Protect is off by default.
   Features["rop-protect"] = false;
   // Privileged instructions are off by default.
   Features["privileged"] = false;
 
+  // The code generated by the -maix-small-local-exec-tls option is turned
+  // off by default.
+  Features["aix-small-local-exec-tls"] = false;
+
   Features["spe"] = llvm::StringSwitch<bool>(CPU)
                         .Case("8548", true)
                         .Case("e500", true)
                         .Default(false);
 
   Features["isa-v206-instructions"] = llvm::StringSwitch<bool>(CPU)
                                           .Case("ppc64le", true)
                                           .Case("pwr9", true)
bool PPCTargetInfo::initFeatureMap(
   }
 
   if (!(ArchDefs & ArchDefinePwr8) &&
       llvm::is_contained(FeaturesVec, "+privileged")) {
     Diags.Report(diag::err_opt_not_valid_with_opt) << "-mprivileged" << CPU;
     return false;
   }
 
+  if (llvm::is_contained(FeaturesVec, "+aix-small-local-exec-tls")) {
+    if (!getTriple().isOSAIX() || !getTriple().isArch64Bit()) {
+      Diags.Report(diag::err_opt_not_valid_on_target)
+         << "-maix-small-local-exec-tls";
+      return false;
+    }
+  }
+
   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 }
 
 // Add any Power10 specific features.
 void PPCTargetInfo::addP10SpecificFeatures(
     llvm::StringMap<bool> &Features) const {
   Features["htm"] = false; // HTM was removed for P10.
   Features["paired-vector-memops"] = true;
return llvm::StringSwitch<bool>(Feature)
       .Case("paired-vector-memops", PairedVectorMemops)
       .Case("power10-vector", HasP10Vector)
       .Case("pcrelative-memops", HasPCRelativeMemops)
       .Case("prefix-instrs", HasPrefixInstrs)
       .Case("spe", HasSPE)
       .Case("mma", HasMMA)
       .Case("rop-protect", HasROPProtect)
       .Case("privileged", HasPrivileged)
+      .Case("aix-small-local-exec-tls", HasAIXSmallLocalExecTLS)
       .Case("isa-v206-instructions", IsISA2_06)
       .Case("isa-v207-instructions", IsISA2_07)
       .Case("isa-v30-instructions", IsISA3_0)
       .Case("isa-v31-instructions", IsISA3_1)
       .Case("quadword-atomics", HasQuadwordAtomics)
       .Default(false);
 }
 

clang/test/Driver/aix-small-local-exec-tls.c

+// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang -target powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s
+
+// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-exec-tls -S -emit-llvm \
+// RUN:    %s -o - | FileCheck %s --check-prefix=CHECK-AIX_SMALL_LOCALEXEC_TLS
+
+// RUN: not %clang -target powerpc-unknown-aix -maix-small-local-exec-tls \
+// RUN:    -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-AIX32 %s
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -maix-small-local-exec-tls \
+// RUN:    -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-LINUX %s
+// RUN: not %clang -target powerpc64-unknown-linux-gnu -maix-small-local-exec-tls \
+// RUN:    -fsyntax-only %s 2>&1 | FileCheck --check-prefix=CHECK-UNSUPPORTED-LINUX %s
+
+int test(void) {
+  return 0;
+}
+
+// CHECK: test() #0 {
+// CHECK: attributes #0 = {
+// CHECK-SAME: -aix-small-local-exec-tls
+
+// CHECK-UNSUPPORTED-AIX32: option '-maix-small-local-exec-tls' cannot be specified on this target
+// CHECK-UNSUPPORTED-LINUX: option '-maix-small-local-exec-tls' cannot be specified on this target
+
+// CHECK-AIX_SMALL_LOCALEXEC_TLS: test() #0 {
+// CHECK-AIX_SMALL_LOCALEXEC_TLS: attributes #0 = {
+// CHECK-AIX_SMALL_LOCALEXEC_TLS-SAME: +aix-small-local-exec-tls
+