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[RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available ClosedPublic Authored by eopXD on Jul 17 2023, 12:30 PM.
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Event TimelineeopXD retitled this revision from [RISCV] Hit the stack for MVT::f16 when there are no GPR-s left to [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available .Jul 18 2023, 10:36 AM This revision is now accepted and ready to land.Jul 18 2023, 4:09 PM Closed by commit rG32c257d384f3: [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers… (authored by eopXD). · Explain WhyJul 18 2023, 7:49 PM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 541821 llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
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