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[RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available
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Authored by eopXD on Jul 17 2023, 12:30 PM.

Details

Summary

In D155502, we added code for the compiler to check GPR-s for f16
under zhinx. This commit adds code to hit the stack when we run out of
GPR-s.

With this patch and D155502, resolves #63922

Diff Detail

Event Timeline

eopXD created this revision.Jul 17 2023, 12:30 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 17 2023, 12:30 PM
eopXD requested review of this revision.Jul 17 2023, 12:30 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 17 2023, 12:30 PM
eopXD edited the summary of this revision. (Show Details)Jul 17 2023, 12:31 PM
eopXD added a reviewer: asb.Jul 18 2023, 1:08 AM
eopXD updated this revision to Diff 541630.Jul 18 2023, 10:34 AM
eopXD edited the summary of this revision. (Show Details)

Add test coverage

craig.topper added a comment.EditedJul 18 2023, 10:34 AM

The title of this commit isn't very informative. Should mention calls and fastcc.

eopXD retitled this revision from [RISCV] Hit the stack for MVT::f16 when there are no GPR-s left to [RISCV] Use the stack for MVT::f16 for fastcc when there are no other registers available .Jul 18 2023, 10:36 AM
This revision is now accepted and ready to land.Jul 18 2023, 4:09 PM