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[AArch64][GlobalISel] Add support for some across-vector NEON intrinsics
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Authored by dzhidzhoev on Mar 21 2023, 8:21 AM.

Details

Summary

Support uaddv, saddv, umaxv, smaxv, uminv, sminv, fmaxv, fminv,
fmaxnmv, fminnmv intrinsics in GlobalISel.

GlobalISelEmitter couldn't import SelectionDAG patterns containing nodes
with 8-bit result type, since they had untyped values. Therefore,
the register type for FPR8 is set to i8 to eliminate untyped nodes in these
patterns.

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dzhidzhoev created this revision.Mar 21 2023, 8:21 AM
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dzhidzhoev requested review of this revision.Mar 21 2023, 8:21 AM
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@efriedma @spatel @craig.topper what do you think of adding the f8 ValueType here? My SDAG knowledge is rusty, any potential problems?

What does f8 actually mean? There are at least 4 proposed "f8" types, and your "f8" represents none of them.

If you're doing this for the sake of GlobalISel, you can just use i8, anyway. SelectionDAG has a restriction that an MVT can't map to multiple register classes, but GlobalIsel has no such restriction, as far as I know.

@efriedma, thank you for your comment! Changed FPR8’s register type to i8.

dzhidzhoev edited the summary of this revision. (Show Details)Mar 29 2023, 4:53 PM
aemerson accepted this revision.Apr 4 2023, 10:11 PM

LGTM.

This revision is now accepted and ready to land.Apr 4 2023, 10:11 PM