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paquette (Jessica Paquette)
unmitigated disaster

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Nov 17 2016, 12:59 PM (201 w, 6 d)

oh boy

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Today

paquette accepted D87924: [AArch64][GlobalISel] Select all-zero G_BUILD_VECTOR into a zero mov..

LGTM

Wed, Sep 30, 6:29 PM · Restricted Project
paquette added inline comments to D88624: [GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs.
Wed, Sep 30, 5:33 PM · Restricted Project
paquette requested review of D88624: [GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs.
Wed, Sep 30, 5:17 PM · Restricted Project
paquette committed rGbc43ddf42fff: [AArch64][GlobalISel] NFC: Refactor G_FCMP selection code (authored by paquette).
[AArch64][GlobalISel] NFC: Refactor G_FCMP selection code
Wed, Sep 30, 4:51 PM
paquette closed D88614: [AArch64][GlobalISel] NFC: Refactor G_FCMP selection code.
Wed, Sep 30, 4:51 PM · Restricted Project
paquette requested review of D88614: [AArch64][GlobalISel] NFC: Refactor G_FCMP selection code.
Wed, Sep 30, 2:05 PM · Restricted Project

Mon, Sep 28

paquette accepted D88437: [AArch64][GlobalISel] Scalarize <2 x s64> G_MUL since we don't have native support for it..

LGTM

Mon, Sep 28, 12:20 PM · Restricted Project
paquette committed rG9d7ec46f5740: [AArch64][GlobalISel] Infer whether G_PHI is going to be a FPR in regbankselect (authored by paquette).
[AArch64][GlobalISel] Infer whether G_PHI is going to be a FPR in regbankselect
Mon, Sep 28, 10:37 AM
paquette closed D88177: [AArch64][GlobalISel] Infer whether G_PHI is going to be a FPR in regbankselect.
Mon, Sep 28, 10:37 AM · Restricted Project
paquette committed rGf55a5186c6c0: [AArch64][GlobalISel] Support shifted register form in emitTST (authored by paquette).
[AArch64][GlobalISel] Support shifted register form in emitTST
Mon, Sep 28, 10:14 AM
paquette closed D87530: [AArch64][GlobalISel] Support shifted register form in emitTST.
Mon, Sep 28, 10:14 AM · Restricted Project
paquette committed rGa52e78012a54: [GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y) (authored by paquette).
[GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y)
Mon, Sep 28, 10:08 AM
paquette closed D88104: [GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y).
Mon, Sep 28, 10:08 AM · Restricted Project
paquette accepted D88364: [GlobalISel] Add support for lowering of vector G_SELECT and use for AArch64..

LGTM

Mon, Sep 28, 9:44 AM · Restricted Project

Thu, Sep 24

paquette added inline comments to D88104: [GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y).
Thu, Sep 24, 9:22 AM · Restricted Project

Wed, Sep 23

paquette requested review of D88177: [AArch64][GlobalISel] Infer whether G_PHI is going to be a FPR in regbankselect.
Wed, Sep 23, 11:54 AM · Restricted Project

Tue, Sep 22

paquette requested review of D88104: [GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y).
Tue, Sep 22, 9:30 AM · Restricted Project

Mon, Sep 21

paquette accepted D88031: GlobalISel: Fix truncating shift amount in trunc (shl) combine.

LGTM

Mon, Sep 21, 9:40 AM · Restricted Project

Fri, Sep 18

paquette accepted D87952: [GlobalISel] Add lowering support for G_ABS and use for AArch64.

LGTM

Fri, Sep 18, 3:43 PM · Restricted Project
paquette added inline comments to D86977: [IRSim][IROutliner] Limit to extracting regions that only require inputs.
Fri, Sep 18, 11:17 AM · Restricted Project
paquette added inline comments to D86977: [IRSim][IROutliner] Limit to extracting regions that only require inputs.
Fri, Sep 18, 11:11 AM · Restricted Project
paquette added inline comments to D86977: [IRSim][IROutliner] Limit to extracting regions that only require inputs.
Fri, Sep 18, 11:06 AM · Restricted Project
paquette added inline comments to D86977: [IRSim][IROutliner] Limit to extracting regions that only require inputs.
Fri, Sep 18, 11:02 AM · Restricted Project
paquette added inline comments to D86977: [IRSim][IROutliner] Limit to extracting regions that only require inputs.
Fri, Sep 18, 10:39 AM · Restricted Project

Thu, Sep 17

paquette added a comment to D86968: [IRSim] Adding IR Instruction Mapper.

Updated diff LGTM

Thu, Sep 17, 11:28 AM · Restricted Project
paquette added inline comments to D86968: [IRSim] Adding IR Instruction Mapper.
Thu, Sep 17, 9:09 AM · Restricted Project

Wed, Sep 16

paquette accepted D86968: [IRSim] Adding IR Instruction Mapper.

I pretty much only have comment nits at this point, so I think this LGTM.

Wed, Sep 16, 3:57 PM · Restricted Project

Tue, Sep 15

paquette committed rGffe9986de429: [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions (authored by paquette).
[AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions
Tue, Sep 15, 5:18 PM
paquette closed D87529: [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions.
Tue, Sep 15, 5:18 PM · Restricted Project
paquette accepted D87668: [GISel] Add new GISel combiners for G_MUL.

LGTM

Tue, Sep 15, 1:14 PM · Restricted Project
paquette added inline comments to D86968: [IRSim] Adding IR Instruction Mapper.
Tue, Sep 15, 10:01 AM · Restricted Project
paquette added inline comments to D86970: [IRSim] Adding IRSimilarityCandidate that contains a region of IRInstructionData.
Tue, Sep 15, 9:44 AM · Restricted Project
paquette added a comment to D87668: [GISel] Add new GISel combiners for G_MUL.

In the future, can you do a full-context diff? It lets reviewers see the full file.

Tue, Sep 15, 9:10 AM · Restricted Project

Mon, Sep 14

paquette requested review of D87654: [AArch64][GlobalISel] Partially port tryShiftAmountMod from AArch64ISelDAGToDAG.
Mon, Sep 14, 4:41 PM · Restricted Project
paquette updated the diff for D87628: [AArch64][GlobalISel] Select unscaled loads/stores in manual selector.

Remove assert because I forgot that there are a million different generic load instruction variants

Mon, Sep 14, 1:08 PM · Restricted Project
paquette requested review of D87628: [AArch64][GlobalISel] Select unscaled loads/stores in manual selector.
Mon, Sep 14, 12:46 PM · Restricted Project
paquette updated the diff for D87529: [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions.

Pass the opcode table as a parameter to a helper function

Mon, Sep 14, 10:49 AM · Restricted Project
paquette added inline comments to D87554: [GISel]: Add combine for G_FABS to G_FABS.
Mon, Sep 14, 10:24 AM · Restricted Project
paquette added inline comments to D87554: [GISel]: Add combine for G_FABS to G_FABS.
Mon, Sep 14, 10:21 AM · Restricted Project

Fri, Sep 11

paquette requested review of D87530: [AArch64][GlobalISel] Support shifted register form in emitTST.
Fri, Sep 11, 10:32 AM · Restricted Project
paquette requested review of D87529: [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions.
Fri, Sep 11, 10:28 AM · Restricted Project

Wed, Sep 9

paquette committed rG480e7f43a225: [AArch64][GlobalISel] Share address mode selection code for memops (authored by paquette).
[AArch64][GlobalISel] Share address mode selection code for memops
Wed, Sep 9, 3:25 PM
paquette closed D87397: [AArch64][GlobalISel] Share address mode selection code for memops.
Wed, Sep 9, 3:25 PM · Restricted Project
paquette requested review of D87397: [AArch64][GlobalISel] Share address mode selection code for memops.
Wed, Sep 9, 10:13 AM · Restricted Project

Tue, Sep 8

paquette added inline comments to D86968: [IRSim] Adding IR Instruction Mapper.
Tue, Sep 8, 10:19 AM · Restricted Project
paquette added a comment to D87157: [GlobalISel] Add a localizer for copies from physregs and use it in AArch64.
In D87157#2257366, @qcolombet wrote:

Hi Jessica,

This feels to me that we are adding another level of heuristics that could well degrade the performances on other cases. The fact that this runs only on functions with only one basic block and with less than 25 instructions tells me this is really a workaround against a more general problem.
Put differently, I don't see that this is generally useful to be worth the compile time.

Tue, Sep 8, 9:58 AM · Restricted Project

Fri, Sep 4

paquette added inline comments to D86393: [GISel] Add combines for unary FP instrs with constant operand.
Fri, Sep 4, 2:08 PM · Restricted Project
paquette accepted D86611: GlobalISel: Combine `op undef, x` to 0.

LGTM now that I realized I just misread the code here

Fri, Sep 4, 1:50 PM · Restricted Project
paquette added a comment to D87050: GlobalISel: Add combines for G_TRUNC.

For AMDGPU this would need a regbank legality check for post-regbankselect combines but I'm not sure what to do about that

Fri, Sep 4, 1:44 PM · Restricted Project
paquette requested review of D87157: [GlobalISel] Add a localizer for copies from physregs and use it in AArch64.
Fri, Sep 4, 12:51 PM · Restricted Project
paquette accepted D86665: [GlobalISel][IRTranslator] Generate better conditional branch lowering..

LGTM

Fri, Sep 4, 10:45 AM · Restricted Project

Thu, Sep 3

paquette accepted D86952: [MIRVRegNamer] MachineInstr StableHashing..

Oh wait the tests already test what I was concerned about. LGTM with minor nits.

Thu, Sep 3, 10:09 AM · Restricted Project
paquette added a comment to D86952: [MIRVRegNamer] MachineInstr StableHashing..

Is there any way to test the hash itself on certain instructions?

Thu, Sep 3, 10:03 AM · Restricted Project

Tue, Sep 1

paquette added a comment to D86383: [GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _).

Personally I can't see anything wrong with this at this point.

Tue, Sep 1, 9:48 AM · Restricted Project
paquette added inline comments to D86611: GlobalISel: Combine `op undef, x` to 0.
Tue, Sep 1, 9:43 AM · Restricted Project
paquette accepted D86741: GlobalISel: Implement computeKnownBits for G_BSWAP and G_BITREVERSE.

LGTM

Tue, Sep 1, 9:33 AM · Restricted Project
paquette accepted D86750: GlobalISel: Port smarter known bits for umin/umax from DAG.

LGTM

Tue, Sep 1, 9:33 AM · Restricted Project
paquette accepted D86788: GlobalISel: Implement computeNumSignBits for G_SELECT.

LGTM

Tue, Sep 1, 9:32 AM · Restricted Project

Aug 27 2020

paquette accepted D86729: GlobalISel: Add and_trivial_mask to all_combines.

LGTM

Aug 27 2020, 1:13 PM · Restricted Project
paquette accepted D86731: GlobalISel: Implement known bits for min/max.

LGTM

Aug 27 2020, 1:11 PM · Restricted Project
paquette accepted D86732: GlobalISel: Implement computeNumSignBits for G_SEXT_INREG.

LGTM

Aug 27 2020, 1:09 PM · Restricted Project
paquette accepted D86413: [AArch64][GlobalISel] Optimize away a Not feeding a brcond by using tbz instead of tbnz..

LGTM, assuming the pre-merge check thing is just being wonky and m_GXor exists.

Aug 27 2020, 11:03 AM · Restricted Project
paquette added inline comments to D86464: GlobalISel: Lift store value widening restriction.
Aug 27 2020, 11:00 AM · Restricted Project
paquette accepted D86723: GlobalISel: Implement known bits for G_MERGE_VALUES.

LGTM

Aug 27 2020, 10:49 AM · Restricted Project
paquette added inline comments to D86665: [GlobalISel][IRTranslator] Generate better conditional branch lowering..
Aug 27 2020, 10:07 AM · Restricted Project
paquette added inline comments to D86709: [GlobalISel] Extend not_cmp_fold to work on conditional expressions.
Aug 27 2020, 8:57 AM · Restricted Project

Aug 24 2020

paquette accepted D86479: [AArch64][GlobalISel] Don't emit a branch for a fallthrough G_BR..

LGTM

Aug 24 2020, 11:33 AM · Restricted Project
paquette added a comment to D86468: [WIP][GlobalISel] CSE copies.

Shouldn't running the copy_prop combine post-legalization do the same thing as this?

Aug 24 2020, 9:52 AM · Restricted Project

Aug 19 2020

paquette committed rGe887d0e89b83: [AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo… (authored by tambre).
[AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo…
Aug 19 2020, 12:54 PM
paquette closed D85720: [AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo::getRegBankFromRegClass().
Aug 19 2020, 12:53 PM · Restricted Project
paquette added a comment to D85720: [AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo::getRegBankFromRegClass().

Oh whoops, sorry! Landing now.

Aug 19 2020, 12:53 PM · Restricted Project
paquette committed rGd25b12bdc307: [GlobalISel] Add combine for (x & mask) -> x when (x & mask) == x (authored by paquette).
[GlobalISel] Add combine for (x & mask) -> x when (x & mask) == x
Aug 19 2020, 10:22 AM
paquette closed D85463: [GlobalISel] Add combine for (x & mask) -> x when (x & mask) == x.
Aug 19 2020, 10:21 AM · Restricted Project
paquette added a comment to D86228: [GlobalISel][CallLowering] Use hasRetAttr for return flags on CallBases.
In D86228#2226562, @arsenm wrote:

The change itself is fine and more consistent, but this is just making an existing problem worse. Instead of treating signext/zeroext as optimization hints on arguments and call results, we're actually introducing code to do the extension which we were promised was already done. We really should be emitting the equivalent of ISD::AssertZext/AssertSext

Aug 19 2020, 10:19 AM · Restricted Project
paquette requested review of D86228: [GlobalISel][CallLowering] Use hasRetAttr for return flags on CallBases.
Aug 19 2020, 9:52 AM · Restricted Project

Aug 18 2020

paquette committed rGbf36e902953a: [GlobalISel][CallLowering] NFC: Unify flag-setting from CallBase + AttributeList (authored by paquette).
[GlobalISel][CallLowering] NFC: Unify flag-setting from CallBase + AttributeList
Aug 18 2020, 11:09 AM
paquette closed D86159: [GlobalISel][CallLowering] NFC: Unify flag-setting from CallBase + AttributeList.
Aug 18 2020, 11:09 AM · Restricted Project
paquette committed rGf29e6277ad6b: [GlobalISel][CallLowering] Don't tail call with non-forwarded explicit sret (authored by paquette).
[GlobalISel][CallLowering] Don't tail call with non-forwarded explicit sret
Aug 18 2020, 11:07 AM
paquette closed D86148: [GlobalISel][CallLowering] Don't tail call with non-forwarded explicit sret.
Aug 18 2020, 11:07 AM · Restricted Project
paquette requested review of D86159: [GlobalISel][CallLowering] NFC: Unify flag-setting from CallBase + AttributeList.
Aug 18 2020, 10:50 AM · Restricted Project
paquette requested review of D86148: [GlobalISel][CallLowering] Don't tail call with non-forwarded explicit sret.
Aug 18 2020, 9:33 AM · Restricted Project
paquette committed rG224a8c639eeb: [GlobalISel][CallLowering] Look through call parameters for flags (authored by paquette).
[GlobalISel][CallLowering] Look through call parameters for flags
Aug 18 2020, 9:00 AM
paquette closed D86125: [GlobalISel][CallLowering] Look through call parameters for flags.
Aug 18 2020, 8:59 AM · Restricted Project

Aug 17 2020

paquette requested review of D86125: [GlobalISel][CallLowering] Look through call parameters for flags.
Aug 17 2020, 6:04 PM · Restricted Project

Aug 14 2020

paquette accepted D85720: [AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo::getRegBankFromRegClass().

LGTM

Aug 14 2020, 12:03 PM · Restricted Project
paquette accepted D85964: [GlobalISel] Enable copy-propagation in post-legalizer combiner.

LGTM

Aug 14 2020, 10:27 AM · Restricted Project
paquette accepted D85966: [GlobalISel] Add a combine for sext_inreg(load x), c --> sextload x.

LGTM with a couple nits on comments

Aug 14 2020, 9:20 AM · Restricted Project

Aug 11 2020

paquette committed rGcf9588a24a27: Update AMDGPU testcases after bebe6a6449811e877f7eba3f1798ddd1fa83e440 (authored by paquette).
Update AMDGPU testcases after bebe6a6449811e877f7eba3f1798ddd1fa83e440
Aug 11 2020, 11:33 AM
paquette closed D85761: Update AMDGPU testcases after bebe6a6449811e877f7eba3f1798ddd1fa83e440.
Aug 11 2020, 11:32 AM · Restricted Project
paquette added a comment to D85761: Update AMDGPU testcases after bebe6a6449811e877f7eba3f1798ddd1fa83e440.

I applied D85201 and the tests passed without any conflicts/updates, so it seems fine.

Aug 11 2020, 11:15 AM · Restricted Project
paquette requested review of D85761: Update AMDGPU testcases after bebe6a6449811e877f7eba3f1798ddd1fa83e440.
Aug 11 2020, 11:01 AM · Restricted Project
paquette committed rGbebe6a644981: [GlobalISel] Combine (logic_op (op x...), (op y...)) -> (op (logic_op x, y)) (authored by paquette).
[GlobalISel] Combine (logic_op (op x...), (op y...)) -> (op (logic_op x, y))
Aug 11 2020, 10:40 AM
paquette closed D85050: [GlobalISel] Combine (logic_op (op x...), (op y...)) -> (op (logic_op x, y)).
Aug 11 2020, 10:40 AM · Restricted Project
paquette updated the diff for D85050: [GlobalISel] Combine (logic_op (op x...), (op y...)) -> (op (logic_op x, y)).
  • Add back tests
  • Use = default for default constructors
  • Add some asserts to applyBuildInstructionSteps
Aug 11 2020, 9:54 AM · Restricted Project

Aug 10 2020

paquette updated the diff for D85050: [GlobalISel] Combine (logic_op (op x...), (op y...)) -> (op (logic_op x, y)).
  • Use a more functional style + generalize a bit more so this can be used for other combines
  • Allow vectors + update test
  • Add a helper function for legality checks
Aug 10 2020, 1:33 PM · Restricted Project
paquette accepted D83923: [MachineOutliner][AArch64] WA for cases where AArch64 Outliner needs to do more than one stack fixup..

LGTM

Aug 10 2020, 10:57 AM · Restricted Project
paquette added inline comments to D83923: [MachineOutliner][AArch64] WA for cases where AArch64 Outliner needs to do more than one stack fixup..
Aug 10 2020, 9:14 AM · Restricted Project

Aug 7 2020

paquette closed D85375: [GlobalISel] Fix computing known bits for loads with range metadata.

Forgot to type "differential revision" in commit, closing.

Aug 7 2020, 9:23 AM · Restricted Project
paquette accepted D85521: GlobalISel: Handle zext(sext x) in artifact combiner.

LGTM

Aug 7 2020, 9:22 AM · Restricted Project

Aug 6 2020

paquette committed rGc8a282bcf7b6: [GlobalISel] Fix computing known bits for loads with range metadata (authored by paquette).
[GlobalISel] Fix computing known bits for loads with range metadata
Aug 6 2020, 4:50 PM