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[RISCV] Add vendor-defined XTheadCmo (Cache Management Operations) extension
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Authored by mtsamis on Feb 21 2023, 8:15 AM.

Details

Summary

The vendor-defined XTHeadCmo (there are some similarities with the
Zicbom standard extension) extension adds cache management instructions.

It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1) by Alibaba T-Head.

The current (as of this commit) public documentation for this
extension is available at:

https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf

Support for these instructions has already landed in GNU Binutils:

https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=a9ba8bc2d396fb8ae2b892f3bc6be8cdfe4b555c

Diff Detail

Event Timeline

mtsamis created this revision.Feb 21 2023, 8:15 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 21 2023, 8:15 AM
mtsamis requested review of this revision.Feb 21 2023, 8:15 AM
mtsamis updated this revision to Diff 499196.Feb 21 2023, 8:40 AM

Move predicates and decoder namespace to instruction definitions.
The same classes are also wanted for the XTHeadSync extension and are shared.

mtsamis retitled this revision from The vendor-defined XTHeadCmo (there are some similarities with the Zicbom standard extension) extension adds cache management instructions. to [RISCV] Add vendor-defined XTheadCmo (Cache Management Operations) extension.Feb 21 2023, 8:55 AM
mtsamis edited the summary of this revision. (Show Details)
This revision is now accepted and ready to land.Feb 21 2023, 12:47 PM