Page MenuHomePhabricator

philipp.tomsich (Philipp Tomsich)
User

Projects

User does not belong to any projects.

User Details

User Since
Mar 11 2021, 11:25 AM (62 w, 4 d)

Recent Activity

Mon, May 9

philipp.tomsich committed rG91b24b018062: [AArch64] Ampere1 does not support MTE (authored by philipp.tomsich).
[AArch64] Ampere1 does not support MTE
Mon, May 9, 2:30 AM · Restricted Project, Restricted Project
philipp.tomsich closed D125191: [AArch64] Ampere1 does not support MTE.
Mon, May 9, 2:29 AM · Restricted Project, Restricted Project
philipp.tomsich added reviewers for D125191: [AArch64] Ampere1 does not support MTE: kristof.beyls, dmgreen.
Mon, May 9, 1:15 AM · Restricted Project, Restricted Project

Sun, May 8

philipp.tomsich retitled D125191: [AArch64] Ampere1 does not support MTE from [AArch64] Ampere1 des not support MTE to [AArch64] Ampere1 does not support MTE.
Sun, May 8, 1:41 PM · Restricted Project, Restricted Project
philipp.tomsich requested review of D125191: [AArch64] Ampere1 does not support MTE.
Sun, May 8, 12:49 PM · Restricted Project, Restricted Project

Tue, May 3

philipp.tomsich updated the diff for D117112: [AArch64] Support for Ampere1 core.

Rebased to main.
The earlier base-regression was a precommitted test-case that caused
SimpleLoopUnswitch tests (not related to these changes) to fail.

Tue, May 3, 2:45 AM · Restricted Project, Restricted Project, Restricted Project

Mon, May 2

philipp.tomsich updated the diff for D117112: [AArch64] Support for Ampere1 core.

Adds two fixes for issues uncovered by the CI:

  • The update of NumAArch64CPUArchs had been lost in a "rebase gone wrong" (i.e., another target was added and the previously increased-by-1 value now was the already present upstream). This adjusts the value of NumAArch64CPUArchs to again account for the addition of an extra target.
  • Adjusts the ARMCPUTestParams for ampere1 to reflect that ARMv8.6 encodes the crypto extensions differently than lower architecture levels.
Mon, May 2, 4:15 PM · Restricted Project, Restricted Project, Restricted Project

Thu, Apr 28

philipp.tomsich updated the diff for D117112: [AArch64] Support for Ampere1 core.
  • additional tab -> space conversion (hopefully, I have emacs configured correctly now)
  • added SBSS and MTE to the SubtargetFeatures
  • inserted AMpere1 in the subtarget enum in alphabetical order
Thu, Apr 28, 2:32 AM · Restricted Project, Restricted Project, Restricted Project

Wed, Apr 27

philipp.tomsich updated the diff for D117112: [AArch64] Support for Ampere1 core.

Update to reflect review results.

Wed, Apr 27, 2:28 PM · Restricted Project, Restricted Project, Restricted Project
philipp.tomsich updated the diff for D117111: [AArch64] Add native CPU detection for Ampere1.

Update formatting as requested.

Wed, Apr 27, 2:25 PM · Restricted Project, Restricted Project

Jan 12 2022

philipp.tomsich requested review of D117112: [AArch64] Support for Ampere1 core.
Jan 12 2022, 6:25 AM · Restricted Project, Restricted Project, Restricted Project
philipp.tomsich requested review of D117111: [AArch64] Add native CPU detection for Ampere1.
Jan 12 2022, 6:19 AM · Restricted Project, Restricted Project

Nov 18 2021

philipp.tomsich added a comment to D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

No objections from me.
I would be unlikely to find time to work on moving this forward until after
RiSC-V Summit, so it‘s much appreciated if someone else rebases and merges
it.

Nov 18 2021, 11:49 PM · Restricted Project

Sep 30 2021

philipp.tomsich added a comment to D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

After reviewing, it is not subsumed by the other work — I originally
thought that some of the changes that Jessica had landed would have made
this unnecessary, but was wrong on that account.

Sep 30 2021, 5:58 AM · Restricted Project

Sep 13 2021

philipp.tomsich added a comment to D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

I thought that this was subsumed by a different change.
If we are still interested in it, I can pick it up again…

Sep 13 2021, 6:26 AM · Restricted Project

Apr 15 2021

philipp.tomsich updated subscribers of D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

[Looks like the mail-to-phabricator gateway truncated my reply, so here is the original message again that followed the "Alex," line.]

Apr 15 2021, 4:13 AM · Restricted Project

Apr 8 2021

philipp.tomsich updated the diff for D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

Simplified and cleaned up the test case.

Apr 8 2021, 2:57 AM · Restricted Project

Apr 1 2021

philipp.tomsich updated the diff for D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

Added test case.

Apr 1 2021, 5:32 AM · Restricted Project

Mar 19 2021

philipp.tomsich added reviewers for D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk: evandro, craig.topper, frasercrmck.
Mar 19 2021, 2:38 AM · Restricted Project
philipp.tomsich updated the diff for D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.

Removed comment left-over after removing the call to setHasMultipleConditionRegisters().

Mar 19 2021, 2:36 AM · Restricted Project
philipp.tomsich requested review of D98932: [RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk.
Mar 19 2021, 2:33 AM · Restricted Project

Mar 15 2021

philipp.tomsich updated subscribers of D98449: [RISCV] Add isel-patterns to optimize (a < 1) into blez (a <= 0).

Please go ahead and commit this for me.

Mar 15 2021, 10:49 AM · Restricted Project
philipp.tomsich updated the diff for D98449: [RISCV] Add isel-patterns to optimize (a < 1) into blez (a <= 0).

Update the comment to reflect that this will turn into a blez instruction.

Mar 15 2021, 7:56 AM · Restricted Project
philipp.tomsich updated the diff for D98449: [RISCV] Add isel-patterns to optimize (a < 1) into blez (a <= 0).

Update whitespaces to all-spaces for tabs-and-spaces.

Mar 15 2021, 7:54 AM · Restricted Project
philipp.tomsich updated the diff for D98449: [RISCV] Add isel-patterns to optimize (a < 1) into blez (a <= 0).

This updates the test cases and I have rerun 'ninja check' to ensure no further test issues.
The commit message has also been updated to reflect that this is a blez-instruction.

Mar 15 2021, 7:51 AM · Restricted Project

Mar 12 2021

philipp.tomsich updated the diff for D98449: [RISCV] Add isel-patterns to optimize (a < 1) into blez (a <= 0).

Added a testcase and rebased onto

commit 49942c6d4a0aee740381f754a6a0e6f7e1bfed43
Author: Quentin Colombet <qcolombet@apple.com>
Date:   Wed Mar 10 13:28:53 2021 -0800
Mar 12 2021, 5:31 AM · Restricted Project

Mar 11 2021

philipp.tomsich requested review of D98449: [RISCV] Add isel-patterns to optimize (a < 1) into blez (a <= 0).
Mar 11 2021, 12:43 PM · Restricted Project