This is an archive of the discontinued LLVM Phabricator instance.

[RISCV] Use Zvl*b as a lower bound for VScaleRange.
ClosedPublic

Authored by craig.topper on Jan 10 2023, 10:02 PM.

Details

Summary

The backend has a fatal error in RISCVSubtarget::getMinRVVVectorSizeInBits
if RVVVectorBitsMin is less than the Zvl length from -march. Now
RVVVectorBitsMin is connected to VScaleRange in the backend, we
can trip this fatal error.

This patch adds the Zvl*b length as a lower bound to protect this.
The test is updated to test vscale-min with Zvl64b instead of V.

I'd like to do a proper diagnostic for this, but I don't think we
can do that from this function. Since -mvscale-min is an internal cc1
option, I'm not sure it's a big deal.

I'm planning to add a driver option -msve-vector-bits. I will
probably implement a diagnostic for that.

Diff Detail

Event Timeline

craig.topper created this revision.Jan 10 2023, 10:02 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 10 2023, 10:02 PM
craig.topper requested review of this revision.Jan 10 2023, 10:02 PM
This revision is now accepted and ready to land.Jan 13 2023, 3:15 AM
This revision was automatically updated to reflect the committed changes.