Page MenuHomePhabricator

[RISCV] Teach targetShrinkDemandedConstant to preserve (and X, 0xffffffff).
ClosedPublic

Authored by craig.topper on Mar 21 2021, 1:13 PM.

Details

Summary

We look for this pattern frequently in isel patterns so its a
good idea to try to preserve it.

This also let's us remove our special isel handling for srliw
and use a direct pattern match of (srl (and X, 0xffffffff), C)
since no bits will be removed from the and mask.

Diff Detail

Event Timeline

craig.topper created this revision.Mar 21 2021, 1:13 PM
craig.topper requested review of this revision.Mar 21 2021, 1:13 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 21 2021, 1:13 PM
Herald added a subscriber: MaskRay. · View Herald Transcript

Are there situations in which preserving the and benefits codegen, aside from allowing us to remove the SRLIWPat?

Are there situations in which preserving the and benefits codegen, aside from allowing us to remove the SRLIWPat?

https://godbolt.org/z/GnsMvavrv though arguably from that example we should be preserving any trailing 1s mask and teach isel to use SLLI+SRLI for any trailing mask not just 0xffffffff.

Thanks. Perhaps we can pre-commit those test cases to better show the effect of this optimization?

Rebase on top of new tests

frasercrmck accepted this revision.Mar 25 2021, 2:48 AM

LGTM, cheers.

This revision is now accepted and ready to land.Mar 25 2021, 2:48 AM
This revision was landed with ongoing or failed builds.Mar 25 2021, 9:11 AM
This revision was automatically updated to reflect the committed changes.