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[RISCV] Modify add.uw patterns to put the masked operand in rs1 to match 0.93 bitmanip spec.
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Authored by craig.topper on Jan 20 2021, 2:05 PM.

Details

Summary

The 0.93 spec has this implementation for add.uw

uint_xlen_t adduw(uint_xlen_t rs1, uint_xlen_t rs2) {

uint_xlen_t rs1u = (uint32_t)rs1;
return rs1u + rs2;

}

The 0.92 spec had the usages of rs1 and rs2 swapped.

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Event Timeline

craig.topper created this revision.Jan 20 2021, 2:05 PM
craig.topper requested review of this revision.Jan 20 2021, 2:05 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 20 2021, 2:05 PM
Herald added a subscriber: MaskRay. · View Herald Transcript
This revision is now accepted and ready to land.Jan 21 2021, 3:52 AM
asb accepted this revision.Jan 22 2021, 9:15 AM