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[RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd

Authored by craig.topper on Nov 23 2020, 11:51 AM.



Start with an assumption that FMA is faster than Fmul+FAdd. If thats not true on some particular implementation we can add a tuning parameter in the future.

I've update the fmuladd test cases and added new test cases for fast math flag based contraction.

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craig.topper created this revision.Nov 23 2020, 11:51 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 23 2020, 11:51 AM
craig.topper requested review of this revision.Nov 23 2020, 11:51 AM
evandro accepted this revision.Nov 25 2020, 2:36 PM
This revision is now accepted and ready to land.Nov 25 2020, 2:36 PM