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[ARM][AArch64] Adding basic support for the v8.7-A architecture

Authored by pratlucas on Nov 19 2020, 2:06 AM.



This introduces support for the v8.7-A architecture through a new
subtarget feature called "v8.7a". It adds two new "WFET" and "WFIT"
instructions, the nXS limited-TLB-maintenance qualifier for DSB and TLBI
instructions, a new CPU id register, ID_AA64ISAR2_EL1, and the new
HCRX_EL2 system register.

Based on patches written by Simon Tatham and Victor Campos.

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Event Timeline

pratlucas created this revision.Nov 19 2020, 2:06 AM
pratlucas requested review of this revision.Nov 19 2020, 2:06 AM

The pre-commit test failures look relevant, so should be investigated.

Would this be better merged into D91773, so that these are under separate features from the start, rather than splitting them out later?


As I mentioned in D91773, could we do this in tablegen instead, to avoid needing the special cases here?


This isn't needed with the assertion above.


This is unreachable because of the & 0xF above.


Could this also be done by adding the extra barrier operands into the tablegen (the DB class in

pratlucas updated this revision to Diff 308635.Dec 1 2020, 6:23 AM

Rebasing and addressing comments.

pratlucas marked 4 inline comments as done.EditedDec 1 2020, 6:27 AM

As suggested, I've squashed D91773 into this review.
The comments from D91773 were addressed in this latest version.


I'd rather keep this if to make sure we properly get a ParseFail result if assertions are disabled.

pratlucas marked an inline comment as done.Dec 1 2020, 6:27 AM

The code changes look good, but this is missing tests for the new TLBI operands..

pratlucas updated this revision to Diff 310486.Dec 9 2020, 3:44 AM

Adding new TLBI operands to xs tests.

This revision is now accepted and ready to land.Dec 17 2020, 2:41 AM
This revision was landed with ongoing or failed builds.Dec 17 2020, 5:45 AM
This revision was automatically updated to reflect the committed changes.