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olista01 (Oliver Stannard)
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User Since
Feb 5 2014, 1:36 AM (288 w, 6 d)

Recent Activity

Apr 11 2019

olista01 committed rG6fa145e429b7: Test commit access (authored by olista01).
Test commit access
Apr 11 2019, 5:52 AM

Mar 29 2019

olista01 committed rGd83a559318a5: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base (authored by olista01).
[AArch64] Support selecting TPIDR_EL[1-3] as the thread base
Mar 29 2019, 6:32 AM
olista01 committed rL357250: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base.
[AArch64] Support selecting TPIDR_EL[1-3] as the thread base
Mar 29 2019, 6:31 AM
olista01 committed rC357250: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base.
[AArch64] Support selecting TPIDR_EL[1-3] as the thread base
Mar 29 2019, 6:31 AM
olista01 closed D59631: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base.
Mar 29 2019, 6:31 AM · Restricted Project
olista01 accepted D59631: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base.

I can't see any other uses of the option groups, or any way to put an option into two groups, so this LGTM.

Mar 29 2019, 6:00 AM · Restricted Project
olista01 added inline comments to D59787: [ARM] Implement TTI::getMemcpyCost.
Mar 29 2019, 3:29 AM · Restricted Project

Mar 26 2019

olista01 committed rG5c9023847919: [ARM][Asm] Accept upper case coprocessor number and registers (authored by olista01).
[ARM][Asm] Accept upper case coprocessor number and registers
Mar 26 2019, 3:25 AM
olista01 committed rL356984: [ARM][Asm] Accept upper case coprocessor number and registers.
[ARM][Asm] Accept upper case coprocessor number and registers
Mar 26 2019, 3:25 AM
olista01 closed D59760: [ARM][Asm] Accept upper case coprocessor number and registers.
Mar 26 2019, 3:25 AM · Restricted Project

Mar 25 2019

olista01 created D59760: [ARM][Asm] Accept upper case coprocessor number and registers.
Mar 25 2019, 4:15 AM · Restricted Project

Mar 21 2019

olista01 added a reviewer for D59631: [AArch64] Support selecting TPIDR_EL[1-3] as the thread base: olista01.

Is there an existing compiler which this option is trying to be compatible with? GCC for AArch64 doesn't currently have an option for this, so we don't have to worry about compatibility with that. If possible, I'd prefer for the option to be "-mtp=", to match the option accepted by clang and GCC for AArch32.

Mar 21 2019, 5:56 AM · Restricted Project
olista01 committed rGdefdb1070fbc: [AArch64] Allow -mattr=tpidr-el[1|2|3] (authored by olista01).
[AArch64] Allow -mattr=tpidr-el[1|2|3]
Mar 21 2019, 4:30 AM
olista01 committed rL356657: [AArch64] Allow -mattr=tpidr-el[1|2|3].
[AArch64] Allow -mattr=tpidr-el[1|2|3]
Mar 21 2019, 4:29 AM
olista01 closed D54685: [AArch64] Allow -mattr=tpidr-el[1|2|3].
Mar 21 2019, 4:29 AM · Restricted Project

Mar 20 2019

olista01 accepted D54685: [AArch64] Allow -mattr=tpidr-el[1|2|3].

LGTM. Do you have commit access? If not, I can commit this for you.

Mar 20 2019, 3:12 AM · Restricted Project
olista01 accepted D59568: [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1..

LGTM

Mar 20 2019, 3:00 AM · Restricted Project

Mar 18 2019

olista01 accepted D59439: [ARM] Make sure to save/restore LR when we use tBfar..

LGTM with one nit .

Mar 18 2019, 6:15 AM · Restricted Project

Mar 14 2019

olista01 accepted D57765: [ARM] Add Cortex-M35P Support.

LGTM

Mar 14 2019, 3:32 AM · Restricted Project, Restricted Project
olista01 accepted D57763: [ARM] Add Cortex-M35P.
Mar 14 2019, 3:00 AM · Restricted Project

Mar 8 2019

olista01 accepted D59021: [ARM] [FIX] Restrict vfmal.f16 and vfmsl.f16 indexed version.

LGTM

Mar 8 2019, 9:00 AM · Restricted Project

Mar 5 2019

olista01 committed rG4a9086b53737: [ARM] Fix select_cc lowering for fp16 (authored by olista01).
[ARM] Fix select_cc lowering for fp16
Mar 5 2019, 2:43 AM
olista01 committed rL355385: [ARM] Fix select_cc lowering for fp16.
[ARM] Fix select_cc lowering for fp16
Mar 5 2019, 2:43 AM
olista01 closed D58813: [ARM] Fix select_cc lowering for fp16.
Mar 5 2019, 2:43 AM · Restricted Project

Mar 4 2019

olista01 committed rG181afc7f3bb9: [ARM] Fix selection of VLDR.16 instruction with imm offset (authored by olista01).
[ARM] Fix selection of VLDR.16 instruction with imm offset
Mar 4 2019, 1:17 AM
olista01 committed rL355305: [ARM] Fix selection of VLDR.16 instruction with imm offset.
[ARM] Fix selection of VLDR.16 instruction with imm offset
Mar 4 2019, 1:17 AM
olista01 closed D58822: [ARM] Fix selection of VLDR.16 instruction with imm offset.
Mar 4 2019, 1:17 AM · Restricted Project

Mar 1 2019

olista01 committed rG82fbbc21fdff: [ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer (authored by olista01).
[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer
Mar 1 2019, 6:20 AM
olista01 committed rL355201: [ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer.
[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer
Mar 1 2019, 6:19 AM
olista01 closed D58816: [ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer.
Mar 1 2019, 6:19 AM · Restricted Project
olista01 added inline comments to D58813: [ARM] Fix select_cc lowering for fp16.
Mar 1 2019, 6:12 AM · Restricted Project
olista01 committed rGe019e6223b63: [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints (authored by olista01).
[ARM] Consider undefined-on-NaN conditions in checkVSELConstraints
Mar 1 2019, 5:58 AM
olista01 committed rL355199: [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints.
[ARM] Consider undefined-on-NaN conditions in checkVSELConstraints
Mar 1 2019, 5:57 AM
olista01 closed D58812: [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints.
Mar 1 2019, 5:57 AM · Restricted Project
olista01 created D58822: [ARM] Fix selection of VLDR.16 instruction with imm offset.
Mar 1 2019, 5:54 AM · Restricted Project
olista01 created D58816: [ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer.
Mar 1 2019, 3:42 AM · Restricted Project
olista01 added a parent revision for D58813: [ARM] Fix select_cc lowering for fp16: D58812: [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints.
Mar 1 2019, 1:29 AM · Restricted Project
olista01 added a child revision for D58812: [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints: D58813: [ARM] Fix select_cc lowering for fp16.
Mar 1 2019, 1:29 AM · Restricted Project
olista01 created D58813: [ARM] Fix select_cc lowering for fp16.
Mar 1 2019, 1:28 AM · Restricted Project
olista01 created D58812: [ARM] Consider undefined-on-NaN conditions in checkVSELConstraints.
Mar 1 2019, 1:28 AM · Restricted Project
olista01 committed rG1ed7d8ae36c6: [ARM] Add armv8a triple to test check updaters (authored by olista01).
[ARM] Add armv8a triple to test check updaters
Mar 1 2019, 1:26 AM
olista01 committed rL355186: [ARM] Add armv8a triple to test check updaters.
[ARM] Add armv8a triple to test check updaters
Mar 1 2019, 1:25 AM

Feb 21 2019

olista01 accepted D58059: [AArch64] Print instruction before atomic semantic annotations.

LGTM

Feb 21 2019, 1:53 AM · Restricted Project

Feb 18 2019

olista01 committed rGe3c8ce8b7547: [ARM] Add pre-defined macros for ROPI and RWPI (authored by olista01).
[ARM] Add pre-defined macros for ROPI and RWPI
Feb 18 2019, 4:40 AM
olista01 committed rC354265: [ARM] Add pre-defined macros for ROPI and RWPI.
[ARM] Add pre-defined macros for ROPI and RWPI
Feb 18 2019, 4:39 AM
olista01 committed rL354265: [ARM] Add pre-defined macros for ROPI and RWPI.
[ARM] Add pre-defined macros for ROPI and RWPI
Feb 18 2019, 4:39 AM
olista01 closed D23610: [ARM] Add pre-defined macros for ROPI and RWPI.
Feb 18 2019, 4:39 AM · Restricted Project
olista01 added a comment to D23610: [ARM] Add pre-defined macros for ROPI and RWPI.

Yes, the back-end work was all done years ago, I just also forgot about these while waiting for the ACLE to be published.

Feb 18 2019, 4:38 AM · Restricted Project
Herald added a project to D54791: [AArch64] Fix disassembly of SXTL and UXTL aliases: Restricted Project.

Ping

Feb 18 2019, 3:12 AM · Restricted Project
olista01 added a comment to D23610: [ARM] Add pre-defined macros for ROPI and RWPI.

These macros have been in the published ACLE for a while now: https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros#position-independent-code

Feb 18 2019, 3:08 AM · Restricted Project

Feb 13 2019

olista01 requested changes to D58059: [AArch64] Print instruction before atomic semantic annotations.

I think it would be neater to move this annotation printing code to after the regular printAliasInstr/printInstruction calls at the end of the function (line 300). As it is, this patch will drop any other annotations on the instruction, because it doesn't call printAnnotation(O, Annot).

Feb 13 2019, 5:55 AM · Restricted Project

Feb 6 2019

olista01 requested changes to D57765: [ARM] Add Cortex-M35P Support.
Feb 6 2019, 5:24 AM · Restricted Project, Restricted Project
olista01 requested changes to D57763: [ARM] Add Cortex-M35P.
Feb 6 2019, 5:22 AM · Restricted Project
olista01 accepted D57764: [AArch64] Add Cortex-A76 and Cortex-A76AE Support.

LGTM, but please remember to upload with more context.

Feb 6 2019, 5:15 AM · Restricted Project, Restricted Project
olista01 accepted D57762: [AArch64] Add support for Cortex-A76 and Cortex-A76AE.

LGTM with one minor nit.

Feb 6 2019, 5:11 AM · Restricted Project

Feb 5 2019

olista01 committed rG78dc38ec9422: [AArch64][Outliner] Don't outline BTI instructions (authored by olista01).
[AArch64][Outliner] Don't outline BTI instructions
Feb 5 2019, 9:22 AM
olista01 committed rL353190: [AArch64][Outliner] Don't outline BTI instructions.
[AArch64][Outliner] Don't outline BTI instructions
Feb 5 2019, 9:22 AM
olista01 closed D57753: [AArch64][Outliner] Don't outline BTI instructions.
Feb 5 2019, 9:21 AM · Restricted Project
olista01 created D57753: [AArch64][Outliner] Don't outline BTI instructions.
Feb 5 2019, 7:29 AM · Restricted Project

Feb 1 2019

olista01 committed rL352844: [CodeGen] Don't scavenge non-saved regs in exception throwing functions.
[CodeGen] Don't scavenge non-saved regs in exception throwing functions
Feb 1 2019, 1:23 AM
olista01 closed D57381: [CodeGen] Don't scavenge non-saved regs in exception throwing functions.
Feb 1 2019, 1:23 AM · Restricted Project

Jan 31 2019

olista01 updated the diff for D57381: [CodeGen] Don't scavenge non-saved regs in exception throwing functions.
Jan 31 2019, 1:27 AM · Restricted Project

Jan 30 2019

olista01 updated the diff for D57381: [CodeGen] Don't scavenge non-saved regs in exception throwing functions.
Jan 30 2019, 2:23 AM · Restricted Project

Jan 29 2019

olista01 updated the diff for D57381: [CodeGen] Don't scavenge non-saved regs in exception throwing functions.
Jan 29 2019, 6:45 AM · Restricted Project
olista01 added a comment to D57335: [IR] Don't assume all functions are 4 byte aligned.

Why do you think this would be better as a target hook, rather than in the datalayout? The datalayout already includes information about alignments of different types, and most of the target hooks are concerned with what IR will be efficient for the target, not things which might affect correctness.

Jan 29 2019, 6:31 AM · Restricted Project, Restricted Project
olista01 created D57381: [CodeGen] Don't scavenge non-saved regs in exception throwing functions.
Jan 29 2019, 6:17 AM · Restricted Project

Jan 22 2019

olista01 accepted D56717: [SLH] AArch64: correctly pick temporary register to mask SP.

LGTM with one nit.

Jan 22 2019, 6:26 AM

Jan 15 2019

olista01 requested changes to D56717: [SLH] AArch64: correctly pick temporary register to mask SP.
Jan 15 2019, 7:27 AM

Jan 9 2019

olista01 accepted D55929: Initial AArch64 SLH implementation..

LGTM, thanks.

Jan 9 2019, 3:24 AM

Jan 8 2019

olista01 added inline comments to D55929: Initial AArch64 SLH implementation..
Jan 8 2019, 7:46 AM

Jan 2 2019

olista01 added a comment to D54685: [AArch64] Allow -mattr=tpidr-el[1|2|3].

What is the use-case for wanting to use SP_ELx for the thread pointer, instead of TPIDR_ELx?

Jan 2 2019, 3:51 AM · Restricted Project

Dec 21 2018

olista01 added inline comments to D55990: [ARM] Add command-line option for SB.
Dec 21 2018, 2:49 AM
olista01 added inline comments to D55921: [AArch64] Add command-line option for SB.
Dec 21 2018, 2:47 AM

Dec 20 2018

olista01 accepted D51798: [Dwarf/AArch64] Return address signing B key dwarf support.

LGTM, thanks!

Dec 20 2018, 8:08 AM

Dec 18 2018

olista01 accepted D55774: [AArch64] - Return address signing dwarf support.

LGTM with one nit.

Dec 18 2018, 2:35 AM

Dec 17 2018

olista01 accepted D54896: Introduce control flow speculation tracking pass for AArch64..

LGTM.

Dec 17 2018, 8:47 AM
olista01 accepted D55704: [AArch64][libunwind] Unwinding support for return address signing with B Key.

LGTM with one nit.

Dec 17 2018, 3:33 AM

Dec 14 2018

olista01 accepted D55700: [AArch64][libunwind] Unwinding support for return address signing.

LGTM with one nit.

Dec 14 2018, 3:25 AM

Dec 11 2018

olista01 added a comment to rL348114: [ARM][MC] Move information about variadic register defs into tablegen.

In the ARM backend, we only use variable_ops for the LDM and STM instructions, where the variadic operands are either all uses or all defs. I'm less familiar with the other backends, but all of the other cases where variable_ops is used look similar.

Dec 11 2018, 1:31 AM

Dec 3 2018

olista01 added inline comments to D54633: [NFC][AArch64] Split out backend features.
Dec 3 2018, 2:42 AM
olista01 committed rL348114: [ARM][MC] Move information about variadic register defs into tablegen.
[ARM][MC] Move information about variadic register defs into tablegen
Dec 3 2018, 2:36 AM
olista01 closed D54853: [ARM][MC] Move information about variadic register defs into tablegen.
Dec 3 2018, 2:36 AM
olista01 committed rL348113: [ARM][Asm] Debug trace for the processInstruction loop.
[ARM][Asm] Debug trace for the processInstruction loop
Dec 3 2018, 2:24 AM
olista01 closed D54852: [ARM][Asm] Debug trace for the processInstruction loop.
Dec 3 2018, 2:24 AM
olista01 added a comment to D54853: [ARM][MC] Move information about variadic register defs into tablegen.

I can't think of any general way to test this, because these properties of MCInsts are not used much. The Thumb instructions which this applies to are tested by test/MC/ARM/implicit-it-generation.s, which has a big list of PC-writing instructions which cannot be used in the middle of an IT block, this patch is NFC for them.

Dec 3 2018, 1:59 AM
olista01 accepted D54633: [NFC][AArch64] Split out backend features.

A few nits, but otherwise LGTM, no need to re-review after fixing them.

Dec 3 2018, 1:54 AM

Nov 30 2018

olista01 added inline comments to D55059: [ARM] FP16: constant initialised v4f16 and v8f16 vectors.
Nov 30 2018, 1:05 AM

Nov 28 2018

olista01 added a comment to D54891: [RFC] Checking inline assembly for validity.

I can provide a full log of the 4831 warnings marked -Winline-asm during a Firefox for ARM Android build, if you're interested.

Nov 28 2018, 3:43 AM
olista01 updated the diff for D54891: [RFC] Checking inline assembly for validity.
  • Make the "cc" inline assembly clobber affect all status registers
  • Handle tied operands correctly in the AsmMatcher (fixes post-increment ldr/str instructions)
  • Fix outputs of t2AsmPseudo records (fixes Thumb2 mov with shifted right-hand operand)
  • Call transferInlineAsmOps in cases where we parse more than one operand at once
Nov 28 2018, 3:42 AM
olista01 added a comment to D54891: [RFC] Checking inline assembly for validity.

mpi_arm.c:

  • For the warnings which are emitted, some register MCOperands are being matched against the wrong parsed operand.
  • For post-increment instructions, the assembly matcher is not setting the writeback register in the MCInst (leaving it as noreg), because it is tied to one part of a complex operand, which it doesn't support. The fix for this might be to make a similar change to rL209425 in the ARM backend, which would give other advantages (better diagnostics for memory operands).
Nov 28 2018, 3:34 AM

Nov 27 2018

olista01 added a comment to D54891: [RFC] Checking inline assembly for validity.

For the first example, it looks like we're missing the case where a memory instruction with writeback modifies the address register. I'll have a look and see if there's a way to fix that.

Nov 27 2018, 3:46 AM
olista01 added a child revision for D54853: [ARM][MC] Move information about variadic register defs into tablegen: D54891: [RFC] Checking inline assembly for validity.
Nov 27 2018, 3:35 AM
olista01 added a parent revision for D54891: [RFC] Checking inline assembly for validity: D54853: [ARM][MC] Move information about variadic register defs into tablegen.
Nov 27 2018, 3:35 AM
olista01 added a comment to D54633: [NFC][AArch64] Split out backend features.

However, the ID_AA64MMFR2_EL1 register was added in v8.2. So I believe we should check as to warn the user if he might get undefined behavior by accessing it when not present.

Nov 27 2018, 3:05 AM
olista01 added a comment to D54896: Introduce control flow speculation tracking pass for AArch64..

There currently isn't even a user interface to reserve X16.

Nov 27 2018, 2:22 AM

Nov 26 2018

olista01 updated the diff for D54853: [ARM][MC] Move information about variadic register defs into tablegen.

Remove special case in MCInstrDesc::mayAffectControlFlow, which is no longer needed.

Nov 26 2018, 3:52 AM
olista01 created D54891: [RFC] Checking inline assembly for validity.
Nov 26 2018, 2:50 AM

Nov 23 2018

olista01 committed rL347494: [ARM][AsmParser] Improve debug printing of parsed asm operands.
[ARM][AsmParser] Improve debug printing of parsed asm operands
Nov 23 2018, 6:30 AM
olista01 closed D54850: [ARM][AsmParser] Improve debug printing of parsed asm operands.
Nov 23 2018, 6:30 AM
olista01 added a comment to D54850: [ARM][AsmParser] Improve debug printing of parsed asm operands.

This is only used for the -debug output (i.e. things inside the LLVM_DEBUG macro) and from within a debugger, I don't think we tend to test that.

Nov 23 2018, 6:27 AM