Thanks Peter. Since one week has passed, I plan to commit these changes by the end of the day if nothing surfaces.

Add a clarifying comment.

Remove if statement inside RemovePredicate as it's already covered by an assertion.

Remove predicate of instructions after the divergent one even if there's no non-debug instruction after it.

Add assertion in RemovePredicate lambda.
SKip debug instructions inside VPT blocks with predicate divergence.

LGTM. mem2reg is a simple enough optimization to clear up the IR in this case. Thank you.

@Tyker This is causing another build failure in another example:

Not really. Closing it

1. Add comment explaining the MVE-Integer detail.
2. Add another test to check the disabled features.

Ping.

1. Merged the second patch into this (handle bf16).
2. Do the same treatment for -mcpu.
3. Instead of doing string search once again, return the desired information in the first time using a by-ref argument.
4. This new approach covers positional differences between +fp and +nofp.

I will merge the two patches into one.

This is the problematic case:

Improve the testcase which exercises loads and stores from stack. Now, wrong frame index replacements will be caught here.

This effort is to specifically address this bug: https://bugs.llvm.org/show_bug.cgi?id=34165

Added a test.

Thanks @efriedma for the clarification. It seems that the handling of input operands must be moved to clang then.

This change isn't more restrictive than GCC. In your example, the difference is being caused by gcc seemingly adding -fomit-frame-pointer, whereas Clang does not.

Hi @manojgupta. I am not familiar enough with this piece of code to understand whether it could be fixed by simply using any other general-purpose register instead of r7.

Thanks @saugustine.

Amended commit msg to explain why clobber operands are not handled.

Clobber operands are intentionally not handled in this patch. They were already covered in AsmPrinter::emitInlineAsm(const MachineInstr *MI), even though, in the latter, only a warning is given, not an error.

The patch has been redone to detect only writes to PC, base pointer and
frame pointer on ARM target. Similar implementations can be done for
other targets as the base class's function is virtual.

Indeed, it seems that gcc allows the use of SP in inline asm.

I should have given more context, so let me amend that.

It is diagnosing the same cases as the similar check present in CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp, lines 549-585. The latter, however, only covers clobber operands, leaving input and output operands unchecked.

Fixing naming issue detected by clang-tidy.

Added comment to explain the fallback to non-register-offset variants.

Can I please have this reviewed again? I have addressed the issues reported.

1. Explictly avoid using the register-offset variant of LDRD/STRD. This variant has a limitation on register allocation: the register allocated to the register-offset cannot be reused in any of the remaining operands. I could not find an easy way to implement this in LLVM, so I left it as a to-do in the future.
2. Instruction selection of STRD was moved from TableGen to C++ because of point (1).
3. Updated tests to reflect these changes.