- User Since
- Aug 19 2015, 11:50 AM (225 w, 3 d)
Thu, Dec 12
- Move new ISD node definitions to TableGen.
- Instruction selection done in TableGen using patterns.
Wed, Dec 11
- Update summary to have a better explanation of this patch.
- Add a post-ISel hook to add register allocation hints to LDRD/STRD operands.
- In the AArch32 case, move ISel from TableGen back to the C++ side. This is needed because we must have a custom lowering whenever LDRD/STRD selection would normally yield a register offset. The ARM Load/Store Optimizer is not able to handle LDRD/STRD's register offsets in the cases where LDRD/STRD must be reverted to LDM/STM. As such, the C++ instruction selection opts for not generating instructions with a register offset.
- Improve test by testing several immediate boundary cases.
Mon, Dec 2
Fri, Nov 29
Require single-precision floating-point registers instead.
Wed, Nov 27
Now using a pseudo instruction instead, VMOVHcc, which is lowered into a single-precision VMOV.
Mon, Nov 25
Fri, Nov 22
Fixed the immediate range check to cover -1020 to 1020.
Wed, Nov 20
- Move the custom SD nodes to TableGen.
- Truncating stores not restricted anymore.
- Remove isUnindexed() calls since they should return true always at this point.
- Extend test to also check loads/stores that have an offset.
Tue, Nov 19
Nov 13 2019
- Create new AArch64ISD nodes specific to load/store of pairs of registers.
- Custom lower i128 volatile loads/stores to these new AArch64ISD nodes.
- Not exclude extloads anymore.
- Create new ARMISD nodes specific to load/store of dual registers.
- Custom lower i64 volatile loads/stores to these new ARMISD nodes.
Nov 11 2019
Oct 30 2019
Amending patch to include the transfer of memory operands from the original
SDNode to the new MachineSDNode.
Oct 29 2019
Oct 28 2019
Oct 25 2019
Added support for __clsll as requested.
Add support for __clsll.
Use __builtin_bit_cast to perform the relevant bitcasts.
Oct 23 2019
Oct 22 2019
Oct 21 2019
Oct 18 2019
Oct 17 2019
Added test into Disassembler
Oct 16 2019
Oct 14 2019
Dec 13 2016
Dec 12 2016
Moved trace call inside the critical section.
Dec 9 2016
Nov 28 2016
Nov 21 2016
Fixed indentation and variable name issues.
Nov 17 2016
Applied your comments.
Ok, I'm fixing the patch. Thanks.
Nov 16 2016
Nov 9 2016
Okay. Thanks for the clarification. Should I create another patch just for the removal of lines 223-225?
Nov 8 2016
Nov 4 2016
Nov 1 2016
Oct 31 2016
Given that checking 'tasking_ser' is redundant, I removed it.
Oct 27 2016
Oct 26 2016
I have applied the suggestions.
Yes, please. Thanks.
Oct 25 2016
Oct 14 2015