[AArch64] Add -mmark-bti-property flag.

[danielkiss]

Summary

Writing the .note.gnu.property manually is error prone and hard to
maintain in the assembly files.
The -mmark-bti-property is for the assembler to emit the section with the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI. To be used when C/C++ is compiled
with -mbranch-protection=bti.

This patch refactors the .note.gnu.property handling.

[danielkiss]

I got some comment internally, the -mbti might suggest it enables the bti feature so I'm going to rename the flag to -mmark-bti-property.

[danielkiss]

Rename the flag to -mmark-bti-property

[chill]

llvm/lib/Target/AArch64/AArch64.td

352

No, this is an abuse of subtarget features. Subtarget features represent characteristics of the chip, they shouldn't be used to pass arbitrary bits of information.
Possible alternatives - TargetOptions (cf. BackendUtil.cpp:initTargetOptions()) or
LLVM command-line arguments (cf. BackendUtil.cpp:setCommandLineOpts().

[danielkiss]

Fix review comments.

[danielkiss]

llvm/lib/Target/AArch64/AArch64.td

352

Thanks, now I learned how to pass flags across layers, that was not clear at the first time.

[chill]

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp

106 ↗

(On Diff #285492)

No need to the .getValue() part.

llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h

34 ↗

(On Diff #285492)

Is there a need for this data member? The option value does not change over time, and the option can be defined in AArch64TargetStreamer.cpp.

[chill]

LGTM. It'd be nice if we could get someone non-Arm to have a look too. though.

[nickdesaulniers]

I don't have any thoughts on the change per se, so just minor thoughts/generic code review.

clang/lib/Driver/ToolChains/Clang.cpp

6995 ↗

(On Diff #288765)

it looks like A is unused. Should we be using Args.hasFlag instead of Args.getLastArg?

llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp

55–57

The coding style allows for the curly braces to be omitted for single statement bodies.

63

ditto

67

move this to just before the SwitchSection call below?

llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h

41

does this need to be virtual?

[danielkiss]

@nickdesaulniers Thanks for the review, comments are addressed.

clang/include/clang/Driver/Options.td

 def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group<m_aarch64_Features_Group>,
   HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
 def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
   Group<m_aarch64_Features_Group>,
   HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
 def mno_fix_cortex_a53_835769 : Flag<["-"], "mno-fix-cortex-a53-835769">,
   Group<m_aarch64_Features_Group>,
   HelpText<"Don't workaround Cortex-A53 erratum 835769 (AArch64 only)">;
+def mmark_bti_property : Flag<["-"], "mmark-bti-property">,
+  Group<m_aarch64_Features_Group>,
+  HelpText<"Add .note.gnu.property with BTI to assembly files (AArch64 only)">;
 foreach i = {1-31} in
   def ffixed_x#i : Flag<["-"], "ffixed-x"#i>, Group<m_Group>,
     HelpText<"Reserve the x"#i#" register (AArch64/RISC-V only)">;
 
 foreach i = {8-15,18} in
   def fcall_saved_x#i : Flag<["-"], "fcall-saved-x"#i>, Group<m_aarch64_Features_Group>,
     HelpText<"Make the x"#i#" register call-saved (AArch64 only)">;
 

clang/lib/Driver/ToolChains/Arch/AArch64.cpp

fp16_fml_fallthrough:
   if (Args.hasArg(options::OPT_fcall_saved_x15))
     Features.push_back("+call-saved-x15");
 
   if (Args.hasArg(options::OPT_fcall_saved_x18))
     Features.push_back("+call-saved-x18");
 
   if (Args.hasArg(options::OPT_mno_neg_immediates))
     Features.push_back("+no-neg-immediates");
+
+  if (Args.hasArg(options::OPT_mmark_bti_property))
+    Features.push_back("+markbtiproperty");
 }

clang/test/Driver/arm64-markbti.S

+// When -mbti is passed the generated file object gets BTI marking.
+// RUN: %clang -target arm64-linux-none -mmark-bti-property -c %s -o -| llvm-readobj -n | FileCheck -check-prefix=CHECK  -check-prefix=CHECK_GEN %s
+// RUN: %clang -target arm64-linux-none -DNOTE_PRESENT -c %s -o - | llvm-readobj -n | FileCheck -check-prefix=CHECK  -check-prefix=CHECK_PRESET %s
+// RUN: %clang -target arm64-linux-none -mmark-bti-property -DNOTE_PRESENT -c %s -o - | llvm-readobj -n |  FileCheck -check-prefix=CHECK  -check-prefix=CHECK_PRESET %s
+// RUN: %clang -target arm64-linux-none -mmark-bti-property -DNOTE_PRESENT -c %s -o - 2>&1 |  FileCheck -check-prefix=CHECK_WARNING %s
+//
+// CHECK_WARNING: The .note.gnu.property is not emitted because it is already present.
+// CHECK: Name: .note.gnu.property
+// CHECK: Type: NT_GNU_PROPERTY_TYPE_0
+// CHECK_GEN: aarch64 feature: BTI
+// CHECK_PRESET: aarch64 feature: BTI, PAC
+
+#ifdef NOTE_PRESENT
+  .section .note.gnu.property, "a";
+  .balign 8;
+  .long 4;
+  .long 0x10;
+  .long 0x5
+  .asciz "GNU"
+  .long 0xc0000000
+  .long 4
+  .long 3
+  .long 0
+#endif

llvm/lib/Target/AArch64/AArch64.td

def FeaturePredRes : SubtargetFeature<"predres", "HasPredRes", "true",
   "Enable v8.5a execution and data prediction invalidation instructions" >;
 
 def FeatureCacheDeepPersist : SubtargetFeature<"ccdp", "HasCCDP",
     "true", "Enable v8.5 Cache Clean to Point of Deep Persistence" >;
 
 def FeatureBranchTargetId : SubtargetFeature<"bti", "HasBTI",
     "true", "Enable Branch Target Identification" >;
 
+def FeatureEmitNoteBTIProperty : SubtargetFeature<"markbtiproperty", "MarkBTIProperty",
+    "true", "Emit .note.gnu.property for Branch Target Identification" >;
+
 def FeatureRandGen : SubtargetFeature<"rand", "HasRandGen",
     "true", "Enable Random Number generation instructions" >;
 
 def FeatureMTE : SubtargetFeature<"mte", "HasMTE",
     "true", "Enable Memory Tagging Extension" >;
 
 def FeatureTRBE : SubtargetFeature<"trbe", "HasTRBE",
     "true", "Enable Trace Buffer Extension">;

llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

if (any_of(M, [](const Function &F) {
       })) {
     Flags &= ~ELF::GNU_PROPERTY_AARCH64_FEATURE_1_PAC;
   }
 
   if (Flags == 0)
     return;
 
   // Emit a .note.gnu.property section with the flags.
-  MCSection *Cur = OutStreamer->getCurrentSectionOnly();
-  MCSection *Nt = MMI->getContext().getELFSection(
-      ".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
-  OutStreamer->SwitchSection(Nt);
-
-  // Emit the note header.
-  emitAlignment(Align(8));
-  OutStreamer->emitInt32(4);     // data size for "GNU\0"
-  OutStreamer->emitInt32(4 * 4); // Elf_Prop size
-  OutStreamer->emitInt32(ELF::NT_GNU_PROPERTY_TYPE_0);
-  OutStreamer->emitBytes(StringRef("GNU", 4)); // note name
-
-  // Emit the PAC/BTI properties.
-  OutStreamer->emitInt32(ELF::GNU_PROPERTY_AARCH64_FEATURE_1_AND);
-  OutStreamer->emitInt32(4);     // data size
-  OutStreamer->emitInt32(Flags); // data
-  OutStreamer->emitInt32(0);     // pad
-
-  OutStreamer->endSection(Nt);
-  OutStreamer->SwitchSection(Cur);
+  if (auto *TS = static_cast<AArch64TargetStreamer *>(
+          OutStreamer->getTargetStreamer()))
+    TS->emitNoteSection(Flags);
 }
 
 void AArch64AsmPrinter::emitFunctionHeaderComment() {
   const AArch64FunctionInfo *FI = MF->getInfo<AArch64FunctionInfo>();
   Optional<std::string> OutlinerString = FI->getOutliningStyle();
   if (OutlinerString != None)
     OutStreamer->GetCommentOS() << ' ' << OutlinerString;
 }

llvm/lib/Target/AArch64/AArch64Subtarget.h

protected:
   bool StrictAlign = false;
 
   // NegativeImmediates - transform instructions with negative immediates
   bool NegativeImmediates = true;
 
   // Enable 64-bit vectorization in SLP.
   unsigned MinVectorRegisterBitWidth = 64;
 
+  // Emitting .note.gnu.property in the assembler
+  bool MarkBTIProperty = false;
+
   bool UseAA = false;
   bool PredictableSelectIsExpensive = false;
   bool BalanceFPOps = false;
   bool CustomAsCheapAsMove = false;
   bool ExynosAsCheapAsMove = false;
   bool UsePostRAScheduler = false;
   bool Misaligned128StoreIsSlow = false;
   bool Paired128IsSlow = false;
public:
   bool hasAM() const { return HasAM; }
   bool hasAMVS() const { return HasAMVS; }
   bool hasSEL2() const { return HasSEL2; }
   bool hasPMU() const { return HasPMU; }
   bool hasTLB_RMI() const { return HasTLB_RMI; }
   bool hasFMI() const { return HasFMI; }
   bool hasRCPC_IMMO() const { return HasRCPC_IMMO; }
 
+  bool markBTIProperty() const { return MarkBTIProperty; }
+
   bool addrSinkUsingGEPs() const override {
     // Keeping GEPs inbounds is important for exploiting AArch64
     // addressing-modes in ILP32 mode.
     return useAA() || isTargetILP32();
   }
 
   bool useSmallAddressing() const {
     switch (TLInfo.getTargetMachine().getCodeModel()) {

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

#include "AArch64GenAsmMatcher.inc"
 
   AArch64AsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
                    const MCInstrInfo &MII, const MCTargetOptions &Options)
     : MCTargetAsmParser(Options, STI, MII) {
     IsILP32 = Options.getABIName() == "ilp32";
     MCAsmParserExtension::Initialize(Parser);
     MCStreamer &S = getParser().getStreamer();
     if (S.getTargetStreamer() == nullptr)
-      new AArch64TargetStreamer(S);
+      new AArch64TargetStreamer(S, &STI);
 
     // Alias .hword/.word/.[dx]word to the target-independent
     // .2byte/.4byte/.8byte directives as they have the same form and
     // semantics:
     ///  ::= (.hword | .word | .dword | .xword ) [ expression (, expression)* ]
     Parser.addAliasForDirective(".hword", ".2byte");
     Parser.addAliasForDirective(".word", ".4byte");
     Parser.addAliasForDirective(".dword", ".8byte");

llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h

 class AArch64ELFStreamer;
 }
 
 namespace llvm {
 
 class AArch64TargetStreamer : public MCTargetStreamer {
 public:
   AArch64TargetStreamer(MCStreamer &S);
+  AArch64TargetStreamer(MCStreamer &S, const MCSubtargetInfo *STI);
   ~AArch64TargetStreamer() override;
 
   void finish() override;
 
   /// Callback used to implement the ldr= pseudo.
   /// Add a new entry to the constant pool for the current section and return an
   /// MCExpr that can be used to refer to the constant pool location.
   const MCExpr *addConstantPoolEntry(const MCExpr *, unsigned Size, SMLoc Loc);
 
   /// Callback used to implemnt the .ltorg directive.
   /// Emit contents of constant pool for the current section.
   void emitCurrentConstantPool();
 
   /// Callback used to implement the .inst directive.
   virtual void emitInst(uint32_t Inst);
 
+  /// Callback used to implement the .note.gnu.property section.
+  virtual void emitNoteSection(unsigned Flags);
+
   virtual void EmitARM64WinCFIAllocStack(unsigned Size) {}
   virtual void EmitARM64WinCFISaveFPLR(int Offset) {}
   virtual void EmitARM64WinCFISaveFPLRX(int Offset) {}
   virtual void EmitARM64WinCFISaveReg(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveRegX(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveRegP(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveRegPX(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveFReg(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveFRegX(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveFRegP(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) {}
   virtual void EmitARM64WinCFISetFP() {}
   virtual void EmitARM64WinCFIAddFP(unsigned Size) {}
   virtual void EmitARM64WinCFINop() {}
   virtual void EmitARM64WinCFIPrologEnd() {}
   virtual void EmitARM64WinCFIEpilogStart() {}
   virtual void EmitARM64WinCFIEpilogEnd() {}
 
 private:
   std::unique_ptr<AssemblerConstantPools> ConstantPools;
+  const MCSubtargetInfo *STI;
 };
 
 class AArch64TargetELFStreamer : public AArch64TargetStreamer {
 private:
   AArch64ELFStreamer &getStreamer();
 
   void emitInst(uint32_t Inst) override;
 
 public:
-  AArch64TargetELFStreamer(MCStreamer &S) : AArch64TargetStreamer(S) {}
+  AArch64TargetELFStreamer(MCStreamer &S, const MCSubtargetInfo *STI)
+      : AArch64TargetStreamer(S, STI) {}
 };
 
 class AArch64TargetWinCOFFStreamer : public llvm::AArch64TargetStreamer {
 private:
   // True if we are processing SEH directives in an epilogue.
   bool InEpilogCFI = false;
 
   // Symbol of the current epilog for which we are processing SEH directives.
   MCSymbol *CurrentEpilog = nullptr;
 public:
-  AArch64TargetWinCOFFStreamer(llvm::MCStreamer &S)
-    : AArch64TargetStreamer(S) {}
+  AArch64TargetWinCOFFStreamer(llvm::MCStreamer &S, const MCSubtargetInfo *STI)
+      : AArch64TargetStreamer(S, STI) {}
 
   // The unwind codes on ARM64 Windows are documented at
   // https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
   void EmitARM64WinCFIAllocStack(unsigned Size) override;
   void EmitARM64WinCFISaveFPLR(int Offset) override;
   void EmitARM64WinCFISaveFPLRX(int Offset) override;
   void EmitARM64WinCFISaveReg(unsigned Reg, int Offset) override;
   void EmitARM64WinCFISaveRegX(unsigned Reg, int Offset) override;

llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp

 //===- AArch64TargetStreamer.cpp - AArch64TargetStreamer class ------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the AArch64TargetStreamer class.
 //
 //===----------------------------------------------------------------------===//
 
 #include "AArch64TargetStreamer.h"
+#include "AArch64Subtarget.h"
+#include "llvm/BinaryFormat/ELF.h"
 #include "llvm/MC/ConstantPools.h"
+#include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCSection.h"
+#include "llvm/MC/MCSectionELF.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 
 using namespace llvm;
 
 //
 // AArch64TargetStreamer Implemenation
 //
 AArch64TargetStreamer::AArch64TargetStreamer(MCStreamer &S)
-    : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
+    : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()),
+      STI(nullptr) {}
+
+AArch64TargetStreamer::AArch64TargetStreamer(MCStreamer &S,
+                                             const MCSubtargetInfo *STI)
+    : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()),
+      STI(STI) {}
 
 AArch64TargetStreamer::~AArch64TargetStreamer() = default;
 
 // The constant pool handling is shared by all AArch64TargetStreamer
 // implementations.
 const MCExpr *AArch64TargetStreamer::addConstantPoolEntry(const MCExpr *Expr,
                                                           unsigned Size,
                                                           SMLoc Loc) {
   return ConstantPools->addEntry(Streamer, Expr, Size, Loc);
 }
 
 void AArch64TargetStreamer::emitCurrentConstantPool() {
   ConstantPools->emitForCurrentSection(Streamer);
 }
 
-// finish() - write out any non-empty assembler constant pools.
-void AArch64TargetStreamer::finish() { ConstantPools->emitAll(Streamer); }
+// finish() - write out any non-empty assembler constant pools and
+//   write out note.gnu.properties if need.
+void AArch64TargetStreamer::finish() {
+  ConstantPools->emitAll(Streamer);
+  if (!STI)
+    return;
+
+  if (STI->getFeatureBits()[AArch64::FeatureEmitNoteBTIProperty]) {
+    emitNoteSection(ELF::GNU_PROPERTY_AARCH64_FEATURE_1_BTI);
+  }
+}
+
+void AArch64TargetStreamer::emitNoteSection(unsigned Flags) {
+  if (Flags == 0) {
+    return;
+  }
+  MCStreamer &OutStreamer = getStreamer();
+  MCContext &Context = OutStreamer.getContext();
+  // Emit a .note.gnu.property section with the flags.
+  MCSection *Cur = OutStreamer.getCurrentSectionOnly();
+  MCSectionELF *Nt = Context.getELFSection(".note.gnu.property", ELF::SHT_NOTE,
+                                           ELF::SHF_ALLOC);
+  if (Nt->isRegistered()) {
+    SMLoc Loc;
+    Context.reportWarning(
+        Loc,
+        "The .note.gnu.property is not emitted because it is already present.");
+    return;
+  }
+
+  OutStreamer.SwitchSection(Nt);
+
+  // Emit the note header.
+  OutStreamer.emitValueToAlignment(Align(8).value());
+  OutStreamer.emitIntValue(4, 4);     // data size for "GNU\0"
+  OutStreamer.emitIntValue(4 * 4, 4); // Elf_Prop size
+  OutStreamer.emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4);
+  OutStreamer.emitBytes(StringRef("GNU", 4)); // note name
+
+  // Emit the PAC/BTI properties.
+  OutStreamer.emitIntValue(ELF::GNU_PROPERTY_AARCH64_FEATURE_1_AND, 4);
+  OutStreamer.emitIntValue(4, 4);     // data size
+  OutStreamer.emitIntValue(Flags, 4); // data
+  OutStreamer.emitIntValue(0, 4);     // pad
+
+  OutStreamer.endSection(Nt);
+  OutStreamer.SwitchSection(Cur);
+}
 
 void AArch64TargetStreamer::emitInst(uint32_t Inst) {
   char Buffer[4];
 
   // We can't just use EmitIntValue here, as that will swap the
   // endianness on big-endian systems (instructions are always
   // little-endian).
   for (unsigned I = 0; I < 4; ++I) {
     Buffer[I] = uint8_t(Inst);
     Inst >>= 8;
   }
 
   getStreamer().emitBytes(StringRef(Buffer, 4));
 }
 
 namespace llvm {
 
 MCTargetStreamer *
 createAArch64ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
   const Triple &TT = STI.getTargetTriple();
   if (TT.isOSBinFormatELF())
-    return new AArch64TargetELFStreamer(S);
+    return new AArch64TargetELFStreamer(S, &STI);
   if (TT.isOSBinFormatCOFF())
-    return new AArch64TargetWinCOFFStreamer(S);
+    return new AArch64TargetWinCOFFStreamer(S, &STI);
   return nullptr;
 }
 
 } // end namespace llvm