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pbarrio (Pablo Barrio)
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User Since
Jan 15 2015, 3:04 AM (204 w, 4 d)

Recent Activity

Mon, Dec 3

pbarrio updated the diff for D54629: [AArch64] Add command-line option for SSBS.

Rebased onto master after a recent refactoring of the AArch64 target parser.

Mon, Dec 3, 5:58 AM

Tue, Nov 27

pbarrio added a comment to D54629: [AArch64] Add command-line option for SSBS.

Thank you for the review, Sam :)

Tue, Nov 27, 11:09 AM
pbarrio created D54961: [AArch64] Add command-line option for SSBS.
Tue, Nov 27, 11:06 AM

Mon, Nov 19

pbarrio added a comment to D54629: [AArch64] Add command-line option for SSBS.

The Armv8.5-A specification is available here: https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools

Mon, Nov 19, 4:22 AM

Nov 16 2018

pbarrio created D54629: [AArch64] Add command-line option for SSBS.
Nov 16 2018, 5:20 AM

Mar 1 2018

pbarrio added a comment to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

Buildbot failing here: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap-msan/builds/2998

Mar 1 2018, 2:59 AM

Feb 28 2018

pbarrio added inline comments to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.
Feb 28 2018, 6:17 AM

Feb 23 2018

pbarrio added a comment to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

If nobody does it before, I'll give it a try early next week.

Feb 23 2018, 8:34 AM

Feb 15 2018

pbarrio added a comment to D43342: [ARM] Fix redirect in inline assembly test.

I'll commit this fix now to prevent other buildbots to fail.

Feb 15 2018, 11:14 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

Related fix for a silly errata in one of the tests that is breaking some Windows buildbots:

Feb 15 2018, 11:11 AM
pbarrio added a reviewer for D43342: [ARM] Fix redirect in inline assembly test: apilipenko.
Feb 15 2018, 10:23 AM
pbarrio created D43342: [ARM] Fix redirect in inline assembly test.
Feb 15 2018, 10:18 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

Committed now. @rengolin many thanks for the review!

Feb 15 2018, 6:49 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

What about 32-bit integers?

Feb 15 2018, 1:54 AM

Feb 13 2018

pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

There is still the possibility that someone tries to use 't' for a vector of two doubles. Only single-precision is allowed in vector operations for 32-bit architectures, so doing something like this would be illegal:

Feb 13 2018, 7:08 AM
pbarrio updated the diff for D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

Added tests for int vectors. Allowing integers to go to FP/vector registers is
useful because FP/int conversion instructions (i.e. VCVT) need that.

Feb 13 2018, 6:51 AM

Feb 12 2018

pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

AFAICS, the current approach just checks the size of the type, not the size of the sub-type. f64 or even integer types could still leak in, no?

To prove they're not, we need tests making sure they break if you try.

Feb 12 2018, 10:45 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

I was wrong when I said the GNU modifiers are q/e, which actually makes things easier. The correct operand modifiers to select a quad/double vector register in GCC are q/P. These already work in LLVM (they are just ignored according to the documentation and also my local testing). So, I think there is no need for an additional patch; we should be able to handle inline assembly written for GCC with the 't' constraint.

I'm not sure I get this. Are you saying this patch can be abandoned?

Feb 12 2018, 10:25 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

This goes against the documentation, which only supports sN:
https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints

Though it's not completely wrong to support the low part of D/Q registers, I'm not sure the code in question is making sure this is true.

Feb 12 2018, 10:18 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

This behaviour still differs from that of GCC but I think it is actually more correct, since LLVM picks up the right register type based on the datatype of x, while GCC would need an extra operand modifier to achieve the same result

If we're not going to match gcc, what's the point?

This patch allows specifying the lower Q/D vector registers from inline assembly, which is something that can be done in GCC but not in LLVM. In order to mimic the GCC behaviour completely, we should also add support for the q/e/f operand modifiers with the 't' constraint. These modifiers are already allowed with the 'w' constraint for the complete vector register set, so it shouldn't be hard to do. However, I think it should be a separate patch with additional testing.

Feb 12 2018, 9:59 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

Ping

Feb 12 2018, 7:28 AM

Feb 7 2018

pbarrio added inline comments to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.
Feb 7 2018, 6:46 AM
pbarrio added a comment to D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.

This behaviour still differs from that of GCC but I think it is actually more correct, since LLVM picks up the right register type based on the datatype of x, while GCC would need an extra operand modifier to achieve the same result

If we're not going to match gcc, what's the point?

Feb 7 2018, 3:23 AM

Feb 6 2018

pbarrio created D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint.
Feb 6 2018, 6:46 AM

Feb 1 2018

pbarrio added a comment to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

Sorry, I missed the sanitizer failure in yesterday's buildbot message and thought it wasn't related to this patch. I will leave some time for @thebolt to fix it, otherwise maybe I can take a look.

Feb 1 2018, 2:55 AM

Jan 31 2018

pbarrio added a comment to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

Committed now. Thanks for the patch @thebolt!

Jan 31 2018, 5:25 AM
pbarrio added a comment to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

I'll do it.

Jan 31 2018, 3:37 AM

Jan 29 2018

pbarrio accepted D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

LGTM now. In other circumstances, I would wait for someone more experienced than me, but this is a small peephole optimization. I've also tested the patch and it works correctly, so I think it has very little risk.

Jan 29 2018, 5:07 AM

Jan 26 2018

pbarrio requested changes to D42574: [ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations.

The logic & testing LGTM. Just a couple of coding standard nits.

Jan 26 2018, 12:41 PM

Jan 23 2018

pbarrio added a comment to D42235: [AArch64] Avoid unnecessary vector byte-swapping in big-endian.

Waiting a bit just in case there's extra feedback for the last change. I will commit this patch later today.

Jan 23 2018, 6:31 AM

Jan 22 2018

pbarrio updated the diff for D42235: [AArch64] Avoid unnecessary vector byte-swapping in big-endian.

VT should be a vector in addTypeForNEON, so the check can be an assert
instead of a proper test in the conditional.

Jan 22 2018, 11:44 AM
pbarrio added a comment to D42235: [AArch64] Avoid unnecessary vector byte-swapping in big-endian.

Thanks for the suggestion, very helpful :)

Jan 22 2018, 4:07 AM
pbarrio updated the diff for D42235: [AArch64] Avoid unnecessary vector byte-swapping in big-endian.

Instead of an ugly switch, reuse already-existing functionality in LLVM to do
the conversion of FP vector types into int vector types.

Jan 22 2018, 4:06 AM

Jan 18 2018

pbarrio created D42235: [AArch64] Avoid unnecessary vector byte-swapping in big-endian.
Jan 18 2018, 2:33 AM

Jan 17 2018

pbarrio added inline comments to D41863: [AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian.
Jan 17 2018, 5:14 AM
pbarrio updated the diff for D41863: [AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian.

Fixed big-endian bitconvert patterns and extensive testing for half-float vectors.

Jan 17 2018, 4:49 AM

Jan 16 2018

pbarrio updated the diff for D41863: [AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian.

I have fixed the bug as olista01 suggested, which is more straightforward than
my previous fix.

Jan 16 2018, 7:07 AM

Jan 15 2018

pbarrio added a comment to D41863: [AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian.

Hi Sjoerd, thanks for the review. I have attached some thoughts on your comments and I will upload a new patch soon.

Jan 15 2018, 10:57 AM

Jan 9 2018

pbarrio created D41863: [AArch64] Fix incorrect LD1 of 16-bit FP vectors in big endian.
Jan 9 2018, 7:25 AM

Dec 4 2017

pbarrio added a comment to D40706: Fix function pointer tail calls in armv8-M.base.

@efriedma , @olista01 , thank you for the reviews. I will commit upstream now.

Dec 4 2017, 5:13 AM

Dec 1 2017

pbarrio added a comment to D40706: Fix function pointer tail calls in armv8-M.base.

I have also updated the existing tests and added a couple more.

Dec 1 2017, 10:08 AM
pbarrio updated the diff for D40706: Fix function pointer tail calls in armv8-M.base.

Use !isa<GlobalAddressSDNode> to check if the call is through a function pointer

Dec 1 2017, 10:06 AM
pbarrio created D40706: Fix function pointer tail calls in armv8-M.base.
Dec 1 2017, 2:34 AM

Nov 17 2016

pbarrio added a comment to D26748: [ARM] Relax restriction on variadic functions for tailcall optimization.

Thanks all for the reviews!

Nov 17 2016, 3:05 AM
pbarrio updated the diff for D26748: [ARM] Relax restriction on variadic functions for tailcall optimization.

Cleaned up tests as per Renato's comments.

Nov 17 2016, 2:59 AM

Nov 16 2016

pbarrio updated the diff for D26748: [ARM] Relax restriction on variadic functions for tailcall optimization.

More testing: add tests for AAPCS and for floating-point arguments to variadic/non-variadic functions.

Nov 16 2016, 12:06 PM
pbarrio added a comment to D26748: [ARM] Relax restriction on variadic functions for tailcall optimization.

Could you have a look at this patch? I see no reason to restrict the tail call optimizations to variadic functions: the AAPCS restrictions seem to be already checked for non-variadic functions. The LLVM regression tests passed, and I have also tested with a few benchmarks and they all seem to work fine.

Nov 16 2016, 7:20 AM
pbarrio retitled D26748: [ARM] Relax restriction on variadic functions for tailcall optimization from to [ARM] Relax restriction on variadic functions for tailcall optimization.
Nov 16 2016, 7:14 AM

Nov 11 2016

pbarrio updated the diff for D26450: [JumpThreading] Prevent non-deterministic use lists.

Traverse use list instead of user list to naturally avoid duplicates. Commit message modified accordingly.

Nov 11 2016, 6:07 AM
pbarrio added a comment to D26450: [JumpThreading] Prevent non-deterministic use lists.

Sorry, forget what I said. I didn't get what you were trying to do at first (I've never used the "uses"). I will do the change, as this makes more clear that the operand we are interested in is the condition (i.e. operand 0).

Nov 11 2016, 1:54 AM

Nov 10 2016

pbarrio added a comment to D26450: [JumpThreading] Prevent non-deterministic use lists.

I have investigated the -preserve-ll-uselistorder option. It sets option "ShouldPreserveUseListOrder" to true in the module printer. According to the documentation:

Nov 10 2016, 5:55 AM

Nov 9 2016

pbarrio added a comment to D26450: [JumpThreading] Prevent non-deterministic use lists.

Could you have a look at this fix as per your comments in D26391?

Nov 9 2016, 6:42 AM
pbarrio retitled D26450: [JumpThreading] Prevent non-deterministic use lists from to [JumpThreading] Prevent non-deterministic use lists.
Nov 9 2016, 6:38 AM
pbarrio added a comment to D26391: [JumpThreading] Unfold selects that depend on the same condition.

Thanks for the comment @efriedma. I committed before I saw it, but I agree with you that this change will affect determinism of the use-lists when two of the selects on the list depend on each other. I will create a separate revision for the change and add you as reviewer.

Nov 9 2016, 3:30 AM

Nov 8 2016

pbarrio added a comment to D26391: [JumpThreading] Unfold selects that depend on the same condition.

@sebpop , thanks for the quick response!

Nov 8 2016, 6:57 AM
pbarrio added a comment to D26391: [JumpThreading] Unfold selects that depend on the same condition.

Could you review this patch to JumpThreading? This is an update to D25477, which was reverted two weeks ago as it was breaking LNT and some bootstrap buildbots.

Nov 8 2016, 5:00 AM
pbarrio retitled D26391: [JumpThreading] Unfold selects that depend on the same condition from to [JumpThreading] Unfold selects that depend on the same condition.
Nov 8 2016, 4:46 AM

Oct 21 2016

pbarrio updated the diff for D25477: [JumpThreading] Unfold selects that depend on the same condition.

Thanks all for the reviews. Could you please review the requested formatting changes and approve if appropriate?

Oct 21 2016, 8:31 AM

Oct 17 2016

pbarrio added a comment to D25477: [JumpThreading] Unfold selects that depend on the same condition.

James, thanks for the review and also for adding the new reviewers. I will change the lower/upper case problem with the next round of comments, when I get feedback from others.

Oct 17 2016, 8:53 AM

Oct 11 2016

pbarrio retitled D25477: [JumpThreading] Unfold selects that depend on the same condition from to [JumpThreading] Unfold selects that depend on the same condition.
Oct 11 2016, 8:33 AM

Sep 13 2016

pbarrio added a comment to D24337: Fix the Thumb test for vfloat intrinsics.

Renato, James, thank you very much for the review.

Sep 13 2016, 2:43 AM

Sep 12 2016

pbarrio updated the diff for D24337: Fix the Thumb test for vfloat intrinsics.

Removed vector float intrinsic test from this review. That
part of the patch has now been committed and the review can
be followed in https://reviews.llvm.org/D24398

Sep 12 2016, 8:13 AM

Sep 9 2016

pbarrio added a comment to D24337: Fix the Thumb test for vfloat intrinsics.

On second thoughts, I have tested with a modern gcc and it marks all functions with either .thumb or .arm (equivalent to .code 16/32). So, essentially, that behaviour is what this patch suggests. Another thing that surprised me is that Thumb appears to be the default, contrary to the LLVM default which is ARM.

Sep 9 2016, 8:18 AM
pbarrio added a comment to D24398: Fix the Thumb test for vfloat intrinsics.

Hello James,

Sep 9 2016, 8:08 AM
pbarrio retitled D24398: Fix the Thumb test for vfloat intrinsics from to Fix the Thumb test for vfloat intrinsics.
Sep 9 2016, 8:05 AM

Sep 8 2016

pbarrio added a comment to D24337: Fix the Thumb test for vfloat intrinsics.

The changes to the vfloatintrinsics tests are independent from the functional change to add ".code 32", although I discovered them while working on this bug. I will close this review, and create a separate one with the test changes only.

Sep 8 2016, 10:20 AM
pbarrio added a comment to D24337: Fix the Thumb test for vfloat intrinsics.

Ah, sorry. They are two different changes in my tree, and I thought arcanist would preserve that but it didn't. I will make sure that they are submitted as separate patches.

Sep 8 2016, 5:35 AM
pbarrio retitled D24337: Fix the Thumb test for vfloat intrinsics from to Fix the Thumb test for vfloat intrinsics.
Sep 8 2016, 4:48 AM

Sep 7 2016

pbarrio updated the diff for D24133: [ARM] Lower UDIV+UREM to UDIV+MLS (and the same for SREM).

Additional checks added to the new tests.

Sep 7 2016, 3:49 AM
pbarrio added a comment to D24133: [ARM] Lower UDIV+UREM to UDIV+MLS (and the same for SREM).

Right, it makes sense. I didn't know that these sort of optimizations were also undertaken in the selection DAG.

Sep 7 2016, 2:41 AM

Sep 6 2016

pbarrio updated the diff for D24133: [ARM] Lower UDIV+UREM to UDIV+MLS (and the same for SREM).

Improved testing:

Sep 6 2016, 4:03 AM

Sep 1 2016

pbarrio retitled D24133: [ARM] Lower UDIV+UREM to UDIV+MLS (and the same for SREM) from to [ARM] Lower UDIV+UREM to UDIV+MLS (and the same for SREM).
Sep 1 2016, 7:46 AM

Aug 25 2016

pbarrio added a comment to D23847: [ARM] Handle empty functions with debug info in load/store opt pass.

Sorry and thanks!

Aug 25 2016, 2:24 AM

Aug 24 2016

pbarrio added a comment to D23847: [ARM] Handle empty functions with debug info in load/store opt pass.

Hello Renato, Duncan, James,

Aug 24 2016, 12:03 PM
pbarrio retitled D23847: [ARM] Handle empty functions with debug info in load/store opt pass from to [ARM] Handle empty functions with debug info in load/store opt pass.
Aug 24 2016, 11:59 AM

Jun 23 2016

pbarrio updated the diff for D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Using std::max() now. Near that, I also made an implicit cast explicit, just for readability.

Jun 23 2016, 7:02 AM

Jun 22 2016

pbarrio updated the diff for D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Second round of changes addressed. Thanks!

Jun 22 2016, 11:55 AM
pbarrio added inline comments to D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).
Jun 22 2016, 8:51 AM
pbarrio added inline comments to D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).
Jun 22 2016, 8:47 AM

Jun 21 2016

pbarrio updated the diff for D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Same fix for another test.

Jun 21 2016, 10:04 AM
pbarrio updated the diff for D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Small fix for one of the tests

Jun 21 2016, 9:48 AM
pbarrio updated the diff for D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Addressed concerns about refactoring, comments and testing

Jun 21 2016, 9:01 AM

Jun 20 2016

pbarrio added a comment to D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Hello mcrosier, jmolloy, rengolin, would you have a few minutes to review this patch?

Jun 20 2016, 2:18 AM

Jun 15 2016

pbarrio added a comment to D21369: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Oh ok, I was told that adding llvm-commits after the revision is created doesn't send the e-mail to the list. I will try that next time :)

Jun 15 2016, 5:09 AM
pbarrio retitled D21372: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x) from to [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).
Jun 15 2016, 4:17 AM
pbarrio abandoned D21369: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).
Jun 15 2016, 4:08 AM
pbarrio added a comment to D21369: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).

Abandoning this review as I forgot to add the LLVM list.

Jun 15 2016, 4:04 AM
pbarrio retitled D21369: [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x) from to [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x).
Jun 15 2016, 3:55 AM

Mar 15 2016

pbarrio updated D18193: [ARM] Add more ARM Cortex-R8 regression tests to Clang..
Mar 15 2016, 11:20 AM
pbarrio retitled D18193: [ARM] Add more ARM Cortex-R8 regression tests to Clang. from to [ARM] Add more ARM Cortex-R8 regression tests to Clang..
Mar 15 2016, 11:19 AM

Mar 10 2016

pbarrio added a comment to D18052: Add tests for ARM Cortex-R8.

Hello, could you please review these tests for Cortex-R8?

Mar 10 2016, 10:46 AM
pbarrio retitled D18052: Add tests for ARM Cortex-R8 from to Add tests for ARM Cortex-R8.
Mar 10 2016, 10:44 AM
pbarrio abandoned D6996: Enable inlining of recursive functions..

Work discontinued.

Mar 10 2016, 10:33 AM

Jan 28 2015

pbarrio updated the diff for D6996: Enable inlining of recursive functions..

Thank you James,

Jan 28 2015, 3:24 AM

Jan 21 2015

pbarrio added a comment to D6996: Enable inlining of recursive functions..

Hello Yin, thank you very much for looking at the code.

Jan 21 2015, 10:41 AM

Jan 15 2015

pbarrio updated the diff for D6996: Enable inlining of recursive functions..

James, thank you for the review,

Jan 15 2015, 9:58 AM
pbarrio updated D6996: Enable inlining of recursive functions..
Jan 15 2015, 4:45 AM
pbarrio updated subscribers of D6996: Enable inlining of recursive functions..
Jan 15 2015, 4:44 AM
pbarrio retitled D6996: Enable inlining of recursive functions. from to Enable inlining of recursive functions..
Jan 15 2015, 4:07 AM