chill (Momchil Velikov)
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User Since: May 24 2017, 3:29 AM (108 w, 5 d)

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Today

chill added a reviewer for D63707: [AArch64] Define ETE and TRBE system registers: t.p.northover.

Mon, Jun 24, 3:04 AM · Restricted Project

chill created D63707: [AArch64] Define ETE and TRBE system registers.

Mon, Jun 24, 2:58 AM · Restricted Project

Mon, Jun 17

chill accepted D63006: [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto.

LGTM. r17 and r18 are be clobbered by a calls, according to AAPCS-64 (5.1.1) and I couldn't find any indication that some Apple ABI would deviate from that.

Mon, Jun 17, 3:50 AM · Restricted Project, Restricted Project

chill added inline comments to D61650: [AsmPrinter] Make EmitLinkage and EmitVisibility public.

Mon, Jun 17, 2:42 AM · Restricted Project

Mon, Jun 3

chill accepted D62602: [AArch64][SVE2] Add CPU and arch directive tests.

Mon, Jun 3, 3:21 AM · Restricted Project

Fri, May 31

chill added inline comments to D62602: [AArch64][SVE2] Add CPU and arch directive tests.

Fri, May 31, 3:26 AM · Restricted Project

Thu, May 30

chill added inline comments to D62602: [AArch64][SVE2] Add CPU and arch directive tests.

Thu, May 30, 7:25 AM · Restricted Project

chill accepted D62601: [AArch64][SVE2] Asm: support WHILE instructions.

Thu, May 30, 7:02 AM · Restricted Project

chill accepted D62600: [AArch64][SVE2] Asm: support TBL/TBX instructions.

Thu, May 30, 6:24 AM · Restricted Project

chill accepted D62599: [AArch64][SVE2] Asm: support SVE2 store instructions.

LGTM

Thu, May 30, 2:49 AM · Restricted Project

Wed, May 29

chill added inline comments to D62599: [AArch64][SVE2] Asm: support SVE2 store instructions.

Wed, May 29, 10:49 AM · Restricted Project

chill accepted D62518: [AArch64][SVE2] Asm: add ext (immediate offset, constructive) instruction.

Wed, May 29, 9:17 AM · Restricted Project

Tue, May 28

chill accepted D62386: [AArch64][SVE2] Asm: support Floating Point Widening Multiply-Add.

LGTM. But, please, consider the extra tests.

Tue, May 28, 1:55 AM · Restricted Project

chill accepted D62383: [AArch64][SVE2] Asm: support SVE2 Floating Point Pairwise Group.

Tue, May 28, 1:48 AM · Restricted Project

May 24 2019

chill added inline comments to D62386: [AArch64][SVE2] Asm: support Floating Point Widening Multiply-Add.

May 24 2019, 9:29 AM · Restricted Project

chill added inline comments to D62386: [AArch64][SVE2] Asm: support Floating Point Widening Multiply-Add.

May 24 2019, 8:06 AM · Restricted Project

chill added inline comments to D62383: [AArch64][SVE2] Asm: support SVE2 Floating Point Pairwise Group.

May 24 2019, 7:11 AM · Restricted Project

chill accepted D62382: [AArch64][SVE2] Asm: support SVE2 Floating Point Convert Group.

May 24 2019, 6:27 AM · Restricted Project

May 23 2019

chill accepted D62306: [AArch64][SVE2] Asm: support SVE2 Histogram Computation Groups.

May 23 2019, 10:33 AM · Restricted Project

chill accepted D62304: [AArch64][SVE2] Asm: support SVE2 Misc Group.

May 23 2019, 8:57 AM · Restricted Project

chill accepted D62130: [AArch64][SVE2] Asm: add saturating add/sub instructions.

May 23 2019, 2:51 AM · Restricted Project

chill accepted D62292: [AArch64][SVE2] Asm: fix overlapping bit.

May 23 2019, 2:16 AM · Restricted Project

May 22 2019

chill added inline comments to D62130: [AArch64][SVE2] Asm: add saturating add/sub instructions.

May 22 2019, 7:59 AM · Restricted Project

May 10 2019

chill committed rGc396f09ce96e: Adjust MachineScheduler to use ProcResource counts (authored by chill).

Adjust MachineScheduler to use ProcResource counts

May 10 2019, 9:53 AM

chill committed rL360441: Adjust MachineScheduler to use ProcResource counts.

Adjust MachineScheduler to use ProcResource counts

May 10 2019, 9:53 AM

chill closed D51160: Adjust MIScheduler to use ProcResource counts.

May 10 2019, 9:53 AM · Restricted Project

May 9 2019

chill accepted D61381: [ARM][CGP] Guard against signext args and sitofp.

May 9 2019, 3:47 AM · Restricted Project

chill added inline comments to D61381: [ARM][CGP] Guard against signext args and sitofp.

May 9 2019, 2:47 AM · Restricted Project

May 2 2019

chill added inline comments to D51160: Adjust MIScheduler to use ProcResource counts.

May 2 2019, 4:00 AM · Restricted Project

chill added a comment to D51160: Adjust MIScheduler to use ProcResource counts.

In D51160#1442763, @fhahn wrote:

Do you have any benchmark data you could share with this patch? I am curious what the impact is and if there are any regressions.

May 2 2019, 3:59 AM · Restricted Project

chill updated the diff for D51160: Adjust MIScheduler to use ProcResource counts.

Thanks for the feedback. Here's an updated diff.

May 2 2019, 3:53 AM · Restricted Project

Mar 25 2019

chill updated the diff for D51160: Adjust MIScheduler to use ProcResource counts.

Updated regression tests.

Mar 25 2019, 4:53 PM · Restricted Project

Feb 25 2019

chill added inline comments to D58490: [ARM] Be super conservative about atomics.

Feb 25 2019, 1:57 AM · Restricted Project

Oct 11 2018

chill commandeered D51160: Adjust MIScheduler to use ProcResource counts.

Taking over as Jackson's internship ended in the meantime.

Oct 11 2018, 8:33 AM · Restricted Project

Oct 8 2018

chill added a comment to D51160: Adjust MIScheduler to use ProcResource counts.

Ping?

Oct 8 2018, 6:48 AM · Restricted Project

Sep 28 2018

chill added a comment to D51160: Adjust MIScheduler to use ProcResource counts.

PIng?

Sep 28 2018, 9:34 AM · Restricted Project

Sep 6 2018

chill added a reviewer for D51494: Fix unwind information for floating point registers: compnerd.

Sep 6 2018, 6:29 AM

Aug 30 2018

chill edited reviewers for D51494: Fix unwind information for floating point registers, added: chill; removed: momchil.velikov.

Aug 30 2018, 10:02 AM

Aug 29 2018

chill added inline comments to D51160: Adjust MIScheduler to use ProcResource counts.

Aug 29 2018, 2:26 AM · Restricted Project

chill added inline comments to D51160: Adjust MIScheduler to use ProcResource counts.

Aug 29 2018, 2:05 AM · Restricted Project

Aug 15 2018

chill committed rL339766: Use .cpp extension for certain tests instead of .cc.

Use .cpp extension for certain tests instead of .cc

Aug 15 2018, 5:23 AM

chill committed rC339766: Use .cpp extension for certain tests instead of .cc.

Use .cpp extension for certain tests instead of .cc

Aug 15 2018, 5:22 AM

Jul 30 2018

chill committed rL338279: [ARM, AArch64]: Use unadjusted alignment when passing composites as arguments.

[ARM, AArch64]: Use unadjusted alignment when passing composites as arguments

Jul 30 2018, 10:49 AM

chill committed rC338279: [ARM, AArch64]: Use unadjusted alignment when passing composites as arguments.

[ARM, AArch64]: Use unadjusted alignment when passing composites as arguments

Jul 30 2018, 10:49 AM

chill closed D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Jul 30 2018, 10:48 AM

chill accepted D49984: Fix uninitialized read in ARM's PrintAsmOperand.

LGTM.

Jul 30 2018, 9:30 AM

chill added inline comments to D49984: Fix uninitialized read in ARM's PrintAsmOperand.

Jul 30 2018, 8:13 AM

chill added inline comments to D49984: Fix uninitialized read in ARM's PrintAsmOperand.

Jul 30 2018, 7:33 AM

Jul 27 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Thanks for pointing this!

Jul 27 2018, 4:02 AM

chill updated the diff for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Fixed to properly examine the canonical type when getting it's unadjusted alignment.

Jul 27 2018, 4:01 AM

Jul 23 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

Jul 23 2018, 10:23 AM

Jul 20 2018

chill accepted D49465: [ARM] Enable tail calls for all Thumb1 targets..

LGTM. test/CodeGen/Thumb/PR35481.ll needs an update though ( and a typo there CHECK-V47)

Jul 20 2018, 3:31 AM

chill accepted D49459: [ARM] Avoid spilling lr with Thumb1 tail calls..

Jul 20 2018, 3:28 AM

Jul 18 2018

chill added inline comments to D49459: [ARM] Avoid spilling lr with Thumb1 tail calls..

Jul 18 2018, 6:50 AM

Jul 16 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

Jul 16 2018, 1:37 AM

Jul 9 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

Jul 9 2018, 3:48 PM

Jul 5 2018

chill accepted D48916: Fix setting of empty implicit-section-name attribute for functions affected by '#pragma clang section'.

LGTM. Please, wait a couple of days before committing to give a chance to someone else to weigh in.

Jul 5 2018, 12:51 AM

Jul 4 2018

chill added inline comments to D48916: Fix setting of empty implicit-section-name attribute for functions affected by '#pragma clang section'.

Jul 4 2018, 1:35 AM

Jul 2 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

Jul 2 2018, 1:40 AM

Jun 25 2018

chill updated the diff for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Update: use "unadjusted alignment" instead of "natural alignment", rename things accordingly.

Jun 25 2018, 6:31 AM

chill added inline comments to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Jun 25 2018, 2:14 AM

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

In D46013#1140336, @t.p.northover wrote:

I'm fine with the ABI changes, but I'm not very convinced by the "NaturalAlignment" name.

Jun 25 2018, 2:14 AM

Jun 21 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

Jun 21 2018, 7:42 AM

Jun 13 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

Jun 13 2018, 3:09 AM

Jun 6 2018

chill updated the diff for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Update: refactor a bit to not impose size overhead on targets, which don't use natural alignment.

Jun 6 2018, 8:51 AM

Jun 1 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

In D46013#1118014, @efriedma wrote:

I'm not sure Apple will want to mess with their ABI like this... adding some reviewers.

Jun 1 2018, 1:09 PM

chill updated the diff for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Update:

fix only APCS, don't touch other ABIs
misc other

Jun 1 2018, 1:07 PM

May 31 2018

chill updated the diff for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Update:

similar changes needed for AArch64
added/updated tests

May 31 2018, 2:29 AM

May 21 2018

chill committed rC332843: [Sema] Fix incorrect packed aligned structure layout.

[Sema] Fix incorrect packed aligned structure layout

May 21 2018, 7:32 AM

chill committed rL332843: [Sema] Fix incorrect packed aligned structure layout.

[Sema] Fix incorrect packed aligned structure layout

May 21 2018, 7:32 AM

chill closed D46439: [Sema] Fix incorrect packed aligned structure layout.

May 21 2018, 7:32 AM

chill added a comment to D46439: [Sema] Fix incorrect packed aligned structure layout.

Thanks a lot!

May 21 2018, 7:27 AM

May 15 2018

chill added a comment to D46439: [Sema] Fix incorrect packed aligned structure layout.

Ping?

May 15 2018, 3:47 AM

May 8 2018

chill added a comment to D46439: [Sema] Fix incorrect packed aligned structure layout.

Update: updated comment, added a test.

May 8 2018, 7:28 AM

chill updated the diff for D46439: [Sema] Fix incorrect packed aligned structure layout.

May 8 2018, 7:26 AM

May 4 2018

chill added a child revision for D46439: [Sema] Fix incorrect packed aligned structure layout: D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

May 4 2018, 9:51 AM

chill added a parent revision for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments: D46439: [Sema] Fix incorrect packed aligned structure layout.

May 4 2018, 9:51 AM

chill removed a parent revision for D46439: [Sema] Fix incorrect packed aligned structure layout: D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

May 4 2018, 9:51 AM

chill removed a child revision for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments: D46439: [Sema] Fix incorrect packed aligned structure layout.

May 4 2018, 9:51 AM

chill added a parent revision for D46439: [Sema] Fix incorrect packed aligned structure layout: D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

May 4 2018, 9:49 AM

chill added a child revision for D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments: D46439: [Sema] Fix incorrect packed aligned structure layout.

May 4 2018, 9:49 AM

chill created D46439: [Sema] Fix incorrect packed aligned structure layout.

May 4 2018, 9:45 AM

May 3 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

In D46013#1084440, @efriedma wrote:

I'd like to see some tests for __attribute((packed)).

May 3 2018, 10:07 AM

May 1 2018

chill added a comment to D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Ping?

May 1 2018, 2:26 AM

Apr 24 2018

chill created D46013: [ARM] Conform to AAPCS when passing overaligned composites as arguments.

Apr 24 2018, 7:58 AM

Apr 18 2018

chill committed rL330253: Add tests for shrink wrapping and VLAs.

Add tests for shrink wrapping and VLAs

Apr 18 2018, 6:40 AM

chill closed D45727: Add tests for shrink wrapping and VLAs.

Apr 18 2018, 6:40 AM

chill updated the diff for D45727: Add tests for shrink wrapping and VLAs.

Apr 18 2018, 6:37 AM

chill updated the diff for D45727: Add tests for shrink wrapping and VLAs.

Apr 18 2018, 3:51 AM

Apr 17 2018

chill created D45727: Add tests for shrink wrapping and VLAs.

Apr 17 2018, 10:24 AM

chill committed rL330193: Revert "Fix incorrect choice of callee-saved registers save/restore points….

Revert "Fix incorrect choice of callee-saved registers save/restore points…

Apr 17 2018, 9:34 AM

chill committed rL330192: Fix incorrect choice of callee-saved registers save/restore points (take 2).

Fix incorrect choice of callee-saved registers save/restore points (take 2)

Apr 17 2018, 9:03 AM

chill added a comment to D45524: Fix incorrect choice of callee-saved registers save/restore points.

In D45524#1069899, @thegameg wrote:

IIRC, there was a test case in the original patch but I can't see it in the landed commit. Any idea what happened?

Apr 17 2018, 9:00 AM

chill committed rL330183: Fix incorrect choice of callee-saved registers save/restore points.

Fix incorrect choice of callee-saved registers save/restore points

Apr 17 2018, 1:42 AM

chill closed D45524: Fix incorrect choice of callee-saved registers save/restore points.

Apr 17 2018, 1:42 AM

chill updated the summary of D45524: Fix incorrect choice of callee-saved registers save/restore points.

Apr 17 2018, 1:39 AM

chill updated the diff for D45524: Fix incorrect choice of callee-saved registers save/restore points.

Apr 17 2018, 1:28 AM

Apr 16 2018

chill added a comment to D45524: Fix incorrect choice of callee-saved registers save/restore points.

Thanks a lot for the comments and the review.

Apr 16 2018, 10:05 AM

chill updated the diff for D45524: Fix incorrect choice of callee-saved registers save/restore points.

Added a comment; reformatted a little

Apr 16 2018, 10:00 AM

Apr 13 2018

chill added inline comments to D45524: Fix incorrect choice of callee-saved registers save/restore points.

Apr 13 2018, 10:42 AM