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Differential D74456

Reland "[Support] make report_fatal_error `abort` instead of `exit`"
ClosedPublic

Authored by ychen on Feb 11 2020, 5:37 PM.

Details

Reviewers
rnk
MaskRay
aganea
hans
• espindola
jhenderson
Commits
rG8cedf0e2994c: Reland "[Support] make report_fatal_error `abort` instead of `exit`"
Summary

Reland D67847 after D73742 is committed. Replace sys::Process::Exit(1)
with abort in report_fatal_error.

After this patch, for tools turning on CrashRecoveryContext,
crash handler installed by CrashRecoveryContext is called unless
they installed a non-returning handler using llvm::install_fatal_error_handler
like cc1_main currently does.

Diff Detail

Event Timeline

ychen created this revision.Feb 11 2020, 5:37 PM
Herald added a reviewer: • espindola. · View Herald TranscriptFeb 11 2020, 5:37 PM
Herald added a reviewer: jhenderson. · View Herald Transcript
Herald added projects: Restricted Project, Restricted Project. · View Herald Transcript
Herald added subscribers: llvm-commits, cfe-commits, kerbowa and 43 others. · View Herald Transcript
MaskRay accepted this revision.Feb 11 2020, 5:57 PM
This revision is now accepted and ready to land.Feb 11 2020, 5:57 PM
Herald added a subscriber: • wuzish. · View Herald TranscriptFeb 11 2020, 5:57 PM
MaskRay added a comment.Feb 11 2020, 6:15 PM

ninja check-llvm check-clang passed on a powerpc64le machine.

ychen added a comment.Feb 11 2020, 6:23 PM
In D74456#1871238, @MaskRay wrote:

ninja check-llvm check-clang passed on a powerpc64le machine.

Thanks for the review. Fingers crossed sanitizer bots not complain.

Harbormaster failed remote builds in B46294: Diff 244043!Feb 11 2020, 6:26 PM
Closed by commit rG8cedf0e2994c: Reland "[Support] make report_fatal_error `abort` instead of `exit`" (authored by Yuanfang Chen <yuanfang.chen@sony.com>). · Explain WhyFeb 11 2020, 6:26 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

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clang-tools-extra/
test/
clang-tidy/
infrastructure/
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clang/
unittests/
libclang/
CrashTests/
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lld/
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Diff 244050

clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp

// UNSUPPORTED: system-windows // UNSUPPORTED: system-windows
// RUN: not clang-tidy -p %S/Inputs/empty-database %s 2>&1 | FileCheck %s // RUN: not --crash clang-tidy -p %S/Inputs/empty-database %s 2>&1 | FileCheck %s
// CHECK: LLVM ERROR: Cannot chdir into ""! // CHECK: LLVM ERROR: Cannot chdir into ""!

clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp

Show All 25 Lines
TEST_F(LibclangParseTest, UninstallAbortingLLVMFatalErrorHandler) { TEST_F(LibclangParseTest, UninstallAbortingLLVMFatalErrorHandler) {
clang_toggleCrashRecovery(0); clang_toggleCrashRecovery(0);
clang_install_aborting_llvm_fatal_error_handler(); clang_install_aborting_llvm_fatal_error_handler();
clang_uninstall_llvm_fatal_error_handler(); clang_uninstall_llvm_fatal_error_handler();
std::string Main = "main.h"; std::string Main = "main.h";
WriteFile(Main, "#pragma clang __debug llvm_fatal_error"); WriteFile(Main, "#pragma clang __debug llvm_fatal_error");
EXPECT_EXIT(clang_parseTranslationUnit( EXPECT_DEATH(clang_parseTranslationUnit(Index, Main.c_str(), nullptr, 0,
Index, Main.c_str(), nullptr, 0, nullptr, 0, TUFlags), nullptr, 0, TUFlags),
::testing::ExitedWithCode(1), "ERROR"); "ERROR");
} }

lld/test/ELF/lto/ltopasses-custom.ll

Show All 18 Lines
; CHECK-NEXT: fence seq_cst ; CHECK-NEXT: fence seq_cst
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; LowerAtomic will remove the fence. ; LowerAtomic will remove the fence.
; ATOMIC: define void @barrier() { ; ATOMIC: define void @barrier() {
; ATOMIC-NEXT: ret void ; ATOMIC-NEXT: ret void
; Check that invalid passes are rejected gracefully. ; Check that invalid passes are rejected gracefully.
; RUN: not ld.lld -m elf_x86_64 %t.o -o %t2.so \ ; RUN: not --crash ld.lld -m elf_x86_64 %t.o -o %t2.so \
; RUN: --lto-newpm-passes=iamnotapass -shared 2>&1 | \ ; RUN: --lto-newpm-passes=iamnotapass -shared 2>&1 | \
; RUN: FileCheck %s --check-prefix=INVALID ; RUN: FileCheck %s --check-prefix=INVALID
; INVALID: unable to parse pass pipeline description 'iamnotapass': unknown pass name 'iamnotapass' ; INVALID: unable to parse pass pipeline description 'iamnotapass': unknown pass name 'iamnotapass'
; Check that invalid AA pipelines are rejected gracefully. ; Check that invalid AA pipelines are rejected gracefully.
; RUN: not ld.lld -m elf_x86_64 %t.o -o %t2.so \ ; RUN: not --crash ld.lld -m elf_x86_64 %t.o -o %t2.so \
; RUN: --lto-newpm-passes=globaldce --lto-aa-pipeline=patatino \ ; RUN: --lto-newpm-passes=globaldce --lto-aa-pipeline=patatino \
; RUN: -shared 2>&1 | \ ; RUN: -shared 2>&1 | \
; RUN: FileCheck %s --check-prefix=INVALIDAA ; RUN: FileCheck %s --check-prefix=INVALIDAA
; INVALIDAA: unknown alias analysis name 'patatino' ; INVALIDAA: unknown alias analysis name 'patatino'

llvm/docs/ProgrammersManual.rst

Show First 20 Lines • Show All 447 Lines • ▼ Show 20 Lines
recovery. recovery.
.. note:: .. note::
While it would be ideal to use this error handling scheme throughout While it would be ideal to use this error handling scheme throughout
LLVM, there are places where this hasn't been practical to apply. In LLVM, there are places where this hasn't been practical to apply. In
situations where you absolutely must emit a non-programmatic error and situations where you absolutely must emit a non-programmatic error and
the ``Error`` model isn't workable you can call ``report_fatal_error``, the ``Error`` model isn't workable you can call ``report_fatal_error``,
which will call installed error handlers, print a message, and exit the which will call installed error handlers, print a message, and abort the
program. program. The use of `report_fatal_error` in this case is discouraged.
Recoverable errors are modeled using LLVM's ``Error`` scheme. This scheme Recoverable errors are modeled using LLVM's ``Error`` scheme. This scheme
represents errors using function return values, similar to classic C integer represents errors using function return values, similar to classic C integer
error codes, or C++'s ``std::error_code``. However, the ``Error`` class is error codes, or C++'s ``std::error_code``. However, the ``Error`` class is
actually a lightweight wrapper for user-defined error types, allowing arbitrary actually a lightweight wrapper for user-defined error types, allowing arbitrary
information to be attached to describe the error. This is similar to the way C++ information to be attached to describe the error. This is similar to the way C++
exceptions allow throwing of user-defined types. exceptions allow throwing of user-defined types.
▲ Show 20 Lines • Show All 3,714 Lines • Show Last 20 Lines

llvm/include/llvm/Support/ErrorHandling.h

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Linesclass StringRef;
}; };
/// Reports a serious error, calling any installed error handler. These /// Reports a serious error, calling any installed error handler. These
/// functions are intended to be used for error conditions which are outside /// functions are intended to be used for error conditions which are outside
/// the control of the compiler (I/O errors, invalid user input, etc.) /// the control of the compiler (I/O errors, invalid user input, etc.)
/// ///
/// If no error handler is installed the default is to print the message to /// If no error handler is installed the default is to print the message to
/// standard error, followed by a newline. /// standard error, followed by a newline.
/// After the error handler is called this function will call exit(1), it /// After the error handler is called this function will call abort(), it
/// does not return. /// does not return.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason, LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason,
bool gen_crash_diag = true); bool gen_crash_diag = true);
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const std::string &reason, LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const std::string &reason,
bool gen_crash_diag = true); bool gen_crash_diag = true);
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(StringRef reason, LLVM_ATTRIBUTE_NORETURN void report_fatal_error(StringRef reason,
bool gen_crash_diag = true); bool gen_crash_diag = true);
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const Twine &reason, LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const Twine &reason,
▲ Show 20 Lines • Show All 66 Lines • Show Last 20 Lines

llvm/lib/Support/ErrorHandling.cpp

Show First 20 Lines • Show All 117 Lines • ▼ Show 20 Lines if (handler) {
(void)written; // If something went wrong, we deliberately just give up. (void)written; // If something went wrong, we deliberately just give up.
} }
// If we reached here, we are failing ungracefully. Run the interrupt handlers // If we reached here, we are failing ungracefully. Run the interrupt handlers
// to make sure any special cleanups get done, in particular that we remove // to make sure any special cleanups get done, in particular that we remove
// files registered with RemoveFileOnSignal. // files registered with RemoveFileOnSignal.
sys::RunInterruptHandlers(); sys::RunInterruptHandlers();
sys::Process::Exit(1); abort();
} }
void llvm::install_bad_alloc_error_handler(fatal_error_handler_t handler, void llvm::install_bad_alloc_error_handler(fatal_error_handler_t handler,
void *user_data) { void *user_data) {
#if LLVM_ENABLE_THREADS == 1 #if LLVM_ENABLE_THREADS == 1
std::lock_guard<std::mutex> Lock(BadAllocErrorHandlerMutex); std::lock_guard<std::mutex> Lock(BadAllocErrorHandlerMutex);
#endif #endif
assert(!ErrorHandler && "Bad alloc error handler already registered!\n"); assert(!ErrorHandler && "Bad alloc error handler already registered!\n");
▲ Show 20 Lines • Show All 165 Lines • Show Last 20 Lines

llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll

; RUN: not llvm-as %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2 ; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2
target datalayout = "Fi24" target datalayout = "Fi24"

llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll

; RUN: not llvm-as %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2 ; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2
target datalayout = "S24" target datalayout = "S24"

llvm/test/Assembler/getInt.ll

; RUN: not opt < %s 2>&1 | grep 'not a number, or does not fit in an unsigned int' ; RUN: not --crash opt < %s 2>&1 | grep 'not a number, or does not fit in an unsigned int'
target datalayout = "p:4294967296:64:64" target datalayout = "p:4294967296:64:64"

llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "A16777216" target datalayout = "A16777216"
; CHECK: Invalid address space, must be a 24-bit integer ; CHECK: Invalid address space, must be a 24-bit integer

llvm/test/Assembler/invalid-datalayout-program-addrspace.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
; CHECK: Invalid address space, must be a 24-bit integer ; CHECK: Invalid address space, must be a 24-bit integer
target datalayout = "P16777216" target datalayout = "P16777216"

llvm/test/Assembler/invalid-datalayout1.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "^" target datalayout = "^"
; CHECK: Unknown specifier in datalayout string ; CHECK: Unknown specifier in datalayout string

llvm/test/Assembler/invalid-datalayout10.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "m" target datalayout = "m"
; CHECK: Expected mangling specifier in datalayout string ; CHECK: Expected mangling specifier in datalayout string

llvm/test/Assembler/invalid-datalayout11.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "m." target datalayout = "m."
; CHECK: Unexpected trailing characters after mangling specifier in datalayout string ; CHECK: Unexpected trailing characters after mangling specifier in datalayout string

llvm/test/Assembler/invalid-datalayout12.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "f" target datalayout = "f"
; CHECK: Missing alignment specification in datalayout string ; CHECK: Missing alignment specification in datalayout string

llvm/test/Assembler/invalid-datalayout13.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = ":32" target datalayout = ":32"
; CHECK: Expected token before separator in datalayout string ; CHECK: Expected token before separator in datalayout string

llvm/test/Assembler/invalid-datalayout14.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i64:64:16" target datalayout = "i64:64:16"
; CHECK: Preferred alignment cannot be less than the ABI alignment ; CHECK: Preferred alignment cannot be less than the ABI alignment

llvm/test/Assembler/invalid-datalayout15.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i64:16:16777216" target datalayout = "i64:16:16777216"
; CHECK: Invalid preferred alignment, must be a 16bit integer ; CHECK: Invalid preferred alignment, must be a 16bit integer

llvm/test/Assembler/invalid-datalayout16.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i64:16777216:16777216" target datalayout = "i64:16777216:16777216"
; CHECK: Invalid ABI alignment, must be a 16bit integer ; CHECK: Invalid ABI alignment, must be a 16bit integer

llvm/test/Assembler/invalid-datalayout17.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i16777216:16:16" target datalayout = "i16777216:16:16"
; CHECK: Invalid bit width, must be a 24bit integer ; CHECK: Invalid bit width, must be a 24bit integer

llvm/test/Assembler/invalid-datalayout18.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:32:32:16" target datalayout = "p:32:32:16"
; CHECK: Preferred alignment cannot be less than the ABI alignment ; CHECK: Preferred alignment cannot be less than the ABI alignment

llvm/test/Assembler/invalid-datalayout19.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:0:32:32" target datalayout = "p:0:32:32"
; CHECK: Invalid pointer size of 0 bytes ; CHECK: Invalid pointer size of 0 bytes

llvm/test/Assembler/invalid-datalayout2.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "m:v" target datalayout = "m:v"
; CHECK: Unknown mangling in datalayout string ; CHECK: Unknown mangling in datalayout string

llvm/test/Assembler/invalid-datalayout20.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:64:24:64" target datalayout = "p:64:24:64"
; CHECK: Pointer ABI alignment must be a power of 2 ; CHECK: Pointer ABI alignment must be a power of 2

llvm/test/Assembler/invalid-datalayout21.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:64:64:24" target datalayout = "p:64:64:24"
; CHECK: Pointer preferred alignment must be a power of 2 ; CHECK: Pointer preferred alignment must be a power of 2

llvm/test/Assembler/invalid-datalayout22.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "v128:0:128" target datalayout = "v128:0:128"
; CHECK: ABI alignment specification must be >0 for non-aggregate types ; CHECK: ABI alignment specification must be >0 for non-aggregate types

llvm/test/Assembler/invalid-datalayout23.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i32:24:32" target datalayout = "i32:24:32"
; CHECK: Invalid ABI alignment, must be a power of 2 ; CHECK: Invalid ABI alignment, must be a power of 2

llvm/test/Assembler/invalid-datalayout24.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i32:32:24" target datalayout = "i32:32:24"
; CHECK: Invalid preferred alignment, must be a power of 2 ; CHECK: Invalid preferred alignment, must be a power of 2

llvm/test/Assembler/invalid-datalayout3.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "n0" target datalayout = "n0"
; CHECK: Zero width native integer type in datalayout string ; CHECK: Zero width native integer type in datalayout string

llvm/test/Assembler/invalid-datalayout4.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p16777216:64:64:64" target datalayout = "p16777216:64:64:64"
; CHECK: Invalid address space, must be a 24bit integer ; CHECK: Invalid address space, must be a 24bit integer

llvm/test/Assembler/invalid-datalayout5.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "a1:64" target datalayout = "a1:64"
; CHECK: Sized aggregate specification in datalayout string ; CHECK: Sized aggregate specification in datalayout string

llvm/test/Assembler/invalid-datalayout6.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "a:" target datalayout = "a:"
; CHECK: Trailing separator in datalayout string ; CHECK: Trailing separator in datalayout string

llvm/test/Assembler/invalid-datalayout7.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:52" target datalayout = "p:52"
; CHECK: number of bits must be a byte width multiple ; CHECK: number of bits must be a byte width multiple

llvm/test/Assembler/invalid-datalayout8.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "e-p" target datalayout = "e-p"
; CHECK: Missing size specification for pointer in datalayout string ; CHECK: Missing size specification for pointer in datalayout string

llvm/test/Assembler/invalid-datalayout9.ll

; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "e-p:64" target datalayout = "e-p:64"
; CHECK: Missing alignment specification for pointer in datalayout string ; CHECK: Missing alignment specification for pointer in datalayout string

llvm/test/Bitcode/function-default-address-spaces.ll

; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s -check-prefixes CHECK,PROG-AS0 ; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s -check-prefixes CHECK,PROG-AS0
; RUN: llvm-as -data-layout "P200" %s -o - | llvm-dis | FileCheck %s -check-prefixes CHECK,PROG-AS200 ; RUN: llvm-as -data-layout "P200" %s -o - | llvm-dis | FileCheck %s -check-prefixes CHECK,PROG-AS200
; RUN: not llvm-as -data-layout "P123456789" %s -o /dev/null 2>&1 | FileCheck %s -check-prefix BAD-DATALAYOUT ; RUN: not --crash llvm-as -data-layout "P123456789" %s -o /dev/null 2>&1 | FileCheck %s -check-prefix BAD-DATALAYOUT
; BAD-DATALAYOUT: LLVM ERROR: Invalid address space, must be a 24-bit integer ; BAD-DATALAYOUT: LLVM ERROR: Invalid address space, must be a 24-bit integer
; PROG-AS0-NOT: target datalayout ; PROG-AS0-NOT: target datalayout
; PROG-AS200: target datalayout = "P200" ; PROG-AS200: target datalayout = "P200"
; Check that a function declaration without an address space (i.e. AS0) does not ; Check that a function declaration without an address space (i.e. AS0) does not
; have the addrspace() attribute printed if it is address space zero and it is ; have the addrspace() attribute printed if it is address space zero and it is
; equal to the program address space. ; equal to the program address space.
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llvm/test/Bitcode/invalid-functionptr-align.ll

; Bitcode with invalid function pointer alignment. ; Bitcode with invalid function pointer alignment.
; RUN: not llvm-dis %s.bc -o - 2>&1 | FileCheck %s ; RUN: not --crash llvm-dis %s.bc -o - 2>&1 | FileCheck %s
CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2 CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2

llvm/test/Bitcode/invalid.test

RUN: not llvm-dis -disable-output %p/Inputs/invalid-empty.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-empty.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-EMPTY %s RUN: FileCheck --check-prefix=INVALID-EMPTY %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \ RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-ENCODING %s RUN: FileCheck --check-prefix=INVALID-ENCODING %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev.bc 2>&1 | \
RUN: FileCheck --check-prefix=BAD-ABBREV %s RUN: FileCheck --check-prefix=BAD-ABBREV %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-unexpected-eof.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-unexpected-eof.bc 2>&1 | \
RUN: FileCheck --check-prefix=UNEXPECTED-EOF %s RUN: FileCheck --check-prefix=UNEXPECTED-EOF %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-bad-abbrev-number.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-bad-abbrev-number.bc 2>&1 | \
RUN: FileCheck --check-prefix=BAD-ABBREV-NUMBER %s RUN: FileCheck --check-prefix=BAD-ABBREV-NUMBER %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-type-table-forward-ref.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-type-table-forward-ref.bc 2>&1 | \
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INSERT-STRUCT: INSERTVAL: Invalid struct index INSERT-STRUCT: INSERTVAL: Invalid struct index
INSERT-IDXS: INSERTVAL: Invalid type INSERT-IDXS: INSERTVAL: Invalid type
RUN: not llvm-dis -disable-output %p/Inputs/invalid-fp-shift.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-fp-shift.bc 2>&1 | \
RUN: FileCheck --check-prefix=FP-SHIFT %s RUN: FileCheck --check-prefix=FP-SHIFT %s
FP-SHIFT: Invalid record FP-SHIFT: Invalid record
RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-vbr-size-too-big.bc 2>&1 | \ RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-vbr-size-too-big.bc 2>&1 | \
RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-fixed-size-too-big.bc 2>&1 | \ RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-fixed-size-too-big.bc 2>&1 | \
RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s
HUGE-ABBREV-OP: Fixed or VBR abbrev record with size > MaxChunkData HUGE-ABBREV-OP: Fixed or VBR abbrev record with size > MaxChunkData
RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-type.bc 2>&1 | \ RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-array-type.bc 2>&1 | \
RUN: FileCheck --check-prefix=ARRAY-TYPE %s RUN: FileCheck --check-prefix=ARRAY-TYPE %s
ARRAY-TYPE: Array element type can't be an Array or a Blob ARRAY-TYPE: Array element type can't be an Array or a Blob
RUN: not llvm-dis -disable-output %p/Inputs/invalid-non-vector-extractelement.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-non-vector-extractelement.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-TYPE %s RUN: FileCheck --check-prefix=INVALID-TYPE %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-non-vector-insertelement.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-non-vector-insertelement.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-TYPE %s RUN: FileCheck --check-prefix=INVALID-TYPE %s
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ELEMENT-TYPE: Invalid type ELEMENT-TYPE: Invalid type
RUN: not llvm-dis -disable-output %p/Inputs/invalid-cast.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-cast.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-CAST %s RUN: FileCheck --check-prefix=INVALID-CAST %s
INVALID-CAST: Invalid cast INVALID-CAST: Invalid cast
RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-op-not-2nd-to-last.bc 2>&1 | \ RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-array-op-not-2nd-to-last.bc 2>&1 | \
RUN: FileCheck --check-prefix=ARRAY-NOT-2LAST %s RUN: FileCheck --check-prefix=ARRAY-NOT-2LAST %s
ARRAY-NOT-2LAST: Array op not second to last ARRAY-NOT-2LAST: Array op not second to last
RUN: not llvm-dis -disable-output %p/Inputs/invalid-too-big-fwdref.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-too-big-fwdref.bc 2>&1 | \
RUN: FileCheck --check-prefix=HUGE-FWDREF %s RUN: FileCheck --check-prefix=HUGE-FWDREF %s
HUGE-FWDREF: Invalid record HUGE-FWDREF: Invalid record
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INVALID-FCOMDAT-ID: Malformed block INVALID-FCOMDAT-ID: Malformed block
RUN: not llvm-dis -disable-output %p/Inputs/invalid-global-var-comdat-id.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-global-var-comdat-id.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-GVCOMDAT-ID %s RUN: FileCheck --check-prefix=INVALID-GVCOMDAT-ID %s
INVALID-GVCOMDAT-ID: Invalid global variable comdat ID INVALID-GVCOMDAT-ID: Invalid global variable comdat ID
RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-no-operands.bc 2>&1 | \ RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-no-operands.bc 2>&1 | \
RUN: FileCheck --check-prefix=ABBREV-NO-OPS %s RUN: FileCheck --check-prefix=ABBREV-NO-OPS %s
ABBREV-NO-OPS: Abbrev record with no operands ABBREV-NO-OPS: Abbrev record with no operands
RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-operand-encoding.bc 2>&1 | \ RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-operand-encoding.bc 2>&1 | \
RUN: FileCheck --check-prefix=ARRAY-OP-ENC %s RUN: FileCheck --check-prefix=ARRAY-OP-ENC %s
ARRAY-OP-ENC: Malformed block ARRAY-OP-ENC: Malformed block
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llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll

; RUN: not llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: not --crash llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
; RUN: llc -O0 -global-isel -global-isel-abort=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=FALLBACK ; RUN: llc -O0 -global-isel -global-isel-abort=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=FALLBACK
; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err ; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err
; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out
; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err ; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err
; RUN: not llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN ; RUN: not --crash llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN
; This file checks that the fallback path to selection dag works. ; This file checks that the fallback path to selection dag works.
; The test is fragile in the sense that it must be updated to expose ; The test is fragile in the sense that it must be updated to expose
; something that fails with global-isel. ; something that fails with global-isel.
; When we cannot produce a test case anymore, that means we can remove ; When we cannot produce a test case anymore, that means we can remove
; the fallback path. ; the fallback path.
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--" target triple = "aarch64--"
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llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll

; RUN: not llc %s -mtriple aarch64-apple-darwin -debug-only=aarch64-call-lowering -global-isel -global-isel-abort=2 -o - 2>&1 | FileCheck %s ; RUN: not --crash llc %s -mtriple aarch64-apple-darwin -debug-only=aarch64-call-lowering -global-isel -global-isel-abort=2 -o - 2>&1 | FileCheck %s
; REQUIRES: asserts ; REQUIRES: asserts
; Verify that we fall back to SelectionDAG, and error out when we can't tail call musttail functions ; Verify that we fall back to SelectionDAG, and error out when we can't tail call musttail functions
; CHECK: ... Cannot tail call externally-defined function with weak linkage for this OS. ; CHECK: ... Cannot tail call externally-defined function with weak linkage for this OS.
; CHECK-NEXT: Failed to lower musttail call as tail call ; CHECK-NEXT: Failed to lower musttail call as tail call
; CHECK-NEXT: warning: Instruction selection used fallback path for caller_weak ; CHECK-NEXT: warning: Instruction selection used fallback path for caller_weak
; CHECK-NEXT: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail ; CHECK-NEXT: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail
declare extern_weak void @callee_weak() declare extern_weak void @callee_weak()
define void @caller_weak() { define void @caller_weak() {
musttail call void @callee_weak() musttail call void @callee_weak()
ret void ret void
} }

llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir

# RUN: not llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s
# REQUIRES: asserts
# This is to demonstrate what kind of bugs we're missing w/o some kind # This is to demonstrate what kind of bugs we're missing w/o some kind
# of validation for LegalizerInfo: G_INTTOPTR could only be legal / # of validation for LegalizerInfo: G_INTTOPTR could only be legal /
# could be legalized if its destination operand has a pointer type and # could be legalized if its destination operand has a pointer type and
# its source - a scalar type. This is reversed in this test and the # its source - a scalar type. This is reversed in this test and the
# legalizer is expected to fail on it with an appropriate error # legalizer is expected to fail on it with an appropriate error
# message. Prior to LegalizerInfo::verify AArch64 legalizer had a # message. Prior to LegalizerInfo::verify AArch64 legalizer had a
# subtle bug in its definition that caused it to accept the following # subtle bug in its definition that caused it to accept the following
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llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir

# RUN: not llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s
# REQUIRES: asserts
# This is to demonstrate what kind of bugs we're missing w/o some kind # This is to demonstrate what kind of bugs we're missing w/o some kind
# of validation for LegalizerInfo: G_INTTOPTR could only be legal / # of validation for LegalizerInfo: G_INTTOPTR could only be legal /
# could be legalized if its destination operand has a pointer type and # could be legalized if its destination operand has a pointer type and
# its source - a scalar type of an appropriate size. This test meets # its source - a scalar type of an appropriate size. This test meets
# the requirements for type index 0 (the pointer) and LLT-size # the requirements for type index 0 (the pointer) and LLT-size
# requirements for type index 1 (64 bits for AArch64), but has a # requirements for type index 1 (64 bits for AArch64), but has a
# non-scalar (vector) type for type index 1. The Legalizer is expected # non-scalar (vector) type for type index 1. The Legalizer is expected
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llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll

; RUN: not llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s ; RUN: not --crash llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown" target triple = "aarch64-unknown-unknown"
; CHECK: unable to legalize instruction: G_STORE %1:_(s128), %0:_(p0) :: (store 16 into %ir.ptr) (in function: foo) ; CHECK: unable to legalize instruction: G_STORE %1:_(s128), %0:_(p0) :: (store 16 into %ir.ptr) (in function: foo)
define void @foo(i128 *%ptr) #0 align 2 { define void @foo(i128 *%ptr) #0 align 2 {
entry: entry:
store i128 0, i128* %ptr, align 16 store i128 0, i128* %ptr, align 16
ret void ret void
} }
attributes #0 = { "use-soft-float"="false" "target-features"="-fp-armv8,-neon" } attributes #0 = { "use-soft-float"="false" "target-features"="-fp-armv8,-neon" }

llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll

; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind { define i32 @get_stack() nounwind {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name "x5". ; CHECK: Invalid register name "x5".
%sp = call i32 @llvm.read_register.i32(metadata !0) %sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp ret i32 %sp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"x5\00"} !0 = !{!"x5\00"}

llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll

; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind { define i32 @get_stack() nounwind {
entry: entry:
; CHECK: Invalid register name "notareg". ; CHECK: Invalid register name "notareg".
%sp = call i32 @llvm.read_register.i32(metadata !0) %sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp ret i32 %sp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"notareg\00"} !0 = !{!"notareg\00"}

llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll

; Verify the call site info. If the call site info is not ; Verify the call site info. If the call site info is not
; in the valid state, an assert should be triggered. ; in the valid state, an assert should be triggered.
; RUN: llc < %s -debug-entry-values -mtriple=arm64-none-linux-gnu -stop-after=machineverifier -relocation-model=pic -aarch64-elf-ldtls-generation=1 < %s ; RUN: llc < %s -debug-entry-values -mtriple=arm64-none-linux-gnu -stop-after=machineverifier -relocation-model=pic -aarch64-elf-ldtls-generation=1 < %s
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOLD %s ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOLD %s
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-NOLD-RELOC %s ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-NOLD-RELOC %s
; FIXME: We currently produce "small" code for the tiny model ; FIXME: We currently produce "small" code for the tiny model
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=tiny -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=tiny -verify-machineinstrs < %s | FileCheck %s
; FIXME: We currently error for the large code model ; FIXME: We currently error for the large code model
; RUN: not llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=large -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE ; RUN: not --crash llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=large -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE
; CHECK-LARGE: ELF TLS only supported in small memory model ; CHECK-LARGE: ELF TLS only supported in small memory model
@general_dynamic_var = external thread_local global i32 @general_dynamic_var = external thread_local global i32
define i32 @test_generaldynamic() { define i32 @test_generaldynamic() {
; CHECK-LABEL: test_generaldynamic: ; CHECK-LABEL: test_generaldynamic:
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llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll

; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding < %s | FileCheck %s ; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding < %s | FileCheck %s
; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s ; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s
; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=tiny < %s | FileCheck %s --check-prefix=CHECK-TINY ; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=tiny < %s | FileCheck %s --check-prefix=CHECK-TINY
; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s -code-model=tiny | llvm-objdump -r - | FileCheck --check-prefix=CHECK-TINY-RELOC %s ; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s -code-model=tiny | llvm-objdump -r - | FileCheck --check-prefix=CHECK-TINY-RELOC %s
; FIXME: We currently error for the large code model ; FIXME: We currently error for the large code model
; RUN: not llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=large < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE ; RUN: not --crash llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=large < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE
; CHECK-LARGE: ELF TLS only supported in small memory model ; CHECK-LARGE: ELF TLS only supported in small memory model
@initial_exec_var = external thread_local(initialexec) global i32 @initial_exec_var = external thread_local(initialexec) global i32
define i32 @test_initial_exec() { define i32 @test_initial_exec() {
; CHECK-LABEL: test_initial_exec: ; CHECK-LABEL: test_initial_exec:
%val = load i32, i32* @initial_exec_var %val = load i32, i32* @initial_exec_var
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llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll

; RUN: llc -O0 -fast-isel -mtriple=aarch64-apple-ios -o - %s | FileCheck %s ; RUN: llc -O0 -fast-isel -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
; RUN: not llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t ; RUN: not --crash llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t
; RUN: FileCheck %s --check-prefix=CHECK-ERRORS < %t ; RUN: FileCheck %s --check-prefix=CHECK-ERRORS < %t
; The issue here is that FastISel cannot emit an ADDrr where one of the inputs ; The issue here is that FastISel cannot emit an ADDrr where one of the inputs
; is SP. This only ever crops up with function calls, and then only if the ; is SP. This only ever crops up with function calls, and then only if the
; argument is at an offset > 2^12 * size from SP. ; argument is at an offset > 2^12 * size from SP.
; If FastISel ever starts coping with this and emits an "add xD, sp, xM" it's ; If FastISel ever starts coping with this and emits an "add xD, sp, xM" it's
; critical to check the encoding as well as the textual assembly. An ADDXrs with ; critical to check the encoding as well as the textual assembly. An ADDXrs with
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llvm/test/CodeGen/AArch64/tiny_supported.ll

; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s ; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s
; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s ; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s
; RUN: not llc -verify-machineinstrs -o - -mtriple=arm64-apple-darwin -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm64-apple-darwin -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
; RUN: not llc -verify-machineinstrs -o - -mtriple=arm64-apple-ios -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm64-apple-ios -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
; RUN: not llc -verify-machineinstrs -o - -mtriple=aarch64-unknown-windows-msvc -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=aarch64-unknown-windows-msvc -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
; CHECK-NOT: tiny code model is only supported on ELF ; CHECK-NOT: tiny code model is only supported on ELF
; CHECK-LABEL: foo ; CHECK-LABEL: foo
; NOTINY: tiny code model is only supported on ELF ; NOTINY: tiny code model is only supported on ELF
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GPRIDX %s ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GPRIDX %s
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=MOVREL %s ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=MOVREL %s
; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s ; RUN: not --crash llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
; FIXME: Need constant bus fixup pre-gfx10 for movrel ; FIXME: Need constant bus fixup pre-gfx10 for movrel
; ERR: Bad machine code: VOP* instruction violates constant bus restriction ; ERR: Bad machine code: VOP* instruction violates constant bus restriction
define amdgpu_ps <8 x i32> @dyn_insertelement_v8i32_s_s_s(<8 x i32> inreg %vec, i32 inreg %val, i32 inreg %idx) { define amdgpu_ps <8 x i32> @dyn_insertelement_v8i32_s_s_s(<8 x i32> inreg %vec, i32 inreg %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8i32_s_s_s: ; GPRIDX-LABEL: dyn_insertelement_v8i32_s_s_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
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llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir

# RUN: not llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s # RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
# ERR: *** Bad machine code: VOP* instruction violates constant bus restriction *** # ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
--- ---
name: xor_s32_sgpr_sgpr_vgpr name: xor_s32_sgpr_sgpr_vgpr
legalized: true legalized: true
regBankSelected: true regBankSelected: true
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llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll

; RUN: not llc -global-isel -march=amdgcn -mcpu=tonga < %S/../lds-zero-initializer.ll 2>&1 | FileCheck %s ; RUN: not --crash llc -global-isel -march=amdgcn -mcpu=tonga < %S/../lds-zero-initializer.ll 2>&1 | FileCheck %s
; CHECK: error: <unknown>:0:0: in function load_zeroinit_lds_global void (i32 addrspace(1)*, i1): unsupported initializer for address space ; CHECK: error: <unknown>:0:0: in function load_zeroinit_lds_global void (i32 addrspace(1)*, i1): unsupported initializer for address space

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir

# RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o - %s 2>&1| FileCheck -check-prefix=ERROR %s # RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o - %s 2>&1| FileCheck -check-prefix=ERROR %s
# This needs to be expanded into a cmpxchg loop. # This needs to be expanded into a cmpxchg loop.
# TODO: Will AtomicExpand still do this? # TODO: Will AtomicExpand still do this?
# ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_NAND %0:_(p1), %1:_ :: (load store seq_cst 4, addrspace 1) (in function: atomicrmw_nand_global_i32) # ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_NAND %0:_(p1), %1:_ :: (load store seq_cst 4, addrspace 1) (in function: atomicrmw_nand_global_i32)
--- ---
name: atomicrmw_nand_global_i32 name: atomicrmw_nand_global_i32
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llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -o - %s | FileCheck %s # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -o - %s | FileCheck %s
# RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s # RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
# ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_XCHG %0:_(p0), %1:_ :: (load store seq_cst 4) (in function: atomicrmw_xchg_flat_i32) # ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_XCHG %0:_(p0), %1:_ :: (load store seq_cst 4) (in function: atomicrmw_xchg_flat_i32)
--- ---
name: atomicrmw_xchg_flat_i32 name: atomicrmw_xchg_flat_i32
body: | body: |
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llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir

# RUN: not llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: unable to legalize instruction: %3:_(p0) = G_JUMP_TABLE %jump-table.0 (in function: jt_test) # CHECK: LLVM ERROR: unable to legalize instruction: %3:_(p0) = G_JUMP_TABLE %jump-table.0 (in function: jt_test)
# FIXME: This could probably be smaller, but the jump table MIR parsing is very crashy. # FIXME: This could probably be smaller, but the jump table MIR parsing is very crashy.
--- | --- |
define i32 @jt_test(i32 %x) { define i32 @jt_test(i32 %x) {
entry: entry:
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llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir

# RUN: not llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: unable to legalize instruction: %1:_(s1), %2:_(s1) = G_UNMERGE_VALUES %0:_(<2 x s1>) (in function: test_unmerge_v2s1) # CHECK: LLVM ERROR: unable to legalize instruction: %1:_(s1), %2:_(s1) = G_UNMERGE_VALUES %0:_(<2 x s1>) (in function: test_unmerge_v2s1)
--- ---
name: test_unmerge_v2s1 name: test_unmerge_v2s1
body: | body: |
bb.0: bb.0:
%0:_(<2 x s1>) = G_IMPLICIT_DEF %0:_(<2 x s1>) = G_IMPLICIT_DEF
%1:_(s1), %2:_(s1) = G_UNMERGE_VALUES %0 %1:_(s1), %2:_(s1) = G_UNMERGE_VALUES %0
S_NOP 0, implicit %1 S_NOP 0, implicit %1
S_NOP 0, implicit %2 S_NOP 0, implicit %2
... ...

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll

; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR-GISEL %s ; RUN: not --crash llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR-GISEL %s
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %S/../llvm.amdgcn.ds.gws.sema.release.all.ll ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP,GFX10 %S/../llvm.amdgcn.ds.gws.sema.release.all.ll ; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP,GFX10 %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
; GFX6ERR-GISEL: LLVM ERROR: cannot select: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.sema.release.all), %{{[0-9]+}}:sgpr(s32) :: (store 4 into custom "GWSResource") (in function: gws_sema_release_all_offset0) ; GFX6ERR-GISEL: LLVM ERROR: cannot select: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.ds.gws.sema.release.all), %{{[0-9]+}}:sgpr(s32) :: (store 4 into custom "GWSResource") (in function: gws_sema_release_all_offset0)

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir

# RUN: not llc -march=amdgcn -run-pass=regbankselect -regbankselect-fast %s -o /dev/null 2>&1 | FileCheck %s # RUN: not --crash llc -march=amdgcn -run-pass=regbankselect -regbankselect-fast %s -o /dev/null 2>&1 | FileCheck %s
# RUN: not llc -march=amdgcn -run-pass=regbankselect -regbankselect-greedy %s -o /dev/null 2>&1 | FileCheck %s # RUN: not --crash llc -march=amdgcn -run-pass=regbankselect -regbankselect-greedy %s -o /dev/null 2>&1 | FileCheck %s
# Check behavior for illegal copies. # Check behavior for illegal copies.
# CHECK: LLVM ERROR: unable to map instruction: $sgpr0 = COPY %0:vgpr(s32) (in function: illegal_copy_s32_v_to_s) # CHECK: LLVM ERROR: unable to map instruction: $sgpr0 = COPY %0:vgpr(s32) (in function: illegal_copy_s32_v_to_s)
--- ---
name: illegal_copy_s32_v_to_s name: illegal_copy_s32_v_to_s
legalized: true legalized: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0 liveins: $vgpr0
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
$sgpr0 = COPY %0 $sgpr0 = COPY %0
... ...

llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir

# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o /dev/null %s 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: No live subrange at use *** # CHECK: *** Bad machine code: No live subrange at use ***
# CHECK-NEXT: - function: at_least_one_value_should_be_defined_by_this_mask # CHECK-NEXT: - function: at_least_one_value_should_be_defined_by_this_mask
# CHECK-NEXT: - basic block: %bb.0 # CHECK-NEXT: - basic block: %bb.0
# CHECK-NEXT: - instruction: 48B dead undef %2.sub0:vreg_128 = COPY %0.sub0:vreg_128 # CHECK-NEXT: - instruction: 48B dead undef %2.sub0:vreg_128 = COPY %0.sub0:vreg_128
# CHECK-NEXT: - operand 1: %0.sub0:vreg_128 # CHECK-NEXT: - operand 1: %0.sub0:vreg_128
# CHECK-NEXT: - interval: %0 [16r,48r:0) 0@16r L00000002 [16r,32r:0) 0@16r weight:0.000000e+00 # CHECK-NEXT: - interval: %0 [16r,48r:0) 0@16r L00000002 [16r,32r:0) 0@16r weight:0.000000e+00
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llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll

; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s ; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s
; FIXME: This should be able to compile, but requires inserting an ; FIXME: This should be able to compile, but requires inserting an
; extra block to restore the scavenged register. ; extra block to restore the scavenged register.
; FAIL: LLVM ERROR: Error while trying to spill SGPR0_SGPR1 from class SReg_64: Cannot scavenge register without an emergency spill slot! ; FAIL: LLVM ERROR: Error while trying to spill SGPR0_SGPR1 from class SReg_64: Cannot scavenge register without an emergency spill slot!
define amdgpu_kernel void @spill(i32 addrspace(1)* %arg, i32 %cnd) #0 { define amdgpu_kernel void @spill(i32 addrspace(1)* %arg, i32 %cnd) #0 {
entry: entry:
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llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll

; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
; FIXME: It should be invalid IR to have a call to a kernel, but this ; FIXME: It should be invalid IR to have a call to a kernel, but this
; is currently relied on, but should be eliminated before codegen. ; is currently relied on, but should be eliminated before codegen.
define amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out) #0 { define amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out) #0 {
entry: entry:
store volatile i32 0, i32 addrspace(1)* %out store volatile i32 0, i32 addrspace(1)* %out
ret void ret void
} }
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llvm/test/CodeGen/AMDGPU/call-to-kernel.ll

; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
; FIXME: It should be invalid IR to have a call to a kernel, but this ; FIXME: It should be invalid IR to have a call to a kernel, but this
; is currently relied on, but should be eliminated before codegen. ; is currently relied on, but should be eliminated before codegen.
define amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out) #0 { define amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out) #0 {
entry: entry:
store volatile i32 0, i32 addrspace(1)* %out store volatile i32 0, i32 addrspace(1)* %out
ret void ret void
} }
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llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll

; RUN: not llc -march=amdgcn -mcpu=verde -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=verde -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
; RUN: not llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
; RUN: not llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
;CHECK: LLVM ERROR: unable to allocate function argument ;CHECK: LLVM ERROR: unable to allocate function argument
define amdgpu_gs { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @_amdgpu_gs_sgpr_i32 (i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg) { define amdgpu_gs { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @_amdgpu_gs_sgpr_i32 (i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg) {
.entry: .entry:
%46 = add i32 %0, %1 %46 = add i32 %0, %1
%47 = add i32 %46, %2 %47 = add i32 %46, %2
%48 = add i32 %47, %3 %48 = add i32 %47, %3
%49 = add i32 %48, %4 %49 = add i32 %48, %4
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llvm/test/CodeGen/AMDGPU/div_i128.ll

; RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: unsupported libcall legalization ; CHECK: LLVM ERROR: unsupported libcall legalization
define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) { define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
%shl = sdiv i128 %lhs, %rhs %shl = sdiv i128 %lhs, %rhs
ret i128 %shl ret i128 %shl
} }

llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll

; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s ; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s ; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -o - %s | FileCheck -check-prefix=HSA-DEFAULT %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -o - %s | FileCheck -check-prefix=HSA-DEFAULT %s
; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s ; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
; Flat instructions should not select if the target device doesn't ; Flat instructions should not select if the target device doesn't
; support them. The default device should be able to select for HSA. ; support them. The default device should be able to select for HSA.
; ERROR: LLVM ERROR: Cannot select: {{0x[0-9,a-f]+|t[0-9]+}}: i32,ch = load<(volatile load 4 from %ir.flat.ptr.load)> ; ERROR: LLVM ERROR: Cannot select: {{0x[0-9,a-f]+|t[0-9]+}}: i32,ch = load<(volatile load 4 from %ir.flat.ptr.load)>
; HSA-DEFAULT: flat_load_dword ; HSA-DEFAULT: flat_load_dword
define amdgpu_kernel void @load_flat_i32(i32* %flat.ptr) { define amdgpu_kernel void @load_flat_i32(i32* %flat.ptr) {
%load = load volatile i32, i32* %flat.ptr, align 4 %load = load volatile i32, i32* %flat.ptr, align 4
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/lds-initializer.ll

; RUN: not llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s
; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: lds: unsupported initializer for address space ; CHECK: lds: unsupported initializer for address space
@lds = addrspace(3) global [8 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8] @lds = addrspace(3) global [8 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8]
define amdgpu_kernel void @load_init_lds_global(i32 addrspace(1)* %out, i1 %p) { define amdgpu_kernel void @load_init_lds_global(i32 addrspace(1)* %out, i1 %p) {
%gep = getelementptr [8 x i32], [8 x i32] addrspace(3)* @lds, i32 0, i32 10 %gep = getelementptr [8 x i32], [8 x i32] addrspace(3)* @lds, i32 0, i32 10
%ld = load i32, i32 addrspace(3)* %gep %ld = load i32, i32 addrspace(3)* %gep
store i32 %ld, i32 addrspace(1)* %out store i32 %ld, i32 addrspace(1)* %out
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll

; RUN: not llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s
; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: lds: unsupported initializer for address space ; CHECK: lds: unsupported initializer for address space
@lds = addrspace(3) global [256 x i32] zeroinitializer @lds = addrspace(3) global [256 x i32] zeroinitializer
define amdgpu_kernel void @load_zeroinit_lds_global(i32 addrspace(1)* %out, i1 %p) { define amdgpu_kernel void @load_zeroinit_lds_global(i32 addrspace(1)* %out, i1 %p) {
%gep = getelementptr [256 x i32], [256 x i32] addrspace(3)* @lds, i32 0, i32 10 %gep = getelementptr [256 x i32], [256 x i32] addrspace(3)* @lds, i32 0, i32 10
%ld = load i32, i32 addrspace(3)* %gep %ld = load i32, i32 addrspace(3)* %gep
store i32 %ld, i32 addrspace(1)* %out store i32 %ld, i32 addrspace(1)* %out
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll

; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR %s ; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP,GFX10 %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP,GFX10 %s
; GFX6ERR: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.ds.gws.sema.release.all ; GFX6ERR: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.ds.gws.sema.release.all
; GCN-LABEL: {{^}}gws_sema_release_all_offset0: ; GCN-LABEL: {{^}}gws_sema_release_all_offset0:
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llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll

; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
; CHECK: invalid register "flat_scratch_lo" for subtarget. ; CHECK: invalid register "flat_scratch_lo" for subtarget.
declare i32 @llvm.read_register.i32(metadata) #0 declare i32 @llvm.read_register.i32(metadata) #0
define amdgpu_kernel void @test_invalid_read_flat_scratch_lo(i32 addrspace(1)* %out) nounwind { define amdgpu_kernel void @test_invalid_read_flat_scratch_lo(i32 addrspace(1)* %out) nounwind {
store volatile i32 0, i32 addrspace(3)* undef store volatile i32 0, i32 addrspace(3)* undef
%m0 = call i32 @llvm.read_register.i32(metadata !0) %m0 = call i32 @llvm.read_register.i32(metadata !0)
store i32 %m0, i32 addrspace(1)* %out store i32 %m0, i32 addrspace(1)* %out
ret void ret void
} }
!0 = !{!"flat_scratch_lo"} !0 = !{!"flat_scratch_lo"}

llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll

; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
; CHECK: invalid type for register "exec". ; CHECK: invalid type for register "exec".
declare i32 @llvm.read_register.i32(metadata) #0 declare i32 @llvm.read_register.i32(metadata) #0
define amdgpu_kernel void @test_invalid_read_exec(i32 addrspace(1)* %out) nounwind { define amdgpu_kernel void @test_invalid_read_exec(i32 addrspace(1)* %out) nounwind {
store volatile i32 0, i32 addrspace(3)* undef store volatile i32 0, i32 addrspace(3)* undef
%m0 = call i32 @llvm.read_register.i32(metadata !0) %m0 = call i32 @llvm.read_register.i32(metadata !0)
store i32 %m0, i32 addrspace(1)* %out store i32 %m0, i32 addrspace(1)* %out
ret void ret void
} }
!0 = !{!"exec"} !0 = !{!"exec"}

llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll

; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
; CHECK: invalid type for register "m0". ; CHECK: invalid type for register "m0".
declare i64 @llvm.read_register.i64(metadata) #0 declare i64 @llvm.read_register.i64(metadata) #0
define amdgpu_kernel void @test_invalid_read_m0(i64 addrspace(1)* %out) #0 { define amdgpu_kernel void @test_invalid_read_m0(i64 addrspace(1)* %out) #0 {
%exec = call i64 @llvm.read_register.i64(metadata !0) %exec = call i64 @llvm.read_register.i64(metadata !0)
store i64 %exec, i64 addrspace(1)* %out store i64 %exec, i64 addrspace(1)* %out
ret void ret void
} }
!0 = !{!"m0"} !0 = !{!"m0"}

llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll

; RUN: not llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s ; RUN: not --crash llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
; Make sure this doesn't assert on targets without the r128-16 ; Make sure this doesn't assert on targets without the r128-16
; feature, and instead generates a slection error. ; feature, and instead generates a slection error.
; ERR: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.image.load.1d ; ERR: LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.image.load.1d
define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) { define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
main_body: main_body:
%s = extractelement <2 x i16> %coords, i32 0 %s = extractelement <2 x i16> %coords, i32 0
%v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0) %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
ret <4 x float> %v ret <4 x float> %v
} }
declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #0 declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #0
attributes #0 = { nounwind readonly } attributes #0 = { nounwind readonly }

llvm/test/CodeGen/AMDGPU/verify-sop.mir

# RUN: not llc -march=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s # RUN: not --crash llc -march=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants # CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants
# CHECK: - instruction: %0:sreg_32_xm0 = S_ADD_I32 # CHECK: - instruction: %0:sreg_32_xm0 = S_ADD_I32
# CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants # CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants
# CHECK: - instruction: S_CMP_EQ_U32 # CHECK: - instruction: S_CMP_EQ_U32
# CHECK-NOT: Bad machine code # CHECK-NOT: Bad machine code
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llvm/test/CodeGen/ARM/codemodel.ll

; RUN: not llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
; RUN: not llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel ; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel ; KERNEL: Target does not support the kernel CodeModel
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/ARM/ldc2l.ll

; RUN: not llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ldc2l ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ldc2l
define void @ldc2l(i8* %i) nounwind { define void @ldc2l(i8* %i) nounwind {
entry: entry:
call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) nounwind call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i) nounwind
ret void ret void
} }
declare void @llvm.arm.ldc2l(i32, i32, i8*) nounwind declare void @llvm.arm.ldc2l(i32, i32, i8*) nounwind

llvm/test/CodeGen/ARM/machine-verifier.mir

# RUN: not llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser runs the machine verifier after parsing. # This test ensures that the MIR parser runs the machine verifier after parsing.
--- | --- |
define i32 @inc(i32 %a) { define i32 @inc(i32 %a) {
entry: entry:
ret i32 %a ret i32 %a
} }
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llvm/test/CodeGen/ARM/named-reg-alloc.ll

; RUN: not llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind { define i32 @get_stack() nounwind {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name "r5". ; CHECK: Invalid register name "r5".
%sp = call i32 @llvm.read_register.i32(metadata !0) %sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp ret i32 %sp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"r5\00"} !0 = !{!"r5\00"}

llvm/test/CodeGen/ARM/named-reg-notareg.ll

; RUN: not llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind { define i32 @get_stack() nounwind {
entry: entry:
; CHECK: Invalid register name "notareg". ; CHECK: Invalid register name "notareg".
%sp = call i32 @llvm.read_register.i32(metadata !0) %sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp ret i32 %sp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"notareg\00"} !0 = !{!"notareg\00"}

llvm/test/CodeGen/ARM/special-reg-acore.ll

; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE ; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE
; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=MCORE ; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=MCORE
; MCORE: LLVM ERROR: Invalid register name "cpsr". ; MCORE: LLVM ERROR: Invalid register name "cpsr".
define i32 @read_cpsr() nounwind { define i32 @read_cpsr() nounwind {
; ACORE-LABEL: read_cpsr: ; ACORE-LABEL: read_cpsr:
; ACORE: mrs r0, apsr ; ACORE: mrs r0, apsr
%reg = call i32 @llvm.read_register.i32(metadata !1) %reg = call i32 @llvm.read_register.i32(metadata !1)
ret i32 %reg ret i32 %reg
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llvm/test/CodeGen/ARM/special-reg-mcore.ll

; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 --show-mc-encoding 2>&1 | FileCheck %s --check-prefix=MCORE ; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 --show-mc-encoding 2>&1 | FileCheck %s --check-prefix=MCORE
; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m3 2>&1 | FileCheck %s --check-prefix=M3CORE ; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m3 2>&1 | FileCheck %s --check-prefix=M3CORE
; RUN: not llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE ; RUN: not --crash llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE
; ACORE: LLVM ERROR: Invalid register name "control". ; ACORE: LLVM ERROR: Invalid register name "control".
; M3CORE: LLVM ERROR: Invalid register name "xpsr_nzcvqg". ; M3CORE: LLVM ERROR: Invalid register name "xpsr_nzcvqg".
define i32 @read_mclass_registers() nounwind { define i32 @read_mclass_registers() nounwind {
entry: entry:
; MCORE-LABEL: read_mclass_registers: ; MCORE-LABEL: read_mclass_registers:
; MCORE: mrs r0, apsr @ encoding: [0xef,0xf3,0x00,0x80] ; MCORE: mrs r0, apsr @ encoding: [0xef,0xf3,0x00,0x80]
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llvm/test/CodeGen/ARM/special-reg-v8m-base.ll

; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M ; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M
; RUN: llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s ; RUN: llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s
; V7M: LLVM ERROR: Invalid register name "sp_ns". ; V7M: LLVM ERROR: Invalid register name "sp_ns".
define i32 @read_mclass_registers() nounwind { define i32 @read_mclass_registers() nounwind {
entry: entry:
; CHECK-LABEL: read_mclass_registers: ; CHECK-LABEL: read_mclass_registers:
; CHECK: mrs r0, apsr ; CHECK: mrs r0, apsr
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llvm/test/CodeGen/ARM/special-reg-v8m-main.ll

; RUN: not llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE ; RUN: not --crash llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE
; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -mattr=+dsp 2>&1 | FileCheck %s --check-prefix=MAINLINE ; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -mattr=+dsp 2>&1 | FileCheck %s --check-prefix=MAINLINE
; BASELINE: LLVM ERROR: Invalid register name "faultmask_ns". ; BASELINE: LLVM ERROR: Invalid register name "faultmask_ns".
define i32 @read_mclass_registers() nounwind { define i32 @read_mclass_registers() nounwind {
entry: entry:
; MAINLINE-LABEL: read_mclass_registers: ; MAINLINE-LABEL: read_mclass_registers:
; MAINLINE: mrs r0, apsr ; MAINLINE: mrs r0, apsr
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llvm/test/CodeGen/ARM/ssat-lower.ll

; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument < lower-bound ; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
define i32 @ssat1() nounwind { define i32 @ssat1() nounwind {
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 0) %tmp = call i32 @llvm.arm.ssat(i32 128, i32 0)
ret i32 %tmp ret i32 %tmp
} }
declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone

llvm/test/CodeGen/ARM/ssat-upper.ll

; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument > upper-bound ; immediate argument > upper-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
define i32 @ssat1() nounwind { define i32 @ssat1() nounwind {
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 33) %tmp = call i32 @llvm.arm.ssat(i32 128, i32 33)
ret i32 %tmp ret i32 %tmp
} }
declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone

llvm/test/CodeGen/ARM/ssat-v4t.ll

; RUN: not llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s ; RUN: not --crash llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s
; CHECK: Cannot select: intrinsic %llvm.arm.ssat ; CHECK: Cannot select: intrinsic %llvm.arm.ssat
define i32 @ssat() nounwind { define i32 @ssat() nounwind {
%tmp = call i32 @llvm.arm.ssat(i32 128, i32 1) %tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
ret i32 %tmp ret i32 %tmp
} }
declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone

llvm/test/CodeGen/ARM/stc2.ll

; RUN: not llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.stc2 ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.stc2
define void @stc2(i8* %i) nounwind { define void @stc2(i8* %i) nounwind {
entry: entry:
call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) nounwind call void @llvm.arm.stc2(i32 1, i32 2, i8* %i) nounwind
ret void ret void
} }
declare void @llvm.arm.stc2(i32, i32, i8*) nounwind declare void @llvm.arm.stc2(i32, i32, i8*) nounwind

llvm/test/CodeGen/ARM/usat-lower.ll

; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument < lower-bound ; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
define i32 @usat1() nounwind { define i32 @usat1() nounwind {
%tmp = call i32 @llvm.arm.usat(i32 128, i32 -1) %tmp = call i32 @llvm.arm.usat(i32 128, i32 -1)
ret i32 %tmp ret i32 %tmp
} }
declare i32 @llvm.arm.usat(i32, i32) nounwind readnone declare i32 @llvm.arm.usat(i32, i32) nounwind readnone

llvm/test/CodeGen/ARM/usat-upper.ll

; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument > upper-bound ; immediate argument > upper-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
define i32 @usat1() nounwind { define i32 @usat1() nounwind {
%tmp = call i32 @llvm.arm.usat(i32 128, i32 32) %tmp = call i32 @llvm.arm.usat(i32 128, i32 32)
ret i32 %tmp ret i32 %tmp
} }
declare i32 @llvm.arm.usat(i32, i32) nounwind readnone declare i32 @llvm.arm.usat(i32, i32) nounwind readnone

llvm/test/CodeGen/ARM/usat-v4t.ll

; RUN: not llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s ; RUN: not --crash llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
define i32 @usat1() nounwind { define i32 @usat1() nounwind {
%tmp = call i32 @llvm.arm.usat(i32 128, i32 31) %tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
ret i32 %tmp ret i32 %tmp
} }
declare i32 @llvm.arm.usat(i32, i32) nounwind readnone declare i32 @llvm.arm.usat(i32, i32) nounwind readnone

llvm/test/CodeGen/BPF/sdiv_error.ll

; RUN: not llc -march=bpf < %s 2> %t1 ; RUN: not --crash llc -march=bpf < %s 2> %t1
; RUN: FileCheck %s < %t1 ; RUN: FileCheck %s < %t1
; CHECK: Unsupport signed division ; CHECK: Unsupport signed division
; Function Attrs: norecurse nounwind readnone ; Function Attrs: norecurse nounwind readnone
define i32 @test(i32 %len) #0 { define i32 @test(i32 %len) #0 {
%1 = srem i32 %len, 15 %1 = srem i32 %len, 15
ret i32 %1 ret i32 %1
} }

llvm/test/CodeGen/BPF/xadd.ll

; RUN: not llc -march=bpfel < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=bpfel < %s 2>&1 | FileCheck %s
; RUN: not llc -march=bpfeb < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=bpfeb < %s 2>&1 | FileCheck %s
; RUN: not llc -march=bpfel -mattr=+alu32 < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=bpfel -mattr=+alu32 < %s 2>&1 | FileCheck %s
; RUN: not llc -march=bpfeb -mattr=+alu32 < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=bpfeb -mattr=+alu32 < %s 2>&1 | FileCheck %s
; This file is generated with the source command and source ; This file is generated with the source command and source
; $ clang -target bpf -O2 -g -S -emit-llvm t.c ; $ clang -target bpf -O2 -g -S -emit-llvm t.c
; $ cat t.c ; $ cat t.c
; int test(int *ptr) { ; int test(int *ptr) {
; int r; ; int r;
; __sync_fetch_and_add(ptr, 4); ; __sync_fetch_and_add(ptr, 4);
; r = __sync_fetch_and_add(ptr, 6); ; r = __sync_fetch_and_add(ptr, 6);
▲ Show 20 Lines • Show All 49 Lines • Show Last 20 Lines

llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll

; RUN: not llc -debug-pass=Structure -stop-after=dead-mi-elimination,arst %s -o /dev/null 2>&1 \ ; RUN: not --crash llc -debug-pass=Structure -stop-after=dead-mi-elimination,arst %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=NOT-NUM %s ; RUN: | FileCheck -check-prefix=NOT-NUM %s
; NOT-NUM: LLVM ERROR: invalid pass instance specifier dead-mi-elimination,arst ; NOT-NUM: LLVM ERROR: invalid pass instance specifier dead-mi-elimination,arst

llvm/test/CodeGen/Generic/llc-start-stop.ll

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; START-AFTER-NEXT: Dominator Tree Construction ; START-AFTER-NEXT: Dominator Tree Construction
; RUN: llc < %s -debug-pass=Structure -start-before=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-BEFORE ; RUN: llc < %s -debug-pass=Structure -start-before=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-BEFORE
; START-BEFORE: -machine-branch-prob -domtree ; START-BEFORE: -machine-branch-prob -domtree
; START-BEFORE: FunctionPass Manager ; START-BEFORE: FunctionPass Manager
; START-BEFORE: Loop Strength Reduction ; START-BEFORE: Loop Strength Reduction
; START-BEFORE-NEXT: Basic Alias Analysis (stateless AA impl) ; START-BEFORE-NEXT: Basic Alias Analysis (stateless AA impl)
; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE ; RUN: not --crash llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE
; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE ; RUN: not --crash llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE
; RUN: not llc < %s -start-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-AFTER ; RUN: not --crash llc < %s -start-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-AFTER
; RUN: not llc < %s -stop-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-AFTER ; RUN: not --crash llc < %s -stop-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-AFTER
; NONEXISTENT-START-BEFORE: "nonexistent" pass is not registered. ; NONEXISTENT-START-BEFORE: "nonexistent" pass is not registered.
; NONEXISTENT-STOP-BEFORE: "nonexistent" pass is not registered. ; NONEXISTENT-STOP-BEFORE: "nonexistent" pass is not registered.
; NONEXISTENT-START-AFTER: "nonexistent" pass is not registered. ; NONEXISTENT-START-AFTER: "nonexistent" pass is not registered.
; NONEXISTENT-STOP-AFTER: "nonexistent" pass is not registered. ; NONEXISTENT-STOP-AFTER: "nonexistent" pass is not registered.
; RUN: not llc < %s -start-before=loop-reduce -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-START ; RUN: not --crash llc < %s -start-before=loop-reduce -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-START
; RUN: not llc < %s -stop-before=loop-reduce -stop-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-STOP ; RUN: not --crash llc < %s -stop-before=loop-reduce -stop-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-STOP
; DOUBLE-START: start-before and start-after specified! ; DOUBLE-START: start-before and start-after specified!
; DOUBLE-STOP: stop-before and stop-after specified! ; DOUBLE-STOP: stop-before and stop-after specified!

llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll

; RUN: not opt %s -dwarfehprepare -o - 2>&1 | FileCheck %s ; RUN: not --crash opt %s -dwarfehprepare -o - 2>&1 | FileCheck %s
; CHECK: Trying to construct TargetPassConfig without a target machine. Scheduling a CodeGen pass without a target triple set? ; CHECK: Trying to construct TargetPassConfig without a target machine. Scheduling a CodeGen pass without a target triple set?

llvm/test/CodeGen/Hexagon/misaligned-const-load.ll

; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=hexagon < %s 2>&1 | FileCheck %s
; Check that the misaligned load is diagnosed. ; Check that the misaligned load is diagnosed.
; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-load.c:2:10 ; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-load.c:2:10
target triple = "hexagon" target triple = "hexagon"
define i32 @bad_load() #0 !dbg !10 { define i32 @bad_load() #0 !dbg !10 {
entry: entry:
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llvm/test/CodeGen/Hexagon/misaligned-const-store.ll

; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -march=hexagon < %s 2>&1 | FileCheck %s
; Check that the misaligned store is diagnosed. ; Check that the misaligned store is diagnosed.
; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-store.c:2:10 ; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-store.c:2:10
target triple = "hexagon" target triple = "hexagon"
define void @bad_store(i32 %a0) #0 !dbg !10 { define void @bad_store(i32 %a0) #0 !dbg !10 {
entry: entry:
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llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir

# Using a trick to run simple-register-coalescing twice, that way # Using a trick to run simple-register-coalescing twice, that way
# liveintervals should be preserved while running the machine verifier. # liveintervals should be preserved while running the machine verifier.
# #
# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s # RUN: not --crash llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s
# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s # RUN: not --crash llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s
--- ---
name: test_pass name: test_pass
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
A2_nop implicit-def %0:doubleregs A2_nop implicit-def %0:doubleregs
A2_nop implicit-def dead %0.isub_lo, implicit-def %0.isub_hi, implicit %0 A2_nop implicit-def dead %0.isub_lo, implicit-def %0.isub_hi, implicit %0
▲ Show 20 Lines • Show All 61 Lines • Show Last 20 Lines

llvm/test/CodeGen/Lanai/codemodel.ll

; RUN: llc -march=lanai < %s | FileCheck %s ; RUN: llc -march=lanai < %s | FileCheck %s
; RUN: llc -march=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s ; RUN: llc -march=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
; RUN: not llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s ; RUN: not --crash llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
; RUN: not llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s ; RUN: not --crash llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s
; CHECK-TINY: Target does not support the tiny CodeModel ; CHECK-TINY: Target does not support the tiny CodeModel
; CHECK-KERNEL: Target does not support the kernel CodeModel ; CHECK-KERNEL: Target does not support the kernel CodeModel
@data = external global [0 x i32] ; <[0 x i32]*> [#uses=5] @data = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
define i32 @foo() nounwind readonly { define i32 @foo() nounwind readonly {
entry: entry:
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llvm/test/CodeGen/MIR/X86/machine-verifier.mir

# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser runs the machine verifier after parsing. # This test ensures that the MIR parser runs the machine verifier after parsing.
--- | --- |
define i32 @inc(i32 %a) { define i32 @inc(i32 %a) {
entry: entry:
ret i32 %a ret i32 %a
} }
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llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir

# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the Machine Verifier detects tied physical registers # This test ensures that the Machine Verifier detects tied physical registers
# that doesn't match. # that doesn't match.
--- | --- |
define i32 @foo() { define i32 @foo() {
entry: entry:
ret i32 0 ret i32 0
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llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll

; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \ ; RUN: not --crash llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \
; RUN: -O0 -relocation-model=pic -fast-isel-abort=3 < %s ; RUN: -O0 -relocation-model=pic -fast-isel-abort=3 < %s
; Check that FastISel aborts when we have 64bit FPU registers. FastISel currently ; Check that FastISel aborts when we have 64bit FPU registers. FastISel currently
; supports AFGR64 only, which uses paired 32 bit registers. ; supports AFGR64 only, which uses paired 32 bit registers.
define zeroext i1 @f(double %value) { define zeroext i1 @f(double %value) {
entry: entry:
; CHECK-LABEL: f: ; CHECK-LABEL: f:
; CHECK: sdc1 ; CHECK: sdc1
%value.addr = alloca double, align 8 %value.addr = alloca double, align 8
store double %value, double* %value.addr, align 8 store double %value, double* %value.addr, align 8
ret i1 false ret i1 false
} }

llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll

; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \ ; RUN: not --crash llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \
; RUN: -O0 -fast-isel-abort=3 -relocation-model=pic < %s ; RUN: -O0 -fast-isel-abort=3 -relocation-model=pic < %s
; Test that FastISel aborts instead of trying to lower arguments for soft-float. ; Test that FastISel aborts instead of trying to lower arguments for soft-float.
define void @__signbit(double %__x) { define void @__signbit(double %__x) {
entry: entry:
%__x.addr = alloca double, align 8 %__x.addr = alloca double, align 8
store double %__x, double* %__x.addr, align 8 store double %__x, double* %__x.addr, align 8
ret void ret void
} }

llvm/test/CodeGen/Mips/cpus-no-mips64.ll

; Check that we reject 64-bit mode on 32-bit only CPUs. ; Check that we reject 64-bit mode on 32-bit only CPUs.
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! ; CHECK: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/Mips/cpus.ll

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; OCTEON: ISA Extension: Cavium Networks Octeon ; OCTEON: ISA Extension: Cavium Networks Octeon
; RUN: llc -mtriple=mips64 -mcpu=octeon+ -filetype=obj < %s \ ; RUN: llc -mtriple=mips64 -mcpu=octeon+ -filetype=obj < %s \
; RUN: | llvm-readelf -A | FileCheck %s --check-prefix=OCTEONP ; RUN: | llvm-readelf -A | FileCheck %s --check-prefix=OCTEONP
; OCTEONP: ISA: MIPS64r2 ; OCTEONP: ISA: MIPS64r2
; OCTEONP: ISA Extension: Cavium Networks OcteonP ; OCTEONP: ISA Extension: Cavium Networks OcteonP
; Check that we reject CPUs that are not implemented. ; Check that we reject CPUs that are not implemented.
; RUN: not llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \ ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \
; RUN: | FileCheck %s --check-prefix=ERROR ; RUN: | FileCheck %s --check-prefix=ERROR
; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \ ; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \
; RUN: | FileCheck %s --check-prefix=ERROR ; RUN: | FileCheck %s --check-prefix=ERROR
; ERROR: LLVM ERROR: Code generation for MIPS-{{.}} is not implemented ; ERROR: LLVM ERROR: Code generation for MIPS-{{.}} is not implemented
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/Mips/fp64a.ll

; Test that the FP64A ABI performs double precision moves via a spill/reload. ; Test that the FP64A ABI performs double precision moves via a spill/reload.
; The requirement is really that odd-numbered double precision registers do not ; The requirement is really that odd-numbered double precision registers do not
; use mfc1/mtc1 to move the bottom 32-bits (because the hardware will redirect ; use mfc1/mtc1 to move the bottom 32-bits (because the hardware will redirect
; this to the top 32-bits of the even register) but we have to make the decision ; this to the top 32-bits of the even register) but we have to make the decision
; before register allocation so we do this for all double-precision values. ; before register allocation so we do this for all double-precision values.
; We don't test MIPS32r1 since support for 64-bit coprocessors (such as a 64-bit ; We don't test MIPS32r1 since support for 64-bit coprocessors (such as a 64-bit
; FPU) on a 32-bit architecture was added in MIPS32r2. ; FPU) on a 32-bit architecture was added in MIPS32r2.
; RUN: not llc -march=mips -mcpu=mips32 -mattr=fp64 < %s 2>&1 | FileCheck %s -check-prefix=32R1-FP64 ; RUN: not --crash llc -march=mips -mcpu=mips32 -mattr=fp64 < %s 2>&1 | FileCheck %s -check-prefix=32R1-FP64
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-BE ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-BE
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-LE ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-LE
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A
; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A
; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A ; RUN: not --crash llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A
; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A ; RUN: not --crash llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
; 32R1-FP64: LLVM ERROR: FPU with 64-bit registers is not available on MIPS32 pre revision 2. Use -mcpu=mips32r2 or greater. ; 32R1-FP64: LLVM ERROR: FPU with 64-bit registers is not available on MIPS32 pre revision 2. Use -mcpu=mips32r2 or greater.
; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI. ; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI.
declare double @dbl(); declare double @dbl();
define double @call1(double %d, ...) { define double @call1(double %d, ...) {
ret double %d ret double %d
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llvm/test/CodeGen/Mips/fpxx.ll

; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefixes=ALL,32-NOFPXX ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefixes=ALL,32-NOFPXX
; RUN: llc -march=mipsel -mcpu=mips32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,32-FPXX ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,32-FPXX
; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=ALL,32R2-NOFPXX ; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=ALL,32R2-NOFPXX
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,32R2-FPXX ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,32R2-FPXX
; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,4-NOFPXX ; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,4-NOFPXX
; RUN: not llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX ; RUN: not --crash llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX
; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,64-NOFPXX ; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,64-NOFPXX
; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX ; RUN: not --crash llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX
; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,4-O32-NOFPXX ; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,4-O32-NOFPXX
; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,4-O32-FPXX ; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,4-O32-FPXX
; RUN-TODO: llc -march=mips64 -mcpu=mips64 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,64-O32-NOFPXX ; RUN-TODO: llc -march=mips64 -mcpu=mips64 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,64-O32-NOFPXX
; RUN-TODO: llc -march=mips64 -mcpu=mips64 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,64-O32-FPXX ; RUN-TODO: llc -march=mips64 -mcpu=mips64 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,64-O32-FPXX
declare double @dbl(); declare double @dbl();
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llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir

# RUN: not llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \ # RUN: not --crash llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \
# RUN: -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \ # RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \
# RUN: | FileCheck %s # RUN: | FileCheck %s
# Test that calls are checked when using indirect jumps guards (hazard variant). # Test that calls are checked when using indirect jumps guards (hazard variant).
# CHECK: Bad machine code: invalid instruction when using jump guards! # CHECK: Bad machine code: invalid instruction when using jump guards!
--- | --- |
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llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir

# RUN: not llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \ # RUN: not --crash llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \
# RUN: -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \ # RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \
# RUN: | FileCheck %s # RUN: | FileCheck %s
# That that tail calls are checked when using indirect jump guards (hazard variant). # That that tail calls are checked when using indirect jump guards (hazard variant).
# CHECK: Bad machine code: invalid instruction when using jump guards! # CHECK: Bad machine code: invalid instruction when using jump guards!
--- | --- |
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llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll

; RUN: not llc -mtriple=mips-unknown-linux -mcpu=mips32r2 -mattr=+micromips,+use-indirect-jump-hazard %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=mips-unknown-linux -mcpu=mips32r2 -mattr=+micromips,+use-indirect-jump-hazard %s 2>&1 | FileCheck %s
; Test that microMIPS and indirect jump with hazard barriers is not supported. ; Test that microMIPS and indirect jump with hazard barriers is not supported.
; CHECK: LLVM ERROR: cannot combine indirect jumps with hazard barriers and microMIPS ; CHECK: LLVM ERROR: cannot combine indirect jumps with hazard barriers and microMIPS

llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll

; RUN: not llc -mtriple=mips-unknown-linux -mcpu=mips32 -mattr=+use-indirect-jump-hazard %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=mips-unknown-linux -mcpu=mips32 -mattr=+use-indirect-jump-hazard %s 2>&1 | FileCheck %s
; Test that mips32 and indirect jump with hazard barriers is not supported. ; Test that mips32 and indirect jump with hazard barriers is not supported.
; CHECK: LLVM ERROR: indirect jumps with hazard barriers requires MIPS32R2 or later ; CHECK: LLVM ERROR: indirect jumps with hazard barriers requires MIPS32R2 or later

llvm/test/CodeGen/Mips/instverify/dext-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 0..31 # Check that the machine verifier checks the position operand is in the range 0..31
--- ---
name: dext name: dext
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dext-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 1..32 # Check that the machine verifier checks the size operand is in the range 1..32
--- ---
name: dext name: dext
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 33..64 # Check that the machine verifier checks the pos + size is in the range 33..64
--- ---
name: dextm name: dextm
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dextm-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 0..31 # Check that the machine verifier checks the position operand is in the range 0..31
--- ---
name: dextm name: dextm
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dextm-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 33..64 # Check that the machine verifier checks the size operand is in the range 33..64
--- ---
name: dextm name: dextm
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 33..64 # Check that the machine verifier checks the pos + size is in the range 33..64
--- ---
name: dextu name: dextu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dextu-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 32..63 # Check that the machine verifier checks the position operand is in the range 32..63
--- ---
name: dextu name: dextu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dextu-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 1..32 # Check that the machine verifier checks the size operand is in the range 1..32
--- ---
name: dextu name: dextu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 1..32 # Check that the machine verifier checks the pos + size is in the range 1..32
--- ---
name: dins name: dins
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dins-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 0..31 # Check that the machine verifier checks the position operand is in the range 0..31
--- ---
name: dins name: dins
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dins-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 1..32 # Check that the machine verifier checks the size operand is in the range 1..32
--- ---
name: dins name: dins
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 33..64 # Check that the machine verifier checks the pos + size is in the range 33..64
--- ---
name: dinsu name: dinsu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 0..31 # Check that the machine verifier checks the position operand is in the range 0..31
--- ---
name: dinsm name: dinsm
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dinsm-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 2..64 # Check that the machine verifier checks the size operand is in the range 2..64
--- ---
name: dinsm name: dinsm
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 33..64 # Check that the machine verifier checks the pos + size is in the range 33..64
--- ---
name: dinsu name: dinsu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 32..63 # Check that the machine verifier checks the position operand is in the range 32..63
--- ---
name: dinsu name: dinsu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/dinsu-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 1..32 # Check that the machine verifier checks the size operand is in the range 1..32
--- ---
name: dinsu name: dinsu
alignment: 8 alignment: 8
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llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 1..32 # Check that the machine verifier checks the pos + size is in the range 1..32
--- ---
name: f name: f
alignment: 4 alignment: 4
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llvm/test/CodeGen/Mips/instverify/ext-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 0..31 # Check that the machine verifier checks the position operand is in the range 0..31
--- ---
name: f name: f
alignment: 4 alignment: 4
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llvm/test/CodeGen/Mips/instverify/ext-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 1..32 # Check that the machine verifier checks the size operand is in the range 1..32
--- ---
name: f name: f
alignment: 4 alignment: 4
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llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range! # CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 1..32 # Check that the machine verifier checks the pos + size is in the range 1..32
--- ---
name: f name: f
alignment: 4 alignment: 4
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llvm/test/CodeGen/Mips/instverify/ins-pos.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range! # CHECK: Position operand is out of range!
# Check that the machine verifier checks the position operand is in the range 0..31 # Check that the machine verifier checks the position operand is in the range 0..31
--- ---
name: f name: f
alignment: 4 alignment: 4
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llvm/test/CodeGen/Mips/instverify/ins-size.mir

# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \ # RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s # RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range! # CHECK: Size operand is out of range!
# Check that the machine verifier checks the size operand is in the range 1..32 # Check that the machine verifier checks the size operand is in the range 1..32
--- ---
name: f name: f
alignment: 4 alignment: 4
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llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll

; RUN: not llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t ; RUN: not --crash llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t
; RUN: FileCheck %s < %t ; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time. ; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time.
define i32 @isr_sw0() #0 { define i32 @isr_sw0() #0 {
ret i32 0 ret i32 0
} }
attributes #0 = { "interrupt"="sw0" } attributes #0 = { "interrupt"="sw0" }

llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll

; RUN: not llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t ; RUN: not --crash llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t
; RUN: FileCheck %s < %t ; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments! ; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments!
define i32 @isr_sw0(i8 signext %n) #0 { define i32 @isr_sw0(i8 signext %n) #0 {
ret i32 0 ret i32 0
} }
attributes #0 = { "interrupt"="sw0" } attributes #0 = { "interrupt"="sw0" }

llvm/test/CodeGen/Mips/interrupt-attr-error.ll

; RUN: not llc -mcpu=mips32 -march=mipsel -relocation-model=static < %s 2>%t ; RUN: not --crash llc -mcpu=mips32 -march=mipsel -relocation-model=static < %s 2>%t
; RUN: FileCheck %s < %t ; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets. ; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets.
define i32 @isr_sw0() #0 { define i32 @isr_sw0() #0 {
ret i32 0 ret i32 0
} }
attributes #0 = { "interrupt"="sw0" } attributes #0 = { "interrupt"="sw0" }

llvm/test/CodeGen/Mips/micromips64-unsupported.ll

; RUN: not llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64R6 ; RUN: not --crash llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64R6
; RUN: not llc -mtriple=mips64-unknown-linux -mcpu=mips64 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64 ; RUN: not --crash llc -mtriple=mips64-unknown-linux -mcpu=mips64 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64
; Test that microMIPS64(R6) is not supported. ; Test that microMIPS64(R6) is not supported.
; MICROMIPS64R6: LLVM ERROR: microMIPS64R6 is not supported ; MICROMIPS64R6: LLVM ERROR: microMIPS64R6 is not supported
; MICROMIPS64: LLVM ERROR: microMIPS64 is not supported ; MICROMIPS64: LLVM ERROR: microMIPS64 is not supported

llvm/test/CodeGen/Mips/mips32r6/compatibility.ll

; RUN: llc -march=mipsel -mcpu=mips32r6 < %s | FileCheck %s ; RUN: llc -march=mipsel -mcpu=mips32r6 < %s | FileCheck %s
; RUN: not llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s ; RUN: not --crash llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
; CHECK: foo: ; CHECK: foo:
; DSP: MIPS32r6 is not compatible with the DSP ASE ; DSP: MIPS32r6 is not compatible with the DSP ASE
define void @foo() nounwind { define void @foo() nounwind {
ret void ret void
} }

llvm/test/CodeGen/Mips/mips64r6/compatibility.ll

; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s ; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s
; RUN: not llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s ; RUN: not --crash llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
; CHECK: foo: ; CHECK: foo:
; DSP: MIPS64r6 is not compatible with the DSP ASE ; DSP: MIPS64r6 is not compatible with the DSP ASE
define void @foo() nounwind { define void @foo() nounwind {
ret void ret void
} }

llvm/test/CodeGen/Mips/msa/3r-a.ll

; Test the MSA intrinsics that are encoded with the 3R instruction format. ; Test the MSA intrinsics that are encoded with the 3R instruction format.
; There are lots of these so this covers those beginning with 'a' ; There are lots of these so this covers those beginning with 'a'
; RUN: llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s | FileCheck %s ; RUN: llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s | FileCheck %s
; RUN: llc -march=mipsel -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s | FileCheck %s ; RUN: llc -march=mipsel -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s | FileCheck %s
; It should fail to compile without fp64. ; It should fail to compile without fp64.
; RUN: not llc -march=mips -mattr=+msa < %s 2>&1 | \ ; RUN: not --crash llc -march=mips -mattr=+msa < %s 2>&1 | \
; RUN: FileCheck -check-prefix=FP32ERROR %s ; RUN: FileCheck -check-prefix=FP32ERROR %s
; FP32ERROR: LLVM ERROR: MSA requires a 64-bit FPU register file (FR=1 mode). ; FP32ERROR: LLVM ERROR: MSA requires a 64-bit FPU register file (FR=1 mode).
@llvm_mips_add_a_b_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16 @llvm_mips_add_a_b_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
@llvm_mips_add_a_b_ARG2 = global <16 x i8> <i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, align 16 @llvm_mips_add_a_b_ARG2 = global <16 x i8> <i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, align 16
@llvm_mips_add_a_b_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16 @llvm_mips_add_a_b_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16
define void @llvm_mips_add_a_b_test() nounwind { define void @llvm_mips_add_a_b_test() nounwind {
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llvm/test/CodeGen/Mips/msa/immediates-bad.ll

; RUN: not llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s 2> %t1 ; RUN: not --crash llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s 2> %t1
; RUN: FileCheck %s < %t1 ; RUN: FileCheck %s < %t1
; Test that the immediate intrinsics with out of range values trigger an error. ; Test that the immediate intrinsics with out of range values trigger an error.
define void @binsli_b(<16 x i8> * %ptr) { define void @binsli_b(<16 x i8> * %ptr) {
entry: entry:
%a = load <16 x i8>, <16 x i8> * %ptr, align 16 %a = load <16 x i8>, <16 x i8> * %ptr, align 16
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llvm/test/CodeGen/NVPTX/alias.ll

; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that llc dies gracefully when given an alias. ; Check that llc dies gracefully when given an alias.
define i32 @a() { ret i32 0 } define i32 @a() { ret i32 0 }
; CHECK: ERROR: Module has aliases ; CHECK: ERROR: Module has aliases
@b = internal alias i32 (), i32 ()* @a @b = internal alias i32 (), i32 ()* @a

llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll

; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that we fail to select fcos without fast-math enabled ; Check that we fail to select fcos without fast-math enabled
declare float @llvm.cos.f32(float) declare float @llvm.cos.f32(float)
; CHECK: LLVM ERROR: Cannot select: {{.*}}: f32 = fcos ; CHECK: LLVM ERROR: Cannot select: {{.*}}: f32 = fcos
; CHECK: In function: test_fcos_safe ; CHECK: In function: test_fcos_safe
define float @test_fcos_safe(float %a) #0 { define float @test_fcos_safe(float %a) #0 {
%r = tail call float @llvm.cos.f32(float %a) %r = tail call float @llvm.cos.f32(float %a)
ret float %r ret float %r
} }
attributes #0 = { "unsafe-fp-math" = "false" } attributes #0 = { "unsafe-fp-math" = "false" }

llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll

; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that we fail to select fsin without fast-math enabled ; Check that we fail to select fsin without fast-math enabled
declare float @llvm.sin.f32(float) declare float @llvm.sin.f32(float)
; CHECK: LLVM ERROR: Cannot select: {{.*}}: f32 = fsin ; CHECK: LLVM ERROR: Cannot select: {{.*}}: f32 = fsin
; CHECK: In function: test_fsin_safe ; CHECK: In function: test_fsin_safe
define float @test_fsin_safe(float %a) #0 { define float @test_fsin_safe(float %a) #0 {
%r = tail call float @llvm.sin.f32(float %a) %r = tail call float @llvm.sin.f32(float %a)
ret float %r ret float %r
} }
attributes #0 = { "unsafe-fp-math" = "false" } attributes #0 = { "unsafe-fp-math" = "false" }

llvm/test/CodeGen/NVPTX/global-ctor.ll

; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that llc dies when given a nonempty global ctor. ; Check that llc dies when given a nonempty global ctor.
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }] @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
; CHECK: ERROR: Module has a nontrivial global ctor ; CHECK: ERROR: Module has a nontrivial global ctor
define internal void @foo() { define internal void @foo() {
ret void ret void
} }

llvm/test/CodeGen/NVPTX/global-dtor.ll

; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that llc dies when given a nonempty global dtor. ; Check that llc dies when given a nonempty global dtor.
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }] @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
; CHECK: ERROR: Module has a nontrivial global dtor ; CHECK: ERROR: Module has a nontrivial global dtor
define internal void @foo() { define internal void @foo() {
ret void ret void
} }

llvm/test/CodeGen/NVPTX/libcall-instruction.ll

; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx 2>&1 | FileCheck %s
; used to panic on failed assertion and now fails with an "Undefined external symbol" ; used to panic on failed assertion and now fails with an "Undefined external symbol"
; CHECK: LLVM ERROR: Undefined external symbol "__umodti3" ; CHECK: LLVM ERROR: Undefined external symbol "__umodti3"
define hidden i128 @remainder(i128, i128) { define hidden i128 @remainder(i128, i128) {
%3 = urem i128 %0, %1 %3 = urem i128 %0, %1
ret i128 %3 ret i128 %3
} }

llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll

; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=nvptx 2>&1 | FileCheck %s
; used to seqfault and now fails with an "Undefined external symbol" ; used to seqfault and now fails with an "Undefined external symbol"
; CHECK: LLVM ERROR: Undefined external symbol "__powidf2" ; CHECK: LLVM ERROR: Undefined external symbol "__powidf2"
define double @powi(double, i32) { define double @powi(double, i32) {
%a = call double @llvm.powi.f64(double %0, i32 %1) %a = call double @llvm.powi.f64(double %0, i32 %1)
ret double %a ret double %a
} }
declare double @llvm.powi.f64(double, i32) nounwind readnone declare double @llvm.powi.f64(double, i32) nounwind readnone

llvm/test/CodeGen/PowerPC/aix-byval-param.ll

; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
%struct.S = type { i32, i32 } %struct.S = type { i32, i32 }
define void @bar() { define void @bar() {
entry: entry:
%s1 = alloca %struct.S, align 4 %s1 = alloca %struct.S, align 4
%agg.tmp = alloca %struct.S, align 4 %agg.tmp = alloca %struct.S, align 4
call void @foo(%struct.S* byval(%struct.S) align 4 %agg.tmp) call void @foo(%struct.S* byval(%struct.S) align 4 %agg.tmp)
ret void ret void
} }
declare void @foo(%struct.S* byval(%struct.S) align 4) declare void @foo(%struct.S* byval(%struct.S) align 4)
; CHECK: LLVM ERROR: Passing structure by value is unimplemented. ; CHECK: LLVM ERROR: Passing structure by value is unimplemented.

llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll

; RUN: not llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s
; This test expects a compiler diagnostic for an AIX limitation on Altivec ; This test expects a compiler diagnostic for an AIX limitation on Altivec
; support. When the Altivec limitation diagnostic is removed, this test ; support. When the Altivec limitation diagnostic is removed, this test
; should compile clean and fail in order to alert the author to validate the ; should compile clean and fail in order to alert the author to validate the
; instructions emitted to initialize the GPR for the double vararg. ; instructions emitted to initialize the GPR for the double vararg.
; The mfvsrwz and mfvsrd instructions should be used to initialize the GPR for ; The mfvsrwz and mfvsrd instructions should be used to initialize the GPR for
; the double vararg without going through memory. ; the double vararg without going through memory.
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llvm/test/CodeGen/PowerPC/aix-nest-param.ll

; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
define i8* @nest_receiver(i8* nest %arg) nounwind { define i8* @nest_receiver(i8* nest %arg) nounwind {
ret i8* %arg ret i8* %arg
} }
define i8* @nest_caller(i8* %arg) nounwind { define i8* @nest_caller(i8* %arg) nounwind {
%result = call i8* @nest_receiver(i8* nest %arg) %result = call i8* @nest_receiver(i8* nest %arg)
ret i8* %result ret i8* %result
} }
; CHECK: LLVM ERROR: Nest arguments are unimplemented. ; CHECK: LLVM ERROR: Nest arguments are unimplemented.

llvm/test/CodeGen/PowerPC/aix-trampoline.ll

; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: INIT_TRAMPOLINE operation is not supported on AIX. ; CHECK: LLVM ERROR: INIT_TRAMPOLINE operation is not supported on AIX.
define void @create_trampoline(i8* %buffer, i8* %nval) nounwind { define void @create_trampoline(i8* %buffer, i8* %nval) nounwind {
entry: entry:
call void @llvm.init.trampoline(i8* %buffer, i8* bitcast (i32 (i32)* @nested to i8*) , i8* %nval) call void @llvm.init.trampoline(i8* %buffer, i8* bitcast (i32 (i32)* @nested to i8*) , i8* %nval)
ret void ret void
} }
declare i32 @nested(i32); declare i32 @nested(i32);
declare void @llvm.init.trampoline(i8*, i8*, i8*) nounwind declare void @llvm.init.trampoline(i8*, i8*, i8*) nounwind

llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll

; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \ ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s ; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s
; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \ ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \
; RUN: --check-prefix=32-REL %s ; RUN: --check-prefix=32-REL %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s
; RUN: not llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \ ; RUN: not --crash llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj < %s 2>&1 | FileCheck \ ; RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj < %s 2>&1 | FileCheck \
; RUN: --check-prefix=64-CHECK %s ; RUN: --check-prefix=64-CHECK %s
; Test verifies: ; Test verifies:
; If there exists a user-defined function whose name is the same as the ; If there exists a user-defined function whose name is the same as the
; "memcpy" ExternalSymbol's, we pick up the user-defined version, even if this ; "memcpy" ExternalSymbol's, we pick up the user-defined version, even if this
; may lead to some undefined behavior. ; may lead to some undefined behavior.
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llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll

; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=OBJ64 %s ; RUN: FileCheck --check-prefix=OBJ64 %s
; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. ; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@a = external global i32, align 4 @a = external global i32, align 4
@b = external global i64, align 8 @b = external global i64, align 8
@c = external global i16, align 2 @c = external global i16, align 2
@globa = common global i32 0, align 4 @globa = common global i32 0, align 4
@ptr = internal global void (...)* null, align 4 @ptr = internal global void (...)* null, align 4
; CHECK-NOT: .toc ; CHECK-NOT: .toc
; SYMS-NOT: Name: TOC ; SYMS-NOT: Name: TOC

llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll

; This file tests the codegen of initialized and common variables in AIX ; This file tests the codegen of initialized and common variables in AIX
; assembly and XCOFF object files. ; assembly and XCOFF object files.
; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \ ; RUN: llvm-readobj --section-headers --file-header %t.o | \
; RUN: FileCheck --check-prefix=OBJ %s ; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=XCOFF64 %s ; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@ivar = local_unnamed_addr global i32 35, align 4 @ivar = local_unnamed_addr global i32 35, align 4
@llvar = local_unnamed_addr global i64 36, align 8 @llvar = local_unnamed_addr global i64 36, align 8
@svar = local_unnamed_addr global i16 37, align 2 @svar = local_unnamed_addr global i16 37, align 2
@fvar = local_unnamed_addr global float 8.000000e+02, align 4 @fvar = local_unnamed_addr global float 8.000000e+02, align 4
@dvar = local_unnamed_addr global double 9.000000e+02, align 8 @dvar = local_unnamed_addr global double 9.000000e+02, align 8
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llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll

; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \ ; RUN: llvm-readobj --section-headers --file-header %t.o | \
; RUN: FileCheck --check-prefix=OBJ %s ; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=OBJ64 %s ; RUN: FileCheck --check-prefix=OBJ64 %s
; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. ; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@a = internal global i32 0, align 4 @a = internal global i32 0, align 4
@b = internal global i64 0, align 8 @b = internal global i64 0, align 8
@c = internal global i16 0, align 2 @c = internal global i16 0, align 2
; CHECK: .lcomm a,4,a[BS],2 ; CHECK: .lcomm a,4,a[BS],2
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llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec -filetype=obj -o %t.o < %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \ ; RUN: llvm-readobj --section-headers --file-header %t.o | \
; RUN: FileCheck --check-prefix=OBJ %s ; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
; RUN: llvm-readobj -t %t.o | FileCheck --check-prefix=SYM %s ; RUN: llvm-readobj -t %t.o | FileCheck --check-prefix=SYM %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \ ; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=XCOFF64 %s ; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@globalA = global i32 1, align 4 @globalA = global i32 1, align 4
@globalB = global i32 2, align 4 @globalB = global i32 2, align 4
@arr = global <{ i32, [9 x i32] }> <{ i32 3, [9 x i32] zeroinitializer }>, align 4 @arr = global <{ i32, [9 x i32] }> <{ i32 3, [9 x i32] zeroinitializer }>, align 4
@p = global i32* bitcast (i8* getelementptr (i8, i8* bitcast (<{ i32, [9 x i32] }>* @arr to i8*), i64 16) to i32*), align 4 @p = global i32* bitcast (i8* getelementptr (i8, i8* bitcast (<{ i32, [9 x i32] }>* @arr to i8*), i64 16) to i32*), align 4
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llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll

; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \ ; RUN: llvm-readobj --section-headers --file-header %t.o | \
; RUN: FileCheck --check-prefix=OBJ %s ; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s ; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
; RUN: not llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \ ; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=XCOFF64 %s ; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@const_ivar = constant i32 35, align 4 @const_ivar = constant i32 35, align 4
@const_llvar = constant i64 36, align 8 @const_llvar = constant i64 36, align 8
@const_svar = constant i16 37, align 2 @const_svar = constant i16 37, align 2
@const_fvar = constant float 8.000000e+02, align 4 @const_fvar = constant float 8.000000e+02, align 4
@const_dvar = constant double 9.000000e+02, align 8 @const_dvar = constant double 9.000000e+02, align 8
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llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll

; This file tests TOC entry generation and undefined symbol generation. ; This file tests TOC entry generation and undefined symbol generation.
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes CHECK,CHECK32 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes CHECK,CHECK32 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64 %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck --check-prefixes CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \ ; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \
; RUN: < %s | FileCheck --check-prefix=XCOFF64 %s ; RUN: < %s | FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet. ; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
@a = external global i32, align 4 @a = external global i32, align 4
@b = external global i64, align 8 @b = external global i64, align 8
@c = external global i16, align 2 @c = external global i16, align 2
@globa = common global i32 0, align 4 @globa = common global i32 0, align 4
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llvm/test/CodeGen/PowerPC/codemodel.ll

; RUN: not llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
; RUN: not llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel ; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel ; KERNEL: Target does not support the kernel CodeModel
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll

; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=small \ ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=small \
; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \ ; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \
; RUN: %s | FileCheck --check-prefix=SMALL %s ; RUN: %s | FileCheck --check-prefix=SMALL %s
; RUN: not llc -mtriple powerpc-ibm-aix-xcoff -code-model=medium \ ; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff -code-model=medium \
; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s ; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=large \ ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=large \
; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \ ; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \
; RUN: %s | FileCheck --check-prefix=LARGE %s ; RUN: %s | FileCheck --check-prefix=LARGE %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp \ ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp \
; RUN: -print-before=simple-register-coalescing 2>&1 < %s | FileCheck \ ; RUN: -print-before=simple-register-coalescing 2>&1 < %s | FileCheck \
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llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll

; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=small \ ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=small \
; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \ ; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \
; RUN: %s | FileCheck --check-prefix=SMALL %s ; RUN: %s | FileCheck --check-prefix=SMALL %s
; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -code-model=medium \ ; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -code-model=medium \
; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s ; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=large \ ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=large \
; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \ ; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \
; RUN: %s | FileCheck --check-prefix=LARGE %s ; RUN: %s | FileCheck --check-prefix=LARGE %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp \ ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp \
; RUN: -print-before=simple-register-coalescing 2>&1 < %s | FileCheck \ ; RUN: -print-before=simple-register-coalescing 2>&1 < %s | FileCheck \
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llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll

; RUN: not llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
define i32 @get_reg() nounwind { define i32 @get_reg() nounwind {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name global variable ; CHECK: Invalid register name global variable
%reg = call i32 @llvm.read_register.i32(metadata !0) %reg = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %reg ret i32 %reg
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"r0\00"} !0 = !{!"r0\00"}

llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll

; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
define i64 @get_reg() nounwind { define i64 @get_reg() nounwind {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name global variable ; CHECK: Invalid register name global variable
%reg = call i64 @llvm.read_register.i64(metadata !0) %reg = call i64 @llvm.read_register.i64(metadata !0)
ret i64 %reg ret i64 %reg
} }
declare i64 @llvm.read_register.i64(metadata) nounwind declare i64 @llvm.read_register.i64(metadata) nounwind
!0 = !{!"r2\00"} !0 = !{!"r2\00"}

llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll

; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-NOTPPC32 ; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-NOTPPC32
define i32 @get_reg() nounwind { define i32 @get_reg() nounwind {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; CHECK-NOTPPC32: Invalid register name global variable ; CHECK-NOTPPC32: Invalid register name global variable
%reg = call i32 @llvm.read_register.i32(metadata !0) %reg = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %reg ret i32 %reg
; CHECK-LABEL: @get_reg ; CHECK-LABEL: @get_reg
; CHECK: mr 3, 2 ; CHECK: mr 3, 2
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"r2\00"} !0 = !{!"r2\00"}

llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll

; Test the ICBT instruction is not emitted on POWER7 ; Test the ICBT instruction is not emitted on POWER7
; Based on the ppc64-prefetch.ll test ; Based on the ppc64-prefetch.ll test
; RUN: not llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s
declare void @llvm.prefetch(i8*, i32, i32, i32) declare void @llvm.prefetch(i8*, i32, i32, i32)
define void @test(i8* %a, ...) nounwind { define void @test(i8* %a, ...) nounwind {
entry: entry:
call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 0) call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 0)
ret void ret void
; FIXME: Crashing is not really the correct behavior here, we really should just emit nothing ; FIXME: Crashing is not really the correct behavior here, we really should just emit nothing
; CHECK: Cannot select: {{0x[0-9,a-f]+|t[0-9]+}}: ch = Prefetch ; CHECK: Cannot select: {{0x[0-9,a-f]+|t[0-9]+}}: ch = Prefetch
; CHECK: {{0x[0-9,a-f]+|t[0-9]+}}: i32 = Constant<0> ; CHECK: {{0x[0-9,a-f]+|t[0-9]+}}: i32 = Constant<0>
; CHECK-NEXT: {{0x[0-9,a-f]+|t[0-9]+}}: i32 = Constant<3> ; CHECK-NEXT: {{0x[0-9,a-f]+|t[0-9]+}}: i32 = Constant<3>
; CHECK-NEXT: {{0x[0-9,a-f]+|t[0-9]+}}: i32 = Constant<0> ; CHECK-NEXT: {{0x[0-9,a-f]+|t[0-9]+}}: i32 = Constant<0>
} }

llvm/test/CodeGen/RISCV/get-register-invalid.ll

; RUN: not llc < %s -mtriple=riscv32 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=riscv32 2>&1 | FileCheck %s
define i32 @get_invalid_reg() nounwind { define i32 @get_invalid_reg() nounwind {
entry: entry:
; CHECK: Invalid register name "notareg". ; CHECK: Invalid register name "notareg".
%reg = call i32 @llvm.read_register.i32(metadata !0) %reg = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %reg ret i32 %reg
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"notareg\00"} !0 = !{!"notareg\00"}

llvm/test/CodeGen/RISCV/get-register-reserve.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: not llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \ ; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \
; RUN: | FileCheck -check-prefix=NO-RESERVE-A1 %s ; RUN: | FileCheck -check-prefix=NO-RESERVE-A1 %s
; RUN: not llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \ ; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \
; RUN: | FileCheck -check-prefix=NO-RESERVE-FP %s ; RUN: | FileCheck -check-prefix=NO-RESERVE-FP %s
; RUN: llc < %s -mtriple=riscv32 -mattr +reserve-x8 -mattr +reserve-x11 \ ; RUN: llc < %s -mtriple=riscv32 -mattr +reserve-x8 -mattr +reserve-x11 \
; RUN: | FileCheck -check-prefix=RESERVE %s ; RUN: | FileCheck -check-prefix=RESERVE %s
define i32 @get_reg_a1() nounwind { define i32 @get_reg_a1() nounwind {
; NO-RESERVE-A1: Trying to obtain non-reserved register "a1". ; NO-RESERVE-A1: Trying to obtain non-reserved register "a1".
; RESERVE-LABEL: get_reg_a1: ; RESERVE-LABEL: get_reg_a1:
; RESERVE: # %bb.0: # %entry ; RESERVE: # %bb.0: # %entry
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llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll

; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments! ; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments!
define i32 @isr_user(i8 %n) #0 { define i32 @isr_user(i8 %n) #0 {
ret i32 0 ret i32 0
} }
attributes #0 = { "interrupt"="user" } attributes #0 = { "interrupt"="user" }

llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll

; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Function interrupt attribute argument not supported! ; CHECK: LLVM ERROR: Function interrupt attribute argument not supported!
define void @isr_user() #0 { define void @isr_user() #0 {
ret void ret void
} }
attributes #0 = { "interrupt"="foo" } attributes #0 = { "interrupt"="foo" }

llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll

; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Functions with the interrupt attribute must have void return type! ; CHECK: LLVM ERROR: Functions with the interrupt attribute must have void return type!
define i32 @isr1_user() #0 { define i32 @isr1_user() #0 {
ret i32 0 ret i32 0
} }
attributes #0 = { "interrupt"="user" } attributes #0 = { "interrupt"="user" }

llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll

; RUN: not llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \ ; RUN: not --crash llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV64E %s ; RUN: | FileCheck -check-prefix=RV64E %s
; RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target ; RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target

llvm/test/CodeGen/RISCV/module-target-abi.ll

; RUN: llc -mtriple=riscv32 < %s 2>&1 \ ; RUN: llc -mtriple=riscv32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=DEFAULT %s ; RUN: | FileCheck -check-prefix=DEFAULT %s
; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ ; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
; RUN: not llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ ; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s ; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s
; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s ; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s
; RV32IF-ILP32F: -target-abi option != target-abi module flag ; RV32IF-ILP32F: -target-abi option != target-abi module flag
; FLAGS: Flags: 0x0 ; FLAGS: Flags: 0x0
define float @foo(i32 %a) nounwind #0 { define float @foo(i32 %a) nounwind #0 {
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llvm/test/CodeGen/RISCV/module-target-abi2.ll

; RUN: llc -mtriple=riscv32 < %s 2>&1 \ ; RUN: llc -mtriple=riscv32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=DEFAULT %s ; RUN: | FileCheck -check-prefix=DEFAULT %s
; RUN: not llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \ ; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s ; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \ ; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s ; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s
; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s ; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s
; RV32IF-ILP32: -target-abi option != target-abi module flag ; RV32IF-ILP32: -target-abi option != target-abi module flag
; FLAGS: Flags: 0x0 ; FLAGS: Flags: 0x0
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llvm/test/CodeGen/RISCV/musttail-call.ll

; Check that we error out if tail is not possible but call is marked as mustail. ; Check that we error out if tail is not possible but call is marked as mustail.
; RUN: not llc -mtriple riscv32-unknown-linux-gnu -o - %s \ ; RUN: not --crash llc -mtriple riscv32-unknown-linux-gnu -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; RUN: not llc -mtriple riscv64-unknown-linux-gnu -o - %s \ ; RUN: not --crash llc -mtriple riscv64-unknown-linux-gnu -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \ ; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s ; RUN: 2>&1 | FileCheck %s
%struct.A = type { i32 } %struct.A = type { i32 }
declare void @callee_musttail(%struct.A* sret %a) declare void @callee_musttail(%struct.A* sret %a)
define void @caller_musttail(%struct.A* sret %a) { define void @caller_musttail(%struct.A* sret %a) {
; CHECK: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail ; CHECK: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail
entry: entry:
musttail call void @callee_musttail(%struct.A* sret %a) musttail call void @callee_musttail(%struct.A* sret %a)
ret void ret void
} }

llvm/test/CodeGen/RISCV/rv32e.ll

; RUN: not llc -mtriple=riscv32 -mattr=+e < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=riscv32 -mattr=+e < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Codegen not yet implemented for RV32E ; CHECK: LLVM ERROR: Codegen not yet implemented for RV32E
define void @nothing() nounwind { define void @nothing() nounwind {
ret void ret void
} }

llvm/test/CodeGen/RISCV/target-abi-valid.ll

Show All 28 Lines
define void @nothing() nounwind { define void @nothing() nounwind {
; CHECK-IMP-LABEL: nothing: ; CHECK-IMP-LABEL: nothing:
; CHECK-IMP: # %bb.0: ; CHECK-IMP: # %bb.0:
; CHECK-IMP-NEXT: ret ; CHECK-IMP-NEXT: ret
ret void ret void
} }
; RUN: not llc -mtriple=riscv32 -target-abi ilp32e < %s 2>&1 \ ; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32e < %s 2>&1 \
; RUN: | FileCheck -check-prefix=CHECK-UNIMP %s ; RUN: | FileCheck -check-prefix=CHECK-UNIMP %s
; CHECK-UNIMP: LLVM ERROR: Don't know how to lower this ABI ; CHECK-UNIMP: LLVM ERROR: Don't know how to lower this ABI

llvm/test/CodeGen/RISCV/verify-instr.mir

# RUN: not llc -march=riscv32 -run-pass machineverifier %s -o - 2>&1 | FileCheck %s # RUN: not --crash llc -march=riscv32 -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: Invalid immediate *** # CHECK: *** Bad machine code: Invalid immediate ***
# CHECK: - instruction: $x2 = ADDI $x1, 10000 # CHECK: - instruction: $x2 = ADDI $x1, 10000
--- ---
name: verify_instr name: verify_instr
body: | body: |
bb.0: bb.0:
$x2 = ADDI $x1, 10000 $x2 = ADDI $x1, 10000
... ...

llvm/test/CodeGen/SPARC/codemodel.ll

; RUN: not llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
; RUN: not llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel ; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel ; KERNEL: Target does not support the kernel CodeModel
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/SPARC/fail-alloca-align.ll

;; Sparc backend can't currently handle variable allocas with ;; Sparc backend can't currently handle variable allocas with
;; alignment greater than the stack alignment. This code ought to ;; alignment greater than the stack alignment. This code ought to
;; compile, but doesn't currently. ;; compile, but doesn't currently.
;; RUN: not llc -march=sparc < %s 2>&1 | FileCheck %s ;; RUN: not --crash llc -march=sparc < %s 2>&1 | FileCheck %s
;; RUN: not llc -march=sparcv9 < %s 2>&1 | FileCheck %s ;; RUN: not --crash llc -march=sparcv9 < %s 2>&1 | FileCheck %s
;; CHECK: ERROR: Function {{.*}} required stack re-alignment ;; CHECK: ERROR: Function {{.*}} required stack re-alignment
define void @variable_alloca_with_overalignment(i32 %num) { define void @variable_alloca_with_overalignment(i32 %num) {
%aligned = alloca i32, align 64 %aligned = alloca i32, align 64
%var_size = alloca i8, i32 %num, align 4 %var_size = alloca i8, i32 %num, align 4
call void @foo(i32* %aligned, i8* %var_size) call void @foo(i32* %aligned, i8* %var_size)
ret void ret void
} }
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llvm/test/CodeGen/SPARC/sret-secondary.ll

; RUN: not llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not --crash llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: sparc only supports sret on the first parameter ; CHECK: sparc only supports sret on the first parameter
define void @foo(i32 %a, i32* sret %out) { define void @foo(i32 %a, i32* sret %out) {
store i32 %a, i32* %out store i32 %a, i32* %out
ret void ret void
} }

llvm/test/CodeGen/SystemZ/codemodel.ll

; RUN: not llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
; RUN: not llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL ; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel ; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel ; KERNEL: Target does not support the kernel CodeModel
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/SystemZ/ghc-cc-02.ll

; Check that the GHC calling convention works (s390x) ; Check that the GHC calling convention works (s390x)
; Check that no more than 12 integer arguments are passed ; Check that no more than 12 integer arguments are passed
; ;
; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo() nounwind { define ghccc void @foo() nounwind {
entry: entry:
tail call ghccc void (...) @bar(i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13); tail call ghccc void (...) @bar(i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13);
ret void ret void
} }
declare ghccc void @bar(...) declare ghccc void @bar(...)
; CHECK: LLVM ERROR: No registers left in GHC calling convention ; CHECK: LLVM ERROR: No registers left in GHC calling convention

llvm/test/CodeGen/SystemZ/ghc-cc-03.ll

; Check that the GHC calling convention works (s390x) ; Check that the GHC calling convention works (s390x)
; In GHC calling convention the only allowed return type is void ; In GHC calling convention the only allowed return type is void
; ;
; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc i64 @foo() nounwind { define ghccc i64 @foo() nounwind {
entry: entry:
ret i64 42 ret i64 42
} }
; CHECK: LLVM ERROR: GHC functions return void only ; CHECK: LLVM ERROR: GHC functions return void only

llvm/test/CodeGen/SystemZ/ghc-cc-04.ll

; Check that the GHC calling convention works (s390x) ; Check that the GHC calling convention works (s390x)
; Thread local storage is not supported in GHC calling convention ; Thread local storage is not supported in GHC calling convention
; ;
; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
@x = thread_local global i32 0 @x = thread_local global i32 0
define ghccc void @foo() nounwind { define ghccc void @foo() nounwind {
entry: entry:
call void @bar(i32 *@x) call void @bar(i32 *@x)
ret void ret void
} }
declare void @bar(i32*) declare void @bar(i32*)
; CHECK: LLVM ERROR: In GHC calling convention TLS is not supported ; CHECK: LLVM ERROR: In GHC calling convention TLS is not supported

llvm/test/CodeGen/SystemZ/ghc-cc-05.ll

; Check that the GHC calling convention works (s390x) ; Check that the GHC calling convention works (s390x)
; Variable-sized stack allocations are not supported in GHC calling convention ; Variable-sized stack allocations are not supported in GHC calling convention
; ;
; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo() nounwind { define ghccc void @foo() nounwind {
entry: entry:
%0 = call i8* @llvm.stacksave() %0 = call i8* @llvm.stacksave()
call void @llvm.stackrestore(i8* %0) call void @llvm.stackrestore(i8* %0)
ret void ret void
} }
declare i8* @llvm.stacksave() declare i8* @llvm.stacksave()
declare void @llvm.stackrestore(i8*) declare void @llvm.stackrestore(i8*)
; CHECK: LLVM ERROR: Variable-sized stack allocations are not supported in GHC calling convention ; CHECK: LLVM ERROR: Variable-sized stack allocations are not supported in GHC calling convention

llvm/test/CodeGen/SystemZ/ghc-cc-06.ll

; Check that the GHC calling convention works (s390x) ; Check that the GHC calling convention works (s390x)
; At most 2048*sizeof(long)=16384 bytes of stack space may be used ; At most 2048*sizeof(long)=16384 bytes of stack space may be used
; ;
; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo() nounwind { define ghccc void @foo() nounwind {
entry: entry:
alloca [16385 x i8], align 1 alloca [16385 x i8], align 1
ret void ret void
} }
; CHECK: LLVM ERROR: Pre allocated stack space for GHC function is too small ; CHECK: LLVM ERROR: Pre allocated stack space for GHC function is too small

llvm/test/CodeGen/SystemZ/ghc-cc-07.ll

; Check that the GHC calling convention works (s390x) ; Check that the GHC calling convention works (s390x)
; In GHC calling convention a frame pointer is not supported ; In GHC calling convention a frame pointer is not supported
; ;
; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo(i64 %0) nounwind { define ghccc void @foo(i64 %0) nounwind {
entry: entry:
alloca i64, i64 %0 alloca i64, i64 %0
ret void ret void
} }
; CHECK: LLVM ERROR: In GHC calling convention a frame pointer is not supported ; CHECK: LLVM ERROR: In GHC calling convention a frame pointer is not supported

llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll

; RUN: not llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s ; RUN: not --crash llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s
; ;
; CHECK: LLVM ERROR: mnop-mcount only supported with fentry-call ; CHECK: LLVM ERROR: mnop-mcount only supported with fentry-call
define void @test1() #0 { define void @test1() #0 {
entry: entry:
ret void ret void
} }
attributes #0 = { "instrument-function-entry-inlined"="mcount" "mnop-mcount" } attributes #0 = { "instrument-function-entry-inlined"="mcount" "mnop-mcount" }

llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll

; RUN: not llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s ; RUN: not --crash llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s
; ;
; CHECK: LLVM ERROR: mrecord-mcount only supported with fentry-call ; CHECK: LLVM ERROR: mrecord-mcount only supported with fentry-call
define void @test1() #0 { define void @test1() #0 {
entry: entry:
ret void ret void
} }
attributes #0 = { "instrument-function-entry-inlined"="mcount" "mrecord-mcount" } attributes #0 = { "instrument-function-entry-inlined"="mcount" "mrecord-mcount" }

llvm/test/CodeGen/SystemZ/mverify-optypes.mir

# RUN: not llc -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass=none -o - %s \ # RUN: not --crash llc -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass=none -o - %s \
# RUN: 2>&1 | FileCheck %s # RUN: 2>&1 | FileCheck %s
# REQUIRES: asserts
# #
# Test that the machine verifier catches wrong operand types. # Test that the machine verifier catches wrong operand types.
--- | --- |
define anyregcc i64 @fun() { ret i64 0 } define anyregcc i64 @fun() { ret i64 0 }
@gsrc = global i16 2 @gsrc = global i16 2
... ...
--- ---
▲ Show 20 Lines • Show All 61 Lines • Show Last 20 Lines

llvm/test/CodeGen/SystemZ/vec-args-error-01.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define void @foo(<1 x i128>) { define void @foo(<1 x i128>) {
ret void ret void
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-02.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define <1 x i128> @foo() { define <1 x i128> @foo() {
ret <1 x i128><i128 0> ret <1 x i128><i128 0>
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-03.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare void @bar(<1 x i128>) declare void @bar(<1 x i128>)
define void @foo() { define void @foo() {
call void @bar (<1 x i128> <i128 0>) call void @bar (<1 x i128> <i128 0>)
ret void ret void
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-04.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare <1 x i128> @bar() declare <1 x i128> @bar()
define void @foo() { define void @foo() {
%res = call <1 x i128> @bar () %res = call <1 x i128> @bar ()
ret void ret void
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-05.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define void @foo(<1 x fp128>) { define void @foo(<1 x fp128>) {
ret void ret void
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-06.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define <1 x fp128> @foo() { define <1 x fp128> @foo() {
ret <1 x fp128><fp128 0xL00000000000000000000000000000000> ret <1 x fp128><fp128 0xL00000000000000000000000000000000>
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-07.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare void @bar(<1 x fp128>) declare void @bar(<1 x fp128>)
define void @foo() { define void @foo() {
call void @bar (<1 x fp128> <fp128 0xL00000000000000000000000000000000>) call void @bar (<1 x fp128> <fp128 0xL00000000000000000000000000000000>)
ret void ret void
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/SystemZ/vec-args-error-08.ll

; Verify that we detect unsupported single-element vector types. ; Verify that we detect unsupported single-element vector types.
; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare <1 x fp128> @bar() declare <1 x fp128> @bar()
define void @foo() { define void @foo() {
%res = call <1 x fp128> @bar () %res = call <1 x fp128> @bar ()
ret void ret void
} }
; CHECK: LLVM ERROR: Unsupported vector argument or return type ; CHECK: LLVM ERROR: Unsupported vector argument or return type

llvm/test/CodeGen/WebAssembly/clear-cache.ll

; RUN: not llc < %s -asm-verbose=false 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -asm-verbose=false 2>&1 | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; CHECK: LLVM ERROR: llvm.clear_cache is not supported on wasm ; CHECK: LLVM ERROR: llvm.clear_cache is not supported on wasm
define void @clear_cache(i8* %begin, i8* %end) { define void @clear_cache(i8* %begin, i8* %end) {
entry: entry:
call void @llvm.clear_cache(i8* %begin, i8* %end) call void @llvm.clear_cache(i8* %begin, i8* %end)
ret void ret void
} }
declare void @llvm.clear_cache(i8*, i8*) declare void @llvm.clear_cache(i8*, i8*)

llvm/test/CodeGen/WebAssembly/cpus.ll

; This tests that llc accepts all valid WebAssembly CPUs. ; This tests that llc accepts all valid WebAssembly CPUs.
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s
; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s
; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID ; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64 ; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64
; CHECK-NOT: is not a recognized processor for this target ; CHECK-NOT: is not a recognized processor for this target
; INVALID: {{.+}} is not a recognized processor for this target ; INVALID: {{.+}} is not a recognized processor for this target
; WASM64: 64-bit WebAssembly (wasm64) is not currently supported ; WASM64: 64-bit WebAssembly (wasm64) is not currently supported
define i32 @f(i32 %i_like_the_web) { define i32 @f(i32 %i_like_the_web) {
ret i32 %i_like_the_web ret i32 %i_like_the_web
} }

llvm/test/CodeGen/WebAssembly/exception.ll

; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm ; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck -allow-deprecated-dag-overlap %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck -allow-deprecated-dag-overlap %s
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
%struct.Temp = type { i8 } %struct.Temp = type { i8 }
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llvm/test/CodeGen/WebAssembly/offset-atomics.ll

; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt ; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
; Test that atomic loads are assembled properly. ; Test that atomic loads are assembled properly.
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
;===---------------------------------------------------------------------------- ;===----------------------------------------------------------------------------
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llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll

; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR
; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR ; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten | FileCheck %s --check-prefixes=CHECK,TLS ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
; ERROR: LLVM ERROR: only -ftls-model=local-exec is supported for now on non-Emscripten OSes: variable tls ; ERROR: LLVM ERROR: only -ftls-model=local-exec is supported for now on non-Emscripten OSes: variable tls
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llvm/test/CodeGen/X86/AppendingLinkage.ll

; RUN: not llc < %s -mtriple=i686-- 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=i686-- 2>&1 | FileCheck %s
; CHECK: unknown special variable ; CHECK: unknown special variable
@foo = appending constant [1 x i32 ]zeroinitializer @foo = appending constant [1 x i32 ]zeroinitializer

llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir

# RUN: not llc -o - -run-pass=instruction-select -pass-remarks-missed=gisel %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -run-pass=instruction-select -pass-remarks-missed=gisel %s 2>&1 | FileCheck %s
--- | --- |
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--linux-gnu" target triple = "x86_64--linux-gnu"
define void @test_check_type() { define void @test_check_type() {
ret void ret void
} }
... ...
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llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir

# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \ # RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s # RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent offset between bb.end and one of # Test that CFI verifier finds inconsistent offset between bb.end and one of
# its precedessors. # its precedessors.
--- | --- |
define void @inconsistentOffset() { define void @inconsistentOffset() {
bb.end: bb.end:
ret void ret void
} }
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llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir

# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \ # RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s # RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent register between bb.end and one of # Test that CFI verifier finds inconsistent register between bb.end and one of
# its precedessors. # its precedessors.
--- | --- |
define void @inconsistentRegister() { define void @inconsistentRegister() {
bb.end: bb.end:
ret void ret void
} }
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llvm/test/CodeGen/X86/clwb.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; NOTE: clwb is available in Skylake Server, not available in the newer ; NOTE: clwb is available in Skylake Server, not available in the newer
; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch. ; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch.
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s
; RUN: not llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL ; RUN: not --crash llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-client | FileCheck %s ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-client | FileCheck %s
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s
; CNL: LLVM ERROR: Cannot select: intrinsic %llvm.x86.clwb ; CNL: LLVM ERROR: Cannot select: intrinsic %llvm.x86.clwb
define void @clwb(i8* %p) nounwind { define void @clwb(i8* %p) nounwind {
; CHECK-LABEL: clwb: ; CHECK-LABEL: clwb:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: clwb (%eax) ; CHECK-NEXT: clwb (%eax)
; CHECK-NEXT: retl ; CHECK-NEXT: retl
tail call void @llvm.x86.clwb(i8* %p) tail call void @llvm.x86.clwb(i8* %p)
ret void ret void
} }
declare void @llvm.x86.clwb(i8*) nounwind declare void @llvm.x86.clwb(i8*) nounwind

llvm/test/CodeGen/X86/codemodel.ll

; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s ; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s ; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
; RUN: not llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s ; RUN: not --crash llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
@data = external global [0 x i32] ; <[0 x i32]*> [#uses=5] @data = external global [0 x i32] ; <[0 x i32]*> [#uses=5]
; CHECK-TINY: Target does not support the tiny CodeModel ; CHECK-TINY: Target does not support the tiny CodeModel
define i32 @foo() nounwind readonly { define i32 @foo() nounwind readonly {
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llvm/test/CodeGen/X86/coff-comdat2.ll

; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32" target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc" target triple = "i686-pc-windows-msvc"
$foo = comdat largest $foo = comdat largest
@foo = global i32 0 @foo = global i32 0
@bar = global i32 0, comdat($foo) @bar = global i32 0, comdat($foo)
; CHECK: Associative COMDAT symbol 'foo' is not a key for its COMDAT. ; CHECK: Associative COMDAT symbol 'foo' is not a key for its COMDAT.

llvm/test/CodeGen/X86/coff-comdat3.ll

; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32" target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc" target triple = "i686-pc-windows-msvc"
$foo = comdat largest $foo = comdat largest
@bar = global i32 0, comdat($foo) @bar = global i32 0, comdat($foo)
; CHECK: Associative COMDAT symbol 'foo' does not exist. ; CHECK: Associative COMDAT symbol 'foo' does not exist.

llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll

; Check that we reject 64-bit mode on 32-bit only CPUs. ; Check that we reject 64-bit mode on 32-bit only CPUs.
; CHECK-NO-ERROR-NOT: not a recognized processor for this target ; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! ; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll

; Check that we reject 64-bit mode on 32-bit only CPUs. ; Check that we reject 64-bit mode on 32-bit only CPUs.
; CHECK-NO-ERROR-NOT: not a recognized processor for this target ; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! ; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/X86/cpus-no-x86_64.ll

; Check that we reject 64-bit mode on 32-bit only CPUs. ; Check that we reject 64-bit mode on 32-bit only CPUs.
; CHECK-NO-ERROR-NOT: not a recognized processor for this target ; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it! ; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64 ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR ; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR
define void @foo() { define void @foo() {
ret void ret void
} }

llvm/test/CodeGen/X86/equiv_with_fndef.ll

; RUN: not llc < %s 2>&1 | FileCheck %s ; RUN: not --crash llc < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
module asm ".equiv pselect, __pselect" module asm ".equiv pselect, __pselect"
define void @pselect() { define void @pselect() {
ret void ret void
} }
; CHECK: 'pselect' is a protected alias ; CHECK: 'pselect' is a protected alias

llvm/test/CodeGen/X86/equiv_with_vardef.ll

; RUN: not llc < %s 2>&1 | FileCheck %s ; RUN: not --crash llc < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
module asm ".equiv var, __var" module asm ".equiv var, __var"
@var = global i32 0 @var = global i32 0
; CHECK: symbol 'var' is already defined ; CHECK: symbol 'var' is already defined

llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll

;RUN: not llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK ; RUN: not --crash llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK
; Make sure we generate fatal error from the type legalizer for using a 64-bit ; Make sure we generate fatal error from the type legalizer for using a 64-bit
; mode intrinsics in 32-bit mode. We used to use an llvm_unreachable. ; mode intrinsics in 32-bit mode. We used to use an llvm_unreachable.
; CHECK: LLVM ERROR: Do not know how to expand the result of this operator! ; CHECK: LLVM ERROR: Do not know how to expand the result of this operator!
define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) { define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
%res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1] %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
ret i64 %res ret i64 %res
} }
declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone

llvm/test/CodeGen/X86/fast-isel-args-fail2.ll

; RUN: not llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10 ; RUN: not --crash llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10
; REQUIRES: asserts
%struct.s0 = type { x86_fp80, x86_fp80 } %struct.s0 = type { x86_fp80, x86_fp80 }
; FastISel cannot handle this case yet. Make sure that we abort. ; FastISel cannot handle this case yet. Make sure that we abort.
define i8* @args_fail(%struct.s0* byval nocapture readonly align 16 %y) { define i8* @args_fail(%struct.s0* byval nocapture readonly align 16 %y) {
%1 = bitcast %struct.s0* %y to i8* %1 = bitcast %struct.s0* %y to i8*
ret i8* %1 ret i8* %1
} }

llvm/test/CodeGen/X86/inalloca-regparm.ll

; RUN: llc -mtriple=i686-windows-msvc < %s -o /dev/null ; RUN: llc -mtriple=i686-windows-msvc < %s -o /dev/null
; RUN: not llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not --crash llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s
; This will compile successfully on x86 but not x86_64, because %b will become a ; This will compile successfully on x86 but not x86_64, because %b will become a
; register parameter. ; register parameter.
declare x86_thiscallcc i32 @f(i32 %a, i32* inalloca %b) declare x86_thiscallcc i32 @f(i32 %a, i32* inalloca %b)
define void @g() { define void @g() {
%b = alloca inalloca i32 %b = alloca inalloca i32
store i32 2, i32* %b store i32 2, i32* %b
call x86_thiscallcc i32 @f(i32 0, i32* inalloca %b) call x86_thiscallcc i32 @f(i32 0, i32* inalloca %b)
ret void ret void
} }
; CHECK: cannot use inalloca attribute on a register parameter ; CHECK: cannot use inalloca attribute on a register parameter

llvm/test/CodeGen/X86/invalid-liveness.mir

# RUN: not llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s
# REQUIRES: asserts # REQUIRES: asserts
--- | --- |
define void @func() { ret void } define void @func() { ret void }
... ...
--- ---
# Liveness calculation should detect that we do not have a definition for %0 # Liveness calculation should detect that we do not have a definition for %0
# on all paths; In this example a def for %0 is missing when jumping from # on all paths; In this example a def for %0 is missing when jumping from
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llvm/test/CodeGen/X86/label-redefinition.ll

; PR7054 ; PR7054
; RUN: not llc %s -o - 2>&1 | grep "'_foo' label emitted multiple times to assembly" ; RUN: not --crash llc %s -o - 2>&1 | grep "'_foo' label emitted multiple times to assembly"
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin10.0.0" target triple = "i386-apple-darwin10.0.0"
define i32 @"\01_foo"() { define i32 @"\01_foo"() {
unreachable unreachable
} }
define i32 @foo() { define i32 @foo() {
entry: entry:
unreachable unreachable
} }
declare i32 @xstat64(i32, i8*, i8*) declare i32 @xstat64(i32, i8*, i8*)

llvm/test/CodeGen/X86/llc-print-machineinstrs.mir

# Check that -print-machineinstrs doesn't assert when it's passed an unknown pass name. # Check that -print-machineinstrs doesn't assert when it's passed an unknown pass name.
# RUN: llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=greedy %s -o /dev/null # RUN: llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=greedy %s -o /dev/null
# RUN: not llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=unknown %s -o /dev/null 2>&1 | FileCheck %s # RUN: not --crash llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=unknown %s -o /dev/null 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: "unknown" pass is not registered. # CHECK: LLVM ERROR: "unknown" pass is not registered.
... ...
--- ---
name: fun name: fun
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
RET 0 RET 0

llvm/test/CodeGen/X86/macho-comdat.ll

; RUN: not llc -mtriple x86_64-apple-darwin < %s 2> %t ; RUN: not --crash llc -mtriple x86_64-apple-darwin < %s 2> %t
; RUN: FileCheck < %t %s ; RUN: FileCheck < %t %s
$f = comdat any $f = comdat any
@v = global i32 0, comdat($f) @v = global i32 0, comdat($f)
; CHECK: LLVM ERROR: MachO doesn't support COMDATs, 'f' cannot be lowered. ; CHECK: LLVM ERROR: MachO doesn't support COMDATs, 'f' cannot be lowered.

llvm/test/CodeGen/X86/named-reg-alloc.ll

; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind { define i32 @get_stack() nounwind {
entry: entry:
; FIXME: Include an allocatable-specific error message ; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name global variable ; CHECK: Invalid register name global variable
%sp = call i32 @llvm.read_register.i32(metadata !0) %sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp ret i32 %sp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"eax\00"} !0 = !{!"eax\00"}

llvm/test/CodeGen/X86/named-reg-notareg.ll

; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind { define i32 @get_stack() nounwind {
entry: entry:
; CHECK: Invalid register name global variable ; CHECK: Invalid register name global variable
%sp = call i32 @llvm.read_register.i32(metadata !0) %sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp ret i32 %sp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"notareg\00"} !0 = !{!"notareg\00"}

llvm/test/CodeGen/X86/nonconst-static-ev.ll

; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t ; RUN: not --crash llc -mtriple=i686-linux-gnu < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@0 = global i8 extractvalue ([1 x i8] select (i1 ptrtoint (i32* @1 to i1), [1 x i8] [ i8 1 ], [1 x i8] [ i8 2 ]), 0) @0 = global i8 extractvalue ([1 x i8] select (i1 ptrtoint (i32* @1 to i1), [1 x i8] [ i8 1 ], [1 x i8] [ i8 2 ]), 0)
@1 = external global i32 @1 = external global i32
; CHECK-ERRORS: Unsupported expression in static initializer: extractvalue ; CHECK-ERRORS: Unsupported expression in static initializer: extractvalue

llvm/test/CodeGen/X86/nonconst-static-iv.ll

; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t ; RUN: not --crash llc -mtriple=i686-linux-gnu < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@0 = global i8 insertvalue( { i8 } select (i1 ptrtoint (i32* @1 to i1), { i8 } { i8 1 }, { i8 } { i8 2 }), i8 0, 0) @0 = global i8 insertvalue( { i8 } select (i1 ptrtoint (i32* @1 to i1), { i8 } { i8 1 }, { i8 } { i8 2 }), i8 0, 0)
@1 = external global i32 @1 = external global i32
; CHECK-ERRORS: Unsupported expression in static initializer: insertvalue ; CHECK-ERRORS: Unsupported expression in static initializer: insertvalue

llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll

; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_frame() nounwind { define i32 @get_frame() nounwind {
entry: entry:
; CHECK: register ebp is allocatable: function has no frame pointer ; CHECK: register ebp is allocatable: function has no frame pointer
%fp = call i32 @llvm.read_register.i32(metadata !0) %fp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %fp ret i32 %fp
} }
declare i32 @llvm.read_register.i32(metadata) nounwind declare i32 @llvm.read_register.i32(metadata) nounwind
!0 = !{!"ebp\00"} !0 = !{!"ebp\00"}

llvm/test/CodeGen/X86/segmented-stacks.ll

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; RUN: llc < %s -mcpu=generic -mtriple=i686-darwin -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=i686-darwin -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-darwin -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-darwin -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=i686-mingw32 -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=i686-mingw32 -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-freebsd -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-freebsd -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=i686-dragonfly -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=i686-dragonfly -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-dragonfly -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-dragonfly -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 -filetype=obj -o /dev/null ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 -filetype=obj -o /dev/null
; RUN: not llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log ; RUN: not --crash llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log
; RUN: FileCheck %s -input-file=%t.log -check-prefix=X64-Solaris ; RUN: FileCheck %s -input-file=%t.log -check-prefix=X64-Solaris
; RUN: not llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log ; RUN: not --crash llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log
; RUN: FileCheck %s -input-file=%t.log -check-prefix=X32-FreeBSD ; RUN: FileCheck %s -input-file=%t.log -check-prefix=X32-FreeBSD
; X64-Solaris: Segmented stacks not supported on this platform ; X64-Solaris: Segmented stacks not supported on this platform
; X32-FreeBSD: Segmented stacks not supported on FreeBSD i386 ; X32-FreeBSD: Segmented stacks not supported on FreeBSD i386
; Just to prevent the alloca from being optimized away ; Just to prevent the alloca from being optimized away
declare void @dummy_use(i32*, i32) declare void @dummy_use(i32*, i32)
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llvm/test/CodeGen/XCore/alignment.ll

; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s
; CHECK: emitPrologue unsupported alignment: 8 ; CHECK: emitPrologue unsupported alignment: 8
define void @f() nounwind { define void @f() nounwind {
entry: entry:
%BadAlignment = alloca i64, align 8 %BadAlignment = alloca i64, align 8
ret void ret void
} }

llvm/test/CodeGen/XCore/codemodel.ll

; RUN: not llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM ; RUN: not --crash llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM
; RUN: not llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM ; RUN: not --crash llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM
; RUN: not llc < %s -march=xcore -code-model=tiny 2>&1 | FileCheck %s -check-prefix=BAD_CM ; RUN: not --crash llc < %s -march=xcore -code-model=tiny 2>&1 | FileCheck %s -check-prefix=BAD_CM
; BAD_CM: Target only supports CodeModel Small or Large ; BAD_CM: Target only supports CodeModel Small or Large
; RUN: llc < %s -march=xcore | FileCheck %s ; RUN: llc < %s -march=xcore | FileCheck %s
; RUN: llc < %s -march=xcore -code-model=small | FileCheck %s ; RUN: llc < %s -march=xcore -code-model=small | FileCheck %s
; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE ; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE
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llvm/test/CodeGen/XCore/section-name.ll

; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s
@bar = internal global i32 zeroinitializer @bar = internal global i32 zeroinitializer
define void @".dp.bss"() { define void @".dp.bss"() {
ret void ret void
} }
; CHECK: LLVM ERROR: invalid symbol redefinition ; CHECK: LLVM ERROR: invalid symbol redefinition

llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll

; RUN: not llc < %s -filetype=obj 2>&1 | FileCheck %s ; RUN: not --crash llc < %s -filetype=obj 2>&1 | FileCheck %s
; ;
; Verify the compiler produces an error message when trying to emit circular ; Verify the compiler produces an error message when trying to emit circular
; references to unnamed structs which are not supported in CodeView debug ; references to unnamed structs which are not supported in CodeView debug
; information. ; information.
; ;
; -- types-recursive-unnamed.cpp begin ----------------------------------------- ; -- types-recursive-unnamed.cpp begin -----------------------------------------
; struct named_struct { ; struct named_struct {
; struct { ; struct {
▲ Show 20 Lines • Show All 69 Lines • Show Last 20 Lines

llvm/test/LTO/X86/attrs.ll

; RUN: llvm-as < %s >%t1 ; RUN: llvm-as < %s >%t1
; RUN: llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=+aes -o %t2 %t1 ; RUN: llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=+aes -o %t2 %t1
; RUN: llvm-objdump -d %t2 | FileCheck -check-prefix=WITH_AES %s ; RUN: llvm-objdump -d %t2 | FileCheck -check-prefix=WITH_AES %s
; RUN: not llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=-aes -o %t3 %t1 2>&1 | FileCheck -check-prefix=WITHOUT_AES %s ; RUN: not --crash llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=-aes -o %t3 %t1 2>&1 | FileCheck -check-prefix=WITHOUT_AES %s
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8)
define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) { define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) {
; WITH_AES: test_x86_aesni_aeskeygenassist ; WITH_AES: test_x86_aesni_aeskeygenassist
; WITH_AES: aeskeygenassist ; WITH_AES: aeskeygenassist
%res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7) %res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7)
ret <2 x i64> %res ret <2 x i64> %res
} }
; WITHOUT_AES: LLVM ERROR: Cannot select: intrinsic %llvm.x86.aesni.aeskeygenassist ; WITHOUT_AES: LLVM ERROR: Cannot select: intrinsic %llvm.x86.aesni.aeskeygenassist

llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s

# RUN: not llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s
# We cannot switch subtargets mid-bundle # We cannot switch subtargets mid-bundle
.syntax unified .syntax unified
.text .text
.bundle_align_mode 4 .bundle_align_mode 4
.arch armv4t .arch armv4t
bx lr bx lr
.bundle_lock .bundle_lock
bx lr bx lr
.arch armv7a .arch armv7a
movt r0, #0xffff movt r0, #0xffff
movw r0, #0xffff movw r0, #0xffff
.bundle_unlock .bundle_unlock
bx lr bx lr
# CHECK: LLVM ERROR: A Bundle can only have one Subtarget. # CHECK: LLVM ERROR: A Bundle can only have one Subtarget.

llvm/test/MC/ARM/Windows/invalid-relocation.s

# RUN: not llvm-mc -triple thumbv7-windows -incremental-linker-compatible -filetype obj -o /dev/null 2>&1 %s \ # RUN: not --crash llvm-mc -triple thumbv7-windows -incremental-linker-compatible -filetype obj -o /dev/null 2>&1 %s \
# RUN: | FileCheck %s # RUN: | FileCheck %s
.def invalid_relocation .def invalid_relocation
.type 32 .type 32
.scl 2 .scl 2
.endef .endef
.global invalid_relocation .global invalid_relocation
.thumb_func .thumb_func
invalid_relocation: invalid_relocation:
adr r0, invalid_relocation+1 adr r0, invalid_relocation+1
# CHECK: LLVM ERROR: unsupported relocation type: fixup_t2_adr_pcrel_12 # CHECK: LLVM ERROR: unsupported relocation type: fixup_t2_adr_pcrel_12

llvm/test/MC/COFF/section-comdat-conflict.s

// RUN: not llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s // RUN: not --crash llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s
// CHECK: conflicting sections for symbol // CHECK: conflicting sections for symbol
.section .xyz .section .xyz
.global bar .global bar
bar: bar:
.long 42 .long 42
.section .abcd,"xr",discard,bar .section .abcd,"xr",discard,bar
.global foo .global foo
foo: foo:
.long 42 .long 42

llvm/test/MC/COFF/section-comdat-conflict2.s

// RUN: not llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s // RUN: not --crash llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s
// CHECK: two sections have the same comdat // CHECK: two sections have the same comdat
.section .xyz,"xr",discard,bar .section .xyz,"xr",discard,bar
.section .abcd,"xr",discard,bar .section .abcd,"xr",discard,bar

llvm/test/MC/Disassembler/AMDGPU/si-support.txt

# RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: Disassembly not yet supported for subtarget # CHECK: LLVM ERROR: Disassembly not yet supported for subtarget
0x00 0x00 0x00 0x7e 0x00 0x00 0x00 0x7e

llvm/test/MC/ELF/ARM/bss-non-zero-value.s

// RUN: not llvm-mc -filetype=obj -triple arm-linux-gnu %s -o %t 2>%t.out // RUN: not --crash llvm-mc -filetype=obj -triple arm-linux-gnu %s -o %t 2>%t.out
// RUN: FileCheck --input-file=%t.out %s // RUN: FileCheck --input-file=%t.out %s
// CHECK: non-zero initializer found in section '.bss' // CHECK: non-zero initializer found in section '.bss'
.bss .bss
.globl a .globl a
.align 2 .align 2
a: a:
.long 1 .long 1
.size a, 4 .size a, 4

llvm/test/MC/ELF/common-error3.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux %s 2>&1 | FileCheck %s
# CHECK: Symbol: C redeclared as different type # CHECK: Symbol: C redeclared as different type
.comm C,4,4 .comm C,4,4
.comm C,8,4 .comm C,8,4
No newline at end of file

llvm/test/MC/ELF/section-numeric-invalid-type.s

// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux-gnu %s -o - \ // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux-gnu %s -o - \
// RUN: | llvm-readobj -S --symbols | FileCheck --check-prefix=OBJ %s // RUN: | llvm-readobj -S --symbols | FileCheck --check-prefix=OBJ %s
// RUN: not llvm-mc -filetype=asm -triple=x86_64-pc-linux-gnu %s -o - 2>&1 \ // RUN: not --crash llvm-mc -filetype=asm -triple=x86_64-pc-linux-gnu %s -o - 2>&1 \
// RUN: | FileCheck --check-prefix=ASM %s // RUN: | FileCheck --check-prefix=ASM %s
.section .sec,"a",@0x7fffffff .section .sec,"a",@0x7fffffff
// OBJ: Section { // OBJ: Section {
// OBJ: Name: .sec // OBJ: Name: .sec
// OBJ-NEXT: Type: Unknown (0x7FFFFFFF) // OBJ-NEXT: Type: Unknown (0x7FFFFFFF)
// OBJ: } // OBJ: }
// ASM: unsupported type 0x7fffffff for section .sec // ASM: unsupported type 0x7fffffff for section .sec

llvm/test/MC/MachO/variable-errors.s

// RUN: not llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o 2> %t.err // RUN: not --crash llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o 2> %t.err
// RUN: FileCheck < %t.err %s // RUN: FileCheck < %t.err %s
.data .data
t0_a: t0_a:
t0_x = t0_a - t0_b t0_x = t0_a - t0_b
// CHECK: unable to evaluate offset to undefined symbol 't0_b' // CHECK: unable to evaluate offset to undefined symbol 't0_b'
.long t0_x .long t0_x

llvm/test/MC/Mips/micromips64-unsupported.s

# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6 # RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6 # RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64 # RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64 # RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
# 64R6: microMIPS64R6 is not supported # 64R6: microMIPS64R6 is not supported
# 64: microMIPS64 is not supported # 64: microMIPS64 is not supported

llvm/test/MC/Mips/micromips64r6-unsupported.s

# RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=+micromips \ # RUN: not --crash llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=+micromips \
# RUN: -mcpu=mips64r6 %s 2>&1 | FileCheck %s -check-prefix=CHECK-OPTION # RUN: -mcpu=mips64r6 %s 2>&1 | FileCheck %s -check-prefix=CHECK-OPTION
# RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mcpu=mips64r6 \ # RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mcpu=mips64r6 \
# RUN: %s 2>&1 | FileCheck %s -check-prefix=CHECK-MM-DIRECTIVE # RUN: %s 2>&1 | FileCheck %s -check-prefix=CHECK-MM-DIRECTIVE
# RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux \ # RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux \
# RUN: %s 2>&1 | FileCheck %s -check-prefix=CHECK-DIRECTIVE # RUN: %s 2>&1 | FileCheck %s -check-prefix=CHECK-DIRECTIVE
# CHECK-OPTION: LLVM ERROR: microMIPS64R6 is not supported # CHECK-OPTION: LLVM ERROR: microMIPS64R6 is not supported
.set micromips .set micromips
# CHECK-MM-DIRECTIVE: :[[@LINE-1]]:6: error: .set micromips directive is not supported with MIPS64R6 # CHECK-MM-DIRECTIVE: :[[@LINE-1]]:6: error: .set micromips directive is not supported with MIPS64R6
.set mips64r6 .set mips64r6
.set arch=mips64r6 .set arch=mips64r6
# CHECK-DIRECTIVE: :[[@LINE-2]]:6: error: MIPS64R6 is not supported with microMIPS # CHECK-DIRECTIVE: :[[@LINE-2]]:6: error: MIPS64R6 is not supported with microMIPS
# CHECK-DIRECTIVE: :[[@LINE-2]]:19: error: mips64r6 does not support microMIPS # CHECK-DIRECTIVE: :[[@LINE-2]]:19: error: mips64r6 does not support microMIPS

llvm/test/MC/Mips/nooddspreg-cmdarg.s

# RUN: llvm-mc %s -triple mips-unknown-linux-gnu -mattr=+fp64,+nooddspreg | \ # RUN: llvm-mc %s -triple mips-unknown-linux-gnu -mattr=+fp64,+nooddspreg | \
# RUN: FileCheck %s -check-prefix=CHECK-ASM # RUN: FileCheck %s -check-prefix=CHECK-ASM
# #
# RUN: llvm-mc %s -triple mips-unknown-linux-gnu -mattr=+fp64,+nooddspreg -filetype=obj -o - | \ # RUN: llvm-mc %s -triple mips-unknown-linux-gnu -mattr=+fp64,+nooddspreg -filetype=obj -o - | \
# RUN: llvm-readobj --sections --section-data --section-relocations - | \ # RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ # RUN: FileCheck %s -check-prefix=CHECK-OBJ
# RUN: not llvm-mc %s -triple mips64-unknown-linux-gnuabin32 -mattr=+nooddspreg 2> %t0 # RUN: not --crash llvm-mc %s -triple mips64-unknown-linux-gnuabin32 -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0 # RUN: FileCheck %s -check-prefix=INVALID < %t0
# #
# RUN: not llvm-mc %s -triple mips64-unknown-linux-gnu -mattr=+nooddspreg 2> %t0 # RUN: not --crash llvm-mc %s -triple mips64-unknown-linux-gnu -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0 # RUN: FileCheck %s -check-prefix=INVALID < %t0
# #
# CHECK-ASM-NOT: .module nooddspreg # CHECK-ASM-NOT: .module nooddspreg
# Checking if the Mips.abiflags were correctly emitted. # Checking if the Mips.abiflags were correctly emitted.
# CHECK-OBJ: Section { # CHECK-OBJ: Section {
# CHECK-OBJ: Index: 5 # CHECK-OBJ: Index: 5
# CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12) # CHECK-OBJ-LABEL: Name: .MIPS.abiflags (12)
Show All 23 Lines

llvm/test/MC/PowerPC/ppc64-localentry-error1.s

# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t # RUN: not --crash llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s # RUN: FileCheck < %t %s
# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t # RUN: not --crash llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s # RUN: FileCheck < %t %s
sym: sym:
.localentry sym, 123 .localentry sym, 123
# CHECK: LLVM ERROR: .localentry expression cannot be encoded. # CHECK: LLVM ERROR: .localentry expression cannot be encoded.

llvm/test/MC/PowerPC/ppc64-localentry-error2.s

# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t # RUN: not --crash llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s # RUN: FileCheck < %t %s
# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t # RUN: not --crash llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s # RUN: FileCheck < %t %s
.globl remote_sym .globl remote_sym
sym: sym:
.localentry sym, remote_sym .localentry sym, remote_sym
# CHECK: LLVM ERROR: .localentry expression must be absolute. # CHECK: LLVM ERROR: .localentry expression must be absolute.

llvm/test/MC/PowerPC/pr24686.s

# RUN: not llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \ # RUN: not --crash llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \
# RUN: 2>&1 | FileCheck %s # RUN: 2>&1 | FileCheck %s
_stext: _stext:
ld %r5, p_end - _stext(%r5) ld %r5, p_end - _stext(%r5)
# CHECK: LLVM ERROR: Invalid PC-relative half16ds relocation # CHECK: LLVM ERROR: Invalid PC-relative half16ds relocation

llvm/test/MC/RISCV/mattr-invalid-combination.s

# RUN: not llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \ # RUN: not --crash llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \
# RUN: | FileCheck %s -check-prefix=RV64E # RUN: | FileCheck %s -check-prefix=RV64E
# RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target # RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target

llvm/test/MC/WebAssembly/blockaddress.ll

; TODO(sbc): Make this test pass by adding support for unnamed tempoaries ; TODO(sbc): Make this test pass by adding support for unnamed tempoaries
; in wasm relocations. ; in wasm relocations.
; RUN: not llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
@foo = internal global i8* blockaddress(@bar, %addr), align 4 @foo = internal global i8* blockaddress(@bar, %addr), align 4
define hidden i32 @bar() #0 { define hidden i32 @bar() #0 {
entry: entry:
br label %addr br label %addr
addr: addr:
ret i32 0 ret i32 0
} }
; CHECK: LLVM ERROR: relocations for function or section offsets are only supported in metadata sections ; CHECK: LLVM ERROR: relocations for function or section offsets are only supported in metadata sections

llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll

; RUN: not llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: data symbols must live in a data section: data_symbol ; CHECK: data symbols must live in a data section: data_symbol
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown" target triple = "wasm32-unknown-unknown"
@data_symbol = constant [1024 x i32] zeroinitializer, section ".text", align 16 @data_symbol = constant [1024 x i32] zeroinitializer, section ".text", align 16
define hidden i32 @main() local_unnamed_addr #0 { define hidden i32 @main() local_unnamed_addr #0 {
entry: entry:
%0 = load i32, i32* getelementptr inbounds ([1024 x i32], [1024 x i32]* @data_symbol, i32 0, i32 10) %0 = load i32, i32* getelementptr inbounds ([1024 x i32], [1024 x i32]* @data_symbol, i32 0, i32 10)
ret i32 %0 ret i32 %0
} }

llvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mc-relax-all %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mc-relax-all %s -o - 2>&1 | FileCheck %s
# CHECK: ERROR: Fragment can't be larger than a bundle size # CHECK: ERROR: Fragment can't be larger than a bundle size
.text .text
foo: foo:
.bundle_align_mode 4 .bundle_align_mode 4
pushq %rbp pushq %rbp
.bundle_lock .bundle_lock
pushq %r14 pushq %r14
callq bar callq bar
callq bar callq bar
callq bar callq bar
callq bar callq bar
.bundle_unlock .bundle_unlock

llvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# Missing .bundle_align_mode argument # Missing .bundle_align_mode argument
# CHECK: error: invalid option # CHECK: error: invalid option
.bundle_align_mode 4 .bundle_align_mode 4
.bundle_lock 5 .bundle_lock 5
imull $17, %ebx, %ebp imull $17, %ebx, %ebp
.bundle_unlock .bundle_unlock

llvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s
# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s
# Switching mode will change subtarget, which we can't do within a bundle # Switching mode will change subtarget, which we can't do within a bundle
.text .text
.code64 .code64
.bundle_align_mode 4 .bundle_align_mode 4
foo: foo:
pushq %rbp pushq %rbp
.bundle_lock .bundle_lock
addl %ebp, %eax addl %ebp, %eax
.code32 .code32
movb $0x0, (%si) movb $0x0, (%si)
.bundle_unlock .bundle_unlock
CHECK: LLVM ERROR: A Bundle can only have one Subtarget. CHECK: LLVM ERROR: A Bundle can only have one Subtarget.

llvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# .bundle_lock can't come without a .bundle_align_mode before it # .bundle_lock can't come without a .bundle_align_mode before it
# CHECK: ERROR: .bundle_lock forbidden when bundling is disabled # CHECK: ERROR: .bundle_lock forbidden when bundling is disabled
imull $17, %ebx, %ebp imull $17, %ebx, %ebp
.bundle_lock .bundle_lock

llvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# This test invokes .bundle_lock and then switches to a different section # This test invokes .bundle_lock and then switches to a different section
# w/o the appropriate unlock. # w/o the appropriate unlock.
# CHECK: ERROR: Unterminated .bundle_lock # CHECK: ERROR: Unterminated .bundle_lock
.bundle_align_mode 3 .bundle_align_mode 3
.section text1, "x" .section text1, "x"
imull $17, %ebx, %ebp imull $17, %ebx, %ebp
.bundle_lock .bundle_lock
imull $17, %ebx, %ebp imull $17, %ebx, %ebp
.section text2, "x" .section text2, "x"
imull $17, %ebx, %ebp imull $17, %ebx, %ebp

llvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s

# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# .bundle_unlock can't come without a .bundle_lock before it # .bundle_unlock can't come without a .bundle_lock before it
# CHECK: ERROR: .bundle_unlock without matching lock # CHECK: ERROR: .bundle_unlock without matching lock
.bundle_align_mode 3 .bundle_align_mode 3
imull $17, %ebx, %ebp imull $17, %ebx, %ebp
.bundle_unlock .bundle_unlock

llvm/test/MC/X86/check-end-of-data-region.s

// RUN: not llvm-mc -triple=x86_64-apple-darwin -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR // RUN: not --crash llvm-mc -triple=x86_64-apple-darwin -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
.align 4 .align 4
.data_region jt32 .data_region jt32
foo: foo:
.long 0 .long 0
// CHECK-ERROR: LLVM ERROR: Data region not terminated // CHECK-ERROR: LLVM ERROR: Data region not terminated

llvm/test/MC/X86/encoder-fail.s

// RUN: not llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2>&1 | FileCheck %s // RUN: not --crash llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2>&1 | FileCheck %s
// CHECK: LLVM ERROR: Cannot encode high byte register in REX-prefixed instruction // CHECK: LLVM ERROR: Cannot encode high byte register in REX-prefixed instruction
movzx %dh, %rsi movzx %dh, %rsi

llvm/test/MC/X86/invalid-sleb.s

// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s // RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s
// CHECK: sleb128 and uleb128 expressions must be absolute // CHECK: sleb128 and uleb128 expressions must be absolute
.sleb128 undefined .sleb128 undefined

llvm/test/MC/X86/reloc-bss.s

# RUN: not llvm-mc -filetype=obj -triple=x86_64-linux-gnu %s 2>&1 | FileCheck %s # RUN: not --crash llvm-mc -filetype=obj -triple=x86_64-linux-gnu %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: cannot have fixups in virtual section! # CHECK: LLVM ERROR: cannot have fixups in virtual section!
.section .init_array,"awT",@nobits .section .init_array,"awT",@nobits
.hidden patatino .hidden patatino
.globl patatino .globl patatino
patatino: patatino:
movl __init_array_start, %eax movl __init_array_start, %eax

llvm/test/MachineVerifier/live-ins-01.mir

# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
# REQUIRES: systemz-registered-target # REQUIRES: systemz-registered-target
# Test that a the machine verifier reports an error when a register in # Test that a the machine verifier reports an error when a register in
# liveins is not liveout from predecessor. # liveins is not liveout from predecessor.
--- ---
name: f1 name: f1
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/live-ins-02.mir

# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
# REQUIRES: systemz-registered-target # REQUIRES: systemz-registered-target
# Test that a the machine verifier reports an error when a register in # Test that a the machine verifier reports an error when a register in
# liveins is not liveout from predecessor. # liveins is not liveout from predecessor.
--- ---
name: f1 name: f1
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/live-ins-03.mir

# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
# REQUIRES: systemz-registered-target # REQUIRES: systemz-registered-target
# Test that a the machine verifier reports an error when a register in # Test that a the machine verifier reports an error when a register in
# liveins is not liveout from predecessor. # liveins is not liveout from predecessor.
--- ---
name: f1 name: f1
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_copy.mir

#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- | --- |
; ModuleID = 'test.ll' ; ModuleID = 'test.ll'
source_filename = "test.ll" source_filename = "test.ll"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown" target triple = "aarch64-unknown-unknown"
define i32 @test_copy(i32 %argc) { define i32 @test_copy(i32 %argc) {
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llvm/test/MachineVerifier/test_copy_mismatch_types.mir

#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- | --- |
; ModuleID = 'test.ll' ; ModuleID = 'test.ll'
source_filename = "test.ll" source_filename = "test.ll"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown" target triple = "aarch64-unknown-unknown"
define i32 @test_copy(i32 %argc) { define i32 @test_copy(i32 %argc) {
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llvm/test/MachineVerifier/test_g_add.mir

#RUN: not llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_add name: test_add
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_addrspacecast.mir

#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_addrspacecast name: test_addrspacecast
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_bitcast.mir

#RUN: not llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, amdgpu-registered-target # REQUIRES: global-isel, amdgpu-registered-target
--- ---
name: test_bitcast name: test_bitcast
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_brjt.mir

# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_jump_table name: test_jump_table
legalized: true legalized: true
tracksRegLiveness: true tracksRegLiveness: true
jumpTable: jumpTable:
kind: block-address kind: block-address
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llvm/test/MachineVerifier/test_g_build_vector.mir

# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- ---
name: g_build_vector name: g_build_vector
tracksRegLiveness: true tracksRegLiveness: true
liveins: liveins:
body: | body: |
bb.0: bb.0:
%0:_(s32) = IMPLICIT_DEF %0:_(s32) = IMPLICIT_DEF
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llvm/test/MachineVerifier/test_g_build_vector_trunc.mir

#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- | --- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown" target triple = "aarch64-unknown-unknown"
define i32 @g_build_vector_trunc() { define i32 @g_build_vector_trunc() {
ret i32 0 ret i32 0
} }
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llvm/test/MachineVerifier/test_g_concat_vectors.mir

#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- | --- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown" target triple = "aarch64-unknown-unknown"
define i32 @g_concat_vectors() { define i32 @g_concat_vectors() {
ret i32 0 ret i32 0
} }
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llvm/test/MachineVerifier/test_g_constant.mir

#RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_constant name: test_constant
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_dyn_stackalloc.mir

# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- ---
name: test_dyn_stackalloc name: test_dyn_stackalloc
legalized: true legalized: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
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llvm/test/MachineVerifier/test_g_extract.mir

# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_extract name: test_extract
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 26 Lines

llvm/test/MachineVerifier/test_g_fcmp.mir

#RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_fcmp name: test_fcmp
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 31 Lines

llvm/test/MachineVerifier/test_g_fconstant.mir

#RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_fconstant name: test_fconstant
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 26 Lines

llvm/test/MachineVerifier/test_g_icmp.mir

#RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_icmp name: test_icmp
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 31 Lines

llvm/test/MachineVerifier/test_g_insert.mir

# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_insert name: test_insert
legalized: true legalized: true
tracksRegLiveness: true tracksRegLiveness: true
liveins: liveins:
body: | body: |
Show All 35 Lines

llvm/test/MachineVerifier/test_g_intrinsic.mir

# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target # REQUIRES: amdgpu-registered-target
--- ---
name: test_intrinsic name: test_intrinsic
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir

# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target # REQUIRES: amdgpu-registered-target
--- ---
name: test_intrinsic_w_side_effects name: test_intrinsic_w_side_effects
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 26 Lines

llvm/test/MachineVerifier/test_g_inttoptr.mir

#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_inttoptr name: test_inttoptr
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 36 Lines

llvm/test/MachineVerifier/test_g_jump_table.mir

# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_jump_table name: test_jump_table
legalized: true legalized: true
tracksRegLiveness: true tracksRegLiveness: true
jumpTable: jumpTable:
kind: block-address kind: block-address
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llvm/test/MachineVerifier/test_g_load.mir

#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_load name: test_load
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_merge_values.mir

# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- ---
name: g_merge_values name: g_merge_values
tracksRegLiveness: true tracksRegLiveness: true
liveins: liveins:
body: | body: |
bb.0: bb.0:
%0:_(s32) = IMPLICIT_DEF %0:_(s32) = IMPLICIT_DEF
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llvm/test/MachineVerifier/test_g_phi.mir

#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- | --- |
; ModuleID = 'test.ll' ; ModuleID = 'test.ll'
source_filename = "test.ll" source_filename = "test.ll"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown" target triple = "aarch64-unknown-unknown"
define i32 @test_phi(i32 %argc) { define i32 @test_phi(i32 %argc) {
▲ Show 20 Lines • Show All 70 Lines • Show Last 20 Lines

llvm/test/MachineVerifier/test_g_ptr_add.mir

#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_gep name: test_gep
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 23 Lines

llvm/test/MachineVerifier/test_g_ptrtoint.mir

#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s #RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_ptrtoint name: test_ptrtoint
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
Show All 36 Lines

llvm/test/MachineVerifier/test_g_select.mir

#RUN: not llc -march=aarch64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s #RUN: not --crash llc -march=aarch64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_select name: test_select
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_sext_inreg.mir

# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- | --- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--" target triple = "aarch64--"
define void @test() { ret void } define void @test() { ret void }
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llvm/test/MachineVerifier/test_g_sextload.mir

# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_sextload name: test_sextload
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_shuffle_vector.mir

# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- ---
name: g_shuffle_vector name: g_shuffle_vector
tracksRegLiveness: true tracksRegLiveness: true
liveins: liveins:
body: | body: |
bb.0: bb.0:
%0:_(<2 x s32>) = G_IMPLICIT_DEF %0:_(<2 x s32>) = G_IMPLICIT_DEF
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llvm/test/MachineVerifier/test_g_store.mir

# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_store name: test_store
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_trunc.mir

# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_trunc name: test_trunc
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_g_zextload.mir

# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target # REQUIRES: global-isel, aarch64-registered-target
--- ---
name: test_zextload name: test_zextload
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_memccpy_intrinsics.mir

# RUN: not llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # RUN: not --crash llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- ---
name: test_memcpy_et_al name: test_memcpy_et_al
legalized: true legalized: true
regBankSelected: false regBankSelected: false
selected: false selected: false
tracksRegLiveness: true tracksRegLiveness: true
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llvm/test/MachineVerifier/test_phis_precede_nonphis.mir

# RUN: not llc -run-pass=machineverifier %s -o - 2>&1 | FileCheck %s # RUN: not --crash llc -run-pass=machineverifier %s -o - 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- | --- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--" target triple = "aarch64--"
define void @valid(i8* %addr) { define void @valid(i8* %addr) {
entry: entry:
br i1 0, label %if, label %else br i1 0, label %if, label %else
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llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir

# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target # REQUIRES: x86-registered-target
# CHECK: Bad machine code: Generic extend/truncate can not operate on pointers # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers
# CHECK-NEXT: - function: bad_generic_extends_and_truncates # CHECK-NEXT: - function: bad_generic_extends_and_truncates
# CHECK-NEXT: - basic block: %bb.1 # CHECK-NEXT: - basic block: %bb.1
# CHECK-NEXT: - instruction: %t_p:_(s32) = G_TRUNC %p:_(p0) # CHECK-NEXT: - instruction: %t_p:_(s32) = G_TRUNC %p:_(p0)
# CHECK: Bad machine code: operand types must be all-vector or all-scalar # CHECK: Bad machine code: operand types must be all-vector or all-scalar
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llvm/test/MachineVerifier/verifier-generic-types-1.mir

# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target # REQUIRES: x86-registered-target
# CHECK-NOT: Type mismatch # CHECK-NOT: Type mismatch
# CHECK: Bad machine code: Generic instruction is missing a virtual register type # CHECK: Bad machine code: Generic instruction is missing a virtual register type
# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_no_mismatches # CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_no_mismatches
# CHECK-NEXT: - basic block: %bb.0 # CHECK-NEXT: - basic block: %bb.0
# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_ # CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
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llvm/test/MachineVerifier/verifier-generic-types-2.mir

# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target # REQUIRES: x86-registered-target
# CHECK: Bad machine code: Generic instruction is missing a virtual register type # CHECK: Bad machine code: Generic instruction is missing a virtual register type
# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_a_mismatch # CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_a_mismatch
# CHECK-NEXT: - basic block: %bb.0 # CHECK-NEXT: - basic block: %bb.0
# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_ # CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
# CHECK-NEXT: - operand 0: %2:gr64 # CHECK-NEXT: - operand 0: %2:gr64
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llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir

# RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s # RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
# REQUIRES: amdgpu-registered-target # REQUIRES: amdgpu-registered-target
# When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use. # When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
# ERROR: *** Bad machine code: Using an undefined physical register *** # ERROR: *** Bad machine code: Using an undefined physical register ***
# ERROR: instruction: S_ENDPGM 0, implicit %0:vgpr_32, implicit $vcc # ERROR: instruction: S_ENDPGM 0, implicit %0:vgpr_32, implicit $vcc
# ERROR: operand 2: implicit $vcc # ERROR: operand 2: implicit $vcc
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llvm/test/MachineVerifier/verifier-phi-fail0.mir

# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s # RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target # REQUIRES: x86-registered-target
--- ---
# CHECK: Bad machine code: PHI operand is not live-out from predecessor # CHECK: Bad machine code: PHI operand is not live-out from predecessor
# CHECK: - function: func0 # CHECK: - function: func0
# CHECK: - basic block: %bb.3 # CHECK: - basic block: %bb.3
# CHECK: - instruction: %0:gr32 = PHI # CHECK: - instruction: %0:gr32 = PHI
# CHECK: - operand 1: %1 # CHECK: - operand 1: %1
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llvm/test/MachineVerifier/verifier-pseudo-terminators.mir

# RUN: not llc -march=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s # RUN: not --crash llc -march=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target # REQUIRES: amdgpu-registered-target
# Make sure that mismatched successors are caught when a _term # Make sure that mismatched successors are caught when a _term
# instruction is used # instruction is used
# CHECK: *** Bad machine code: MBB exits via unconditional branch but the CFG successor doesn't match the actual successor! *** # CHECK: *** Bad machine code: MBB exits via unconditional branch but the CFG successor doesn't match the actual successor! ***
--- ---
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llvm/test/MachineVerifier/verify-regbankselected.mir

# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- | --- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--" target triple = "aarch64--"
define void @test() { ret void } define void @test() { ret void }
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llvm/test/MachineVerifier/verify-regops.mir

# RUN: not llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \ # RUN: not --crash llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \
# RUN: 2>&1 | FileCheck %s # RUN: 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target # REQUIRES: x86-registered-target
# #
# Check that MachineVerifier catches corrupt operands where MO->isReg() # Check that MachineVerifier catches corrupt operands where MO->isReg()
# returns true, but the descriptor says it should be an OPERAND_IMMEDIATE or # returns true, but the descriptor says it should be an OPERAND_IMMEDIATE or
# OPERAND_PCREL. Conversely, if MO->isReg() (and MO->isFI()) returns false, # OPERAND_PCREL. Conversely, if MO->isReg() (and MO->isFI()) returns false,
# check that not an OPERAND_REGISTER is expected. # check that not an OPERAND_REGISTER is expected.
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llvm/test/MachineVerifier/verify-selected.mir

# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target # REQUIRES: aarch64-registered-target
--- | --- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--" target triple = "aarch64--"
define void @test() { ret void } define void @test() { ret void }
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llvm/test/Object/coff-invalid.test

RUN: llvm-readobj -S %p/Inputs/invalid-bad-section-address.coff 2>&1 | \ RUN: llvm-readobj -S %p/Inputs/invalid-bad-section-address.coff 2>&1 | \
RUN: FileCheck --check-prefix=SECTIONS %s RUN: FileCheck --check-prefix=SECTIONS %s
SECTIONS: Section { SECTIONS: Section {
SECTIONS-NEXT: Number: 1 SECTIONS-NEXT: Number: 1
SECTIONS-NEXT: Name: .text (2E 74 65 78 74 00 00 00) SECTIONS-NEXT: Name: .text (2E 74 65 78 74 00 00 00)
SECTIONS-NEXT: VirtualSize: 0x0 SECTIONS-NEXT: VirtualSize: 0x0
SECTIONS-NEXT: VirtualAddress: 0x1000000 SECTIONS-NEXT: VirtualAddress: 0x1000000
RUN: not llvm-readobj -r %p/Inputs/invalid-bad-section-address.coff 2>&1 | \ RUN: not --crash llvm-readobj -r %p/Inputs/invalid-bad-section-address.coff 2>&1 | \
RUN: FileCheck %s RUN: FileCheck %s
CHECK: Sections with relocations should have an address of 0 CHECK: Sections with relocations should have an address of 0

llvm/test/Object/elf-invalid-phdr.test

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# - Type: PT_LOAD # - Type: PT_LOAD
# Flags: [ PF_X, PF_R ] # Flags: [ PF_X, PF_R ]
# VAddr: 0xAAAA1000 # VAddr: 0xAAAA1000
# PAddr: 0xFFFF1000 # PAddr: 0xFFFF1000
# Sections: # Sections:
# - Section: .text # - Section: .text
# #
# Then editing the e_phoff in with a hexeditor to set it to 0xffffff # Then editing the e_phoff in with a hexeditor to set it to 0xffffff
RUN: not llvm-objdump -private-headers %p/Inputs/invalid-phdr.elf 2>&1 \ RUN: not --crash llvm-objdump -private-headers %p/Inputs/invalid-phdr.elf 2>&1 \
RUN: | FileCheck %s RUN: | FileCheck %s
CHECK: LLVM ERROR: program headers are longer than binary of size 4162: e_phoff = 0xffffff, e_phnum = 1, e_phentsize = 56 CHECK: LLVM ERROR: program headers are longer than binary of size 4162: e_phoff = 0xffffff, e_phnum = 1, e_phentsize = 56
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llvm/test/Object/invalid.test

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# RUN: | FileCheck %s -DFILE=%p/Inputs/invalid-strtab-size.elf --check-prefix=INVALID-STRTAB-SIZE # RUN: | FileCheck %s -DFILE=%p/Inputs/invalid-strtab-size.elf --check-prefix=INVALID-STRTAB-SIZE
# INVALID-STRTAB-SIZE: error: '[[FILE]]': section [index 1] has a sh_offset (0x70) + sh_size (0xffffff) that is greater than the file size (0x218) # INVALID-STRTAB-SIZE: error: '[[FILE]]': section [index 1] has a sh_offset (0x70) + sh_size (0xffffff) that is greater than the file size (0x218)
## Check that llvm-dwarfdump reports an error during relocation resolution ## Check that llvm-dwarfdump reports an error during relocation resolution
## when instead of expected SHT_RELA section it locates a section of a different type. ## when instead of expected SHT_RELA section it locates a section of a different type.
# RUN: yaml2obj %s --docnum=3 -o %t3 # RUN: yaml2obj %s --docnum=3 -o %t3
# RUN: not llvm-dwarfdump -debug-line %t3 2>&1 | FileCheck --check-prefix=RELA %s # RUN: not --crash llvm-dwarfdump -debug-line %t3 2>&1 | FileCheck --check-prefix=RELA %s
# RELA: LLVM ERROR: Section is not SHT_RELA # RELA: LLVM ERROR: Section is not SHT_RELA
--- !ELF --- !ELF
FileHeader: FileHeader:
Class: ELFCLASS64 Class: ELFCLASS64
Data: ELFDATA2LSB Data: ELFDATA2LSB
Type: ET_REL Type: ET_REL
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llvm/test/Object/wasm-invalid-file.yaml

# RUN: yaml2obj %s -o %t.wasm # RUN: yaml2obj %s -o %t.wasm
# RUN: echo -e -n "\x01" >> %t.wasm # RUN: echo -e -n "\x01" >> %t.wasm
# Append a new section but truncate the encoding of the section size # Append a new section but truncate the encoding of the section size
# RUN: not llvm-objdump -h %t.wasm 2>&1 | FileCheck %s -check-prefix=CHECK-LEB-DECODE # RUN: not --crash llvm-objdump -h %t.wasm 2>&1 | FileCheck %s -check-prefix=CHECK-LEB-DECODE
!WASM !WASM
FileHeader: FileHeader:
Version: 0x00000001 Version: 0x00000001
# CHECK-LEB-DECODE: malformed uleb128, extends past end # CHECK-LEB-DECODE: malformed uleb128, extends past end
# RUN: echo -en "\x99hello" >> %t.wasm # RUN: echo -en "\x99hello" >> %t.wasm
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llvm/test/Object/wasm-string-outside-section.test

RUN: not llvm-objdump -s %p/Inputs/WASM/string-outside-section.wasm 2>&1 | FileCheck %s RUN: not --crash llvm-objdump -s %p/Inputs/WASM/string-outside-section.wasm 2>&1 | FileCheck %s
CHECK: LLVM ERROR: EOF while reading string CHECK: LLVM ERROR: EOF while reading string

llvm/test/Other/close-stderr.ll

  • This file was deleted.
; RUN: sh -c 'opt --reject-this-option 2>&-; echo $?; opt -o /dev/null /dev/null 2>&-; echo $?;' \
; RUN: | FileCheck %s
; CHECK: {{^1$}}
; On valgrind, we got 127 here.
; XFAIL: valgrind
; CHECK: {{^0$}}
; XFAIL: vg_leak
; REQUIRES: shell
; Test that the error handling when writing to stderr fails exits the
; program cleanly rather than aborting.

llvm/test/Other/optimization-remarks-inline.ll

; RUN: opt < %s -inline -pass-remarks='inline' -S 2>&1 | FileCheck %s ; RUN: opt < %s -inline -pass-remarks='inline' -S 2>&1 | FileCheck %s
; RUN: opt < %s -inline -pass-remarks='inl.*' -S 2>&1 | FileCheck %s ; RUN: opt < %s -inline -pass-remarks='inl.*' -S 2>&1 | FileCheck %s
; RUN: opt < %s -inline -pass-remarks='vector' -pass-remarks='inl' -S 2>&1 | FileCheck %s ; RUN: opt < %s -inline -pass-remarks='vector' -pass-remarks='inl' -S 2>&1 | FileCheck %s
; These two should not yield an inline remark for the same reason. ; These two should not yield an inline remark for the same reason.
; In the first command, we only ask for vectorizer remarks, in the ; In the first command, we only ask for vectorizer remarks, in the
; second one we ask for the inliner, but we then ask for the vectorizer ; second one we ask for the inliner, but we then ask for the vectorizer
; (thus overriding the first flag). ; (thus overriding the first flag).
; RUN: opt < %s -inline -pass-remarks='vector' -S 2>&1 | FileCheck --check-prefix=REMARKS %s ; RUN: opt < %s -inline -pass-remarks='vector' -S 2>&1 | FileCheck --check-prefix=REMARKS %s
; RUN: opt < %s -inline -pass-remarks='inl' -pass-remarks='vector' -S 2>&1 | FileCheck --check-prefix=REMARKS %s ; RUN: opt < %s -inline -pass-remarks='inl' -pass-remarks='vector' -S 2>&1 | FileCheck --check-prefix=REMARKS %s
; RUN: opt < %s -inline -S 2>&1 | FileCheck --check-prefix=REMARKS %s ; RUN: opt < %s -inline -S 2>&1 | FileCheck --check-prefix=REMARKS %s
; RUN: not opt < %s -pass-remarks='(' 2>&1 | FileCheck --check-prefix=BAD-REGEXP %s ; RUN: not --crash opt < %s -pass-remarks='(' 2>&1 | FileCheck --check-prefix=BAD-REGEXP %s
define i32 @foo(i32 %x, i32 %y) #0 { define i32 @foo(i32 %x, i32 %y) #0 {
entry: entry:
%x.addr = alloca i32, align 4 %x.addr = alloca i32, align 4
%y.addr = alloca i32, align 4 %y.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4 store i32 %x, i32* %x.addr, align 4
store i32 %y, i32* %y.addr, align 4 store i32 %y, i32* %y.addr, align 4
%0 = load i32, i32* %x.addr, align 4 %0 = load i32, i32* %x.addr, align 4
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llvm/test/TableGen/HwModeSelect.td

// RUN: not llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s // RUN: not --crash llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s
// The HwModeSelect class is intended to serve as a base class for other // The HwModeSelect class is intended to serve as a base class for other
// classes that are then used to select a value based on the HW mode. // classes that are then used to select a value based on the HW mode.
// It contains a list of HW modes, and a derived class should provide a // It contains a list of HW modes, and a derived class should provide a
// list of corresponding values. // list of corresponding values.
// These two lists must have the same size. Make sure that a violation of // These two lists must have the same size. Make sure that a violation of
// this requirement is diagnosed. // this requirement is diagnosed.
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llvm/test/Transforms/BlockExtractor/invalid-block.ll

; RUN: echo 'bar invalidbb' > %t ; RUN: echo 'bar invalidbb' > %t
; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s ; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
; CHECK: Invalid block ; CHECK: Invalid block
define void @bar() { define void @bar() {
bb: bb:
ret void ret void
} }

llvm/test/Transforms/BlockExtractor/invalid-function.ll

; RUN: echo 'foo bb' > %t ; RUN: echo 'foo bb' > %t
; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s ; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
; CHECK: Invalid function ; CHECK: Invalid function
define void @bar() { define void @bar() {
bb: bb:
ret void ret void
} }

llvm/test/Transforms/BlockExtractor/invalid-line.ll

; RUN: echo 'foo' > %t ; RUN: echo 'foo' > %t
; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s ; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
; CHECK: Invalid line ; CHECK: Invalid line
define void @bar() { define void @bar() {
bb: bb:
ret void ret void
} }

llvm/test/Transforms/FunctionImport/not-prevailing.ll

; RUN: opt -module-summary %s -o %t1.bc ; RUN: opt -module-summary %s -o %t1.bc
; RUN: opt -module-summary -o %t2.bc %S/Inputs/not-prevailing.ll ; RUN: opt -module-summary -o %t2.bc %S/Inputs/not-prevailing.ll
; RUN: not llvm-lto2 run -o %t3.bc %t1.bc %t2.bc -r %t1.bc,bar,px \ ; RUN: not --crash llvm-lto2 run -o %t3.bc %t1.bc %t2.bc -r %t1.bc,bar,px \
; RUN: -r %t1.bc,foo,x -r %t2.bc,foo,x -save-temps 2>&1 | FileCheck %s ; RUN: -r %t1.bc,foo,x -r %t2.bc,foo,x -save-temps 2>&1 | FileCheck %s
; CHECK: Interposable and available_externally/linkonce_odr/weak_odr symbol ; CHECK: Interposable and available_externally/linkonce_odr/weak_odr symbol
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
define available_externally i32 @foo() { define available_externally i32 @foo() {
ret i32 1 ret i32 1
} }
define i32 @bar() { define i32 @bar() {
%1 = call i32 @foo() %1 = call i32 @foo()
ret i32 %1 ret i32 %1
} }

llvm/test/Transforms/GCOVProfiling/version.ll

; RUN: rm -rf %t && mkdir -p %t ; RUN: rm -rf %t && mkdir -p %t
; RUN: echo '!9 = !{!"%/t/version.ll", !0}' > %t/1 ; RUN: echo '!9 = !{!"%/t/version.ll", !0}' > %t/1
; RUN: cat %s %t/1 > %t/2 ; RUN: cat %s %t/1 > %t/2
; RUN: opt -insert-gcov-profiling -disable-output < %t/2 ; RUN: opt -insert-gcov-profiling -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.204' ; RUN: head -c8 %t/version.gcno | grep '^oncg.204'
; RUN: rm %t/version.gcno ; RUN: rm %t/version.gcno
; RUN: not opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2 ; RUN: not --crash opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2
; RUN: opt -insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2 ; RUN: opt -insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.704' ; RUN: head -c8 %t/version.gcno | grep '^oncg.704'
; RUN: rm %t/version.gcno ; RUN: rm %t/version.gcno
; RUN: opt -passes=insert-gcov-profiling -disable-output < %t/2 ; RUN: opt -passes=insert-gcov-profiling -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.204' ; RUN: head -c8 %t/version.gcno | grep '^oncg.204'
; RUN: rm %t/version.gcno ; RUN: rm %t/version.gcno
; RUN: not opt -passes=insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2 ; RUN: not --crash opt -passes=insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2
; RUN: opt -passes=insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2 ; RUN: opt -passes=insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.704' ; RUN: head -c8 %t/version.gcno | grep '^oncg.704'
; RUN: rm %t/version.gcno ; RUN: rm %t/version.gcno
define void @test() !dbg !5 { define void @test() !dbg !5 {
ret void, !dbg !8 ret void, !dbg !8
} }
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llvm/test/Transforms/InstCombine/limit-max-iterations.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine --instcombine-max-iterations=0 -S | FileCheck %s --check-prefix=ZERO ; RUN: opt < %s -instcombine --instcombine-max-iterations=0 -S | FileCheck %s --check-prefix=ZERO
; RUN: opt < %s -instcombine --instcombine-max-iterations=1 -S | FileCheck %s --check-prefix=ONE ; RUN: opt < %s -instcombine --instcombine-max-iterations=1 -S | FileCheck %s --check-prefix=ONE
; RUN: opt < %s -instcombine -S | FileCheck %s --check-prefix=FIXPOINT ; RUN: opt < %s -instcombine -S | FileCheck %s --check-prefix=FIXPOINT
; RUN: not opt < %s -instcombine -S --instcombine-infinite-loop-threshold=3 2>&1 | FileCheck %s --check-prefix=LOOP ; RUN: not --crash opt < %s -instcombine -S --instcombine-infinite-loop-threshold=3 2>&1 | FileCheck %s --check-prefix=LOOP
; Based on xor-of-icmps-with-extra-uses.ll. This requires multiple iterations of ; Based on xor-of-icmps-with-extra-uses.ll. This requires multiple iterations of
; InstCombine to reach a fixpoint. ; InstCombine to reach a fixpoint.
define i1 @v0_select_of_consts(i32 %X, i32* %selected) { define i1 @v0_select_of_consts(i32 %X, i32* %selected) {
; ZERO-LABEL: @v0_select_of_consts( ; ZERO-LABEL: @v0_select_of_consts(
; ZERO-NEXT: [[COND0:%.*]] = icmp sgt i32 [[X:%.*]], 32767 ; ZERO-NEXT: [[COND0:%.*]] = icmp sgt i32 [[X:%.*]], 32767
; ZERO-NEXT: [[COND1:%.*]] = icmp sgt i32 [[X]], -32768 ; ZERO-NEXT: [[COND1:%.*]] = icmp sgt i32 [[X]], -32768
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llvm/test/tools/llvm-lto2/X86/pipeline.ll

Show All 22 Linesdefine void @patatino() {
ret void ret void
} }
; CUSTOM: define void @patatino() { ; CUSTOM: define void @patatino() {
; CUSTOM-NEXT: ret void ; CUSTOM-NEXT: ret void
; CUSTOM-NEXT: } ; CUSTOM-NEXT: }
; Check that invalid pipelines are caught as errors. ; Check that invalid pipelines are caught as errors.
; RUN: not llvm-lto2 run %t1.bc -o %t.o \ ; RUN: not --crash llvm-lto2 run %t1.bc -o %t.o \
; RUN: -r %t1.bc,patatino,px -opt-pipeline foogoo 2>&1 | \ ; RUN: -r %t1.bc,patatino,px -opt-pipeline foogoo 2>&1 | \
; RUN: FileCheck %s --check-prefix=ERR ; RUN: FileCheck %s --check-prefix=ERR
; ERR: LLVM ERROR: unable to parse pass pipeline description 'foogoo': unknown pass name 'foogoo' ; ERR: LLVM ERROR: unable to parse pass pipeline description 'foogoo': unknown pass name 'foogoo'
; RUN: not llvm-lto2 run %t1.bc -o %t.o \ ; RUN: not --crash llvm-lto2 run %t1.bc -o %t.o \
; RUN: -r %t1.bc,patatino,px -aa-pipeline patatino \ ; RUN: -r %t1.bc,patatino,px -aa-pipeline patatino \
; RUN: -opt-pipeline loweratomic 2>&1 | \ ; RUN: -opt-pipeline loweratomic 2>&1 | \
; RUN: FileCheck %s --check-prefix=AAERR ; RUN: FileCheck %s --check-prefix=AAERR
; AAERR: LLVM ERROR: unable to parse AA pipeline description 'patatino': unknown alias analysis name 'patatino' ; AAERR: LLVM ERROR: unable to parse AA pipeline description 'patatino': unknown alias analysis name 'patatino'

llvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s

// REQUIRES: aarch64-registered-target // REQUIRES: aarch64-registered-target
// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \ // RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \
// RUN: | not llvm-readobj --unwind - | FileCheck %s // RUN: | not --crash llvm-readobj --unwind - 2>&1 | FileCheck %s
// Older versions of LLVM had a bug where we would accidentally // Older versions of LLVM had a bug where we would accidentally
// truncate the number of epilogue scopes to a uint8_t; make // truncate the number of epilogue scopes to a uint8_t; make
// sure this doesn't happen. // sure this doesn't happen.
// //
// We expect the llvm-readobj invocation to fail because the // We expect the llvm-readobj invocation to fail because the
// xdata section is truncated (to reduce the size of the testcase). // xdata section is truncated (to reduce the size of the testcase).
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llvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s

## Check that the sanity check for an inconsistent header works. ## Check that the sanity check for an inconsistent header works.
## The first word contains the bad value for CodeWords, 0xf, which indicates ## The first word contains the bad value for CodeWords, 0xf, which indicates
## that we need 0x11110 << 2 = 120 bytes of space for the unwind codes. ## that we need 0x11110 << 2 = 120 bytes of space for the unwind codes.
## It follows that the .xdata section is badly formed as only 8 bytes are ## It follows that the .xdata section is badly formed as only 8 bytes are
## allocated for the unwind codes. ## allocated for the unwind codes.
// REQUIRES: aarch64-registered-target // REQUIRES: aarch64-registered-target
// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \ // RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \
// RUN: | not llvm-readobj --unwind - 2>&1 | FileCheck %s // RUN: | not --crash llvm-readobj --unwind - 2>&1 | FileCheck %s
// CHECK: LLVM ERROR: Malformed unwind data // CHECK: LLVM ERROR: Malformed unwind data
.text .text
.globl "?func@@YAHXZ" .globl "?func@@YAHXZ"
.p2align 3 .p2align 3
"?func@@YAHXZ": "?func@@YAHXZ":
sub sp,sp,#0x10 sub sp,sp,#0x10
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llvm/test/Object/invalid.test