[lld] Support dynamic linking in RISC-V

[PkmX]

Summary

This patch adds support for handling of PIC, generation of GOT/PLT and creation of PIE executables or DSO.

Some comments:

• It's currently missing the first entry of GOT which should be the address of .dynamic section. This seems to be the case for other targets as well, for example x86_64 ABI requires the address in .got so _GLOBAL_OFFSET_TABLE[0] == &_DYNAMIC but lld puts it in .got.plt instead. For now this doesn't appear to be used as well.
• RISC-V uses ADDN/SETN/SUBN relocation pairs to calculate differences of address in DWARF. This means that lld tries to create dynamic relocations for those while they are actually link-time constants as a pair, so we set those in RISCV::usesOnlyLowPageBits.

[ruiu]

ELF/Arch/RISCV.cpp

75–76

clang-format-diff please.

81–82

Use Config->Wordsize instead of sizeof(typename ELFT::uint);

106–110

I added a new file ELF/Bits.h. Please use writeUint and readUint defined in that file.

[ruiu]

ELF/Arch/RISCV.cpp

62–72

Since now we assume it is little-endian, we don't write it in a generic way. You can use just write32le and read32le.

I wonder if we even had to make this class a template class because the difference between RISCV64 and RISCV32 seem pretty small, and we can easily handle differences with Config->Is64.

[PkmX]

De-template RISCV class and assume little-endian.

[ruiu]

ELF/Arch/RISCV.cpp

111

Remove const

137–143

Please apply clang-format-diff.

ELF/Relocations.cpp

416–418

I think a better way of doing it is to define __global_pointer$ as a relative symbol in the first place. That's what we are doing for linker-synthesized symbols such as _etext or _edata. Please take a look at Writer.cpp.

[PkmX]

• Use write32le.
• Since __global_pointer$ is no longer absolute, remove workaround to make it a static link-time constant in PIE.

[PkmX]

clang-format-diff RISCV::writePLT.

[PkmX]

• Rebase onto latest master
• Clean up #includes

[PkmX]

Rebase onto latest master.

[PkmX]

Rebase onto master.

[PkmX]

Rebased.

RISCV now writes its own GOT header, with one entry that stores the address of .dynamic section. _GLOBAL_OFFSET_TABLE_ should be set to the head of .got so that _GLOBAL_OFFSET_TABLE_[0] == &_DYNAMIC.

[jrtc27]

This needs rebasing again as NoneRel = R_RISCV_NONE was added to the constructor. Otherwise, is there anything blocking this?

[ruiu]

Ditto -- if you can write tests in assembly, please convert them from YAML to assembly.

[PkmX]

In D39323#1280971, @ruiu wrote:

Ditto -- if you can write tests in assembly, please convert them from YAML to assembly.

LLVM RISC-V MC does not support generating PIC yet, so we can only use YAML at the moment.

[ruiu]

ELF/Arch/RISCV.cpp

48–58

Remove "virtual" for consistency. "override" implies it.

90

What is this field for? Perhaps a brief explanation of the structure of .got.plt header for RISC-V would be helpful for readers.

105

Side note: it is nice to see that many instructions for RISCV32 and RISCV64 are represented by the same bit pattern. I guess it's a beauty of the new clean ISA.

139

nit: indentation

[PkmX]

ELF/Arch/RISCV.cpp

90

It is a placeholder for the dynamic linker to fill with the address of _dl_runtime_resolve function. The content of .got.plt section is not explicitly described in the ABI spec, but you can sort of infer that from the PLT header:

https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#program-linkage-table

The first entry of .got.plt will be the address of _dl_runtime_resolve, and the second entry is the link map, passed as an argument to _dl_runtime_resolve. I don't think the initial values matter here, so I just take them from bfd's implementation: first entry is all ones and the second is all zeros.

[PkmX]

Rebased onto trunk.

[MaskRay]

ELF/Arch/RISCV.cpp

92

Verified the first entry is -1 set by bfd/elfnn-riscv.c

https://sourceware.org/git/?p=binutils-gdb.git;a=blob;hb=e8bf1ce461df242811e49de807f85c2e7ae17b77;f=bfd/elfnn-riscv.c#l2585

This was introduced in the initial import commit e23eba971dd409b999dd83d8df0f842680c1c642 , no history to help understand why -1 (a bit odd) was chosen.

In other bfd's other architectures and lld's (GotPltHeaderEntriesNum), _dl_runtime_resolve is 0 at link time.

99

The check if (ElfSym::GlobalOffsetTable) may be redundant.

[ruiu]

ELF/Arch/RISCV.cpp

90

We are trying to avoid cargo-culting and we should avoid writing values if the only reason to do so is to write the same value as ld.bfd. Let's just leave them as-is (i.e. leaving them as zero).

[jrtc27]

PkmX, any chance of addressing these points soon, please?

[jrtc27]

ELF/Arch/RISCV.cpp

99

If you want to write to the GOT header, you do need this guard (PPC64 doesn't, likely because of its TOCs and so the symbol is always used), as the GotSection constructor only adds GotHeaderEntriesNum to NumEntries if ElfSym::GlobalOffsetTable && !Target->GotBaseSymInGotPlt. Otherwise you risk clobbering the first GOT entry if it's a static link time constant.

However, I don't think we even need this header. BFD will emit this header on, for example, AArch64, if the GOT is non-empty (as will gold), but we never do this as far as I can tell. Thus unless RISC-V is special and the runtime really assumes this header entry is present, I think we should drop this header as it hasn't seemed to cause any problems with AArch64; we can always add it if we later find it necessary.

[ruiu]

ELF/Arch/RISCV.cpp

99

That' s a really good point. I remember at some point of the lld development, we wondered why we were adding this header even though it is not technically necessary. I turned out that we are doing it because the ABI standard requires it, but we couldn't find any technical reason to do so. Rafael wanted we stop adding this header because this is just a cargo-culting, but we decided to continue doing it for the sake of ABI compliance.

If you are defining a new ABI, I recommend you not blindly copy this header. I recommend you drop this header.

[MaskRay]

ELF/Arch/RISCV.cpp

99

Putting _GLOBAL_OFFSET_TABLE_[0] = _DYNAMIC in .got or .got.plt is a trick used by glibc/sysdeps/{aarch64,x86_64,riscv,...}/dl-machine.h.
It subtracts the link time address from the runtime time (usually relocated by a R_*_RELATIVE) to get the load address of ld.so

It seems to me a bit unnecessary that some old ABIs mandate the field as I think most userspace applications don't need this symbol.

[jrtc27]

ELF/Arch/RISCV.cpp

99

Ah, I see, it's needed when you're linking ld.so (and it uses the _GLOBAL_OFFSET_TABLE_ symbol as a variable containing a word, hence why we only do this when the symbol is referenced). So I guess we can't link glibc's ld.so on AArch64? If this is an issue affecting more than just RISC-V, I'd still be inclined to drop this from the patch, but then later fix both AArch64 and RISC-V (along with any other architectures also needing this) at the same time as a separate bug fix.

[jrtc27]

@PkmX Ping, any chance you could address the remaining few points, please?

[PkmX]

Rebased onto master and:

• Removed the GOT header per discussion
• Rewrote all tests in MC

[ruiu]

Overall looking good.

ELF/Arch/RISCV.cpp

104

It looks odd to me at first because you are setting the same value to all .got.plt slots. But I guess this is correct; jalr in .plt sets the return address to t3, so we can calculate a .plt index by t3 minus .plt start address. Nice. A little explanation would help readers understand this code, though.

109

Please use error() instead of fatal(). We use fatal() only to report corrupted files. After you report an error using error(), you can just return from this function.

[PkmX]

Addressed the review comments:

• Added comments to writeGotPlt.
• Use error instead of fatal when generating PLT on RV32E.

[ruiu]

LGTM

[lenary]

Am I correct in thinking that this functionality has already been upstreamed into LLD, and that this patch can now been abandoned?

[MaskRay]

In D39323#1631117, @lenary wrote:

Am I correct in thinking that this functionality has already been upstreamed into LLD, and that this patch can now been abandoned?

Yes, the functionality has already been upstreamed. I somehow forgot this one while I was doing that... Mainly D63076 (GOT,PLT,COPY,relative), D63220 (TLS) and a few other fixups.
The functionality should be pretty complete in the llvm 9 release: I built libc-test against glibc riscv64 and musl riscv64.

R_RISCV_RELAX/R_RISCV_ALIGN has not been implemented. There is some technical difficulty - shrinkable sections do not fit in lld's current framework. It can be implemented but generally I think R_RISCV_RELAX can have other problems... e.g. it breaks split dwarf, it disallows section symbols in object files, etc.

ELF/Arch/RISCV.cpp

 //===- RISCV.cpp ----------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
+#include "Bits.h"
 #include "InputFiles.h"
 #include "InputSection.h"
 #include "Memory.h"
 #include "OutputSections.h"
 #include "SymbolTable.h"
 #include "Symbols.h"
 #include "SyntheticSections.h"
 #include "Target.h"

 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 
 template <class ELFT> class RISCV final : public TargetInfo {
 public:
+  RISCV();
   RelExpr getRelExpr(RelType Type, const SymbolBody &S,
                      const uint8_t *Loc) const override;
   void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
+
+  virtual void writeGotPltHeader(uint8_t *Buf) const override;
+  virtual void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
+
+  virtual void writePltHeader(uint8_t *Buf) const override;
+
+  virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
+                        uint64_t PltEntryAddr, int32_t Index,
+                        unsigned RelOff) const override;
+
+  virtual bool usesOnlyLowPageBits(uint32_t Type) const override;
 };
 
 } // end anonymous namespace
 
 // RISC-V instructions are stored as 16-bit parcels starting with lower bits;
 // each parcel is stored according to implementation's endianness.
 template <endianness E>
 static void writeInsn32(uint8_t *const Buf, const uint32_t Insn) {
   write16<E>(Buf, Insn);
   write16<E>(Buf + 2, Insn >> 16);
 }
 
 template <endianness E> static uint32_t readInsn32(const uint8_t *const Buf) {
   return read16<E>(Buf) | static_cast<uint32_t>(read16<E>(Buf + 2)) << 16;
 }
 
+template <class ELFT> RISCV<ELFT>::RISCV() {
+  CopyRel = R_RISCV_COPY;
+  RelativeRel = R_RISCV_RELATIVE;
+  GotRel = ELFT::Is64Bits ? R_RISCV_64 : R_RISCV_32;
+  PltRel = R_RISCV_JUMP_SLOT;
+  GotEntrySize = Config->Wordsize;
+  GotPltEntrySize = Config->Wordsize;
+  PltEntrySize = 16;
+  PltHeaderSize = 32;
+  GotPltHeaderEntriesNum = 2;
+}
+
+template <class ELFT>
+bool RISCV<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
+  return Type == R_RISCV_LO12_I || Type == R_RISCV_PCREL_LO12_I ||
+         Type == R_RISCV_LO12_S || Type == R_RISCV_PCREL_LO12_S ||
+         // These are used in a pair to calculate relative address in debug
+         // sections, so they aren't really absolute. We list those here as a
+         // hack so the linker doesn't try to create dynamic relocations.
+         Type == R_RISCV_ADD8 || Type == R_RISCV_ADD16 ||
+         Type == R_RISCV_ADD32 || Type == R_RISCV_ADD64 ||
+         Type == R_RISCV_SUB8 || Type == R_RISCV_SUB16 ||
+         Type == R_RISCV_SUB32 || Type == R_RISCV_SUB64 ||
+         Type == R_RISCV_SUB6 ||
+         Type == R_RISCV_SET6 || Type == R_RISCV_SET8 ||
+         Type == R_RISCV_SET16 || Type == R_RISCV_SET32;
+}
+
+template <class ELFT> void RISCV<ELFT>::writeGotPltHeader(uint8_t *Buf) const {
+  writeUint(Buf, -1);
+  writeUint(Buf + GotPltEntrySize, 0);
+}
+
+template <class ELFT>
+void RISCV<ELFT>::writeGotPlt(uint8_t *Buf, const SymbolBody &S) const {
+  writeUint(Buf, InX::Plt->getVA());
+}
+
+template <class ELFT> void RISCV<ELFT>::writePltHeader(uint8_t *Buf) const {
+  constexpr endianness E = ELFT::TargetEndianness;
+  const uint64_t PcRelGotPlt = InX::GotPlt->getVA() - InX::Plt->getVA();
+
+  writeInsn32<E>(Buf + 0, 0x00000397);    // 1: auipc  t2, %pcrel_hi(.got.plt)
+  relocateOne(Buf + 0, R_RISCV_PCREL_HI20, PcRelGotPlt);
+  writeInsn32<E>(Buf + 4, 0x41c30333);    // sub    t1, t1, t3
+  if (ELFT::Is64Bits) {
+    writeInsn32<E>(Buf + 8, 0x0003be03);  // ld     t3, %pcrel_lo(1b)(t2)
+  } else {
+    writeInsn32<E>(Buf + 8, 0x0003ae03);  // lw     t3, %pcrel_lo(1b)(t2)
+  }
+  relocateOne(Buf + 8, R_RISCV_PCREL_LO12_I, PcRelGotPlt);
+  writeInsn32<E>(Buf + 12, 0xfd430313);   // addi   t1, t1, -44
+  writeInsn32<E>(Buf + 16, 0x00038293);   // addi   t0, t2, %pcrel_lo(1b)
+  relocateOne(Buf + 16, R_RISCV_PCREL_LO12_I, PcRelGotPlt);
+  if (ELFT::Is64Bits) {
+    writeInsn32<E>(Buf + 20, 0x00135313); // srli   t1, t1, 1
+    writeInsn32<E>(Buf + 24, 0x0082b283); // ld     t0, 8(t0)
+  } else {
+    writeInsn32<E>(Buf + 20, 0x00235313); // srli   t1, t1, 2
+    writeInsn32<E>(Buf + 24, 0x0042a283); // lw     t0, 4(t0)
+  }
+  writeInsn32<E>(Buf + 28, 0x000e0067);   // jr     t3
+}
+
+template <class ELFT>
+void RISCV<ELFT>::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
+                           uint64_t PltEntryAddr, int32_t Index,
+                           unsigned RelOff) const {
+  constexpr endianness E = ELFT::TargetEndianness;
+
+  writeInsn32<E>(Buf +  0, 0x00000e17);   // auipc   t3, %pcrel_hi(f@.got.plt)
+  if (ELFT::Is64Bits) {
+    writeInsn32<E>(Buf +  4, 0x000e3e03); // ld      t3, %pcrel_lo(-4)(t3)
+  } else {
+    writeInsn32<E>(Buf +  4, 0x000e2e03); // lw      t3, %pcrel_lo(-4)(t3)
+  }
+  writeInsn32<E>(Buf +  8, 0x000e0367);   // jalr    t1, t3
+  writeInsn32<E>(Buf + 12, 0x00000013);   // nop
+
+  relocateOne(Buf + 0, R_RISCV_PCREL_HI20, GotEntryAddr - PltEntryAddr);
+  relocateOne(Buf + 4, R_RISCV_PCREL_LO12_I, GotEntryAddr - PltEntryAddr);
+}
+
 template <class ELFT>
 RelExpr RISCV<ELFT>::getRelExpr(const RelType Type, const SymbolBody &S,
                                 const uint8_t *Loc) const {
   switch (Type) {
   case R_RISCV_JAL:
   case R_RISCV_BRANCH:
   case R_RISCV_CALL:
   case R_RISCV_PCREL_HI20:
   case R_RISCV_RVC_BRANCH:
   case R_RISCV_RVC_JUMP:
   case R_RISCV_32_PCREL:
     return R_PC;
+  case R_RISCV_CALL_PLT:
+    return R_PLT_PC;
   case R_RISCV_PCREL_LO12_I:
   case R_RISCV_PCREL_LO12_S:
     return R_RISCV_PC_INDIRECT;
-  case R_RISCV_RELAX:
+  case R_RISCV_GOT_HI20:
+    return R_GOT_PC;
   case R_RISCV_ALIGN:
+  case R_RISCV_RELAX:
     return R_HINT;
   default:
     return R_ABS;
   }
 }
 
 // Extract bits V[Begin:End].
 uint32_t extractBits(uint64_t V, uint32_t Begin, uint32_t End) {
case R_RISCV_BRANCH: {
     uint32_t Imm4_1 = extractBits(Val, 4, 1) << 8;
     uint32_t Imm11 = extractBits(Val, 11, 11) << 7;
     uint32_t Imm12_1 = Imm12 | Imm10_5 | Imm4_1 | Imm11;
 
     writeInsn32<E>(Loc, Inst | Imm12_1);
     return;
   }
   // auipc + jalr pair
+  case R_RISCV_CALL_PLT:
   case R_RISCV_CALL: {
     checkInt<32>(Loc, Val, Type);
     uint32_t Hi = Val + 0x800;
     uint32_t Lo = Val - (Hi & 0xFFFFF000);
     writeInsn32<E>(Loc, (readInsn32<E>(Loc) & 0xFFF) | (Hi & 0xFFFFF000));
     writeInsn32<E>(Loc + 4,
                    (readInsn32<E>(Loc + 4) & 0xFFFFF) | ((Lo & 0xFFF) << 20));
     return;
   }
 
   case R_RISCV_PCREL_HI20:
+  case R_RISCV_GOT_HI20:
   case R_RISCV_HI20: {
     checkInt<32>(Loc, Val, Type);
     uint32_t Hi = Val + 0x800;
     writeInsn32<E>(Loc, (readInsn32<E>(Loc) & 0xFFF) | (Hi & 0xFFFFF000));
     return;
   }
   case R_RISCV_PCREL_LO12_I:
   case R_RISCV_LO12_I: {

ELF/InputSection.cpp

case R_RISCV_PC_INDIRECT: {
     // points the corresponding R_RISCV_PCREL_HI20 relocation, and the target VA
     // is calculated using HI20's symbol.
     uint64_t Label = Body.getVA();
     const InputSection *IS =
         cast<InputSection>(cast<DefinedRegular>(Body).Section);
     for (const Relocation &HiRel : IS->Relocations) {
       uint64_t HiOffset = IS->getOffset(HiRel.Offset);
       uint64_t HiAddrLoc = IS->getOutputSection()->Addr + HiOffset;
-      if (Label == HiAddrLoc && isRelExprOneOf<R_PC>(HiRel.Expr)) {
+      if (Label == HiAddrLoc &&
+          isRelExprOneOf<R_PC, R_PLT_PC, R_GOT_PC>(HiRel.Expr)) {
         return getRelocTargetVA(HiRel.Type, HiRel.Addend, HiAddrLoc, *HiRel.Sym,
                                 HiRel.Expr);
       }
     }
 
     error("PCREL_LO12 relocation to symbol " + Body.getName() +
           " without associated HI20 relocation");
     return 0;

ELF/Relocations.cpp

return isRelExprOneOf<R_GOT, R_GOT_OFF, R_MIPS_GOT_LOCAL_PAGE, R_MIPS_GOT_OFF,
                         R_MIPS_GOT_OFF32, R_GOT_PAGE_PC, R_GOT_PC,
                         R_GOT_FROM_END>(Expr);
 }
 
 // True if this expression is of the form Sym - X, where X is a position in the
 // file (PC, or GOT for example).
 static bool isRelExpr(RelExpr Expr) {
   return isRelExprOneOf<R_PC, R_GOTREL, R_GOTREL_FROM_END, R_MIPS_GOTREL,
-                        R_PAGE_PC, R_RELAX_GOT_PC>(Expr);
+                        R_PAGE_PC, R_RELAX_GOT_PC, R_RISCV_PC_INDIRECT>(Expr);
 }
 
 // Returns true if a given relocation can be computed at link-time.
 //
 // For instance, we know the offset from a relocation to its target at
 // link-time if the relocation is PC-relative and refers a
 // non-interposable function in the same executable. This function
 // will return true for such relocation.
static bool isStaticLinkTimeConstant(RelExpr E, RelType Type,
   // with a comparison, which will load a zero from the GOT.
   // Another special case is MIPS _gp_disp symbol which represents offset
   // between start of a function and '_gp' value and defined as absolute just
   // to simplify the code.
   assert(AbsVal && RelE);
   if (Body.isUndefWeak())
     return true;
 
+  // __global_pointer$ is defined as absolute but will be set to .sdata + 0x800
+  // by Writer during finalization, so we white-list it here.
+  if (Config->Pie && &Body == ElfSym::RISCVGlobalPointer)
+    return true;
+
   error("relocation " + toString(Type) + " cannot refer to absolute symbol: " +
         toString(Body) + getLocation<ELFT>(S, Body, RelOff));
   return true;
 }
 
 static RelExpr toPlt(RelExpr Expr) {
   if (Expr == R_PPC_OPD)
     return R_PPC_PLT_OPD;

test/ELF/Inputs/riscv-shared.yaml

+--- !ELF
+FileHeader:      
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:        
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         ''
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         2A000000
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:         
+  Local:           
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+  Global:          
+    - Name:            f
+      Type:            STT_FUNC
+      Section:         .text
+    - Name:            x
+      Type:            STT_OBJECT
+      Section:         .data
+      Size:            0x0000000000000004
+...

test/ELF/riscv-copy.test

+# .option norelax
+# .global _start
+#
+# .section .text, "ax", @progbits
+# _start:
+#     la   a0, x
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: yaml2obj %p/Inputs/riscv-shared.yaml -o %t2.o
+# RUN: ld.lld -shared %t2.o -o %t3.so
+# RUN: ld.lld %t.o %t3.so -o %t -Tbss=0x13000 -Ttext=0x10000
+# RUN: llvm-readelf -r %t | FileCheck -check-prefix=READELF %s
+# RUN: obj2yaml %t | FileCheck %s
+#
+# READELF: Relocation section '.rela.dyn'
+# READELF: 00013000  00000104 R_RISCV_COPY           00013000   x + 0
+#
+# CHECK:     - Name:            .text
+# CHECK:       Content:         '1735000013050500'
+# CHECK:     - Name:            .bss
+#
+# 10000:       00003517                auipc   a0,0x3
+# 10004:       00050513                mv      a0,a0
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         '1705000013050500'
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          x
+        Type:            R_RISCV_PCREL_HI20
+      - Offset:          0x0000000000000004
+        Symbol:          '.L0 '
+        Type:            R_RISCV_PCREL_LO12_I
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:
+  Local:
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+    - Name:            '.L0 '
+      Section:         .text
+  Global:
+    - Name:            _start
+      Section:         .text
+    - Name:            x
+...

test/ELF/riscv-fpic-got.test

+# .option norelax
+# .option pic
+# .global _start
+#
+# .section .text, "ax", @progbits
+# _start:
+#     la   a0, x
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: yaml2obj %p/Inputs/riscv-shared.yaml -o %t2.o
+# RUN: ld.lld -shared %t2.o -o %t3.so
+# RUN: ld.lld %t.o %t3.so -o %t --section-start .got=0x20000 --section-start .text=0x10000
+# RUN: llvm-readelf -r %t | FileCheck -check-prefix=READELF %s
+# RUN: obj2yaml %t | FileCheck %s
+#
+# READELF: Relocation section '.rela.dyn'
+# READELF: 00020000  00000101 R_RISCV_32             00000000   x + 0
+#
+# CHECK: - Name:            .text
+# CHECK:   Content:         '1705010003250500'
+#
+# 10000:       00010517                auipc   a0,0x10
+# 10004:       00052503                lw      a0,0(a0) # 20000 <_start+0x10000>
+#
+# CHECK: - Name:            .got
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         '1705000003250500'
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          x
+        Type:            R_RISCV_GOT_HI20
+      - Offset:          0x0000000000000004
+        Symbol:          '.L0 '
+        Type:            R_RISCV_PCREL_LO12_I
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:
+  Local:
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+    - Name:            '.L0 '
+      Section:         .text
+  Global:
+    - Name:            _start
+      Section:         .text
+    - Name:            x
+...

test/ELF/riscv-fpic-pie.test

+# .option norelax
+# .option pic
+# .global _start
+#
+# .section .text, "ax", @progbits
+# _start:
+#     la   a0, _start
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: ld.lld %t.o -o %t -pie --section-start .got=0x20000 --section-start .text=0x10000
+# RUN: llvm-readelf -r %t | FileCheck -check-prefix=READELF %s
+# RUN: obj2yaml %t | FileCheck %s
+#
+# READELF: Relocation section '.rela.dyn'
+# READELF: 00020000  00000003 R_RISCV_RELATIVE       10000
+#
+# CHECK: - Name:            .text
+# CHECK:   Content:         '1705010003250500'
+#
+# 10000:       00010517                auipc   a0,0x10
+# 10004:       00052503                lw      a0,0(a0) # 20000 <_start+0x10000>
+#
+# CHECK: - Name:            .got
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         '1705000003250500'
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          _start
+        Type:            R_RISCV_GOT_HI20
+      - Offset:          0x0000000000000004
+        Symbol:          '.L0 '
+        Type:            R_RISCV_PCREL_LO12_I
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:
+  Local:
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+    - Name:            '.L0 '
+      Section:         .text
+  Global:
+    - Name:            _start
+      Section:         .text
+...

test/ELF/riscv-fpic-plt.test

+# .option norelax
+# .option pic
+# .global _start
+#
+# .section .text, "ax", @progbits
+# _start:
+#     call f@plt
+#
+# REQUIRES: riscv
+# RUN: yaml2obj %s -o %t.o
+# RUN: yaml2obj %p/Inputs/riscv-shared.yaml -o %t2.o
+# RUN: ld.lld -shared %t2.o -o %t3.so
+# RUN: ld.lld %t.o %t3.so -o %t --section-start .text=0x10000 --section-start .got.plt=0x20000 --section-start .plt=0x21000
+# RUN: llvm-readelf -r %t | FileCheck -check-prefix=READELF %s
+# RUN: obj2yaml %t | FileCheck %s
+#
+# READELF: Relocation section '.rela.plt'
+# READELF: 00020008  00000105 R_RISCV_JUMP_SLOT      00000000   f + 0
+#
+# CHECK: - Name:            .text
+# CHECK:   Content:         '97100100E7800002'
+# 10000:       00011097                auipc   ra,0x11
+# 10004:       020080e7                jalr    32(ra) # 21020 <f@plt>
+#
+# CHECK: - Name:            .got.plt
+# CHECK:   Content:         FFFFFFFF0000000000100200
+#
+# CHECK: - Name:            .plt
+# CHECK:   Content:         97F3FFFF3303C34103AE0300130343FD938203001353230083A2420067000E0017FEFFFF032E8EFE67030E0013000000
+# 21000:       fffff397                auipc   t2,0xfffff
+# 21004:       41c30333                sub     t1,t1,t3
+# 21008:       0003ae03                lw      t3,0(t2) # 20000 <_start+0x10000>
+# 2100c:       fd430313                addi    t1,t1,-44
+# 21010:       00038293                mv      t0,t2
+# 21014:       00235313                srli    t1,t1,0x2
+# 21018:       0042a283                lw      t0,4(t0)
+# 2101c:       000e0067                jr      t3
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_RISCV
+  Flags:           [ EF_RISCV_RVC, EF_RISCV_FLOAT_ABI_SOFT ]
+Sections:
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000002
+    Content:         '97000000E7800000'
+  - Name:            .rela.text
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:
+      - Offset:          0x0000000000000000
+        Symbol:          f
+        Type:            R_RISCV_CALL_PLT
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+Symbols:
+  Local:
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+  Global:
+    - Name:            _start
+      Section:         .text
+    - Name:            f
+...