This patch implements the v1.0-rc3 draft extension based on AArch64's version.
It introduces two register classes (GPRPI64/GPRPI128) and some pseudo instructions for correct register allocation.
These pseudo instructions will be expanded in the RISCVExpandAtomicPseudoInsts pass.
BTW, I am not sure that the implementation of MC layer is correct.
Adding Scheds should be in separate patch.