[X86][clang] Lift _BitInt() supported max width.

[mgehre-amd]

Do other targets not support > 128 bit integers, or is this PR only the first conservative step of lifting the limit?

[FreddyYe]

In D139170#3965814, @mgehre-amd wrote:

Do other targets not support > 128 bit integers, or is this PR only the first conservative step of lifting the limit?

I temporary only enabled > 128 bit FP conversion for X86 in https://reviews.llvm.org/D137241, since I highly relied on end-to-end tests to implement that pass and I don't have other targets' environment to verify. So same to this patch, I only lift the limit for X86. Hope other targets will follow us to enable for themselves. WDYT?

[mgehre-amd]

In D139170#3965850, @FreddyYe wrote:

In D139170#3965814, @mgehre-amd wrote:

Do other targets not support > 128 bit integers, or is this PR only the first conservative step of lifting the limit?

I temporary only enabled > 128 bit FP conversion for X86 in https://reviews.llvm.org/D137241, since I highly relied on end-to-end tests to implement that pass and I don't have other targets' environment to verify. So same to this patch, I only lift the limit for X86. Hope other targets will follow us to enable for themselves. WDYT?

A right, I was confused because I saw llvm/test/CodeGen/AArch64/O0-pipeline.ll running the new pass on AArch64, but actually it doesn't do anything unless it's enabled in llvm/lib/Target/*/*ISelLowering.cpp. Got it, thanks!

[FreddyYe]

In D139170#3965852, @mgehre-amd wrote:

In D139170#3965850, @FreddyYe wrote:

In D139170#3965814, @mgehre-amd wrote:

Do other targets not support > 128 bit integers, or is this PR only the first conservative step of lifting the limit?

I temporary only enabled > 128 bit FP conversion for X86 in https://reviews.llvm.org/D137241, since I highly relied on end-to-end tests to implement that pass and I don't have other targets' environment to verify. So same to this patch, I only lift the limit for X86. Hope other targets will follow us to enable for themselves. WDYT?

A right, I was confused because I saw llvm/test/CodeGen/AArch64/O0-pipeline.ll running the new pass on AArch64, but actually it doesn't do anything unless it's enabled in llvm/lib/Target/*/*ISelLowering.cpp. Got it, thanks!

Yes. Actually, that's the framework you added before. :)

[aaron.ballman]

Thanks for working on this! LGTM, but please add a release note when landing so that users know about this improvement!

[FreddyYe]

Rebase and add release note.

[FreddyYe]

THX for review. I'll land!

clang/docs/ReleaseNotes.rst

- Support ISA of ``AVX-NE-CONVERT``.
   * Support intrinsic of ``_mm(256)_bcstnesh_ps``.
   * Support intrinsic of ``_mm(256)_cvtneebf16_ps``.
   * Support intrinsic of ``_mm(256)_cvtneeph_ps``.
   * Support intrinsic of ``_mm(256)_cvtneobf16_ps``.
   * Support intrinsic of ``_mm(256)_cvtneoph_ps``.
   * Support intrinsic of ``_mm(256)_cvtneps_avx_pbh``.
 - ``-march=raptorlake`` and ``-march=meteorlake`` are now supported.
 - ``-march=sierraforest``, ``-march=graniterapids`` and ``-march=grandridge`` are now supported.
+- Lift _BitInt() supported max width from 128 to 8388608.
 
 WebAssembly Support in Clang
 ----------------------------
 
 The -mcpu=generic configuration now enables sign-ext and mutable-globals. These
 proposals are standardized and available in all major engines.
 
 DWARF Support in Clang

clang/lib/Basic/Targets/X86.h

public:
   void setMaxAtomicWidth() override {
     if (hasFeature("cx8"))
       MaxAtomicInlineWidth = 64;
   }
 
   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
 
   bool hasBitIntType() const override { return true; }
+  size_t getMaxBitIntWidth() const override {
+    return llvm::IntegerType::MAX_INT_BITS;
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
     : public NetBSDTargetInfo<X86_32TargetInfo> {
 public:
   NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
       : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
 
public:
   void setMaxAtomicWidth() override {
     if (hasFeature("cx16"))
       MaxAtomicInlineWidth = 128;
   }
 
   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
 
   bool hasBitIntType() const override { return true; }
+  size_t getMaxBitIntWidth() const override {
+    return llvm::IntegerType::MAX_INT_BITS;
+  }
 };
 
 // x86-64 Windows target
 class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
     : public WindowsTargetInfo<X86_64TargetInfo> {
 public:
   WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
       : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {

clang/test/CodeGen/ext-int-cc.c

 // LA32: define{{.*}} void @ParamPassing3(i15 signext %{{.+}}, i31 signext %{{.+}})
 
 #if __BITINT_MAXWIDTH__ > 128
 // When supported, bit-precise types that are >128 are passed indirectly. Note,
 // FileCheck doesn't pay attention to the preprocessor, so all of these tests
 // are negated. This will give an error when a target does support larger
 // _BitInt widths to alert us to enable the test.
 void ParamPassing4(_BitInt(129) a) {}
-// LIN64-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
-// WIN64-NOT: define dso_local void @ParamPassing4(ptr %{{.+}})
-// LIN32-NOT: define{{.*}} void @ParamPassing4(ptr %{{.+}})
-// WIN32-NOT: define dso_local void @ParamPassing4(ptr %{{.+}})
+// LIN64: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
+// WIN64: define dso_local void @ParamPassing4(ptr %{{.+}})
+// LIN32: define{{.*}} void @ParamPassing4(ptr %{{.+}})
+// WIN32: define dso_local void @ParamPassing4(ptr %{{.+}})
 // NACL-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
 // NVPTX64-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
 // NVPTX-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
 // SPARCV9-NOT: define{{.*}} void @ParamPassing4(ptr %{{.+}})
 // SPARC-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
 // MIPS64-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
 // MIPS-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
 // SPIR64-NOT: define{{.*}} spir_func void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})

 // AARCH64: define{{.*}} i128 @ReturnPassing4(
 // AARCH64DARWIN: define{{.*}} i128 @ReturnPassing4(
 // ARM: define{{.*}} arm_aapcscc void @ReturnPassing4(ptr noalias sret
 // LA64: define{{.*}} i128 @ReturnPassing4(
 // LA32: define{{.*}} void @ReturnPassing4(ptr noalias sret
 
 #if __BITINT_MAXWIDTH__ > 128
 _BitInt(129) ReturnPassing5(void){}
-// LIN64-NOT: define{{.*}} void @ReturnPassing5(ptr noalias sret
-// WIN64-NOT: define dso_local void @ReturnPassing5(ptr noalias sret
-// LIN32-NOT: define{{.*}} void @ReturnPassing5(ptr noalias sret
-// WIN32-NOT: define dso_local void @ReturnPassing5(ptr noalias sret
+// LIN64: define{{.*}} void @ReturnPassing5(ptr noalias sret
+// WIN64: define dso_local void @ReturnPassing5(ptr noalias sret
+// LIN32: define{{.*}} void @ReturnPassing5(ptr noalias sret
+// WIN32: define dso_local void @ReturnPassing5(ptr noalias sret
 // NACL-NOT: define{{.*}} void @ReturnPassing5(ptr noalias sret
 // NVPTX64-NOT: define{{.*}} i129 @ReturnPassing5(
 // NVPTX-NOT: define{{.*}} i129 @ReturnPassing5(
 // SPARCV9-NOT: define{{.*}} i129 @ReturnPassing5(
 // SPARC-NOT: define{{.*}} void @ReturnPassing5(ptr noalias sret
 // MIPS64-NOT: define{{.*}} void @ReturnPassing5(ptr noalias sret
 // MIPS-NOT: define{{.*}} void @ReturnPassing5(ptr noalias sret
 // SPIR64-NOT: define{{.*}} spir_func void @ReturnPassing5(ptr noalias sret

clang/test/Lexer/bitint-constants.c

-// RUN: %clang_cc1 -std=c2x -fsyntax-only -verify -Wno-unused %s
+// RUN: %clang_cc1 -triple aarch64-unknown-unknown -std=c2x -fsyntax-only -verify -Wno-unused %s
 
 // Test that the preprocessor behavior makes sense.
 #if 1wb != 1
 #error "wb suffix must be recognized by preprocessor"
 #endif
 #if 1uwb != 1
 #error "uwb suffix must be recognized by preprocessor"
 #endif

clang/test/Preprocessor/cuda-types.cu

 // Check that types, widths, __CLANG_ATOMIC* macros, etc. match on the host and
-// device sides of CUDA compilations.  Note that we filter out long double, as
-// this is intentionally different on host and device.
+// device sides of CUDA compilations. Note that we filter out long double and
+// maxwidth of _BitInt(), as this is intentionally different on host and device.
 //
 // Also ignore __CLANG_ATOMIC_LLONG_LOCK_FREE on i386. The default host CPU for
 // an i386 triple is typically at least an i586, which has cmpxchg8b (Clang
 // feature, "cx8"). Therefore, __CLANG_ATOMIC_LLONG_LOCK_FREE is 2 on the host,
 // but the value should be 1 for the device.
 //
 // FIXME: We really should make __GCC_HAVE_SYNC_COMPARE_AND_SWAP identical on
 // host and device, but architecturally this is difficult at the moment.
 
 // RUN: mkdir -p %t
 
 // RUN: %clang --cuda-host-only -nocudainc -target i386-unknown-linux-gnu -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-host-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-host-defines-filtered
 // RUN: %clang --cuda-device-only -nocudainc -nocudalib -target i386-unknown-linux-gnu -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-device-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-device-defines-filtered
 // RUN: diff %t/i386-host-defines-filtered %t/i386-device-defines-filtered
 
 // RUN: %clang --cuda-host-only -nocudainc -target x86_64-unknown-linux-gnu -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE' > %t/x86_64-host-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH' > %t/x86_64-host-defines-filtered
 // RUN: %clang --cuda-device-only -nocudainc -nocudalib -target x86_64-unknown-linux-gnu -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE' > %t/x86_64-device-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH' > %t/x86_64-device-defines-filtered
 // RUN: diff %t/x86_64-host-defines-filtered %t/x86_64-device-defines-filtered
 
 // RUN: %clang --cuda-host-only -nocudainc -target powerpc64-unknown-linux-gnu -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE' > %t/powerpc64-host-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH' > %t/powerpc64-host-defines-filtered
 // RUN: %clang --cuda-device-only -nocudainc -nocudalib -target powerpc64-unknown-linux-gnu -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE' > %t/powerpc64-device-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH' > %t/powerpc64-device-defines-filtered
 // RUN: diff %t/powerpc64-host-defines-filtered %t/powerpc64-device-defines-filtered
 
 // RUN: %clang --cuda-host-only -nocudainc -target i386-windows-msvc -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-msvc-host-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-msvc-host-defines-filtered
 // RUN: %clang --cuda-device-only -nocudainc -nocudalib -target i386-windows-msvc -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-msvc-device-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH|_ATOMIC_LLONG_LOCK_FREE' > %t/i386-msvc-device-defines-filtered
 // RUN: diff %t/i386-msvc-host-defines-filtered %t/i386-msvc-device-defines-filtered
 
 // RUN: %clang --cuda-host-only -nocudainc -target x86_64-windows-msvc -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE' > %t/x86_64-msvc-host-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH' > %t/x86_64-msvc-host-defines-filtered
 // RUN: %clang --cuda-device-only -nocudainc -nocudalib -target x86_64-windows-msvc -x cuda -E -dM -o - /dev/null \
 // RUN:   | grep -E 'define __[^ ]*(TYPE|MAX|SIZEOF|WIDTH)|define __CLANG_ATOMIC' \
-// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE' > %t/x86_64-msvc-device-defines-filtered
+// RUN:   | grep -Ev '__LDBL|_LONG_DOUBLE|BITINT_MAXWIDTH' > %t/x86_64-msvc-device-defines-filtered
 // RUN: diff %t/x86_64-msvc-host-defines-filtered %t/x86_64-msvc-device-defines-filtered

clang/test/Sema/large-bit-int.c

-// RUN: %clang_cc1 -fexperimental-max-bitint-width=1024 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple aarch64-unknown-unknown -fexperimental-max-bitint-width=1024 -fsyntax-only -verify %s
 
 void f() {
   _Static_assert(__BITINT_MAXWIDTH__ == 1024, "Macro value is unexpected.");
 
   _BitInt(1024) a;
   unsigned _BitInt(1024) b;
 
   _BitInt(8388609) c;                // expected-error {{signed _BitInt of bit sizes greater than 1024 not supported}}
   unsigned _BitInt(0xFFFFFFFFFF) d; // expected-error {{unsigned _BitInt of bit sizes greater than 1024 not supported}}
 }

clang/test/SemaCXX/ext-int.cpp

-// RUN: %clang_cc1 -fsyntax-only -verify %s -Wimplicit-int-conversion -Wno-unused -Wunevaluated-expression -triple x86_64-gnu-linux
+// RUN: %clang_cc1 -fsyntax-only -verify %s -Wimplicit-int-conversion -Wno-unused -Wunevaluated-expression -triple aarch64-unknown-unknown
 
 template<int Bounds>
 struct HasExtInt {
   _BitInt(Bounds) b;
   unsigned _BitInt(Bounds) b2;
 };
 
 // Delcaring variables: