[X86] Add ExpandLargeFpConvert Pass and enable for X86

[FreddyYe]

Summary

As stated in
https://discourse.llvm.org/t/rfc-llc-add-expandlargeintfpconvert-pass-for-fp-int-conversion-of-large-bitint/65528,
this implementation is very similar to ExpandLargeDivRem, which expands
‘fptoui .. to’, ‘fptosi .. to’, ‘uitofp .. to’, ‘sitofp .. to’ instructions
with a bitwidth above a threshold into auto-generated functions. This is
useful for targets like x86_64 that cannot lower fp convertions with more
than 128 bits. The expanded nodes are referring from the IR generated by
compiler-rt/lib/builtins/floattidf.c, compiler-rt/lib/builtins/fixdfti.c,
and etc.

Corner cases:

1. For fp16: as there is no related builtins added in compliler-rt. So I

mainly utilized the fp32 <-> fp16 lib calls to implement.

2. For fp80: as this pass is soft fp emulation and no fp80 instructions can

help in this problem. I recommend users to deprecate this usage. For now, the
implementation uses fp128 as the temporary conversion type and inserts
fptrunc/ext at top/end of the function.

3. For bf16: as clang FE currently doesn't support bf16 algorithm operations

(convert to int, float, +, -, *, ...), this patch doesn't consider bf16 for
now.

4. For unsigned FPToI: since both default hardware behaviors and libgcc are

ignoring "returns 0 for negative input" spec. This pass follows this old way
to ignore unsigned FPToI. See this example:
https://gcc.godbolt.org/z/bnv3jqW1M

The end-to-end tests are uploaded at https://reviews.llvm.org/D138261

[FreddyYe]

WIP update.

[FreddyYe]

Complete the imple and split tests into another Phab.

[FreddyYe]

rebase

[FreddyYe]

Support unsigned expandIToFP() and add IR comments as refer.

[mgehre-amd]

Great that you worked on this!
I will have a deeper look at the end of this week.

[LuoYuanke]

llvm/test/CodeGen/X86/expand-large-fp-convert-fptoui129.ll

11

fptoui?

[LuoYuanke]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

76

It seems we just truncate the value. Is it because it is rounded to zero?

103

Maybe more readable with FloatVal->getType()->isHalfTy().

107

Add comments "FPToSI"?

119

PowerOf2Ceil(FPMantissaWidth)?

121

The first letter should be capital for variable name.

123

Ditto.

llvm/test/CodeGen/AArch64/O0-pipeline.ll

19

Not sure if it is better to merge convert and div/rem into one pass.

[FreddyYe]

Address comments. THX for review!

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

76

Yes, this is default behavior that codes like (int)3.14 outputs 3 no matter what current rounding mode is. LLVM langref also defines so for fptosi: https://llvm.org/docs/LangRef.html#id269

103

Good idea.

[mgehre-amd]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

90

The return value is unused at its call site - convert to void?

233

nit: word missing after "implicit"
And can we have an assert for that assumption?

313

return void

[mgehre-amd]

I'm scared about missing some subtle issue in the implementation, but I think the test cases on the other PR should cover that.

[LuoYuanke]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

145

FloatVal->getType()->isX86_FP80Ty()?

150

Do we assume the _BitInt size is larger than 128-bit?

151

ToBoolNot?

158

ExponentWithBias.

164

1u << (ExponentWidth - 1)) - 1 expression is used several times. Maybe to set Bias = 1u << (ExponentWidth - 1)) - 1 to be more readable.

179

NegOne

181

NegInf

184

PosInf

218

Retval0

[LuoYuanke]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

151

Maybe rename it as PosOrNeg?

[FreddyYe]

Address comments. THX for review!

[FreddyYe]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

150

Yes for x86.

609:      if (IntTy->getIntegerBitWidth() <= MaxLegalFpConvertBitWidth)
610:        continue;

233

Yes, that is meaningful for debug with -mllvm expand-fp-convert-bits. I'll add.
Generally, since integer width <= i128 are always lowered to libcall, the smallest integer type entering this pass is i129, whose width is larger than fp128.

[LuoYuanke]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

312

Add comments to indicate that fp80 is extended to fp128?

317

IsSigned

325

Move to line 491 to avoid dead instruction when it is not fp80?

327

Ditto

329

Ditto

390

It seems there is many coding style like this. Is it possible that create dead code? However I think they will eventually be deleted in ISel.

[FreddyYe]

Address comments. THX for review!

[FreddyYe]

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

390

There may be some dead codes I don't know here. Though ISel will delete the dead nodes, I will try to delete such codes. I removed two in the next version. You can comment out if your find more.
For Shl here, I think it's not dead code since it is always be used by AAddr0.

[LuoYuanke]

LGTM.

[mgehre-amd]

I think this was the last reason for restricting _BitInt to <= 128 by default in clang. Are you planning to create a PR to lift that restriction now?

[FreddyYe]

In D137241#3962787, @mgehre-amd wrote:

I think this was the last reason for restricting _BitInt to <= 128 by default in clang. Are you planning to create a PR to lift that restriction now?

Yes, I agree. The patch of tests also relies on lifting first. But I'm not sure if https://github.com/llvm/llvm-project/blob/450de8008bb0ccb5dfc9dd69b6f5b434158772bd/clang/include/clang/Basic/TargetInfo.h#L637 is the only place needs to change. @aaron.ballman WDYT?

[aaron.ballman]

In D137241#3963326, @FreddyYe wrote:

In D137241#3962787, @mgehre-amd wrote:

I think this was the last reason for restricting _BitInt to <= 128 by default in clang. Are you planning to create a PR to lift that restriction now?

Yes, I agree. The patch of tests also relies on lifting first. But I'm not sure if https://github.com/llvm/llvm-project/blob/450de8008bb0ccb5dfc9dd69b6f5b434158772bd/clang/include/clang/Basic/TargetInfo.h#L637 is the only place needs to change. @aaron.ballman WDYT?

Do *all* targets support > 128 now, or just x86 targets? If all targets support > 128, then that's the place to update (and we can consider starting to rip some of the target-specific machinery and command line option out). But if it's just x86, then we should override this function in the correct derived TargetInfo class.

[FreddyYe]

In D137241#3963462, @aaron.ballman wrote:

In D137241#3963326, @FreddyYe wrote:

In D137241#3962787, @mgehre-amd wrote:

I think this was the last reason for restricting _BitInt to <= 128 by default in clang. Are you planning to create a PR to lift that restriction now?

Yes, I agree. The patch of tests also relies on lifting first. But I'm not sure if https://github.com/llvm/llvm-project/blob/450de8008bb0ccb5dfc9dd69b6f5b434158772bd/clang/include/clang/Basic/TargetInfo.h#L637 is the only place needs to change. @aaron.ballman WDYT?

Do *all* targets support > 128 now, or just x86 targets? If all targets support > 128, then that's the place to update (and we can consider starting to rip some of the target-specific machinery and command line option out). But if it's just x86, then we should override this function in the correct derived TargetInfo class.

I see. Thanks! I created https://reviews.llvm.org/D139170, I'll add both of you to review list. Please help review.

llvm/include/llvm/CodeGen/MachinePassRegistry.def

 FUNCTION_PASS("lower-constant-intrinsics", LowerConstantIntrinsicsPass, ())
 FUNCTION_PASS("unreachableblockelim", UnreachableBlockElimPass, ())
 FUNCTION_PASS("consthoist", ConstantHoistingPass, ())
 FUNCTION_PASS("replace-with-veclib", ReplaceWithVeclib, ())
 FUNCTION_PASS("partially-inline-libcalls", PartiallyInlineLibCallsPass, ())
 FUNCTION_PASS("ee-instrument", EntryExitInstrumenterPass, (false))
 FUNCTION_PASS("post-inline-ee-instrument", EntryExitInstrumenterPass, (true))
 FUNCTION_PASS("expand-large-div-rem", ExpandLargeDivRemPass, ())
+FUNCTION_PASS("expand-large-fp-convert", ExpandLargeFpConvertPass, ())
 FUNCTION_PASS("expand-reductions", ExpandReductionsPass, ())
 FUNCTION_PASS("expandvp", ExpandVectorPredicationPass, ())
 FUNCTION_PASS("lowerinvoke", LowerInvokePass, ())
 FUNCTION_PASS("scalarize-masked-mem-intrin", ScalarizeMaskedMemIntrinPass, ())
 FUNCTION_PASS("tlshoist", TLSVariableHoistPass, ())
 FUNCTION_PASS("verify", VerifierPass, ())
 #undef FUNCTION_PASS
 

llvm/include/llvm/CodeGen/Passes.h

namespace llvm {
   /// This pass expands the vector predication intrinsics into unpredicated
   /// instructions with selects or just the explicit vector length into the
   /// predicate mask.
   FunctionPass *createExpandVectorPredicationPass();
 
   // Expands large div/rem instructions.
   FunctionPass *createExpandLargeDivRemPass();
 
+  // Expands large div/rem instructions.
+  FunctionPass *createExpandLargeFpConvertPass();
+
   // This pass expands memcmp() to load/stores.
   FunctionPass *createExpandMemCmpPass();
 
   /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
   FunctionPass *createBreakFalseDeps();
 
   // This pass expands indirectbr instructions.
   FunctionPass *createIndirectBrExpandPass();

llvm/include/llvm/CodeGen/TargetLowering.h

public:
   }
 
   /// Returns the size in bits of the maximum div/rem the backend supports.
   /// Larger operations will be expanded by ExpandLargeDivRem.
   unsigned getMaxDivRemBitWidthSupported() const {
     return MaxDivRemBitWidthSupported;
   }
 
+  /// Returns the size in bits of the maximum larget fp convert the backend
+  /// supports. Larger operations will be expanded by ExpandLargeFPConvert.
+  unsigned getMaxLargeFPConvertBitWidthSupported() const {
+    return MaxLargeFPConvertBitWidthSupported;
+  }
+
   /// Returns the size of the smallest cmpxchg or ll/sc instruction
   /// the backend supports.  Any smaller operations are widened in
   /// AtomicExpandPass.
   ///
   /// Note that *unlike* operations above the maximum size, atomic ops
   /// are still natively supported below the minimum; they just
   /// require a more complex expansion.
   unsigned getMinCmpXchgSizeInBits() const { return MinCmpXchgSizeInBits; }
protected:
   }
 
   /// Set the size in bits of the maximum div/rem the backend supports.
   /// Larger operations will be expanded by ExpandLargeDivRem.
   void setMaxDivRemBitWidthSupported(unsigned SizeInBits) {
     MaxDivRemBitWidthSupported = SizeInBits;
   }
 
+  /// Set the size in bits of the maximum fp convert the backend supports.
+  /// Larger operations will be expanded by ExpandLargeFPConvert.
+  void setMaxLargeFPConvertBitWidthSupported(unsigned SizeInBits) {
+    MaxLargeFPConvertBitWidthSupported = SizeInBits;
+  }
+
   /// Sets the minimum cmpxchg or ll/sc size supported by the backend.
   void setMinCmpXchgSizeInBits(unsigned SizeInBits) {
     MinCmpXchgSizeInBits = SizeInBits;
   }
 
   /// Sets whether unaligned atomic operations are supported.
   void setSupportsUnalignedAtomics(bool UnalignedSupported) {
     SupportsUnalignedAtomics = UnalignedSupported;
private:
   /// Size in bits of the maximum atomics size the backend supports.
   /// Accesses larger than this will be expanded by AtomicExpandPass.
   unsigned MaxAtomicSizeInBitsSupported;
 
   /// Size in bits of the maximum div/rem size the backend supports.
   /// Larger operations will be expanded by ExpandLargeDivRem.
   unsigned MaxDivRemBitWidthSupported;
 
+  /// Size in bits of the maximum larget fp convert size the backend
+  /// supports. Larger operations will be expanded by ExpandLargeFPConvert.
+  unsigned MaxLargeFPConvertBitWidthSupported;
+
   /// Size in bits of the minimum cmpxchg or ll/sc operation the
   /// backend supports.
   unsigned MinCmpXchgSizeInBits;
 
   /// This indicates if the target supports unaligned atomic operations.
   bool SupportsUnalignedAtomics;
 
   /// If set to a physical register, this specifies the register that

llvm/include/llvm/InitializePasses.h

 void initializeEarlyCSEMemSSALegacyPassPass(PassRegistry&);
 void initializeEarlyIfConverterPass(PassRegistry&);
 void initializeEarlyIfPredicatorPass(PassRegistry &);
 void initializeEarlyMachineLICMPass(PassRegistry&);
 void initializeEarlyTailDuplicatePass(PassRegistry&);
 void initializeEdgeBundlesPass(PassRegistry&);
 void initializeEHContGuardCatchretPass(PassRegistry &);
 void initializeEliminateAvailableExternallyLegacyPassPass(PassRegistry&);
+void initializeExpandLargeFpConvertLegacyPassPass(PassRegistry&);
 void initializeExpandLargeDivRemLegacyPassPass(PassRegistry&);
 void initializeExpandMemCmpPassPass(PassRegistry&);
 void initializeExpandPostRAPass(PassRegistry&);
 void initializeExpandReductionsPass(PassRegistry&);
 void initializeExpandVectorPredicationPass(PassRegistry &);
 void initializeMakeGuardsExplicitLegacyPassPass(PassRegistry&);
 void initializeExternalAAWrapperPassPass(PassRegistry&);
 void initializeFEntryInserterPass(PassRegistry&);

llvm/lib/CodeGen/CMakeLists.txt

add_llvm_component_library(LLVMCodeGen
   DetectDeadLanes.cpp
   DFAPacketizer.cpp
   DwarfEHPrepare.cpp
   EarlyIfConversion.cpp
   EdgeBundles.cpp
   EHContGuardCatchret.cpp
   ExecutionDomainFix.cpp
   ExpandLargeDivRem.cpp
+  ExpandLargeFpConvert.cpp
   ExpandMemCmp.cpp
   ExpandPostRAPseudos.cpp
   ExpandReductions.cpp
   ExpandVectorPredication.cpp
   FaultMaps.cpp
   FEntryInserter.cpp
   FinalizeISel.cpp
   FixupStatepointCallerSaved.cpp

llvm/lib/CodeGen/CodeGen.cpp

void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeDebugifyMachineModulePass(Registry);
   initializeDetectDeadLanesPass(Registry);
   initializeDwarfEHPrepareLegacyPassPass(Registry);
   initializeEarlyIfConverterPass(Registry);
   initializeEarlyIfPredicatorPass(Registry);
   initializeEarlyMachineLICMPass(Registry);
   initializeEarlyTailDuplicatePass(Registry);
   initializeExpandLargeDivRemLegacyPassPass(Registry);
+  initializeExpandLargeFpConvertLegacyPassPass(Registry);
   initializeExpandMemCmpPassPass(Registry);
   initializeExpandPostRAPass(Registry);
   initializeFEntryInserterPass(Registry);
   initializeFinalizeISelPass(Registry);
   initializeFinalizeMachineBundlesPass(Registry);
   initializeFixupStatepointCallerSavedPass(Registry);
   initializeFuncletLayoutPass(Registry);
   initializeGCMachineCodeAnalysisPass(Registry);

llvm/lib/CodeGen/ExpandLargeFpConvert.cpp

+//===--- ExpandLargeFpConvert.cpp - Expand large fp convert----------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+
+// This pass expands ‘fptoui .. to’, ‘fptosi .. to’, ‘uitofp .. to’,
+// ‘sitofp .. to’ instructions with a bitwidth above a threshold into
+// auto-generated functions. This is useful for targets like x86_64 that cannot
+// lower fp convertions with more than 128 bits.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/Analysis/GlobalsModRef.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetLowering.h"
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/IR/IRBuilder.h"
+#include "llvm/IR/InstIterator.h"
+#include "llvm/IR/PassManager.h"
+#include "llvm/InitializePasses.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Target/TargetMachine.h"
+
+using namespace llvm;
+
+static cl::opt<unsigned>
+    ExpandFpConvertBits("expand-fp-convert-bits", cl::Hidden,
+                     cl::init(llvm::IntegerType::MAX_INT_BITS),
+                     cl::desc("fp convert instructions on integers with "
+                              "more than <N> bits are expanded."));
+
+/// Generate code to convert a fp number to integer, replacing FPToS(U)I with
+/// the generated code. This currently generates code similarly to compiler-rt's
+/// implementations.
+///
+/// An example IR generated from compiler-rt/fixsfdi.c looks like below:
+/// define dso_local i64 @foo(float noundef %a) local_unnamed_addr #0 {
+/// entry:
+///   %0 = bitcast float %a to i32
+///   %conv.i = zext i32 %0 to i64
+///   %tobool.not = icmp sgt i32 %0, -1
+///   %conv = select i1 %tobool.not, i64 1, i64 -1
+///   %and = lshr i64 %conv.i, 23
+///   %shr = and i64 %and, 255
+///   %and2 = and i64 %conv.i, 8388607
+///   %or = or i64 %and2, 8388608
+///   %cmp = icmp ult i64 %shr, 127
+///   br i1 %cmp, label %cleanup, label %if.end
+///
+/// if.end:                                           ; preds = %entry
+///   %sub = add nuw nsw i64 %shr, 4294967169
+///   %conv5 = and i64 %sub, 4294967232
+///   %cmp6.not = icmp eq i64 %conv5, 0
+///   br i1 %cmp6.not, label %if.end12, label %if.then8
+///
+/// if.then8:                                         ; preds = %if.end
+///   %cond11 = select i1 %tobool.not, i64 9223372036854775807, i64 -9223372036854775808
+///   br label %cleanup
+///
+/// if.end12:                                         ; preds = %if.end
+///   %cmp13 = icmp ult i64 %shr, 150
+///   br i1 %cmp13, label %if.then15, label %if.else
+///
+/// if.then15:                                        ; preds = %if.end12
+///   %sub16 = sub nuw nsw i64 150, %shr
+///   %shr17 = lshr i64 %or, %sub16
+///   %mul = mul nsw i64 %shr17, %conv
+///   br label %cleanup
+///
+/// if.else:                                          ; preds = %if.end12
+///   %sub18 = add nsw i64 %shr, -150
+///   %shl = shl i64 %or, %sub18
+///   %mul19 = mul nsw i64 %shl, %conv
+///   br label %cleanup
+///
+/// cleanup:                                          ; preds = %entry, %if.else, %if.then15, %if.then8
+///   %retval.0 = phi i64 [ %cond11, %if.then8 ], [ %mul, %if.then15 ], [ %mul19, %if.else ], [ 0, %entry ]
+///   ret i64 %retval.0
+/// }
+///
+/// Replace fp to integer with generated code.
+static bool expandFPToI(Instruction *FPToI) {
+  IRBuilder<> Builder(FPToI);
+  auto *FloatVal = FPToI->getOperand(0);
+  IntegerType *IntTy = cast<IntegerType>(FPToI->getType());
+
+  unsigned BitWidth = FPToI->getType()->getIntegerBitWidth();
+  unsigned FPMantissaWidth = FloatVal->getType()->getFPMantissaWidth() - 1;
+
+  // FIXME: fp16's range is covered by i32. So `fptoi half` can convert
+  // to i32 first following a sext/zext to target integer type.
+  Value *A1 = nullptr;
+  if (FloatVal->getType()->isHalfTy()) {
+    if (FPToI->getOpcode() == Instruction::FPToUI) {
+      Value *A0 = Builder.CreateFPToUI(FloatVal, Builder.getIntNTy(32));
+      A1 = Builder.CreateZExt(A0, IntTy);
+    } else { // FPToSI
+      Value *A0 = Builder.CreateFPToSI(FloatVal, Builder.getIntNTy(32));
+      A1 = Builder.CreateSExt(A0, IntTy);
+    }
+    FPToI->replaceAllUsesWith(A1);
+    FPToI->dropAllReferences();
+    FPToI->eraseFromParent();
+    return true;
+  }
+
+  // Deal with "x86_fp80" situation.
+  FPMantissaWidth = FPMantissaWidth == 63 ? 112 : FPMantissaWidth;
+  unsigned FloatWidth = PowerOf2Ceil(FPMantissaWidth);
+  unsigned ExponentWidth = FloatWidth - FPMantissaWidth - 1;
+  Value *ImplicitBit = Builder.CreateShl(
+      Builder.getIntN(BitWidth, 1), Builder.getIntN(BitWidth, FPMantissaWidth));
+  Value *SignificandMask =
+      Builder.CreateSub(ImplicitBit, Builder.getIntN(BitWidth, 1));
+
+  BasicBlock *Entry = Builder.GetInsertBlock();
+  Function *F = Entry->getParent();
+  Entry->setName(Twine(Entry->getName(), "fp-to-i-entry"));
+  BasicBlock *End =
+      Entry->splitBasicBlock(Builder.GetInsertPoint(), "fp-to-i-cleanup");
+  BasicBlock *IfEnd =
+      BasicBlock::Create(Builder.getContext(), "fp-to-i-if-end", F, End);
+  BasicBlock *IfThen5 =
+      BasicBlock::Create(Builder.getContext(), "fp-to-i-if-then5", F, End);
+  BasicBlock *IfEnd9 =
+      BasicBlock::Create(Builder.getContext(), "fp-to-i-if-end9", F, End);
+  BasicBlock *IfThen12 =
+      BasicBlock::Create(Builder.getContext(), "fp-to-i-if-then12", F, End);
+  BasicBlock *IfElse =
+      BasicBlock::Create(Builder.getContext(), "fp-to-i-if-else", F, End);
+
+  Entry->getTerminator()->eraseFromParent();
+
+  // entry:
+  Builder.SetInsertPoint(Entry);
+  Value *FloatVal0 = FloatVal;
+  if (FloatVal->getType()->getFPMantissaWidth() == 64)
+    FloatVal0 =
+        Builder.CreateFPExt(FloatVal, Type::getFP128Ty(Builder.getContext()));
+  Value *ARep0 =
+      Builder.CreateBitCast(FloatVal0, Builder.getIntNTy(FloatWidth));
+  Value *ARep = Builder.CreateZExt(ARep0, FPToI->getType());
+  Value *Tobool_not = Builder.CreateICmpSGT(
+      ARep0, ConstantInt::getSigned(Builder.getIntNTy(FloatWidth), -1));
+  Value *Sign =
+      Builder.CreateSelect(Tobool_not, ConstantInt::getSigned(IntTy, 1),
+                           ConstantInt::getSigned(IntTy, -1));
+  Value *And =
+      Builder.CreateLShr(ARep, Builder.getIntN(BitWidth, FPMantissaWidth));
+  Value *Exponent_with_bias = Builder.CreateAnd(
+      And, Builder.getIntN(BitWidth, (1u << ExponentWidth) - 1));
+  Value *Abs = Builder.CreateAnd(ARep, SignificandMask);
+  Value *Significand = Builder.CreateOr(Abs, ImplicitBit);
+  Value *Cmp = Builder.CreateICmpULT(
+      Exponent_with_bias,
+      Builder.getIntN(BitWidth, (1u << (ExponentWidth - 1)) - 1));
+  Builder.CreateCondBr(Cmp, End, IfEnd);
+
+  // if.end:
+  Builder.SetInsertPoint(IfEnd);
+  Value *Add1 = Builder.CreateAdd(
+      Exponent_with_bias,
+      ConstantInt::getSigned(
+          IntTy, -int64_t((1u << (ExponentWidth - 1)) + BitWidth - 1)));
+  Value *Cmp3 =
+      Builder.CreateICmpULT(Add1, ConstantInt::getSigned(IntTy, -BitWidth));
+  Builder.CreateCondBr(Cmp3, IfThen5, IfEnd9);
+
+  // if.then5:
+  Builder.SetInsertPoint(IfThen5);
+  Value *Neg_one = Builder.CreateSExt(
+      ConstantInt::getSigned(Builder.getInt32Ty(), -1), IntTy);
+  Value *Neg_inf =
+      Builder.CreateShl(ConstantInt::getSigned(IntTy, 1),
+                        ConstantInt::getSigned(IntTy, BitWidth - 1));
+  Value *Pos_inf = Builder.CreateXor(Neg_one, Neg_inf, "inf_temp3");
+  Value *Cond8 = Builder.CreateSelect(Tobool_not, Pos_inf, Neg_inf, "cond8");
+  Builder.CreateBr(End);
+
+  // if.end9:
+  Builder.SetInsertPoint(IfEnd9);
+  Value *Cmp10 = Builder.CreateICmpULT(
+      Exponent_with_bias,
+      Builder.getIntN(BitWidth,
+                      (1u << (ExponentWidth - 1)) + FPMantissaWidth - 1));
+  Builder.CreateCondBr(Cmp10, IfThen12, IfElse);
+
+  // if.then12:
+  Builder.SetInsertPoint(IfThen12);
+  Value *Sub13 =
+      Builder.CreateSub(Builder.getIntN(BitWidth, (1u << (ExponentWidth - 1)) +
+                                                      FPMantissaWidth - 1),
+                        Exponent_with_bias);
+  Value *Shr14 = Builder.CreateLShr(Significand, Sub13);
+  Value *Mul = Builder.CreateMul(Shr14, Sign);
+  Builder.CreateBr(End);
+
+  // if.else:
+  Builder.SetInsertPoint(IfElse);
+  Value *Sub15 = Builder.CreateAdd(
+      Exponent_with_bias,
+      ConstantInt::getSigned(
+          IntTy, -int64_t((1u << (ExponentWidth - 1)) + FPMantissaWidth - 1)));
+  Value *Shl = Builder.CreateShl(Significand, Sub15);
+  Value *Mul16 = Builder.CreateMul(Shl, Sign);
+  Builder.CreateBr(End);
+
+  // cleanup:
+  Builder.SetInsertPoint(End, End->begin());
+  PHINode *Retval_0 = Builder.CreatePHI(FPToI->getType(), 4);
+
+  Retval_0->addIncoming(Cond8, IfThen5);
+  Retval_0->addIncoming(Mul, IfThen12);
+  Retval_0->addIncoming(Mul16, IfElse);
+  Retval_0->addIncoming(Builder.getIntN(BitWidth, 0), Entry);
+
+  FPToI->replaceAllUsesWith(Retval_0);
+  FPToI->dropAllReferences();
+  FPToI->eraseFromParent();
+  return true;
+}
+
+/// Generate code to convert a fp number to integer, replacing S(U)IToFP with
+/// the generated code. This currently generates code similarly to compiler-rt's
+/// implementations. This implementation has an implicit that integer width is
+/// larger than fp.
+///
+/// An example IR generated from compiler-rt/floatdisf.c looks like below:
+/// define dso_local float @__floatdisf(i64 noundef %a) local_unnamed_addr #0 {
+/// entry:
+///   %cmp = icmp eq i64 %a, 0
+///   br i1 %cmp, label %return, label %if.end
+///
+/// if.end:                                           ; preds = %entry
+///   %shr = ashr i64 %a, 63
+///   %xor = xor i64 %shr, %a
+///   %sub = sub nsw i64 %xor, %shr
+///   %0 = tail call i64 @llvm.ctlz.i64(i64 %sub, i1 true), !range !5
+///   %cast = trunc i64 %0 to i32
+///   %sub1 = sub nuw nsw i32 64, %cast
+///   %sub2 = xor i32 %cast, 63
+///   %cmp3 = icmp ult i32 %cast, 40
+///   br i1 %cmp3, label %if.then4, label %if.else
+///
+/// if.then4:                                         ; preds = %if.end
+///   switch i32 %sub1, label %sw.default [
+///     i32 25, label %sw.bb
+///     i32 26, label %sw.epilog
+///   ]
+///
+/// sw.bb:                                            ; preds = %if.then4
+///   %shl = shl i64 %sub, 1
+///   br label %sw.epilog
+///
+/// sw.default:                                       ; preds = %if.then4
+///   %sub5 = sub nsw i64 38, %0
+///   %sh_prom = and i64 %sub5, 4294967295
+///   %shr6 = lshr i64 %sub, %sh_prom
+///   %shr9 = lshr i64 274877906943, %0
+///   %and = and i64 %shr9, %sub
+///   %cmp10 = icmp ne i64 %and, 0
+///   %conv11 = zext i1 %cmp10 to i64
+///   %or = or i64 %shr6, %conv11
+///   br label %sw.epilog
+///
+/// sw.epilog:                                        ; preds = %sw.default, %if.then4, %sw.bb
+///   %a.addr.0 = phi i64 [ %or, %sw.default ], [ %sub, %if.then4 ], [ %shl, %sw.bb ]
+///   %1 = lshr i64 %a.addr.0, 2
+///   %2 = and i64 %1, 1
+///   %or16 = or i64 %2, %a.addr.0
+///   %inc = add nsw i64 %or16, 1
+///   %3 = and i64 %inc, 67108864
+///   %tobool.not = icmp eq i64 %3, 0
+///   %spec.select.v = select i1 %tobool.not, i64 2, i64 3
+///   %spec.select = ashr i64 %inc, %spec.select.v
+///   %spec.select56 = select i1 %tobool.not, i32 %sub2, i32 %sub1
+///   br label %if.end26
+///
+/// if.else:                                          ; preds = %if.end
+///   %sub23 = add nuw nsw i64 %0, 4294967256
+///   %sh_prom24 = and i64 %sub23, 4294967295
+///   %shl25 = shl i64 %sub, %sh_prom24
+///   br label %if.end26
+///
+/// if.end26:                                         ; preds = %sw.epilog, %if.else
+///   %a.addr.1 = phi i64 [ %shl25, %if.else ], [ %spec.select, %sw.epilog ]
+///   %e.0 = phi i32 [ %sub2, %if.else ], [ %spec.select56, %sw.epilog ]
+///   %conv27 = trunc i64 %shr to i32
+///   %and28 = and i32 %conv27, -2147483648
+///   %add = shl nuw nsw i32 %e.0, 23
+///   %shl29 = add nuw nsw i32 %add, 1065353216
+///   %conv31 = trunc i64 %a.addr.1 to i32
+///   %and32 = and i32 %conv31, 8388607
+///   %or30 = or i32 %and32, %and28
+///   %or33 = or i32 %or30, %shl29
+///   %4 = bitcast i32 %or33 to float
+///   br label %return
+///
+/// return:                                           ; preds = %entry, %if.end26
+///   %retval.0 = phi float [ %4, %if.end26 ], [ 0.000000e+00, %entry ]
+///   ret float %retval.0
+/// }
+///
+/// Replace integer to fp with generated code.
+static bool expandIToFP(Instruction *IToFP) {
+  IRBuilder<> Builder(IToFP);
+  auto *IntVal = IToFP->getOperand(0);
+  IntegerType *IntTy = cast<IntegerType>(IntVal->getType());
+
+  unsigned BitWidth = IntVal->getType()->getIntegerBitWidth();
+  unsigned FPMantissaWidth = IToFP->getType()->getFPMantissaWidth() - 1;
+  FPMantissaWidth = FPMantissaWidth == 63 ? 112 : FPMantissaWidth;
+  // FIXME: As there is no related builtins added in compliler-rt,
+  // here currently utilized the fp32 <-> fp16 lib calls to implement.
+  FPMantissaWidth = FPMantissaWidth == 10 ? 23 : FPMantissaWidth;
+  unsigned FloatWidth = PowerOf2Ceil(FPMantissaWidth);
+  bool isSigned = IToFP->getOpcode() == Instruction::SIToFP;
+
+  BasicBlock *Entry = Builder.GetInsertBlock();
+  Function *F = Entry->getParent();
+  Entry->setName(Twine(Entry->getName(), "itofp-entry"));
+  BasicBlock *End =
+      Entry->splitBasicBlock(Builder.GetInsertPoint(), "itofp-return");
+  BasicBlock *IfEnd =
+      BasicBlock::Create(Builder.getContext(), "itofp-if-end", F, End);
+  BasicBlock *IfThen4 =
+      BasicBlock::Create(Builder.getContext(), "itofp-if-then4", F, End);
+  BasicBlock *SwBB =
+      BasicBlock::Create(Builder.getContext(), "itofp-sw-bb", F, End);
+  BasicBlock *SwDefault =
+      BasicBlock::Create(Builder.getContext(), "itofp-sw-default", F, End);
+  BasicBlock *SwEpilog =
+      BasicBlock::Create(Builder.getContext(), "itofp-sw-epilog", F, End);
+  BasicBlock *IfThen20 =
+      BasicBlock::Create(Builder.getContext(), "itofp-if-then20", F, End);
+  BasicBlock *IfElse =
+      BasicBlock::Create(Builder.getContext(), "itofp-if-else", F, End);
+  BasicBlock *IfEnd26 =
+      BasicBlock::Create(Builder.getContext(), "itofp-if-end26", F, End);
+
+  Entry->getTerminator()->eraseFromParent();
+
+  Function *CTLZ =
+      Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, IntTy);
+  ConstantInt *True = Builder.getTrue();
+
+  // entry:
+  Builder.SetInsertPoint(Entry);
+  Value *Cmp = Builder.CreateICmpEQ(IntVal, ConstantInt::getSigned(IntTy, 0));
+  Builder.CreateCondBr(Cmp, End, IfEnd);
+
+  // if.end:
+  Builder.SetInsertPoint(IfEnd);
+  Value *Shr =
+      Builder.CreateAShr(IntVal, Builder.getIntN(BitWidth, BitWidth - 1));
+  Value *Xor = Builder.CreateXor(Shr, IntVal);
+  Value *Sub = Builder.CreateSub(Xor, Shr);
+  Value *Call = Builder.CreateCall(CTLZ, {isSigned ? Sub : IntVal, True});
+  Value *Cast = Builder.CreateTrunc(Call, Builder.getInt32Ty());
+  int BitWidthNew = FloatWidth == 128 ? BitWidth : 32;
+  Value *Sub1 = Builder.CreateSub(Builder.getIntN(BitWidthNew, BitWidth),
+                                  FloatWidth == 128 ? Call : Cast);
+  Value *Sub2 = Builder.CreateSub(Builder.getIntN(BitWidthNew, BitWidth - 1),
+                                  FloatWidth == 128 ? Call : Cast);
+  Value *Cmp3 = Builder.CreateICmpSGT(
+      Sub2, Builder.getIntN(BitWidthNew, FPMantissaWidth + 1));
+  Builder.CreateCondBr(Cmp3, IfThen4, IfElse);
+
+  // if.then4:
+  Builder.SetInsertPoint(IfThen4);
+  llvm::SwitchInst *SI = Builder.CreateSwitch(Sub1, SwDefault);
+  SI->addCase(Builder.getIntN(BitWidthNew, FPMantissaWidth + 2), SwBB);
+  SI->addCase(Builder.getIntN(BitWidthNew, FPMantissaWidth + 3), SwEpilog);
+
+  // sw.bb:
+  Builder.SetInsertPoint(SwBB);
+  Value *Shl =
+      Builder.CreateShl(isSigned ? Sub : IntVal, Builder.getIntN(BitWidth, 1));
+  Builder.CreateBr(SwEpilog);
+
+  // sw.default:
+  Builder.SetInsertPoint(SwDefault);
+  Value *Sub5 = Builder.CreateSub(
+      Builder.getIntN(BitWidthNew, BitWidth - FPMantissaWidth - 3),
+      FloatWidth == 128 ? Call : Cast);
+  Value *Sh_prom = Builder.CreateZExt(Sub5, IntTy);
+  Value *Shr6 = Builder.CreateLShr(isSigned ? Sub : IntVal,
+                                   FloatWidth == 128 ? Sub5 : Sh_prom);
+  Value *Sub8 =
+      Builder.CreateAdd(FloatWidth == 128 ? Call : Cast,
+                        Builder.getIntN(BitWidthNew, FPMantissaWidth + 3));
+  Value *Sh_prom9 = Builder.CreateZExt(Sub8, IntTy);
+  Value *Shr9 = Builder.CreateLShr(ConstantInt::getSigned(IntTy, -1),
+                                   FloatWidth == 128 ? Sub8 : Sh_prom9);
+  Value *And = Builder.CreateAnd(Shr9, isSigned ? Sub : IntVal);
+  Value *Cmp10 = Builder.CreateICmpNE(And, Builder.getIntN(BitWidth, 0));
+  Value *Conv11 = Builder.CreateZExt(Cmp10, IntTy);
+  Value *Or = Builder.CreateOr(Shr6, Conv11);
+  Builder.CreateBr(SwEpilog);
+
+  // sw.epilog:
+  Builder.SetInsertPoint(SwEpilog);
+  PHINode *A_addr_0 = Builder.CreatePHI(IntTy, 3);
+  A_addr_0->addIncoming(Or, SwDefault);
+  A_addr_0->addIncoming(isSigned ? Sub : IntVal, IfThen4);
+  A_addr_0->addIncoming(Shl, SwBB);
+  Value *A0 = Builder.CreateTrunc(A_addr_0, Builder.getInt32Ty());
+  Value *A1 = Builder.CreateLShr(A0, Builder.getIntN(32, 2));
+  Value *A2 = Builder.CreateAnd(A1, Builder.getIntN(32, 1));
+  Value *Conv16 = Builder.CreateZExt(A2, IntTy);
+  Value *Or17 = Builder.CreateOr(A_addr_0, Conv16);
+  Value *Inc = Builder.CreateAdd(Or17, Builder.getIntN(BitWidth, 1));
+  Value *Shr18 = nullptr;
+  if (isSigned)
+    Shr18 = Builder.CreateAShr(Inc, Builder.getIntN(BitWidth, 2));
+  else
+    Shr18 = Builder.CreateLShr(Inc, Builder.getIntN(BitWidth, 2));
+  Value *Temp_1 =
+      Builder.CreateShl(Builder.getIntN(BitWidth, 1),
+                        Builder.getIntN(BitWidth, FPMantissaWidth + 3));
+  Value *A3 = Builder.CreateAnd(Inc, Temp_1, "a3");
+  Value *Tobool_not = Builder.CreateICmpEQ(A3, Builder.getIntN(BitWidth, 0));
+  Value *Extract_t60 =
+      Builder.CreateTrunc(Shr18, Builder.getIntNTy(FloatWidth));
+  Value *Extract63 = Builder.CreateLShr(Shr18, Builder.getIntN(BitWidth, 32));
+  Value *Extract_t64 = nullptr;
+  if (FloatWidth > 80)
+    Extract_t64 = Builder.CreateTrunc(Sub2, Builder.getInt64Ty());
+  else {
+    Extract_t64 = Builder.CreateTrunc(Extract63, Builder.getInt32Ty());
+  }
+  Builder.CreateCondBr(Tobool_not, IfEnd26, IfThen20);
+
+  // if.then20
+  Builder.SetInsertPoint(IfThen20);
+  Value *Shr21 = nullptr;
+  if (isSigned)
+    Shr21 = Builder.CreateAShr(Inc, Builder.getIntN(BitWidth, 3));
+  else
+    Shr21 = Builder.CreateLShr(Inc, Builder.getIntN(BitWidth, 3));
+  Value *Extract_t = Builder.CreateTrunc(Shr21, Builder.getIntNTy(FloatWidth));
+  Value *Extract = Builder.CreateLShr(Shr21, Builder.getIntN(BitWidth, 32));
+  Value *Extract_t62 = nullptr;
+  if (FloatWidth > 80)
+    Extract_t62 = Builder.CreateTrunc(Sub1, Builder.getIntNTy(64));
+  else {
+    Extract_t62 = Builder.CreateTrunc(Extract, Builder.getIntNTy(32));
+  }
+  Builder.CreateBr(IfEnd26);
+
+  // if.else:
+  Builder.SetInsertPoint(IfElse);
+  Value *Sub24 = Builder.CreateAdd(
+      FloatWidth == 128 ? Call : Cast,
+      ConstantInt::getSigned(Builder.getIntNTy(BitWidthNew),
+                             -(BitWidth - FPMantissaWidth - 1)));
+  Value *Sh_prom25 = Builder.CreateZExt(Sub24, IntTy);
+  Value *Shl26 = Builder.CreateShl(isSigned ? Sub : IntVal,
+                                   FloatWidth == 128 ? Sub24 : Sh_prom25);
+  Value *Extract_t61 =
+      Builder.CreateTrunc(Shl26, Builder.getIntNTy(FloatWidth));
+  Value *Extract65 = Builder.CreateLShr(Shl26, Builder.getIntN(BitWidth, 32));
+  Value *Extract_t66 = nullptr;
+  if (FloatWidth > 80)
+    Extract_t66 = Builder.CreateTrunc(Sub2, Builder.getIntNTy(64));
+  else {
+    Extract_t66 = Builder.CreateTrunc(Extract65, Builder.getInt32Ty());
+  }
+  Builder.CreateBr(IfEnd26);
+
+  // if.end26:
+  Builder.SetInsertPoint(IfEnd26);
+  PHINode *A_addr_1_off0 = Builder.CreatePHI(Builder.getIntNTy(FloatWidth), 3);
+  A_addr_1_off0->addIncoming(Extract_t, IfThen20);
+  A_addr_1_off0->addIncoming(Extract_t60, SwEpilog);
+  A_addr_1_off0->addIncoming(Extract_t61, IfElse);
+  PHINode *A_addr_1_off32 = nullptr;
+  if (FloatWidth > 80)
+    A_addr_1_off32 = Builder.CreatePHI(Builder.getIntNTy(64), 3);
+  else
+    A_addr_1_off32 = Builder.CreatePHI(Builder.getIntNTy(32), 3);
+  A_addr_1_off32->addIncoming(Extract_t62, IfThen20);
+  A_addr_1_off32->addIncoming(Extract_t64, SwEpilog);
+  A_addr_1_off32->addIncoming(Extract_t66, IfElse);
+  PHINode *E_0 = Builder.CreatePHI(Builder.getIntNTy(BitWidthNew), 3);
+  E_0->addIncoming(Sub1, IfThen20);
+  E_0->addIncoming(Sub2, SwEpilog);
+  E_0->addIncoming(Sub2, IfElse);
+  Value *And29 = nullptr;
+  if (FloatWidth > 80) {
+    Value *Temp2 = Builder.CreateShl(Builder.getIntN(BitWidth, 1),
+                                     Builder.getIntN(BitWidth, 63));
+    And29 = Builder.CreateAnd(Shr, Temp2, "and29");
+  } else {
+    Value *Conv28 = Builder.CreateTrunc(Shr, Builder.getIntNTy(32));
+    And29 = Builder.CreateAnd(
+        Conv28, ConstantInt::getSigned(Builder.getIntNTy(32), 0x80000000));
+  }
+  unsigned int Temp_mod = FPMantissaWidth % 32;
+  Value *And34 = nullptr;
+  Value *Shl30 = nullptr;
+  if (FloatWidth == 128) {
+    Temp_mod += 32;
+    Value *Add =
+        Builder.CreateShl(A_addr_1_off32, Builder.getIntN(64, Temp_mod));
+    Shl30 = Builder.CreateAdd(
+        Add,
+        Builder.getIntN(64, ((1ull << (62ull - Temp_mod)) - 1ull) << Temp_mod));
+    And34 = Builder.CreateZExt(Shl30, Builder.getIntNTy(128));
+  } else {
+    Value *Add = Builder.CreateShl(E_0, Builder.getIntN(32, Temp_mod));
+    Shl30 = Builder.CreateAdd(
+        Add, Builder.getIntN(32, ((1 << (30 - Temp_mod)) - 1) << Temp_mod));
+    if (FloatWidth > 32)
+      And34 = Builder.CreateAnd(A_addr_1_off32,
+                                Builder.getIntN(32, (1 << Temp_mod) - 1));
+    else
+      And34 = Builder.CreateAnd(A_addr_1_off0,
+                                Builder.getIntN(32, (1 << Temp_mod) - 1));
+  }
+  Value *Or35 = nullptr;
+  if (FloatWidth == 128) {
+    Value *Or31 = nullptr;
+    if (BitWidth > 128) {
+      Value *And29_trunc = Builder.CreateTrunc(And29, Builder.getIntNTy(128));
+      Or31 = Builder.CreateOr(And29_trunc, And34);
+    } else
+      Or31 = Builder.CreateOr(And29, And34);
+    Value *Or34 = Builder.CreateShl(Or31, Builder.getIntN(128, 64));
+    Value *Temp3 = Builder.CreateShl(Builder.getIntN(128, 1),
+                                     Builder.getIntN(128, FPMantissaWidth));
+    Value *Temp4 = Builder.CreateSub(Temp3, Builder.getIntN(128, 1));
+    Value *A6 = Builder.CreateAnd(A_addr_1_off0, Temp4);
+    Or35 = Builder.CreateOr(Or34, A6);
+  } else {
+    Value *Or31 = Builder.CreateOr(And34, And29);
+    if (isSigned)
+      Or35 = Builder.CreateOr(Or31, Shl30);
+    else
+      Or35 = Builder.CreateOr(And34, Shl30);
+  }
+
+  Value *A4 = nullptr;
+  if (FloatWidth == 64) {
+    Value *Fb_sroa_0_4_insert_ext =
+        Builder.CreateZExt(Or35, Builder.getIntNTy(FloatWidth));
+    Value *Fb_sroa_0_4_insert_shift = Builder.CreateShl(
+        Fb_sroa_0_4_insert_ext, Builder.getIntN(FloatWidth, 32));
+    Value *Fb_sroa_0_0_insert_ext = Builder.CreateAnd(
+        A_addr_1_off0, Builder.getIntN(FloatWidth, 0xFFFFFFFF));
+    Value *Fb_sroa_0_0_insert_insert =
+        Builder.CreateOr(Fb_sroa_0_4_insert_shift, Fb_sroa_0_0_insert_ext);
+    A4 = Builder.CreateBitCast(Fb_sroa_0_0_insert_insert, IToFP->getType());
+  } else {
+    if (IToFP->getType()->getFPMantissaWidth() == 64) {
+      Value *A4_0 =
+          Builder.CreateBitCast(Or35, Type::getFP128Ty(Builder.getContext()));
+      A4 = Builder.CreateFPTrunc(A4_0, IToFP->getType());
+    }
+    // Deal with "half" situation. This is a workaround since we don't have
+    // floattihf.c currently.
+    else if (IToFP->getType()->getFPMantissaWidth() == 11) {
+      Value *A4_0 =
+          Builder.CreateBitCast(Or35, Type::getFloatTy(Builder.getContext()));
+      A4 = Builder.CreateFPTrunc(A4_0, IToFP->getType());
+    } else
+      A4 = Builder.CreateBitCast(Or35, IToFP->getType());
+  }
+  Builder.CreateBr(End);
+
+  // return:
+  Builder.SetInsertPoint(End, End->begin());
+  PHINode *Retval_0 = Builder.CreatePHI(IToFP->getType(), 2);
+  Retval_0->addIncoming(A4, IfEnd26);
+  Retval_0->addIncoming(ConstantFP::getZero(IToFP->getType(), false), Entry);
+  IToFP->replaceAllUsesWith(Retval_0);
+  IToFP->dropAllReferences();
+  IToFP->eraseFromParent();
+  return true;
+}
+
+static bool runImpl(Function &F, const TargetLowering &TLI) {
+  SmallVector<Instruction *, 4> Replace;
+  bool Modified = false;
+
+  unsigned MaxLegalFpConvertBitWidth =
+      TLI.getMaxLargeFPConvertBitWidthSupported();
+  if (ExpandFpConvertBits != llvm::IntegerType::MAX_INT_BITS)
+    MaxLegalFpConvertBitWidth = ExpandFpConvertBits;
+
+  if (MaxLegalFpConvertBitWidth >= llvm::IntegerType::MAX_INT_BITS)
+    return false;
+
+  for (auto &I : instructions(F)) {
+    switch (I.getOpcode()) {
+    case Instruction::FPToUI:
+    case Instruction::FPToSI: {
+      // TODO: This pass doesn't handle vectors.
+      if (I.getOperand(0)->getType()->isVectorTy())
+        continue;
+
+      auto *IntTy = dyn_cast<IntegerType>(I.getType());
+      if (IntTy->getIntegerBitWidth() <= MaxLegalFpConvertBitWidth)
+        continue;
+
+      Replace.push_back(&I);
+      Modified = true;
+      break;
+    }
+    case Instruction::UIToFP:
+    case Instruction::SIToFP: {
+      // TODO: This pass doesn't handle vectors.
+      if (I.getOperand(0)->getType()->isVectorTy())
+        continue;
+
+      auto *IntTy = dyn_cast<IntegerType>(I.getOperand(0)->getType());
+      if (IntTy->getIntegerBitWidth() <= MaxLegalFpConvertBitWidth)
+        continue;
+
+      Replace.push_back(&I);
+      Modified = true;
+      break;
+    }
+    default:
+      break;
+    }
+  }
+
+  if (Replace.empty())
+    return false;
+
+  while (!Replace.empty()) {
+    Instruction *I = Replace.pop_back_val();
+    if (I->getOpcode() == Instruction::FPToUI ||
+        I->getOpcode() == Instruction::FPToSI) {
+      expandFPToI(I);
+    } else {
+      expandIToFP(I);
+    }
+  }
+
+  return Modified;
+}
+
+class ExpandLargeFpConvertLegacyPass : public FunctionPass {
+public:
+  static char ID;
+
+  ExpandLargeFpConvertLegacyPass() : FunctionPass(ID) {
+    initializeExpandLargeFpConvertLegacyPassPass(
+        *PassRegistry::getPassRegistry());
+  }
+
+  bool runOnFunction(Function &F) override {
+    auto *TM = &getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
+    auto *TLI = TM->getSubtargetImpl(F)->getTargetLowering();
+    return runImpl(F, *TLI);
+  }
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.addRequired<TargetPassConfig>();
+    AU.addPreserved<AAResultsWrapperPass>();
+    AU.addPreserved<GlobalsAAWrapperPass>();
+  }
+};
+
+char ExpandLargeFpConvertLegacyPass::ID = 0;
+INITIALIZE_PASS_BEGIN(ExpandLargeFpConvertLegacyPass, "expand-large-fp-convert",
+                      "Expand large fp convert", false, false)
+INITIALIZE_PASS_END(ExpandLargeFpConvertLegacyPass, "expand-large-fp-convert",
+                    "Expand large fp convert", false, false)
+
+FunctionPass *llvm::createExpandLargeFpConvertPass() {
+  return new ExpandLargeFpConvertLegacyPass();
+}

llvm/lib/CodeGen/TargetLoweringBase.cpp

TargetLoweringBase::TargetLoweringBase(const TargetMachine &tm) : TM(tm) {
   IsStrictFPEnabled = DisableStrictNodeMutation;
   MaxBytesForAlignment = 0;
   // TODO: the default will be switched to 0 in the next commit, along
   // with the Target-specific changes necessary.
   MaxAtomicSizeInBitsSupported = 1024;
 
   MaxDivRemBitWidthSupported = llvm::IntegerType::MAX_INT_BITS;
 
+  MaxLargeFPConvertBitWidthSupported = llvm::IntegerType::MAX_INT_BITS;
+
   MinCmpXchgSizeInBits = 0;
   SupportsUnalignedAtomics = false;
 
   std::fill(std::begin(LibcallRoutineNames), std::end(LibcallRoutineNames), nullptr);
 
   InitLibcalls(TM.getTargetTriple());
   InitCmpLibcallCCs(CmpLibcallCCs);
 }

llvm/lib/CodeGen/TargetPassConfig.cpp

 
 bool TargetPassConfig::addISelPasses() {
   if (TM->useEmulatedTLS())
     addPass(createLowerEmuTLSPass());
 
   addPass(createPreISelIntrinsicLoweringPass());
   PM->add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));
   addPass(createExpandLargeDivRemPass());
+  addPass(createExpandLargeFpConvertPass());
   addIRPasses();
   addCodeGenPrepare();
   addPassesToHandleExceptions();
   addISelPrepare();
 
   return addCoreISelPasses();
 }
 

llvm/lib/Target/X86/X86ISelLowering.cpp

X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
   // 32 bits so the AtomicExpandPass will expand it so we don't need cmpxchg8b.
   // FIXME: Should we be limiting the atomic size on other configs? Default is
   // 1024.
   if (!Subtarget.canUseCMPXCHG8B())
     setMaxAtomicSizeInBitsSupported(32);
 
   setMaxDivRemBitWidthSupported(Subtarget.is64Bit() ? 128 : 64);
 
+  setMaxLargeFPConvertBitWidthSupported(128);
+
   // Set up the register classes.
   addRegisterClass(MVT::i8, &X86::GR8RegClass);
   addRegisterClass(MVT::i16, &X86::GR16RegClass);
   addRegisterClass(MVT::i32, &X86::GR32RegClass);
   if (Subtarget.is64Bit())
     addRegisterClass(MVT::i64, &X86::GR64RegClass);
 
   for (MVT VT : MVT::integer_valuetypes())

llvm/test/CodeGen/AArch64/O0-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Assumption Cache Tracker
 ; CHECK-NEXT: Profile summary info
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Lower Garbage Collection Instructions
 ; CHECK-NEXT:       Shadow Stack GC Lowering
 ; CHECK-NEXT:       Lower constant intrinsics
 ; CHECK-NEXT:       Remove unreachable blocks from the CFG
 ; CHECK-NEXT:       Expand vector predication intrinsics
 ; CHECK-NEXT:       Scalarize Masked Memory Intrinsics

llvm/test/CodeGen/AArch64/O3-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT: Default Regalloc Eviction Advisor
 ; CHECK-NEXT: Default Regalloc Priority Advisor
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:     SVE intrinsics optimizations
 ; CHECK-NEXT:       FunctionPass Manager
 ; CHECK-NEXT:         Dominator Tree Construction
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Simplify the CFG
 ; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Natural Loop Information

llvm/test/CodeGen/AMDGPU/llc-pipeline.ll

 ; GCN-O0-NEXT:Argument Register Usage Information Storage
 ; GCN-O0-NEXT:Create Garbage Collector Module Metadata
 ; GCN-O0-NEXT:Register Usage Information Storage
 ; GCN-O0-NEXT:Machine Branch Probability Analysis
 ; GCN-O0-NEXT:  ModulePass Manager
 ; GCN-O0-NEXT:    Pre-ISel Intrinsic Lowering
 ; GCN-O0-NEXT:    FunctionPass Manager
 ; GCN-O0-NEXT:      Expand large div/rem
+; GCN-O0-NEXT:      Expand large fp convert
 ; GCN-O0-NEXT:    AMDGPU Printf lowering
 ; GCN-O0-NEXT:      FunctionPass Manager
 ; GCN-O0-NEXT:        Dominator Tree Construction
 ; GCN-O0-NEXT:    Lower ctors and dtors for AMDGPU
 ; GCN-O0-NEXT:    FunctionPass Manager
 ; GCN-O0-NEXT:      Early propagate attributes from kernels to functions
 ; GCN-O0-NEXT:    AMDGPU Lower Intrinsics
 ; GCN-O0-NEXT:    AMDGPU Inline All Functions

 ; GCN-O1-NEXT:Machine Branch Probability Analysis
 ; GCN-O1-NEXT:Register Usage Information Storage
 ; GCN-O1-NEXT:Default Regalloc Eviction Advisor
 ; GCN-O1-NEXT:Default Regalloc Priority Advisor
 ; GCN-O1-NEXT:  ModulePass Manager
 ; GCN-O1-NEXT:    Pre-ISel Intrinsic Lowering
 ; GCN-O1-NEXT:    FunctionPass Manager
 ; GCN-O1-NEXT:      Expand large div/rem
+; GCN-O1-NEXT:      Expand large fp convert
 ; GCN-O1-NEXT:    AMDGPU Printf lowering
 ; GCN-O1-NEXT:      FunctionPass Manager
 ; GCN-O1-NEXT:        Dominator Tree Construction
 ; GCN-O1-NEXT:    Lower ctors and dtors for AMDGPU
 ; GCN-O1-NEXT:    FunctionPass Manager
 ; GCN-O1-NEXT:      Early propagate attributes from kernels to functions
 ; GCN-O1-NEXT:    AMDGPU Lower Intrinsics
 ; GCN-O1-NEXT:    AMDGPU Inline All Functions

 ; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis
 ; GCN-O1-OPTS-NEXT:Register Usage Information Storage
 ; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor
 ; GCN-O1-OPTS-NEXT:Default Regalloc Priority Advisor
 ; GCN-O1-OPTS-NEXT:  ModulePass Manager
 ; GCN-O1-OPTS-NEXT:    Pre-ISel Intrinsic Lowering
 ; GCN-O1-OPTS-NEXT:    FunctionPass Manager
 ; GCN-O1-OPTS-NEXT:      Expand large div/rem
+; GCN-O1-OPTS-NEXT:      Expand large fp convert
 ; GCN-O1-OPTS-NEXT:    AMDGPU Printf lowering
 ; GCN-O1-OPTS-NEXT:      FunctionPass Manager
 ; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
 ; GCN-O1-OPTS-NEXT:    Lower ctors and dtors for AMDGPU
 ; GCN-O1-OPTS-NEXT:    FunctionPass Manager
 ; GCN-O1-OPTS-NEXT:      Early propagate attributes from kernels to functions
 ; GCN-O1-OPTS-NEXT:    AMDGPU Lower Intrinsics
 ; GCN-O1-OPTS-NEXT:    AMDGPU Inline All Functions

 ; GCN-O2-NEXT:Machine Branch Probability Analysis
 ; GCN-O2-NEXT:Register Usage Information Storage
 ; GCN-O2-NEXT:Default Regalloc Eviction Advisor
 ; GCN-O2-NEXT:Default Regalloc Priority Advisor
 ; GCN-O2-NEXT:  ModulePass Manager
 ; GCN-O2-NEXT:    Pre-ISel Intrinsic Lowering
 ; GCN-O2-NEXT:    FunctionPass Manager
 ; GCN-O2-NEXT:      Expand large div/rem
+; GCN-O2-NEXT:      Expand large fp convert
 ; GCN-O2-NEXT:    AMDGPU Printf lowering
 ; GCN-O2-NEXT:      FunctionPass Manager
 ; GCN-O2-NEXT:        Dominator Tree Construction
 ; GCN-O2-NEXT:    Lower ctors and dtors for AMDGPU
 ; GCN-O2-NEXT:    FunctionPass Manager
 ; GCN-O2-NEXT:      Early propagate attributes from kernels to functions
 ; GCN-O2-NEXT:    AMDGPU Lower Intrinsics
 ; GCN-O2-NEXT:    AMDGPU Inline All Functions

 ; GCN-O3-NEXT:Machine Branch Probability Analysis
 ; GCN-O3-NEXT:Register Usage Information Storage
 ; GCN-O3-NEXT:Default Regalloc Eviction Advisor
 ; GCN-O3-NEXT:Default Regalloc Priority Advisor
 ; GCN-O3-NEXT:  ModulePass Manager
 ; GCN-O3-NEXT:    Pre-ISel Intrinsic Lowering
 ; GCN-O3-NEXT:    FunctionPass Manager
 ; GCN-O3-NEXT:      Expand large div/rem
+; GCN-O3-NEXT:      Expand large fp convert
 ; GCN-O3-NEXT:    AMDGPU Printf lowering
 ; GCN-O3-NEXT:      FunctionPass Manager
 ; GCN-O3-NEXT:        Dominator Tree Construction
 ; GCN-O3-NEXT:    Lower ctors and dtors for AMDGPU
 ; GCN-O3-NEXT:    FunctionPass Manager
 ; GCN-O3-NEXT:      Early propagate attributes from kernels to functions
 ; GCN-O3-NEXT:    AMDGPU Lower Intrinsics
 ; GCN-O3-NEXT:    AMDGPU Inline All Functions

llvm/test/CodeGen/ARM/O3-pipeline.ll

 ; RUN: llc -mtriple=arm -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
 
 ; REQUIRES: asserts
 
 ; CHECK:       ModulePass Manager
 ; CHECK-NEXT:    Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:    FunctionPass Manager
 ; CHECK-NEXT:      Expand large div/rem
+; CHECK-NEXT:      Expand large fp convert
 ; CHECK-NEXT:      Expand Atomic instructions
 ; CHECK-NEXT:      Simplify the CFG
 ; CHECK-NEXT:      Dominator Tree Construction
 ; CHECK-NEXT:      Natural Loop Information
 ; CHECK-NEXT:      MVE gather/scatter lowering
 ; CHECK-NEXT:      MVE lane interleaving
 ; CHECK-NEXT:      Module Verifier
 ; CHECK-NEXT:      Basic Alias Analysis (stateless AA impl)

llvm/test/CodeGen/M68k/pipeline.ll

 ; RUN: llc -mtriple=m68k -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
 ; CHECK:  ModulePass Manager
 ; CHECK-NEXT:    Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:    FunctionPass Manager
 ; CHECK-NEXT:      Expand large div/rem
+; CHECK-NEXT:      Expand large fp convert
 ; CHECK-NEXT:      Expand Atomic instructions
 ; CHECK-NEXT:      Module Verifier
 ; CHECK-NEXT:      Dominator Tree Construction
 ; CHECK-NEXT:      Basic Alias Analysis (stateless AA impl)
 ; CHECK-NEXT:      Natural Loop Information
 ; CHECK-NEXT:      Canonicalize natural loops
 ; CHECK-NEXT:      Scalar Evolution Analysis
 ; CHECK-NEXT:      Loop Pass Manager

llvm/test/CodeGen/PowerPC/O3-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT: Default Regalloc Eviction Advisor
 ; CHECK-NEXT: Default Regalloc Priority Advisor
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Convert i1 constants to i32/i64 if they are returned
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:     PPC Lower MASS Entries
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Natural Loop Information
 ; CHECK-NEXT:       Scalar Evolution Analysis
 ; CHECK-NEXT:       Split GEPs to a variadic base and a constant offset for better CSE

llvm/test/CodeGen/RISCV/O0-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Assumption Cache Tracker
 ; CHECK-NEXT: Profile summary info
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Lower Garbage Collection Instructions
 ; CHECK-NEXT:       Shadow Stack GC Lowering
 ; CHECK-NEXT:       Lower constant intrinsics
 ; CHECK-NEXT:       Remove unreachable blocks from the CFG
 ; CHECK-NEXT:       Expand vector predication intrinsics
 ; CHECK-NEXT:       Scalarize Masked Memory Intrinsics

llvm/test/CodeGen/RISCV/O3-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT: Default Regalloc Eviction Advisor
 ; CHECK-NEXT: Default Regalloc Priority Advisor
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Natural Loop Information
 ; CHECK-NEXT:       RISCV gather/scatter lowering
 ; CHECK-NEXT:       RISCV CodeGenPrepare
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
 ; CHECK-NEXT:       Canonicalize natural loops

llvm/test/CodeGen/X86/O0-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Assumption Cache Tracker
 ; CHECK-NEXT: Profile summary info
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:       Lower AMX intrinsics
 ; CHECK-NEXT:       Lower AMX type for load/store
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Lower Garbage Collection Instructions
 ; CHECK-NEXT:       Shadow Stack GC Lowering
 ; CHECK-NEXT:       Lower constant intrinsics
 ; CHECK-NEXT:       Remove unreachable blocks from the CFG

llvm/test/CodeGen/X86/expand-large-fp-convert-fptosi129.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=x86_64-- -expand-large-fp-convert < %s | FileCheck %s
+
+define i129 @halftosi129(half %a) {
+; CHECK-LABEL: @halftosi129(
+; CHECK-NEXT:    [[TMP1:%.*]] = fptosi half [[A:%.*]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = sext i32 [[TMP1]] to i129
+; CHECK-NEXT:    ret i129 [[TMP2]]
+;
+  %conv = fptosi half %a to i129
+  ret i129 %conv
+}
+
+define i129 @floattosi129(float %a) {
+; CHECK-LABEL: @floattosi129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast float [[A:%.*]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i129
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i32 [[TMP0]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP4:%.*]] = lshr i129 [[TMP1]], 23
+; CHECK-NEXT:    [[TMP5:%.*]] = and i129 [[TMP4]], 255
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP1]], 8388607
+; CHECK-NEXT:    [[TMP7:%.*]] = or i129 [[TMP6]], 8388608
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i129 [[TMP5]], 127
+; CHECK-NEXT:    br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP9:%.*]] = add i129 [[TMP5]], -256
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP5]], 150
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP12:%.*]] = sub i129 150, [[TMP5]]
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP15:%.*]] = add i129 [[TMP5]], -150
+; CHECK-NEXT:    [[TMP16:%.*]] = shl i129 [[TMP7]], [[TMP15]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i129 [[TMP16]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP14]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP17]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP18]]
+;
+  %conv = fptosi float %a to i129
+  ret i129 %conv
+}
+
+define i129 @doubletosi129(double %a) {
+; CHECK-LABEL: @doubletosi129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast double [[A:%.*]] to i64
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i64 [[TMP0]] to i129
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i64 [[TMP0]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP4:%.*]] = lshr i129 [[TMP1]], 52
+; CHECK-NEXT:    [[TMP5:%.*]] = and i129 [[TMP4]], 2047
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP1]], 4503599627370495
+; CHECK-NEXT:    [[TMP7:%.*]] = or i129 [[TMP6]], 4503599627370496
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i129 [[TMP5]], 1023
+; CHECK-NEXT:    br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP9:%.*]] = add i129 [[TMP5]], -1152
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP5]], 1075
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP12:%.*]] = sub i129 1075, [[TMP5]]
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP15:%.*]] = add i129 [[TMP5]], -1075
+; CHECK-NEXT:    [[TMP16:%.*]] = shl i129 [[TMP7]], [[TMP15]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i129 [[TMP16]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP14]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP17]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP18]]
+;
+  %conv = fptosi double %a to i129
+  ret i129 %conv
+}
+
+define i129 @x86_fp80tosi129(x86_fp80 %a) {
+; CHECK-LABEL: @x86_fp80tosi129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = fpext x86_fp80 [[A:%.*]] to fp128
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast fp128 [[TMP0]] to i128
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i128 [[TMP1]] to i129
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i128 [[TMP1]], -1
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP3]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP5:%.*]] = lshr i129 [[TMP2]], 112
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP5]], 32767
+; CHECK-NEXT:    [[TMP7:%.*]] = and i129 [[TMP2]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP8:%.*]] = or i129 [[TMP7]], 5192296858534827628530496329220096
+; CHECK-NEXT:    [[TMP9:%.*]] = icmp ult i129 [[TMP6]], 16383
+; CHECK-NEXT:    br i1 [[TMP9]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP10:%.*]] = add i129 [[TMP6]], -16512
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP10]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP3]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP12:%.*]] = icmp ult i129 [[TMP6]], 16495
+; CHECK-NEXT:    br i1 [[TMP12]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP13:%.*]] = sub i129 16495, [[TMP6]]
+; CHECK-NEXT:    [[TMP14:%.*]] = lshr i129 [[TMP8]], [[TMP13]]
+; CHECK-NEXT:    [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP4]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP16:%.*]] = add i129 [[TMP6]], -16495
+; CHECK-NEXT:    [[TMP17:%.*]] = shl i129 [[TMP8]], [[TMP16]]
+; CHECK-NEXT:    [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP4]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP19:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP15]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP18]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP19]]
+;
+  %conv = fptosi x86_fp80 %a to i129
+  ret i129 %conv
+}
+
+define i129 @fp128tosi129(fp128 %a) {
+; CHECK-LABEL: @fp128tosi129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast fp128 [[A:%.*]] to i128
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i128 [[TMP0]] to i129
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i128 [[TMP0]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP4:%.*]] = lshr i129 [[TMP1]], 112
+; CHECK-NEXT:    [[TMP5:%.*]] = and i129 [[TMP4]], 32767
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP1]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP7:%.*]] = or i129 [[TMP6]], 5192296858534827628530496329220096
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i129 [[TMP5]], 16383
+; CHECK-NEXT:    br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP9:%.*]] = add i129 [[TMP5]], -16512
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP5]], 16495
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP12:%.*]] = sub i129 16495, [[TMP5]]
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP15:%.*]] = add i129 [[TMP5]], -16495
+; CHECK-NEXT:    [[TMP16:%.*]] = shl i129 [[TMP7]], [[TMP15]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i129 [[TMP16]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP14]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP17]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP18]]
+;
+  %conv = fptosi fp128 %a to i129
+  ret i129 %conv
+}

llvm/test/CodeGen/X86/expand-large-fp-convert-fptoui129.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=x86_64-- -expand-large-fp-convert < %s | FileCheck %s
+
+define i129 @halftoui129(half %a) {
+; CHECK-LABEL: @halftoui129(
+; CHECK-NEXT:    [[TMP1:%.*]] = fptoui half [[A:%.*]] to i32
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i129
+; CHECK-NEXT:    ret i129 [[TMP2]]
+;
+  %conv = fptoui half %a to i129
+  ret i129 %conv
+}
+
+define i129 @floattoui129(float %a) {
+; CHECK-LABEL: @floattoui129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast float [[A:%.*]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i129
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i32 [[TMP0]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP4:%.*]] = lshr i129 [[TMP1]], 23
+; CHECK-NEXT:    [[TMP5:%.*]] = and i129 [[TMP4]], 255
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP1]], 8388607
+; CHECK-NEXT:    [[TMP7:%.*]] = or i129 [[TMP6]], 8388608
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i129 [[TMP5]], 127
+; CHECK-NEXT:    br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP9:%.*]] = add i129 [[TMP5]], -256
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP5]], 150
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP12:%.*]] = sub i129 150, [[TMP5]]
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP15:%.*]] = add i129 [[TMP5]], -150
+; CHECK-NEXT:    [[TMP16:%.*]] = shl i129 [[TMP7]], [[TMP15]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i129 [[TMP16]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP14]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP17]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP18]]
+;
+  %conv = fptoui float %a to i129
+  ret i129 %conv
+}
+
+define i129 @doubletoui129(double %a) {
+; CHECK-LABEL: @doubletoui129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast double [[A:%.*]] to i64
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i64 [[TMP0]] to i129
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i64 [[TMP0]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP4:%.*]] = lshr i129 [[TMP1]], 52
+; CHECK-NEXT:    [[TMP5:%.*]] = and i129 [[TMP4]], 2047
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP1]], 4503599627370495
+; CHECK-NEXT:    [[TMP7:%.*]] = or i129 [[TMP6]], 4503599627370496
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i129 [[TMP5]], 1023
+; CHECK-NEXT:    br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP9:%.*]] = add i129 [[TMP5]], -1152
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP5]], 1075
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP12:%.*]] = sub i129 1075, [[TMP5]]
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP15:%.*]] = add i129 [[TMP5]], -1075
+; CHECK-NEXT:    [[TMP16:%.*]] = shl i129 [[TMP7]], [[TMP15]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i129 [[TMP16]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP14]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP17]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP18]]
+;
+  %conv = fptoui double %a to i129
+  ret i129 %conv
+}
+
+define i129 @x86_fp80toui129(x86_fp80 %a) {
+; CHECK-LABEL: @x86_fp80toui129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = fpext x86_fp80 [[A:%.*]] to fp128
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast fp128 [[TMP0]] to i128
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i128 [[TMP1]] to i129
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp sgt i128 [[TMP1]], -1
+; CHECK-NEXT:    [[TMP4:%.*]] = select i1 [[TMP3]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP5:%.*]] = lshr i129 [[TMP2]], 112
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP5]], 32767
+; CHECK-NEXT:    [[TMP7:%.*]] = and i129 [[TMP2]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP8:%.*]] = or i129 [[TMP7]], 5192296858534827628530496329220096
+; CHECK-NEXT:    [[TMP9:%.*]] = icmp ult i129 [[TMP6]], 16383
+; CHECK-NEXT:    br i1 [[TMP9]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP10:%.*]] = add i129 [[TMP6]], -16512
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP10]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP3]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP12:%.*]] = icmp ult i129 [[TMP6]], 16495
+; CHECK-NEXT:    br i1 [[TMP12]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP13:%.*]] = sub i129 16495, [[TMP6]]
+; CHECK-NEXT:    [[TMP14:%.*]] = lshr i129 [[TMP8]], [[TMP13]]
+; CHECK-NEXT:    [[TMP15:%.*]] = mul i129 [[TMP14]], [[TMP4]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP16:%.*]] = add i129 [[TMP6]], -16495
+; CHECK-NEXT:    [[TMP17:%.*]] = shl i129 [[TMP8]], [[TMP16]]
+; CHECK-NEXT:    [[TMP18:%.*]] = mul i129 [[TMP17]], [[TMP4]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP19:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP15]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP18]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP19]]
+;
+  %conv = fptoui x86_fp80 %a to i129
+  ret i129 %conv
+}
+
+define i129 @fp128toui129(fp128 %a) {
+; CHECK-LABEL: @fp128toui129(
+; CHECK-NEXT:  fp-to-i-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast fp128 [[A:%.*]] to i128
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i128 [[TMP0]] to i129
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i128 [[TMP0]], -1
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i129 1, i129 -1
+; CHECK-NEXT:    [[TMP4:%.*]] = lshr i129 [[TMP1]], 112
+; CHECK-NEXT:    [[TMP5:%.*]] = and i129 [[TMP4]], 32767
+; CHECK-NEXT:    [[TMP6:%.*]] = and i129 [[TMP1]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP7:%.*]] = or i129 [[TMP6]], 5192296858534827628530496329220096
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp ult i129 [[TMP5]], 16383
+; CHECK-NEXT:    br i1 [[TMP8]], label [[FP_TO_I_CLEANUP:%.*]], label [[FP_TO_I_IF_END:%.*]]
+; CHECK:       fp-to-i-if-end:
+; CHECK-NEXT:    [[TMP9:%.*]] = add i129 [[TMP5]], -16512
+; CHECK-NEXT:    [[TMP10:%.*]] = icmp ult i129 [[TMP9]], 4294967167
+; CHECK-NEXT:    br i1 [[TMP10]], label [[FP_TO_I_IF_THEN5:%.*]], label [[FP_TO_I_IF_END9:%.*]]
+; CHECK:       fp-to-i-if-then5:
+; CHECK-NEXT:    [[COND8:%.*]] = select i1 [[TMP2]], i129 340282366920938463463374607431768211455, i129 -340282366920938463463374607431768211456
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-end9:
+; CHECK-NEXT:    [[TMP11:%.*]] = icmp ult i129 [[TMP5]], 16495
+; CHECK-NEXT:    br i1 [[TMP11]], label [[FP_TO_I_IF_THEN12:%.*]], label [[FP_TO_I_IF_ELSE:%.*]]
+; CHECK:       fp-to-i-if-then12:
+; CHECK-NEXT:    [[TMP12:%.*]] = sub i129 16495, [[TMP5]]
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 [[TMP7]], [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = mul i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-if-else:
+; CHECK-NEXT:    [[TMP15:%.*]] = add i129 [[TMP5]], -16495
+; CHECK-NEXT:    [[TMP16:%.*]] = shl i129 [[TMP7]], [[TMP15]]
+; CHECK-NEXT:    [[TMP17:%.*]] = mul i129 [[TMP16]], [[TMP3]]
+; CHECK-NEXT:    br label [[FP_TO_I_CLEANUP]]
+; CHECK:       fp-to-i-cleanup:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[COND8]], [[FP_TO_I_IF_THEN5]] ], [ [[TMP14]], [[FP_TO_I_IF_THEN12]] ], [ [[TMP17]], [[FP_TO_I_IF_ELSE]] ], [ 0, [[FP_TO_I_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i129 [[TMP18]]
+;
+  %conv = fptoui fp128 %a to i129
+  ret i129 %conv
+}

llvm/test/CodeGen/X86/expand-large-fp-convert-si129tofp.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=x86_64-- -expand-large-fp-convert < %s | FileCheck %s
+
+define half @ui129tohalf(i129 %a) {
+; CHECK-LABEL: @ui129tohalf(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[TMP3]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i32 129, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i32 128, [[TMP5]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i32 [[TMP7]], 24
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i32 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 25, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i32 26, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[TMP3]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i32 103, [[TMP5]]
+; CHECK-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i129
+; CHECK-NEXT:    [[TMP12:%.*]] = lshr i129 [[TMP3]], [[TMP11]]
+; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[TMP5]], 26
+; CHECK-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i129
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i129 -1, [[TMP14]]
+; CHECK-NEXT:    [[TMP16:%.*]] = and i129 [[TMP15]], [[TMP3]]
+; CHECK-NEXT:    [[TMP17:%.*]] = icmp ne i129 [[TMP16]], 0
+; CHECK-NEXT:    [[TMP18:%.*]] = zext i1 [[TMP17]] to i129
+; CHECK-NEXT:    [[TMP19:%.*]] = or i129 [[TMP12]], [[TMP18]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP20:%.*]] = phi i129 [ [[TMP19]], [[ITOFP_SW_DEFAULT]] ], [ [[TMP3]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i129 [[TMP20]] to i32
+; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP21]], 2
+; CHECK-NEXT:    [[TMP23:%.*]] = and i32 [[TMP22]], 1
+; CHECK-NEXT:    [[TMP24:%.*]] = zext i32 [[TMP23]] to i129
+; CHECK-NEXT:    [[TMP25:%.*]] = or i129 [[TMP20]], [[TMP24]]
+; CHECK-NEXT:    [[TMP26:%.*]] = add i129 [[TMP25]], 1
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i129 [[TMP26]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP26]], 67108864
+; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP27]] to i32
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP27]], 32
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i32
+; CHECK-NEXT:    br i1 [[TMP28]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i129 [[TMP26]], 3
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP32]] to i32
+; CHECK-NEXT:    [[TMP34:%.*]] = lshr i129 [[TMP32]], 32
+; CHECK-NEXT:    [[TMP35:%.*]] = trunc i129 [[TMP34]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP36:%.*]] = add i32 [[TMP5]], -105
+; CHECK-NEXT:    [[TMP37:%.*]] = zext i32 [[TMP36]] to i129
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i129 [[TMP3]], [[TMP37]]
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i129 [[TMP38]] to i32
+; CHECK-NEXT:    [[TMP40:%.*]] = lshr i129 [[TMP38]], 32
+; CHECK-NEXT:    [[TMP41:%.*]] = trunc i129 [[TMP40]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP42:%.*]] = phi i32 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP39]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP43:%.*]] = phi i32 [ [[TMP35]], [[ITOFP_IF_THEN20]] ], [ [[TMP31]], [[ITOFP_SW_EPILOG]] ], [ [[TMP41]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP44:%.*]] = phi i32 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP46:%.*]] = and i32 [[TMP45]], -2147483648
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i32 [[TMP44]], 23
+; CHECK-NEXT:    [[TMP48:%.*]] = add i32 [[TMP47]], 1065353216
+; CHECK-NEXT:    [[TMP49:%.*]] = and i32 [[TMP42]], 8388607
+; CHECK-NEXT:    [[TMP50:%.*]] = or i32 [[TMP49]], [[TMP46]]
+; CHECK-NEXT:    [[TMP51:%.*]] = or i32 [[TMP50]], [[TMP48]]
+; CHECK-NEXT:    [[TMP52:%.*]] = bitcast i32 [[TMP51]] to float
+; CHECK-NEXT:    [[TMP53:%.*]] = fptrunc float [[TMP52]] to half
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP54:%.*]] = phi half [ [[TMP53]], [[ITOFP_IF_END26]] ], [ 0xH0000, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret half [[TMP54]]
+;
+  %conv = sitofp i129 %a to half
+  ret half %conv
+}
+
+define float @ui129tofloat(i129 %a) {
+; CHECK-LABEL: @ui129tofloat(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[TMP3]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i32 129, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i32 128, [[TMP5]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i32 [[TMP7]], 24
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i32 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 25, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i32 26, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[TMP3]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i32 103, [[TMP5]]
+; CHECK-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i129
+; CHECK-NEXT:    [[TMP12:%.*]] = lshr i129 [[TMP3]], [[TMP11]]
+; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[TMP5]], 26
+; CHECK-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i129
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i129 -1, [[TMP14]]
+; CHECK-NEXT:    [[TMP16:%.*]] = and i129 [[TMP15]], [[TMP3]]
+; CHECK-NEXT:    [[TMP17:%.*]] = icmp ne i129 [[TMP16]], 0
+; CHECK-NEXT:    [[TMP18:%.*]] = zext i1 [[TMP17]] to i129
+; CHECK-NEXT:    [[TMP19:%.*]] = or i129 [[TMP12]], [[TMP18]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP20:%.*]] = phi i129 [ [[TMP19]], [[ITOFP_SW_DEFAULT]] ], [ [[TMP3]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i129 [[TMP20]] to i32
+; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP21]], 2
+; CHECK-NEXT:    [[TMP23:%.*]] = and i32 [[TMP22]], 1
+; CHECK-NEXT:    [[TMP24:%.*]] = zext i32 [[TMP23]] to i129
+; CHECK-NEXT:    [[TMP25:%.*]] = or i129 [[TMP20]], [[TMP24]]
+; CHECK-NEXT:    [[TMP26:%.*]] = add i129 [[TMP25]], 1
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i129 [[TMP26]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP26]], 67108864
+; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP27]] to i32
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP27]], 32
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i32
+; CHECK-NEXT:    br i1 [[TMP28]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i129 [[TMP26]], 3
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP32]] to i32
+; CHECK-NEXT:    [[TMP34:%.*]] = lshr i129 [[TMP32]], 32
+; CHECK-NEXT:    [[TMP35:%.*]] = trunc i129 [[TMP34]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP36:%.*]] = add i32 [[TMP5]], -105
+; CHECK-NEXT:    [[TMP37:%.*]] = zext i32 [[TMP36]] to i129
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i129 [[TMP3]], [[TMP37]]
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i129 [[TMP38]] to i32
+; CHECK-NEXT:    [[TMP40:%.*]] = lshr i129 [[TMP38]], 32
+; CHECK-NEXT:    [[TMP41:%.*]] = trunc i129 [[TMP40]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP42:%.*]] = phi i32 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP39]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP43:%.*]] = phi i32 [ [[TMP35]], [[ITOFP_IF_THEN20]] ], [ [[TMP31]], [[ITOFP_SW_EPILOG]] ], [ [[TMP41]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP44:%.*]] = phi i32 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP46:%.*]] = and i32 [[TMP45]], -2147483648
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i32 [[TMP44]], 23
+; CHECK-NEXT:    [[TMP48:%.*]] = add i32 [[TMP47]], 1065353216
+; CHECK-NEXT:    [[TMP49:%.*]] = and i32 [[TMP42]], 8388607
+; CHECK-NEXT:    [[TMP50:%.*]] = or i32 [[TMP49]], [[TMP46]]
+; CHECK-NEXT:    [[TMP51:%.*]] = or i32 [[TMP50]], [[TMP48]]
+; CHECK-NEXT:    [[TMP52:%.*]] = bitcast i32 [[TMP51]] to float
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP53:%.*]] = phi float [ [[TMP52]], [[ITOFP_IF_END26]] ], [ 0.000000e+00, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret float [[TMP53]]
+;
+  %conv = sitofp i129 %a to float
+  ret float %conv
+}
+
+define double @ui129todouble(i129 %a) {
+; CHECK-LABEL: @ui129todouble(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[TMP3]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i32 129, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i32 128, [[TMP5]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i32 [[TMP7]], 53
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i32 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 54, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i32 55, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[TMP3]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i32 74, [[TMP5]]
+; CHECK-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i129
+; CHECK-NEXT:    [[TMP12:%.*]] = lshr i129 [[TMP3]], [[TMP11]]
+; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[TMP5]], 55
+; CHECK-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i129
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i129 -1, [[TMP14]]
+; CHECK-NEXT:    [[TMP16:%.*]] = and i129 [[TMP15]], [[TMP3]]
+; CHECK-NEXT:    [[TMP17:%.*]] = icmp ne i129 [[TMP16]], 0
+; CHECK-NEXT:    [[TMP18:%.*]] = zext i1 [[TMP17]] to i129
+; CHECK-NEXT:    [[TMP19:%.*]] = or i129 [[TMP12]], [[TMP18]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP20:%.*]] = phi i129 [ [[TMP19]], [[ITOFP_SW_DEFAULT]] ], [ [[TMP3]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i129 [[TMP20]] to i32
+; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP21]], 2
+; CHECK-NEXT:    [[TMP23:%.*]] = and i32 [[TMP22]], 1
+; CHECK-NEXT:    [[TMP24:%.*]] = zext i32 [[TMP23]] to i129
+; CHECK-NEXT:    [[TMP25:%.*]] = or i129 [[TMP20]], [[TMP24]]
+; CHECK-NEXT:    [[TMP26:%.*]] = add i129 [[TMP25]], 1
+; CHECK-NEXT:    [[TMP27:%.*]] = ashr i129 [[TMP26]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP26]], 36028797018963968
+; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP27]] to i64
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP27]], 32
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i32
+; CHECK-NEXT:    br i1 [[TMP28]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP32:%.*]] = ashr i129 [[TMP26]], 3
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP32]] to i64
+; CHECK-NEXT:    [[TMP34:%.*]] = lshr i129 [[TMP32]], 32
+; CHECK-NEXT:    [[TMP35:%.*]] = trunc i129 [[TMP34]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP36:%.*]] = add i32 [[TMP5]], -76
+; CHECK-NEXT:    [[TMP37:%.*]] = zext i32 [[TMP36]] to i129
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i129 [[TMP3]], [[TMP37]]
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i129 [[TMP38]] to i64
+; CHECK-NEXT:    [[TMP40:%.*]] = lshr i129 [[TMP38]], 32
+; CHECK-NEXT:    [[TMP41:%.*]] = trunc i129 [[TMP40]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP42:%.*]] = phi i64 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP39]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP43:%.*]] = phi i32 [ [[TMP35]], [[ITOFP_IF_THEN20]] ], [ [[TMP31]], [[ITOFP_SW_EPILOG]] ], [ [[TMP41]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP44:%.*]] = phi i32 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP46:%.*]] = and i32 [[TMP45]], -2147483648
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i32 [[TMP44]], 20
+; CHECK-NEXT:    [[TMP48:%.*]] = add i32 [[TMP47]], 1072693248
+; CHECK-NEXT:    [[TMP49:%.*]] = and i32 [[TMP43]], 1048575
+; CHECK-NEXT:    [[TMP50:%.*]] = or i32 [[TMP49]], [[TMP46]]
+; CHECK-NEXT:    [[TMP51:%.*]] = or i32 [[TMP50]], [[TMP48]]
+; CHECK-NEXT:    [[TMP52:%.*]] = zext i32 [[TMP51]] to i64
+; CHECK-NEXT:    [[TMP53:%.*]] = shl i64 [[TMP52]], 32
+; CHECK-NEXT:    [[TMP54:%.*]] = and i64 [[TMP42]], 4294967295
+; CHECK-NEXT:    [[TMP55:%.*]] = or i64 [[TMP53]], [[TMP54]]
+; CHECK-NEXT:    [[TMP56:%.*]] = bitcast i64 [[TMP55]] to double
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP57:%.*]] = phi double [ [[TMP56]], [[ITOFP_IF_END26]] ], [ 0.000000e+00, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret double [[TMP57]]
+;
+  %conv = sitofp i129 %a to double
+  ret double %conv
+}
+
+define x86_fp80 @ui129tox86_fp80(i129 %a) {
+; CHECK-LABEL: @ui129tox86_fp80(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[TMP3]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i129 129, [[TMP4]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i129 128, [[TMP4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i129 [[TMP7]], 113
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i129 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i129 114, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i129 115, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[TMP3]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i129 14, [[TMP4]]
+; CHECK-NEXT:    [[TMP11:%.*]] = lshr i129 [[TMP3]], [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = add i129 [[TMP4]], 115
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 -1, [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = and i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    [[TMP15:%.*]] = icmp ne i129 [[TMP14]], 0
+; CHECK-NEXT:    [[TMP16:%.*]] = zext i1 [[TMP15]] to i129
+; CHECK-NEXT:    [[TMP17:%.*]] = or i129 [[TMP11]], [[TMP16]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[TMP17]], [[ITOFP_SW_DEFAULT]] ], [ [[TMP3]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP19:%.*]] = trunc i129 [[TMP18]] to i32
+; CHECK-NEXT:    [[TMP20:%.*]] = lshr i32 [[TMP19]], 2
+; CHECK-NEXT:    [[TMP21:%.*]] = and i32 [[TMP20]], 1
+; CHECK-NEXT:    [[TMP22:%.*]] = zext i32 [[TMP21]] to i129
+; CHECK-NEXT:    [[TMP23:%.*]] = or i129 [[TMP18]], [[TMP22]]
+; CHECK-NEXT:    [[TMP24:%.*]] = add i129 [[TMP23]], 1
+; CHECK-NEXT:    [[TMP25:%.*]] = ashr i129 [[TMP24]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP24]], 41538374868278621028243970633760768
+; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP27:%.*]] = trunc i129 [[TMP25]] to i128
+; CHECK-NEXT:    [[TMP28:%.*]] = lshr i129 [[TMP25]], 32
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br i1 [[TMP26]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP30:%.*]] = ashr i129 [[TMP24]], 3
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i128
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP30]], 32
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP6]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP34:%.*]] = add i129 [[TMP4]], 4294967280
+; CHECK-NEXT:    [[TMP35:%.*]] = shl i129 [[TMP3]], [[TMP34]]
+; CHECK-NEXT:    [[TMP36:%.*]] = trunc i129 [[TMP35]] to i128
+; CHECK-NEXT:    [[TMP37:%.*]] = lshr i129 [[TMP35]], 32
+; CHECK-NEXT:    [[TMP38:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP39:%.*]] = phi i128 [ [[TMP31]], [[ITOFP_IF_THEN20]] ], [ [[TMP27]], [[ITOFP_SW_EPILOG]] ], [ [[TMP36]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP40:%.*]] = phi i64 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP38]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP41:%.*]] = phi i129 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[AND29:%.*]] = and i129 [[TMP1]], 9223372036854775808
+; CHECK-NEXT:    [[TMP42:%.*]] = shl i64 [[TMP40]], 48
+; CHECK-NEXT:    [[TMP43:%.*]] = add i64 [[TMP42]], 4611404543450677248
+; CHECK-NEXT:    [[TMP44:%.*]] = zext i64 [[TMP43]] to i128
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[AND29]] to i128
+; CHECK-NEXT:    [[TMP46:%.*]] = or i128 [[TMP45]], [[TMP44]]
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i128 [[TMP46]], 64
+; CHECK-NEXT:    [[TMP48:%.*]] = and i128 [[TMP39]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP49:%.*]] = or i128 [[TMP47]], [[TMP48]]
+; CHECK-NEXT:    [[TMP50:%.*]] = bitcast i128 [[TMP49]] to fp128
+; CHECK-NEXT:    [[TMP51:%.*]] = fptrunc fp128 [[TMP50]] to x86_fp80
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP52:%.*]] = phi x86_fp80 [ [[TMP51]], [[ITOFP_IF_END26]] ], [ 0xK00000000000000000000, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret x86_fp80 [[TMP52]]
+;
+  %conv = sitofp i129 %a to x86_fp80
+  ret x86_fp80 %conv
+}
+
+define fp128 @ui129tofp128(i129 %a) {
+; CHECK-LABEL: @ui129tofp128(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[TMP3]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i129 129, [[TMP4]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i129 128, [[TMP4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i129 [[TMP7]], 113
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i129 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i129 114, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i129 115, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[TMP3]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i129 14, [[TMP4]]
+; CHECK-NEXT:    [[TMP11:%.*]] = lshr i129 [[TMP3]], [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = add i129 [[TMP4]], 115
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 -1, [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = and i129 [[TMP13]], [[TMP3]]
+; CHECK-NEXT:    [[TMP15:%.*]] = icmp ne i129 [[TMP14]], 0
+; CHECK-NEXT:    [[TMP16:%.*]] = zext i1 [[TMP15]] to i129
+; CHECK-NEXT:    [[TMP17:%.*]] = or i129 [[TMP11]], [[TMP16]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[TMP17]], [[ITOFP_SW_DEFAULT]] ], [ [[TMP3]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP19:%.*]] = trunc i129 [[TMP18]] to i32
+; CHECK-NEXT:    [[TMP20:%.*]] = lshr i32 [[TMP19]], 2
+; CHECK-NEXT:    [[TMP21:%.*]] = and i32 [[TMP20]], 1
+; CHECK-NEXT:    [[TMP22:%.*]] = zext i32 [[TMP21]] to i129
+; CHECK-NEXT:    [[TMP23:%.*]] = or i129 [[TMP18]], [[TMP22]]
+; CHECK-NEXT:    [[TMP24:%.*]] = add i129 [[TMP23]], 1
+; CHECK-NEXT:    [[TMP25:%.*]] = ashr i129 [[TMP24]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP24]], 41538374868278621028243970633760768
+; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP27:%.*]] = trunc i129 [[TMP25]] to i128
+; CHECK-NEXT:    [[TMP28:%.*]] = lshr i129 [[TMP25]], 32
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br i1 [[TMP26]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP30:%.*]] = ashr i129 [[TMP24]], 3
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i128
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP30]], 32
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP6]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP34:%.*]] = add i129 [[TMP4]], 4294967280
+; CHECK-NEXT:    [[TMP35:%.*]] = shl i129 [[TMP3]], [[TMP34]]
+; CHECK-NEXT:    [[TMP36:%.*]] = trunc i129 [[TMP35]] to i128
+; CHECK-NEXT:    [[TMP37:%.*]] = lshr i129 [[TMP35]], 32
+; CHECK-NEXT:    [[TMP38:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP39:%.*]] = phi i128 [ [[TMP31]], [[ITOFP_IF_THEN20]] ], [ [[TMP27]], [[ITOFP_SW_EPILOG]] ], [ [[TMP36]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP40:%.*]] = phi i64 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP38]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP41:%.*]] = phi i129 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[AND29:%.*]] = and i129 [[TMP1]], 9223372036854775808
+; CHECK-NEXT:    [[TMP42:%.*]] = shl i64 [[TMP40]], 48
+; CHECK-NEXT:    [[TMP43:%.*]] = add i64 [[TMP42]], 4611404543450677248
+; CHECK-NEXT:    [[TMP44:%.*]] = zext i64 [[TMP43]] to i128
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[AND29]] to i128
+; CHECK-NEXT:    [[TMP46:%.*]] = or i128 [[TMP45]], [[TMP44]]
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i128 [[TMP46]], 64
+; CHECK-NEXT:    [[TMP48:%.*]] = and i128 [[TMP39]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP49:%.*]] = or i128 [[TMP47]], [[TMP48]]
+; CHECK-NEXT:    [[TMP50:%.*]] = bitcast i128 [[TMP49]] to fp128
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP51:%.*]] = phi fp128 [ [[TMP50]], [[ITOFP_IF_END26]] ], [ 0xL00000000000000000000000000000000, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret fp128 [[TMP51]]
+;
+  %conv = sitofp i129 %a to fp128
+  ret fp128 %conv
+}

llvm/test/CodeGen/X86/expand-large-fp-convert-ui129tofp.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -mtriple=x86_64-- -expand-large-fp-convert < %s | FileCheck %s
+
+define half @ui129tohalf(i129 %a) {
+; CHECK-LABEL: @ui129tohalf(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[A]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i32 129, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i32 128, [[TMP5]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i32 [[TMP7]], 24
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i32 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 25, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i32 26, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[A]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i32 103, [[TMP5]]
+; CHECK-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i129
+; CHECK-NEXT:    [[TMP12:%.*]] = lshr i129 [[A]], [[TMP11]]
+; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[TMP5]], 26
+; CHECK-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i129
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i129 -1, [[TMP14]]
+; CHECK-NEXT:    [[TMP16:%.*]] = and i129 [[TMP15]], [[A]]
+; CHECK-NEXT:    [[TMP17:%.*]] = icmp ne i129 [[TMP16]], 0
+; CHECK-NEXT:    [[TMP18:%.*]] = zext i1 [[TMP17]] to i129
+; CHECK-NEXT:    [[TMP19:%.*]] = or i129 [[TMP12]], [[TMP18]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP20:%.*]] = phi i129 [ [[TMP19]], [[ITOFP_SW_DEFAULT]] ], [ [[A]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i129 [[TMP20]] to i32
+; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP21]], 2
+; CHECK-NEXT:    [[TMP23:%.*]] = and i32 [[TMP22]], 1
+; CHECK-NEXT:    [[TMP24:%.*]] = zext i32 [[TMP23]] to i129
+; CHECK-NEXT:    [[TMP25:%.*]] = or i129 [[TMP20]], [[TMP24]]
+; CHECK-NEXT:    [[TMP26:%.*]] = add i129 [[TMP25]], 1
+; CHECK-NEXT:    [[TMP27:%.*]] = lshr i129 [[TMP26]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP26]], 67108864
+; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP27]] to i32
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP27]], 32
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i32
+; CHECK-NEXT:    br i1 [[TMP28]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP26]], 3
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP32]] to i32
+; CHECK-NEXT:    [[TMP34:%.*]] = lshr i129 [[TMP32]], 32
+; CHECK-NEXT:    [[TMP35:%.*]] = trunc i129 [[TMP34]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP36:%.*]] = add i32 [[TMP5]], -105
+; CHECK-NEXT:    [[TMP37:%.*]] = zext i32 [[TMP36]] to i129
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i129 [[A]], [[TMP37]]
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i129 [[TMP38]] to i32
+; CHECK-NEXT:    [[TMP40:%.*]] = lshr i129 [[TMP38]], 32
+; CHECK-NEXT:    [[TMP41:%.*]] = trunc i129 [[TMP40]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP42:%.*]] = phi i32 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP39]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP43:%.*]] = phi i32 [ [[TMP35]], [[ITOFP_IF_THEN20]] ], [ [[TMP31]], [[ITOFP_SW_EPILOG]] ], [ [[TMP41]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP44:%.*]] = phi i32 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP46:%.*]] = and i32 [[TMP45]], -2147483648
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i32 [[TMP44]], 23
+; CHECK-NEXT:    [[TMP48:%.*]] = add i32 [[TMP47]], 1065353216
+; CHECK-NEXT:    [[TMP49:%.*]] = and i32 [[TMP42]], 8388607
+; CHECK-NEXT:    [[TMP50:%.*]] = or i32 [[TMP49]], [[TMP46]]
+; CHECK-NEXT:    [[TMP51:%.*]] = or i32 [[TMP49]], [[TMP48]]
+; CHECK-NEXT:    [[TMP52:%.*]] = bitcast i32 [[TMP51]] to float
+; CHECK-NEXT:    [[TMP53:%.*]] = fptrunc float [[TMP52]] to half
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP54:%.*]] = phi half [ [[TMP53]], [[ITOFP_IF_END26]] ], [ 0xH0000, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret half [[TMP54]]
+;
+  %conv = uitofp i129 %a to half
+  ret half %conv
+}
+
+define float @ui129tofloat(i129 %a) {
+; CHECK-LABEL: @ui129tofloat(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[A]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i32 129, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i32 128, [[TMP5]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i32 [[TMP7]], 24
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i32 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 25, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i32 26, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[A]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i32 103, [[TMP5]]
+; CHECK-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i129
+; CHECK-NEXT:    [[TMP12:%.*]] = lshr i129 [[A]], [[TMP11]]
+; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[TMP5]], 26
+; CHECK-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i129
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i129 -1, [[TMP14]]
+; CHECK-NEXT:    [[TMP16:%.*]] = and i129 [[TMP15]], [[A]]
+; CHECK-NEXT:    [[TMP17:%.*]] = icmp ne i129 [[TMP16]], 0
+; CHECK-NEXT:    [[TMP18:%.*]] = zext i1 [[TMP17]] to i129
+; CHECK-NEXT:    [[TMP19:%.*]] = or i129 [[TMP12]], [[TMP18]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP20:%.*]] = phi i129 [ [[TMP19]], [[ITOFP_SW_DEFAULT]] ], [ [[A]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i129 [[TMP20]] to i32
+; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP21]], 2
+; CHECK-NEXT:    [[TMP23:%.*]] = and i32 [[TMP22]], 1
+; CHECK-NEXT:    [[TMP24:%.*]] = zext i32 [[TMP23]] to i129
+; CHECK-NEXT:    [[TMP25:%.*]] = or i129 [[TMP20]], [[TMP24]]
+; CHECK-NEXT:    [[TMP26:%.*]] = add i129 [[TMP25]], 1
+; CHECK-NEXT:    [[TMP27:%.*]] = lshr i129 [[TMP26]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP26]], 67108864
+; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP27]] to i32
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP27]], 32
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i32
+; CHECK-NEXT:    br i1 [[TMP28]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP26]], 3
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP32]] to i32
+; CHECK-NEXT:    [[TMP34:%.*]] = lshr i129 [[TMP32]], 32
+; CHECK-NEXT:    [[TMP35:%.*]] = trunc i129 [[TMP34]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP36:%.*]] = add i32 [[TMP5]], -105
+; CHECK-NEXT:    [[TMP37:%.*]] = zext i32 [[TMP36]] to i129
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i129 [[A]], [[TMP37]]
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i129 [[TMP38]] to i32
+; CHECK-NEXT:    [[TMP40:%.*]] = lshr i129 [[TMP38]], 32
+; CHECK-NEXT:    [[TMP41:%.*]] = trunc i129 [[TMP40]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP42:%.*]] = phi i32 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP39]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP43:%.*]] = phi i32 [ [[TMP35]], [[ITOFP_IF_THEN20]] ], [ [[TMP31]], [[ITOFP_SW_EPILOG]] ], [ [[TMP41]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP44:%.*]] = phi i32 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP46:%.*]] = and i32 [[TMP45]], -2147483648
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i32 [[TMP44]], 23
+; CHECK-NEXT:    [[TMP48:%.*]] = add i32 [[TMP47]], 1065353216
+; CHECK-NEXT:    [[TMP49:%.*]] = and i32 [[TMP42]], 8388607
+; CHECK-NEXT:    [[TMP50:%.*]] = or i32 [[TMP49]], [[TMP46]]
+; CHECK-NEXT:    [[TMP51:%.*]] = or i32 [[TMP49]], [[TMP48]]
+; CHECK-NEXT:    [[TMP52:%.*]] = bitcast i32 [[TMP51]] to float
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP53:%.*]] = phi float [ [[TMP52]], [[ITOFP_IF_END26]] ], [ 0.000000e+00, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret float [[TMP53]]
+;
+  %conv = uitofp i129 %a to float
+  ret float %conv
+}
+
+define double @ui129todouble(i129 %a) {
+; CHECK-LABEL: @ui129todouble(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[A]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i32 129, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i32 128, [[TMP5]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i32 [[TMP7]], 53
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i32 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 54, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i32 55, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[A]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i32 74, [[TMP5]]
+; CHECK-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i129
+; CHECK-NEXT:    [[TMP12:%.*]] = lshr i129 [[A]], [[TMP11]]
+; CHECK-NEXT:    [[TMP13:%.*]] = add i32 [[TMP5]], 55
+; CHECK-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i129
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i129 -1, [[TMP14]]
+; CHECK-NEXT:    [[TMP16:%.*]] = and i129 [[TMP15]], [[A]]
+; CHECK-NEXT:    [[TMP17:%.*]] = icmp ne i129 [[TMP16]], 0
+; CHECK-NEXT:    [[TMP18:%.*]] = zext i1 [[TMP17]] to i129
+; CHECK-NEXT:    [[TMP19:%.*]] = or i129 [[TMP12]], [[TMP18]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP20:%.*]] = phi i129 [ [[TMP19]], [[ITOFP_SW_DEFAULT]] ], [ [[A]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP21:%.*]] = trunc i129 [[TMP20]] to i32
+; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP21]], 2
+; CHECK-NEXT:    [[TMP23:%.*]] = and i32 [[TMP22]], 1
+; CHECK-NEXT:    [[TMP24:%.*]] = zext i32 [[TMP23]] to i129
+; CHECK-NEXT:    [[TMP25:%.*]] = or i129 [[TMP20]], [[TMP24]]
+; CHECK-NEXT:    [[TMP26:%.*]] = add i129 [[TMP25]], 1
+; CHECK-NEXT:    [[TMP27:%.*]] = lshr i129 [[TMP26]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP26]], 36028797018963968
+; CHECK-NEXT:    [[TMP28:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP27]] to i64
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP27]], 32
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i32
+; CHECK-NEXT:    br i1 [[TMP28]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP26]], 3
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP32]] to i64
+; CHECK-NEXT:    [[TMP34:%.*]] = lshr i129 [[TMP32]], 32
+; CHECK-NEXT:    [[TMP35:%.*]] = trunc i129 [[TMP34]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP36:%.*]] = add i32 [[TMP5]], -76
+; CHECK-NEXT:    [[TMP37:%.*]] = zext i32 [[TMP36]] to i129
+; CHECK-NEXT:    [[TMP38:%.*]] = shl i129 [[A]], [[TMP37]]
+; CHECK-NEXT:    [[TMP39:%.*]] = trunc i129 [[TMP38]] to i64
+; CHECK-NEXT:    [[TMP40:%.*]] = lshr i129 [[TMP38]], 32
+; CHECK-NEXT:    [[TMP41:%.*]] = trunc i129 [[TMP40]] to i32
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP42:%.*]] = phi i64 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP39]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP43:%.*]] = phi i32 [ [[TMP35]], [[ITOFP_IF_THEN20]] ], [ [[TMP31]], [[ITOFP_SW_EPILOG]] ], [ [[TMP41]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP44:%.*]] = phi i32 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[TMP1]] to i32
+; CHECK-NEXT:    [[TMP46:%.*]] = and i32 [[TMP45]], -2147483648
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i32 [[TMP44]], 20
+; CHECK-NEXT:    [[TMP48:%.*]] = add i32 [[TMP47]], 1072693248
+; CHECK-NEXT:    [[TMP49:%.*]] = and i32 [[TMP43]], 1048575
+; CHECK-NEXT:    [[TMP50:%.*]] = or i32 [[TMP49]], [[TMP46]]
+; CHECK-NEXT:    [[TMP51:%.*]] = or i32 [[TMP49]], [[TMP48]]
+; CHECK-NEXT:    [[TMP52:%.*]] = zext i32 [[TMP51]] to i64
+; CHECK-NEXT:    [[TMP53:%.*]] = shl i64 [[TMP52]], 32
+; CHECK-NEXT:    [[TMP54:%.*]] = and i64 [[TMP42]], 4294967295
+; CHECK-NEXT:    [[TMP55:%.*]] = or i64 [[TMP53]], [[TMP54]]
+; CHECK-NEXT:    [[TMP56:%.*]] = bitcast i64 [[TMP55]] to double
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP57:%.*]] = phi double [ [[TMP56]], [[ITOFP_IF_END26]] ], [ 0.000000e+00, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret double [[TMP57]]
+;
+  %conv = uitofp i129 %a to double
+  ret double %conv
+}
+
+define x86_fp80 @ui129tox86_fp80(i129 %a) {
+; CHECK-LABEL: @ui129tox86_fp80(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[A]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i129 129, [[TMP4]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i129 128, [[TMP4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i129 [[TMP7]], 113
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i129 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i129 114, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i129 115, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[A]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i129 14, [[TMP4]]
+; CHECK-NEXT:    [[TMP11:%.*]] = lshr i129 [[A]], [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = add i129 [[TMP4]], 115
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 -1, [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = and i129 [[TMP13]], [[A]]
+; CHECK-NEXT:    [[TMP15:%.*]] = icmp ne i129 [[TMP14]], 0
+; CHECK-NEXT:    [[TMP16:%.*]] = zext i1 [[TMP15]] to i129
+; CHECK-NEXT:    [[TMP17:%.*]] = or i129 [[TMP11]], [[TMP16]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[TMP17]], [[ITOFP_SW_DEFAULT]] ], [ [[A]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP19:%.*]] = trunc i129 [[TMP18]] to i32
+; CHECK-NEXT:    [[TMP20:%.*]] = lshr i32 [[TMP19]], 2
+; CHECK-NEXT:    [[TMP21:%.*]] = and i32 [[TMP20]], 1
+; CHECK-NEXT:    [[TMP22:%.*]] = zext i32 [[TMP21]] to i129
+; CHECK-NEXT:    [[TMP23:%.*]] = or i129 [[TMP18]], [[TMP22]]
+; CHECK-NEXT:    [[TMP24:%.*]] = add i129 [[TMP23]], 1
+; CHECK-NEXT:    [[TMP25:%.*]] = lshr i129 [[TMP24]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP24]], 41538374868278621028243970633760768
+; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP27:%.*]] = trunc i129 [[TMP25]] to i128
+; CHECK-NEXT:    [[TMP28:%.*]] = lshr i129 [[TMP25]], 32
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br i1 [[TMP26]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP24]], 3
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i128
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP30]], 32
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP6]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP34:%.*]] = add i129 [[TMP4]], 4294967280
+; CHECK-NEXT:    [[TMP35:%.*]] = shl i129 [[A]], [[TMP34]]
+; CHECK-NEXT:    [[TMP36:%.*]] = trunc i129 [[TMP35]] to i128
+; CHECK-NEXT:    [[TMP37:%.*]] = lshr i129 [[TMP35]], 32
+; CHECK-NEXT:    [[TMP38:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP39:%.*]] = phi i128 [ [[TMP31]], [[ITOFP_IF_THEN20]] ], [ [[TMP27]], [[ITOFP_SW_EPILOG]] ], [ [[TMP36]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP40:%.*]] = phi i64 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP38]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP41:%.*]] = phi i129 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[AND29:%.*]] = and i129 [[TMP1]], 9223372036854775808
+; CHECK-NEXT:    [[TMP42:%.*]] = shl i64 [[TMP40]], 48
+; CHECK-NEXT:    [[TMP43:%.*]] = add i64 [[TMP42]], 4611404543450677248
+; CHECK-NEXT:    [[TMP44:%.*]] = zext i64 [[TMP43]] to i128
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[AND29]] to i128
+; CHECK-NEXT:    [[TMP46:%.*]] = or i128 [[TMP45]], [[TMP44]]
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i128 [[TMP46]], 64
+; CHECK-NEXT:    [[TMP48:%.*]] = and i128 [[TMP39]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP49:%.*]] = or i128 [[TMP47]], [[TMP48]]
+; CHECK-NEXT:    [[TMP50:%.*]] = bitcast i128 [[TMP49]] to fp128
+; CHECK-NEXT:    [[TMP51:%.*]] = fptrunc fp128 [[TMP50]] to x86_fp80
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP52:%.*]] = phi x86_fp80 [ [[TMP51]], [[ITOFP_IF_END26]] ], [ 0xK00000000000000000000, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret x86_fp80 [[TMP52]]
+;
+  %conv = uitofp i129 %a to x86_fp80
+  ret x86_fp80 %conv
+}
+
+define fp128 @ui129tofp128(i129 %a) {
+; CHECK-LABEL: @ui129tofp128(
+; CHECK-NEXT:  itofp-entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp eq i129 [[A:%.*]], 0
+; CHECK-NEXT:    br i1 [[TMP0]], label [[ITOFP_RETURN:%.*]], label [[ITOFP_IF_END:%.*]]
+; CHECK:       itofp-if-end:
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i129 [[A]], 128
+; CHECK-NEXT:    [[TMP2:%.*]] = xor i129 [[TMP1]], [[A]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sub i129 [[TMP2]], [[TMP1]]
+; CHECK-NEXT:    [[TMP4:%.*]] = call i129 @llvm.ctlz.i129(i129 [[A]], i1 true)
+; CHECK-NEXT:    [[TMP5:%.*]] = trunc i129 [[TMP4]] to i32
+; CHECK-NEXT:    [[TMP6:%.*]] = sub i129 129, [[TMP4]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sub i129 128, [[TMP4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = icmp sgt i129 [[TMP7]], 113
+; CHECK-NEXT:    br i1 [[TMP8]], label [[ITOFP_IF_THEN4:%.*]], label [[ITOFP_IF_ELSE:%.*]]
+; CHECK:       itofp-if-then4:
+; CHECK-NEXT:    switch i129 [[TMP6]], label [[ITOFP_SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i129 114, label [[ITOFP_SW_BB:%.*]]
+; CHECK-NEXT:    i129 115, label [[ITOFP_SW_EPILOG:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       itofp-sw-bb:
+; CHECK-NEXT:    [[TMP9:%.*]] = shl i129 [[A]], 1
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-default:
+; CHECK-NEXT:    [[TMP10:%.*]] = sub i129 14, [[TMP4]]
+; CHECK-NEXT:    [[TMP11:%.*]] = lshr i129 [[A]], [[TMP10]]
+; CHECK-NEXT:    [[TMP12:%.*]] = add i129 [[TMP4]], 115
+; CHECK-NEXT:    [[TMP13:%.*]] = lshr i129 -1, [[TMP12]]
+; CHECK-NEXT:    [[TMP14:%.*]] = and i129 [[TMP13]], [[A]]
+; CHECK-NEXT:    [[TMP15:%.*]] = icmp ne i129 [[TMP14]], 0
+; CHECK-NEXT:    [[TMP16:%.*]] = zext i1 [[TMP15]] to i129
+; CHECK-NEXT:    [[TMP17:%.*]] = or i129 [[TMP11]], [[TMP16]]
+; CHECK-NEXT:    br label [[ITOFP_SW_EPILOG]]
+; CHECK:       itofp-sw-epilog:
+; CHECK-NEXT:    [[TMP18:%.*]] = phi i129 [ [[TMP17]], [[ITOFP_SW_DEFAULT]] ], [ [[A]], [[ITOFP_IF_THEN4]] ], [ [[TMP9]], [[ITOFP_SW_BB]] ]
+; CHECK-NEXT:    [[TMP19:%.*]] = trunc i129 [[TMP18]] to i32
+; CHECK-NEXT:    [[TMP20:%.*]] = lshr i32 [[TMP19]], 2
+; CHECK-NEXT:    [[TMP21:%.*]] = and i32 [[TMP20]], 1
+; CHECK-NEXT:    [[TMP22:%.*]] = zext i32 [[TMP21]] to i129
+; CHECK-NEXT:    [[TMP23:%.*]] = or i129 [[TMP18]], [[TMP22]]
+; CHECK-NEXT:    [[TMP24:%.*]] = add i129 [[TMP23]], 1
+; CHECK-NEXT:    [[TMP25:%.*]] = lshr i129 [[TMP24]], 2
+; CHECK-NEXT:    [[A3:%.*]] = and i129 [[TMP24]], 41538374868278621028243970633760768
+; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i129 [[A3]], 0
+; CHECK-NEXT:    [[TMP27:%.*]] = trunc i129 [[TMP25]] to i128
+; CHECK-NEXT:    [[TMP28:%.*]] = lshr i129 [[TMP25]], 32
+; CHECK-NEXT:    [[TMP29:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br i1 [[TMP26]], label [[ITOFP_IF_END26:%.*]], label [[ITOFP_IF_THEN20:%.*]]
+; CHECK:       itofp-if-then20:
+; CHECK-NEXT:    [[TMP30:%.*]] = lshr i129 [[TMP24]], 3
+; CHECK-NEXT:    [[TMP31:%.*]] = trunc i129 [[TMP30]] to i128
+; CHECK-NEXT:    [[TMP32:%.*]] = lshr i129 [[TMP30]], 32
+; CHECK-NEXT:    [[TMP33:%.*]] = trunc i129 [[TMP6]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-else:
+; CHECK-NEXT:    [[TMP34:%.*]] = add i129 [[TMP4]], 4294967280
+; CHECK-NEXT:    [[TMP35:%.*]] = shl i129 [[A]], [[TMP34]]
+; CHECK-NEXT:    [[TMP36:%.*]] = trunc i129 [[TMP35]] to i128
+; CHECK-NEXT:    [[TMP37:%.*]] = lshr i129 [[TMP35]], 32
+; CHECK-NEXT:    [[TMP38:%.*]] = trunc i129 [[TMP7]] to i64
+; CHECK-NEXT:    br label [[ITOFP_IF_END26]]
+; CHECK:       itofp-if-end26:
+; CHECK-NEXT:    [[TMP39:%.*]] = phi i128 [ [[TMP31]], [[ITOFP_IF_THEN20]] ], [ [[TMP27]], [[ITOFP_SW_EPILOG]] ], [ [[TMP36]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP40:%.*]] = phi i64 [ [[TMP33]], [[ITOFP_IF_THEN20]] ], [ [[TMP29]], [[ITOFP_SW_EPILOG]] ], [ [[TMP38]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[TMP41:%.*]] = phi i129 [ [[TMP6]], [[ITOFP_IF_THEN20]] ], [ [[TMP7]], [[ITOFP_SW_EPILOG]] ], [ [[TMP7]], [[ITOFP_IF_ELSE]] ]
+; CHECK-NEXT:    [[AND29:%.*]] = and i129 [[TMP1]], 9223372036854775808
+; CHECK-NEXT:    [[TMP42:%.*]] = shl i64 [[TMP40]], 48
+; CHECK-NEXT:    [[TMP43:%.*]] = add i64 [[TMP42]], 4611404543450677248
+; CHECK-NEXT:    [[TMP44:%.*]] = zext i64 [[TMP43]] to i128
+; CHECK-NEXT:    [[TMP45:%.*]] = trunc i129 [[AND29]] to i128
+; CHECK-NEXT:    [[TMP46:%.*]] = or i128 [[TMP45]], [[TMP44]]
+; CHECK-NEXT:    [[TMP47:%.*]] = shl i128 [[TMP46]], 64
+; CHECK-NEXT:    [[TMP48:%.*]] = and i128 [[TMP39]], 5192296858534827628530496329220095
+; CHECK-NEXT:    [[TMP49:%.*]] = or i128 [[TMP47]], [[TMP48]]
+; CHECK-NEXT:    [[TMP50:%.*]] = bitcast i128 [[TMP49]] to fp128
+; CHECK-NEXT:    br label [[ITOFP_RETURN]]
+; CHECK:       itofp-return:
+; CHECK-NEXT:    [[TMP51:%.*]] = phi fp128 [ [[TMP50]], [[ITOFP_IF_END26]] ], [ 0xL00000000000000000000000000000000, [[ITOFP_ENTRY:%.*]] ]
+; CHECK-NEXT:    ret fp128 [[TMP51]]
+;
+  %conv = uitofp i129 %a to fp128
+  ret fp128 %conv
+}

llvm/test/CodeGen/X86/fp-i129.ll

+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X64
+
+define i129 @fptosi_float(float %a) nounwind {
+; CHECK-LABEL: fptosi_float:
+; CHECK-NOT:     call
+  %res = fptosi float %a to i129
+  ret i129 %res
+}
+
+define i129 @fptosi_double(double %a) nounwind {
+; CHECK-LABEL: fptosi_double:
+; CHECK-NOT:     call
+  %res = fptosi double %a to i129
+  ret i129 %res
+}
+
+define i129 @fptosi_fp128(fp128 %a) nounwind {
+; CHECK-LABEL: fptosi_fp128:
+; CHECK-NOT:     call
+  %res = fptosi fp128 %a to i129
+  ret i129 %res
+}
+
+define i129 @fptoui_float(float %a) nounwind {
+; CHECK-LABEL: fptoui_float:
+; CHECK-NOT:     call
+  %res = fptoui float %a to i129
+  ret i129 %res
+}
+
+define i129 @fptoui_double(double %a) nounwind {
+; CHECK-LABEL: fptoui_double:
+; CHECK-NOT:     call
+  %res = fptoui double %a to i129
+  ret i129 %res
+}
+
+define i129 @fptoui_fp128(fp128 %a) nounwind {
+; CHECK-LABEL: fptoui_fp128:
+; CHECK-NOT:     call
+  %res = fptoui fp128 %a to i129
+  ret i129 %res
+}
+
+define float @sitofp_float(i129 %a) nounwind {
+; CHECK-LABEL: sitofp_float:
+; CHECK-NOT:     call
+  %res = sitofp i129 %a to float
+  ret float %res
+}
+
+define double @sitofp_double(i129 %a) nounwind {
+; CHECK-LABEL: sitofp_double:
+; CHECK-NOT:     call
+  %res = sitofp i129 %a to double
+  ret double %res
+}
+
+define fp128 @sitofp_fp128(i129 %a) nounwind {
+; CHECK-LABEL: sitofp_fp128:
+; CHECK-NOT:     call
+  %res = sitofp i129 %a to fp128
+  ret fp128 %res
+}
+
+define float @uitofp_float(i129 %a) nounwind {
+; CHECK-LABEL: uitofp_float:
+; CHECK-NOT:     call
+  %res = uitofp i129 %a to float
+  ret float %res
+}
+
+define double @uitofp_double(i129 %a) nounwind {
+; CHECK-LABEL: uitofp_double:
+; CHECK-NOT:     call
+  %res = uitofp i129 %a to double
+  ret double %res
+}
+
+define fp128 @uitofp_fp128(i129 %a) nounwind {
+; CHECK-LABEL: uitofp_fp128:
+; CHECK-NOT:     call
+  %res = uitofp i129 %a to fp128
+  ret fp128 %res
+}
+
+; higher sizes
+define i257 @fptosi257_double(double %a) nounwind {
+; CHECK-LABEL: fptosi257_double:
+; CHECK-NOT:     call
+  %res = fptosi double %a to i257
+  ret i257 %res
+}
+
+; half tests
+define i257 @fptosi_half(half %a) nounwind {
+; X86-LABEL: fptosi_half:
+; X86: __gnu_h2f_ieee
+;
+; X64-LABEL: fptosi_half:
+; X64: __extendhfsf2
+  %res = fptosi half %a to i257
+  ret i257 %res
+}
+
+define half @uitofp_half(i257 %a) nounwind {
+; X86-LABEL: uitofp_half:
+; X86: __gnu_f2h_ieee
+;
+; X64-LABEL: uitofp_half:
+; X64: __truncsfhf2
+  %res = uitofp i257 %a to half
+  ret half %res
+}
+
+; x86_fp80 tests
+define i257 @fptoui_x86_fp80(x86_fp80 %a) nounwind {
+; CHECK-LABEL: fptoui_x86_fp80:
+; CHECK: __extendxftf2
+  %res = fptoui x86_fp80 %a to i257
+  ret i257 %res
+}
+
+define x86_fp80 @sitofp_x86_fp80(i257 %a) nounwind {
+; CHECK-LABEL: sitofp_x86_fp80:
+; CHECK: __trunctfxf2
+  %res = sitofp i257 %a to x86_fp80
+  ret x86_fp80 %res
+}

llvm/test/CodeGen/X86/opt-pipeline.ll

 ; CHECK-NEXT: Create Garbage Collector Module Metadata
 ; CHECK-NEXT: Machine Branch Probability Analysis
 ; CHECK-NEXT: Default Regalloc Eviction Advisor
 ; CHECK-NEXT: Default Regalloc Priority Advisor
 ; CHECK-NEXT:   ModulePass Manager
 ; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
 ; CHECK-NEXT:     FunctionPass Manager
 ; CHECK-NEXT:       Expand large div/rem
+; CHECK-NEXT:       Expand large fp convert
 ; CHECK-NEXT:       Expand Atomic instructions
 ; CHECK-NEXT:       Lower AMX intrinsics
 ; CHECK-NEXT:       Lower AMX type for load/store
 ; CHECK-NEXT:       Module Verifier
 ; CHECK-NEXT:       Dominator Tree Construction
 ; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
 ; CHECK-NEXT:       Natural Loop Information
 ; CHECK-NEXT:       Canonicalize natural loops

llvm/tools/opt/opt.cpp

std::vector<StringRef> PassNameExact = {
       "generic-to-nvvm",      "expandmemcmp",
       "loop-reduce",          "lower-amx-type",
       "pre-amx-config",       "lower-amx-intrinsics",
       "polyhedral-info",      "print-polyhedral-info",
       "replace-with-veclib",  "jmc-instrument",
       "dot-regions",          "dot-regions-only",
       "view-regions",         "view-regions-only",
       "select-optimize",      "expand-large-div-rem",
-      "structurizecfg",       "fix-irreducible"};
+      "structurizecfg",       "fix-irreducible",
+      "expand-large-fp-convert"};
   for (const auto &P : PassNamePrefix)
     if (Pass.startswith(P))
       return true;
   for (const auto &P : PassNameContain)
     if (Pass.contains(P))
       return true;
   return llvm::is_contained(PassNameExact, Pass);
 }
int main(int argc, char **argv) {
   initializeIPO(Registry);
   initializeAnalysis(Registry);
   initializeTransformUtils(Registry);
   initializeInstCombine(Registry);
   initializeTarget(Registry);
   // For codegen passes, only passes that do IR to IR transformation are
   // supported.
   initializeExpandLargeDivRemLegacyPassPass(Registry);
+  initializeExpandLargeFpConvertLegacyPassPass(Registry);
   initializeExpandMemCmpPassPass(Registry);
   initializeScalarizeMaskedMemIntrinLegacyPassPass(Registry);
   initializeSelectOptimizePass(Registry);
   initializeCodeGenPreparePass(Registry);
   initializeAtomicExpandPass(Registry);
   initializeRewriteSymbolsLegacyPassPass(Registry);
   initializeWinEHPreparePass(Registry);
   initializeDwarfEHPrepareLegacyPassPass(Registry);