[ADT] Add APInt::isInvertOf

[serge-sans-paille]

Summary

The pattern is frequent enough to have its own implementation, which is
both more explicit and (slightly) faster than the default idiom.

Also use it to implement a faster llvm::KnownBits::isConstant() that doesn't
rely on popcnt.

[serge-sans-paille]

Associated compile-time link: http://llvm-compile-time-tracker.com/compare.php?from=9708d88017d0c9adaea65a4f5a5b589b67f292e2&to=b92e36012cabfeafadc87e2e960779f01aadfdc2&stat=instructions
Nothing to brag about.

[nikic]

Do we get a benefit is we change only the KnownBits::isConstant implementation to do Zero == ~One?

In terms of readability, I find X == ~Y clearer than X.isInvertOf(Y), so I personally wouldn't do this without some noticeable impact. (Though I'm not particularly opposed either.)

llvm/include/llvm/ADT/APInt.h

931

I think this will cause shift UB for zero-width APInts (yes, those are a thing now ...)

[serge-sans-paille]

In D136323#3873957, @nikic wrote:

Do we get a benefit is we change only the KnownBits::isConstant implementation to do Zero == ~One?

I've checked and the answer is no (at least as long as popcnt is available. (One | Zero).countPopulation() == getBitWidth() also is an alternative but it's not significantly faster.

In terms of readability, I find X == ~Y clearer than X.isInvertOf(Y), so I personally wouldn't do this without some noticeable impact. (Though I'm not particularly opposed either.)

ok, let's forget about it!

llvm/include/llvm/ADT/APInt.h

931

indeed

llvm/include/llvm/ADT/APInt.h

#endif
   }
 
   /// Rotate left by rotateAmt.
   APInt rotl(const APInt &rotateAmt) const;
 
   /// Rotate right by rotateAmt.
   APInt rotr(const APInt &rotateAmt) const;
 
+  /// Evaluates LHS == ~RHS.
+  bool isInvertOf(const APInt &RHS) const {
+    if (isSingleWord()) {
+      uint64_t Mask = (WORDTYPE_MAX >> (APINT_BITS_PER_WORD - BitWidth));
+      return U.VAL == (~RHS.U.VAL & Mask);
+    }
+    return isInvertOfSlowCase(RHS);
+  }
+
   /// Concatenate the bits from "NewLSB" onto the bottom of *this.  This is
   /// equivalent to:
   ///   (this->zext(NewWidth) << NewLSB.getBitWidth()) | NewLSB.zext(NewWidth)
   APInt concat(const APInt &NewLSB) const {
     /// If the result will be small, then both the merged values are small.
     unsigned NewWidth = getBitWidth() + NewLSB.getBitWidth();
     if (NewWidth <= APINT_BITS_PER_WORD)
       return APInt(NewWidth, (U.VAL << NewLSB.getBitWidth()) | NewLSB.U.VAL);
private:
 
   /// out-of-line slow case for ashr.
   void ashrSlowCase(unsigned ShiftAmt);
 
   /// out-of-line slow case for operator=
   void assignSlowCase(const APInt &RHS);
 
   /// out-of-line slow case for operator==
+  bool isInvertOfSlowCase(const APInt &RHS) const LLVM_READONLY;
+
+  /// out-of-line slow case for operator==
   bool equalSlowCase(const APInt &RHS) const LLVM_READONLY;
 
   /// out-of-line slow case for countLeadingZeros
   unsigned countLeadingZerosSlowCase() const LLVM_READONLY;
 
   /// out-of-line slow case for countLeadingOnes.
   unsigned countLeadingOnesSlowCase() const LLVM_READONLY;
 

llvm/include/llvm/Support/KnownBits.h

public:
   }
 
   /// Returns true if there is conflicting information.
   bool hasConflict() const { return Zero.intersects(One); }
 
   /// Returns true if we know the value of all bits.
   bool isConstant() const {
     assert(!hasConflict() && "KnownBits conflict!");
-    return Zero.countPopulation() + One.countPopulation() == getBitWidth();
+    return Zero.isInvertOf(One);
   }
 
   /// Returns the value when all bits have a known value. This just returns One
   /// with a protective assertion.
   const APInt &getConstant() const {
     assert(isConstant() && "Can only get value when all bits are known");
     return One;
   }

llvm/lib/Analysis/InstructionSimplify.cpp

if (Value *V =
       return V;
   }
 
   // (A & C1)|(B & C2)
   Value *A, *B;
   const APInt *C1, *C2;
   if (match(Op0, m_And(m_Value(A), m_APInt(C1))) &&
       match(Op1, m_And(m_Value(B), m_APInt(C2)))) {
-    if (*C1 == ~*C2) {
+    if (C1->isInvertOf(*C2)) {
       // (A & C1)|(B & C2)
       // If we have: ((V + N) & C1) | (V & C2)
       // .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0
       // replace with V+N.
       Value *N;
       if (C2->isMask() && // C2 == 0+1+
           match(A, m_c_Add(m_Specific(B), m_Value(N)))) {
         // Add commutes, try both ways.

 /// integer comparison where one operand of the compare is a constant.
 static Value *simplifySelectBitTest(Value *TrueVal, Value *FalseVal, Value *X,
                                     const APInt *Y, bool TrueWhenUnset) {
   const APInt *C;
 
   // (X & Y) == 0 ? X & ~Y : X  --> X
   // (X & Y) != 0 ? X & ~Y : X  --> X & ~Y
   if (FalseVal == X && match(TrueVal, m_And(m_Specific(X), m_APInt(C))) &&
-      *Y == ~*C)
+      Y->isInvertOf(*C))
     return TrueWhenUnset ? FalseVal : TrueVal;
 
   // (X & Y) == 0 ? X : X & ~Y  --> X & ~Y
   // (X & Y) != 0 ? X : X & ~Y  --> X
   if (TrueVal == X && match(FalseVal, m_And(m_Specific(X), m_APInt(C))) &&
-      *Y == ~*C)
+      Y->isInvertOf(*C))
     return TrueWhenUnset ? FalseVal : TrueVal;
 
   if (Y->isPowerOf2()) {
     // (X & Y) == 0 ? X | Y : X  --> X | Y
     // (X & Y) != 0 ? X | Y : X  --> X
     if (FalseVal == X && match(TrueVal, m_Or(m_Specific(X), m_APInt(C))) &&
         *Y == *C)
       return TrueWhenUnset ? TrueVal : FalseVal;

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

if (N0.getOpcode() == ISD::SETCC) {
     // a chance to reverse the transform if they want to do that. Also, it is
     // unlikely that the pattern would be formed late, so it's probably not
     // worth going through the other checks.
     if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) &&
         CC == ISD::SETUGT && N0.hasOneUse() && isAllOnesConstant(N1) &&
         N2.getOpcode() == ISD::ADD && Cond0 == N2.getOperand(0)) {
       auto *C = dyn_cast<ConstantSDNode>(N2.getOperand(1));
       auto *NotC = dyn_cast<ConstantSDNode>(Cond1);
-      if (C && NotC && C->getAPIntValue() == ~NotC->getAPIntValue()) {
+      if (C && NotC && C->getAPIntValue().isInvertOf(NotC->getAPIntValue())) {
         // select (setcc Cond0, ~C, ugt), -1, (add Cond0, C) -->
         // uaddo Cond0, C; select uaddo.1, -1, uaddo.0
         //
         // The IR equivalent of this transform would have this form:
         //   %a = add %x, C
         //   %c = icmp ugt %x, ~C
         //   %r = select %c, -1, %a
         //   =>
if (hasOperation(ISD::UADDSAT, VT)) {
         if (OpRHS.getOpcode() == CondRHS.getOpcode() &&
             (OpRHS.getOpcode() == ISD::BUILD_VECTOR ||
              OpRHS.getOpcode() == ISD::SPLAT_VECTOR) &&
             CondLHS == OpLHS) {
           // If the RHS is a constant we have to reverse the const
           // canonicalization.
           // x >= ~C ? x+C : ~0 --> uaddsat x, C
           auto MatchUADDSAT = [](ConstantSDNode *Op, ConstantSDNode *Cond) {
-            return Cond->getAPIntValue() == ~Op->getAPIntValue();
+            return Cond->getAPIntValue().isInvertOf(Op->getAPIntValue());
           };
           if (SatCC == ISD::SETULE &&
               ISD::matchBinaryPredicate(OpRHS, CondRHS, MatchUADDSAT))
             return DAG.getNode(ISD::UADDSAT, DL, VT, OpLHS, OpRHS);
         }
       }
     }
 
if (auto *ValueOnZeroC = dyn_cast<ConstantSDNode>(ValueOnZero)) {
           return DAG.getNode(ISD::CTLZ, DL, VT, N0);
       }
     }
   }
 
   // Fold select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C
   // Fold select_cc setlt X, 0, C, ~C -> xor (ashr X, BW-1), ~C
   if (!NotExtCompare && N1C && N2C && N3C &&
-      N2C->getAPIntValue() == ~N3C->getAPIntValue() &&
+      N2C->getAPIntValue().isInvertOf(N3C->getAPIntValue()) &&
       ((N1C->isAllOnes() && CC == ISD::SETGT) ||
        (N1C->isZero() && CC == ISD::SETLT)) &&
       !TLI.shouldAvoidTransformToShift(VT, CmpOpVT.getScalarSizeInBits() - 1)) {
     SDValue ASR = DAG.getNode(
         ISD::SRA, DL, CmpOpVT, N0,
         DAG.getConstant(CmpOpVT.getScalarSizeInBits() - 1, DL, CmpOpVT));
     return DAG.getNode(ISD::XOR, DL, VT, DAG.getSExtOrTrunc(ASR, DL, VT),
                        DAG.getSExtOrTrunc(CC == ISD::SETLT ? N3 : N2, DL, VT));

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

if (ConstantSDNode *RHSC = isConstOrConstSplat(Op1)) {
         return true;
 
       // Bitwise-not (xor X, -1) is a special case: we don't usually shrink its
       // constant, but if this 'and' is only clearing bits that were just set by
       // the xor, then this 'and' can be eliminated by shrinking the mask of
       // the xor. For example, for a 32-bit X:
       // and (xor (srl X, 31), -1), 1 --> xor (srl X, 31), 1
       if (isBitwiseNot(Op0) && Op0.hasOneUse() &&
-          LHSKnown.One == ~RHSC->getAPIntValue()) {
+          LHSKnown.One.isInvertOf(RHSC->getAPIntValue())) {
         SDValue Xor = TLO.DAG.getNode(ISD::XOR, dl, VT, Op0.getOperand(0), Op1);
         return TLO.CombineTo(Op, Xor);
       }
     }
 
     // AND(INSERT_SUBVECTOR(C,X,I),M) -> INSERT_SUBVECTOR(AND(C,M),X,I)
     // iff 'C' is Undef/Constant and AND(X,M) == X (for DemandedBits).
     if (Op0.getOpcode() == ISD::INSERT_SUBVECTOR &&

llvm/lib/Support/APInt.cpp

if (isSingleWord()) {
     U.VAL *= RHS;
   } else {
     unsigned NumWords = getNumWords();
     tcMultiplyPart(U.pVal, U.pVal, RHS, 0, NumWords, NumWords, false);
   }
   return clearUnusedBits();
 }
 
+bool APInt::isInvertOfSlowCase(const APInt &RHS) const {
+  WordType *lhs = U.pVal, *rhs = RHS.U.pVal;
+  unsigned WordBits = ((BitWidth - 1) % APINT_BITS_PER_WORD) + 1;
+  size_t e = getNumWords() - 1;
+  for (size_t i = 0; i != e; ++i)
+    if (lhs[i] != ~rhs[i])
+      return false;
+  uint64_t Mask = WORDTYPE_MAX >> (APINT_BITS_PER_WORD - WordBits);
+  return lhs[e] == (~rhs[e] & Mask);
+}
+
 bool APInt::equalSlowCase(const APInt &RHS) const {
   return std::equal(U.pVal, U.pVal + getNumWords(), RHS.U.pVal);
 }
 
 int APInt::compare(const APInt& RHS) const {
   assert(BitWidth == RHS.BitWidth && "Bit widths must be same for comparison");
   if (isSingleWord())
     return U.VAL < RHS.U.VAL ? -1 : U.VAL > RHS.U.VAL;

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

static bool tryBitfieldInsertOpFromOr(SDNode *N, const APInt &UsefulBits,
   // Mask0Imm and ~Mask1Imm are equivalent and one of the MaskImms is a shifted
   // mask (e.g., 0x000ffff0).
   uint64_t Mask0Imm, Mask1Imm;
   SDValue And0 = N->getOperand(0);
   SDValue And1 = N->getOperand(1);
   if (And0.hasOneUse() && And1.hasOneUse() &&
       isOpcWithIntImmediate(And0.getNode(), ISD::AND, Mask0Imm) &&
       isOpcWithIntImmediate(And1.getNode(), ISD::AND, Mask1Imm) &&
-      APInt(BitWidth, Mask0Imm) == ~APInt(BitWidth, Mask1Imm) &&
+      APInt(BitWidth, Mask0Imm).isInvertOf(APInt(BitWidth, Mask1Imm)) &&
       (isShiftedMask(Mask0Imm, VT) || isShiftedMask(Mask1Imm, VT))) {
 
     // ORR is commutative, so canonicalize to the form 'or (and X, Mask0Imm),
     // (and Y, Mask1Imm)' where Mask1Imm is the shifted mask masking off the
     // bits to be inserted.
     if (isShiftedMask(Mask0Imm, VT)) {
       std::swap(And0, And1);
       std::swap(Mask0Imm, Mask1Imm);

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

if (LHS.getValueType().isInteger()) {
     } else if (CTVal && CFVal) {
       const int64_t TrueVal = CTVal->getSExtValue();
       const int64_t FalseVal = CFVal->getSExtValue();
       bool Swap = false;
 
       // If both TVal and FVal are constants, see if FVal is the
       // inverse/negation/increment of TVal and generate a CSINV/CSNEG/CSINC
       // instead of a CSEL in that case.
-      if (TrueVal == ~FalseVal) {
+      if (TrueVal.isInvertOf(FalseVal)) {
         Opcode = AArch64ISD::CSINV;
       } else if (FalseVal > std::numeric_limits<int64_t>::min() &&
                  TrueVal == -FalseVal) {
         Opcode = AArch64ISD::CSNEG;
       } else if (TVal.getValueType() == MVT::i32) {
         // If our operands are only 32-bit wide, make sure we use 32-bit
         // arithmetic for the check whether we can use CSINC. This ensures that
         // the addition in the check will wrap around properly in case there is

llvm/lib/Target/Mips/MipsSEISelLowering.cpp

if (Op0->getOpcode() == ISD::AND && Op1->getOpcode() == ISD::AND) {
     // Op1Op0, or Op1Op1. Keep track of the Cond, IfSet, and IfClr nodes, while
     // looking.
     // IfClr will be set if we find a valid match.
     if (isVSplat(Op0Op0, Mask, IsLittleEndian)) {
       Cond = Op0Op0;
       IfSet = Op0Op1;
 
       if (isVSplat(Op1Op0, InvMask, IsLittleEndian) &&
-          Mask.getBitWidth() == InvMask.getBitWidth() && Mask == ~InvMask)
+          Mask.getBitWidth() == InvMask.getBitWidth() &&
+          Mask.isInvertOf(InvMask))
         IfClr = Op1Op1;
       else if (isVSplat(Op1Op1, InvMask, IsLittleEndian) &&
-               Mask.getBitWidth() == InvMask.getBitWidth() && Mask == ~InvMask)
+               Mask.getBitWidth() == InvMask.getBitWidth() &&
+               Mask.isInvertOf(InvMask))
         IfClr = Op1Op0;
 
       IsConstantMask = true;
     }
 
     // If IfClr is not yet set, and Op0Op1 is an appropriate mask, try the same
     // thing again using this mask.
     // IfClr will be set if we find a valid match.
     if (!IfClr.getNode() && isVSplat(Op0Op1, Mask, IsLittleEndian)) {
       Cond = Op0Op1;
       IfSet = Op0Op0;
 
       if (isVSplat(Op1Op0, InvMask, IsLittleEndian) &&
-          Mask.getBitWidth() == InvMask.getBitWidth() && Mask == ~InvMask)
+          Mask.getBitWidth() == InvMask.getBitWidth() &&
+          Mask.isInvertOf(InvMask))
         IfClr = Op1Op1;
       else if (isVSplat(Op1Op1, InvMask, IsLittleEndian) &&
-               Mask.getBitWidth() == InvMask.getBitWidth() && Mask == ~InvMask)
+               Mask.getBitWidth() == InvMask.getBitWidth() &&
+               Mask.isInvertOf(InvMask))
         IfClr = Op1Op0;
 
       IsConstantMask = true;
     }
 
     // If IfClr is not yet set, try looking for a non-constant match.
     // IfClr will be set if we find a valid match amongst the eight
     // possibilities.

llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp

static Value *checkForNegativeOperand(BinaryOperator &I,
   if (match(LHS, m_Add(m_Value(X), m_One()))) {
     // if XOR on other side, swap
     if (match(RHS, m_Xor(m_Value(Y), m_APInt(C1))))
       std::swap(X, RHS);
 
     if (match(X, m_Xor(m_Value(Y), m_APInt(C1)))) {
       // X = XOR(Y, C1), Y = OR(Z, C2), C2 = NOT(C1) ==> X == NOT(AND(Z, C1))
       // ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, AND(Z, C1))
-      if (match(Y, m_Or(m_Value(Z), m_APInt(C2))) && (*C2 == ~(*C1))) {
+      if (match(Y, m_Or(m_Value(Z), m_APInt(C2))) && (C2->isInvertOf(*C1))) {
         Value *NewAnd = Builder.CreateAnd(Z, *C1);
         return Builder.CreateSub(RHS, NewAnd, "sub");
       } else if (match(Y, m_And(m_Value(Z), m_APInt(C2))) && (*C1 == *C2)) {
         // X = XOR(Y, C1), Y = AND(Z, C2), C2 == C1 ==> X == NOT(OR(Z, ~C1))
         // ADD(ADD(X, 1), RHS) == ADD(X, ADD(RHS, 1)) == SUB(RHS, OR(Z, ~C1))
         Value *NewOr = Builder.CreateOr(Z, ~(*C1));
         return Builder.CreateSub(RHS, NewOr, "sub");
       }
static Instruction *foldToUnsignedSaturatedAdd(BinaryOperator &I) {
   Value *X, *Y;
   if (match(&I, m_c_Add(m_c_UMin(m_Value(X), m_Not(m_Value(Y))),
                         m_Deferred(Y))))
     return CallInst::Create(getUAddSat(), { X, Y });
 
   // add (umin X, ~C), C --> uaddsat X, C
   const APInt *C, *NotC;
   if (match(&I, m_Add(m_UMin(m_Value(X), m_APInt(NotC)), m_APInt(C))) &&
-      *C == ~*NotC)
+      C->isInvertOf(*NotC))
     return CallInst::Create(getUAddSat(), { X, ConstantInt::get(Ty, *C) });
 
   return nullptr;
 }
 
 Instruction *InstCombinerImpl::
     canonicalizeCondSignextOfHighBitExtractToSignextHighBitExtract(
         BinaryOperator &I) {

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
   Value *A, *B, *C, *D;
   if (match(Op0, m_And(m_Value(A), m_Value(C))) &&
       match(Op1, m_And(m_Value(B), m_Value(D)))) {
 
     // (A & C0) | (B & C1)
     const APInt *C0, *C1;
     if (match(C, m_APInt(C0)) && match(D, m_APInt(C1))) {
       Value *X;
-      if (*C0 == ~*C1) {
+      if (C0->isInvertOf(*C1)) {
         // ((X | B) & MaskC) | (B & ~MaskC) -> (X & MaskC) | B
         if (match(A, m_c_Or(m_Value(X), m_Specific(B))))
           return BinaryOperator::CreateOr(Builder.CreateAnd(X, *C0), B);
         // (A & MaskC) | ((X | A) & ~MaskC) -> (X & ~MaskC) | A
         if (match(B, m_c_Or(m_Specific(A), m_Value(X))))
           return BinaryOperator::CreateOr(Builder.CreateAnd(X, *C1), A);
 
         // ((X ^ B) & MaskC) | (B & ~MaskC) -> (X & MaskC) ^ B

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

if (!Cmp.isEquality() && XorC->isMaxSignedValue()) {
       Pred = Cmp.getSwappedPredicate(Pred);
       return new ICmpInst(Pred, X, ConstantInt::get(X->getType(), C ^ *XorC));
     }
   }
 
   // Mask constant magic can eliminate an 'xor' with unsigned compares.
   if (Pred == ICmpInst::ICMP_UGT) {
     // (xor X, ~C) >u C --> X <u ~C (when C+1 is a power of 2)
-    if (*XorC == ~C && (C + 1).isPowerOf2())
+    if (XorC->isInvertOf(C) && (C + 1).isPowerOf2())
       return new ICmpInst(ICmpInst::ICMP_ULT, X, Y);
     // (xor X, C) >u C --> X >u C (when C+1 is a power of 2)
     if (*XorC == C && (C + 1).isPowerOf2())
       return new ICmpInst(ICmpInst::ICMP_UGT, X, Y);
   }
   if (Pred == ICmpInst::ICMP_ULT) {
     // (xor X, -C) <u C --> X >u ~C (when C is a power of 2)
     if (*XorC == -C && C.isPowerOf2())

llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

static Instruction *foldSetClearBits(SelectInst &Sel,
   Value *T = Sel.getTrueValue();
   Value *F = Sel.getFalseValue();
   Type *Ty = Sel.getType();
   Value *X;
   const APInt *NotC, *C;
 
   // Cond ? (X & ~C) : (X | C) --> (X & ~C) | (Cond ? 0 : C)
   if (match(T, m_And(m_Value(X), m_APInt(NotC))) &&
-      match(F, m_OneUse(m_Or(m_Specific(X), m_APInt(C)))) && *NotC == ~(*C)) {
+      match(F, m_OneUse(m_Or(m_Specific(X), m_APInt(C)))) &&
+      NotC->isInvertOf(*C)) {
     Constant *Zero = ConstantInt::getNullValue(Ty);
     Constant *OrC = ConstantInt::get(Ty, *C);
     Value *NewSel = Builder.CreateSelect(Cond, Zero, OrC, "masksel", &Sel);
     return BinaryOperator::CreateOr(T, NewSel);
   }
 
   // Cond ? (X | C) : (X & ~C) --> (X & ~C) | (Cond ? C : 0)
   if (match(F, m_And(m_Value(X), m_APInt(NotC))) &&
-      match(T, m_OneUse(m_Or(m_Specific(X), m_APInt(C)))) && *NotC == ~(*C)) {
+      match(T, m_OneUse(m_Or(m_Specific(X), m_APInt(C)))) &&
+      NotC->isInvertOf(*C)) {
     Constant *Zero = ConstantInt::getNullValue(Ty);
     Constant *OrC = ConstantInt::get(Ty, *C);
     Value *NewSel = Builder.CreateSelect(Cond, OrC, Zero, "masksel", &Sel);
     return BinaryOperator::CreateOr(F, NewSel);
   }
 
   return nullptr;
 }
static Value *canonicalizeSaturatedAdd(ICmpInst *Cmp, Value *TVal, Value *FVal,
   // Match unsigned saturated add with constant.
   Value *Cmp0 = Cmp->getOperand(0);
   Value *Cmp1 = Cmp->getOperand(1);
   ICmpInst::Predicate Pred = Cmp->getPredicate();
   Value *X;
   const APInt *C, *CmpC;
   if (Pred == ICmpInst::ICMP_ULT &&
       match(TVal, m_Add(m_Value(X), m_APInt(C))) && X == Cmp0 &&
-      match(FVal, m_AllOnes()) && match(Cmp1, m_APInt(CmpC)) && *CmpC == ~*C) {
+      match(FVal, m_AllOnes()) && match(Cmp1, m_APInt(CmpC)) &&
+      CmpC->isInvertOf(*C)) {
     // (X u< ~C) ? (X + C) : -1 --> uadd.sat(X, C)
     return Builder.CreateBinaryIntrinsic(
         Intrinsic::uadd_sat, X, ConstantInt::get(X->getType(), *C));
   }
 
   // Match unsigned saturated add of 2 variables with an unnecessary 'not'.
   // There are 8 commuted variants.
   // Canonicalize -1 (saturated result) to true value of the select.

llvm/unittests/ADT/APIntTest.cpp

TEST(APIntTest, LeftShift) {
   EXPECT_EQ(255U, i256.countTrailingZeros());
   EXPECT_EQ(1U, i256.countPopulation());
 
   // Ensure we handle large shifts of multi-word.
   const APInt neg_one(128, static_cast<uint64_t>(-1), true);
   EXPECT_EQ(0, neg_one.shl(128));
 }
 
+TEST(APIntTest, isInvertOf) {
+  for (auto BitWidth : {8, 17, 32, 53, 64, 122, 128}) {
+    APInt in_1(BitWidth, 4);
+    APInt in_2(BitWidth, 53);
+    EXPECT_TRUE(in_1.isInvertOf(~in_1));
+    EXPECT_TRUE((~in_1).isInvertOf(in_1));
+    EXPECT_FALSE(in_1.isInvertOf(in_1));
+    EXPECT_FALSE(in_1.isInvertOf(in_2));
+  }
+}
+
 TEST(APIntTest, isSubsetOf) {
   APInt i32_1(32, 1);
   APInt i32_2(32, 2);
   APInt i32_3(32, 3);
   EXPECT_FALSE(i32_3.isSubsetOf(i32_1));
   EXPECT_TRUE(i32_1.isSubsetOf(i32_3));
   EXPECT_FALSE(i32_2.isSubsetOf(i32_1));
   EXPECT_FALSE(i32_1.isSubsetOf(i32_2));