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[RISCV] Enable isTruncateFree in SDAG for i64->i32 on rv64.
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Authored by craig.topper on Aug 12 2022, 4:54 PM.

Details

Summary

We have a good selection of W instructions, so promoting a truncated
value back to i64 is often free.

This appears to be a net code size reduction on SPECINT2006.

This has been split from D130397 as one of the patches needed to
complete that.

Diff Detail

Event Timeline

craig.topper created this revision.Aug 12 2022, 4:54 PM
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craig.topper requested review of this revision.Aug 12 2022, 4:54 PM
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jrtc27 added inline comments.Aug 12 2022, 5:25 PM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1107

Is there a reason they *shouldn't* match? Having them differ for simple types like i64->i32 is rather surprising.

llvm/test/CodeGen/RISCV/trunc-free.ll
10

%x is unused

craig.topper added inline comments.Aug 12 2022, 6:33 PM
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
1107

Probably not. Just need to do more review of the callers and check the generated code. So I’d like to do it in a different patch.

llvm/test/CodeGen/RISCV/trunc-free.ll
10

Thanks. I went through a couple iterations.

reames accepted this revision.Aug 15 2022, 8:05 AM

LGTM. I'm not deeply convinced this is the right heuristic long term, but it's a reasonable one and we can revisit if needed.

This revision is now accepted and ready to land.Aug 15 2022, 8:05 AM