We didn't implement RISCVELFStreamer::reset and cause some very strange
section output for attribute section...just reference D15950 to see how
ARM implement that.
Details
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
llvm/test/MC/RISCV/twice.ll | ||
---|---|---|
6–7 |
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | ||
---|---|---|
236 | RTS should be omitted. | |
llvm/test/MC/RISCV/twice.ll | ||
2 | In some directories, the ## style is used to make comments stand out from RUN/CHECK lines. MC/RISCV. It will also make update_*checks.py's job easy. I feel that CodeGen/RISCV may be more suitable but I can be persuaded that MC/RISCV is fine. | |
11 |
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | ||
---|---|---|
236 | MCTargetStreamer didn't provide reset, that's provided by RISCVTargetStreamer. |
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | ||
---|---|---|
236 | My comment is more about: defining a variable is unnecessary. |
What does this comment achieve?