[RISCV] Fix state persistence bugs (PR55548)

[kito-cheng]

Summary

We didn't implement RISCVELFStreamer::reset and cause some very strange
section output for attribute section...just reference D15950 to see how
ARM implement that.

[jrtc27]

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp

234

What does this comment achieve?

llvm/test/MC/RISCV/twice.ll

22

Use -mtriple=riscv64 in the llc command and drop these two lines?

[kito-cheng]

Changes:

• Address @jrtc27's comment.

[jrtc27]

llvm/test/MC/RISCV/twice.ll

7–8

[kito-cheng]

Changes:

• Refine testcase.

[MaskRay]

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp

236

RTS should be omitted.

llvm/test/MC/RISCV/twice.ll

2

In some directories, the ## style is used to make comments stand out from RUN/CHECK lines. MC/RISCV. It will also make update_*checks.py's job easy.

---

I feel that CodeGen/RISCV may be more suitable but I can be persuaded that MC/RISCV is fine.

11

[kito-cheng]

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp

236

MCTargetStreamer didn't provide reset, that's provided by RISCVTargetStreamer.

[MaskRay]

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp

236

My comment is more about: defining a variable is unnecessary.

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h

private:
 
   void emitAttribute(unsigned Attribute, unsigned Value) override;
   void emitTextAttribute(unsigned Attribute, StringRef String) override;
   void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
                             StringRef StringValue) override;
   void finishAttributeSection() override;
   size_t calculateContentSize() const;
 
+  void reset() override;
+
 public:
   MCELFStreamer &getStreamer();
   RISCVTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI);
 
   void emitDirectiveOptionPush() override;
   void emitDirectiveOptionPop() override;
   void emitDirectiveOptionPIC() override;
   void emitDirectiveOptionNoPIC() override;

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp

case RISCVABI::ABI_ILP32E:
     break;
   case RISCVABI::ABI_Unknown:
     llvm_unreachable("Improperly initialised target ABI");
   }
 
   MCA.setELFHeaderEFlags(EFlags);
 }
 
+void RISCVTargetELFStreamer::reset() {
+  AttributeSection = nullptr;
+  Contents.clear();
+}
+
 namespace {
 class RISCVELFStreamer : public MCELFStreamer {
   static std::pair<unsigned, unsigned> getRelocPairForSize(unsigned Size) {
     switch (Size) {
     default:
       llvm_unreachable("unsupported fixup size");
     case 1:
       return std::make_pair(RISCV::fixup_riscv_add_8, RISCV::fixup_riscv_sub_8);
static bool requiresFixups(MCContext &C, const MCExpr *Value,
     RHS = E.getSymB();
 
     return (A.isInSection() ? A.getSection().hasInstructions()
                             : !A.getName().empty()) ||
            (B.isInSection() ? B.getSection().hasInstructions()
                             : !B.getName().empty());
   }
 
+  void reset() override {
+    MCTargetStreamer &TS = *getTargetStreamer();
+    RISCVTargetStreamer &RTS = static_cast<RISCVTargetStreamer &>(TS);
+    RTS.reset();
+    MCELFStreamer::reset();
+  }
+
 public:
   RISCVELFStreamer(MCContext &C, std::unique_ptr<MCAsmBackend> MAB,
                    std::unique_ptr<MCObjectWriter> MOW,
                    std::unique_ptr<MCCodeEmitter> MCE)
       : MCELFStreamer(C, std::move(MAB), std::move(MOW), std::move(MCE)) {}
 
   void emitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override {
     const MCExpr *A, *B;

llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h

 class formatted_raw_ostream;
 
 class RISCVTargetStreamer : public MCTargetStreamer {
   RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
 
 public:
   RISCVTargetStreamer(MCStreamer &S);
   void finish() override;
+  virtual void reset();
 
   virtual void emitDirectiveOptionPush();
   virtual void emitDirectiveOptionPop();
   virtual void emitDirectiveOptionPIC();
   virtual void emitDirectiveOptionNoPIC();
   virtual void emitDirectiveOptionRVC();
   virtual void emitDirectiveOptionNoRVC();
   virtual void emitDirectiveOptionRelax();

llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp

 #include "llvm/Support/RISCVAttributes.h"
 #include "llvm/Support/RISCVISAInfo.h"
 
 using namespace llvm;
 
 RISCVTargetStreamer::RISCVTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
 
 void RISCVTargetStreamer::finish() { finishAttributeSection(); }
+void RISCVTargetStreamer::reset() {}
 
 void RISCVTargetStreamer::emitDirectiveOptionPush() {}
 void RISCVTargetStreamer::emitDirectiveOptionPop() {}
 void RISCVTargetStreamer::emitDirectiveOptionPIC() {}
 void RISCVTargetStreamer::emitDirectiveOptionNoPIC() {}
 void RISCVTargetStreamer::emitDirectiveOptionRVC() {}
 void RISCVTargetStreamer::emitDirectiveOptionNoRVC() {}
 void RISCVTargetStreamer::emitDirectiveOptionRelax() {}

llvm/test/MC/RISCV/twice.ll

+; Check for state persistence bugs in the RISC-V MC backend
+; This should neither fail (in the comparison that the second object
+; is bit-identical to the first) nor crash. Either failure would most
+; likely indicate some state that is not properly reset in the
+; appropriate ::reset method.
+; RUN: llc -compile-twice -filetype=obj -mtriple=riscv64 %s -o - \
+; RUN:     | llvm-objdump --section-headers - \
+; RUN:     | FileCheck %s
+
+; CHECK:      Sections:
+; CHECK-NEXT: Idx Name              Size     VMA              Type
+; CHECK-NEXT:  0
+; CHECK-NEXT:  1 .strtab
+; CHECK-NEXT:  2 .text
+; CHECK-NEXT:  3 .note.GNU-stack
+; CHECK-NEXT:  4 .riscv.attributes
+; CHECK-NEXT:  5 .symtab