[CodeGen] Place SDNode debug ID declaration under appropriate #if

[kovdan01]

Summary

Place PersistentId declaration under #if LLVM_ENABLE_ABI_BREAKING_CHECKS to
reduce memory usage when it is not needed.

[craig.topper]

Here is a previous thread on this topic https://lists.llvm.org/pipermail/llvm-dev/2016-July/101842.html

[kovdan01]

In D120714#3353070, @craig.topper wrote:

Here is a previous thread on this topic https://lists.llvm.org/pipermail/llvm-dev/2016-July/101842.html

Thanks! Inspected that, and found an interesting patchset http://www.nuanti.com/tmp/llvm-api-stability/ in discussion https://lists.llvm.org/pipermail/llvm-dev/2013-November/067463.html. And that was not the only attempt to introduce LLVM_NDEBUG - one more was https://reviews.llvm.org/D11833.

In the last review that I mentioned @dexonsmith said that we can use LLVM_ENABLE_ABI_BREAKING_CHECKS instead of NDEBUG in headers. In context of the current patch that will look unsuitable IMHO - PersistentId is only used for debug printing, and a person might want to have PersistentId defined in debug build with ABI breaking checks disabled.

As for me, looks like we can try to introduce LLVM_NDEBUG one more time :) @craig.topper, @dexonsmith, what do you think about it?

[dexonsmith]

In D120714#3375195, @kovdan01 wrote:

In D120714#3353070, @craig.topper wrote:

Here is a previous thread on this topic https://lists.llvm.org/pipermail/llvm-dev/2016-July/101842.html

Thanks! Inspected that, and found an interesting patchset http://www.nuanti.com/tmp/llvm-api-stability/ in discussion https://lists.llvm.org/pipermail/llvm-dev/2013-November/067463.html. And that was not the only attempt to introduce LLVM_NDEBUG - one more was https://reviews.llvm.org/D11833.

In the last review that I mentioned @dexonsmith said that we can use LLVM_ENABLE_ABI_BREAKING_CHECKS instead of NDEBUG in headers. In context of the current patch that will look unsuitable IMHO - PersistentId is only used for debug printing, and a person might want to have PersistentId defined in debug build with ABI breaking checks disabled.

As for me, looks like we can try to introduce LLVM_NDEBUG one more time :) @craig.topper, @dexonsmith, what do you think about it?

LLVM_ENABLE_ABI_BREAKING_CHECKS is the right thing to do here. This is exactly the case it exists for. If people don't want ABI-breaking things in their release builds, they won't (or shouldn't) turn on LLVM_ENABLE_ABI_BREAKING_CHECKS.

[dexonsmith]

Re-reading your comment:

and a person might want to have PersistentId defined in debug build with ABI breaking checks disabled.

I think that person won't get what they want. There are basically two ABIs:

• LLVM_ENABLE_ABI_BREAKING_CHECKS == 1: ABI designed for builds that have assertions on.
• LLVM_ENABLE_ABI_BREAKING_CHECKS == 0: ABI designed for builds that have assertions off.

The purpose of LLVM_ENABLE_ABI_BREAKING_CHECKS is to allow assertions-enabled code to link against assertions-disabled code, as long as they have the same value for LLVM_ENABLE_ABI_BREAKING_CHECKS. That comes with caveats:

• A release build with LLVM_ENABLE_ABI_BREAKING_CHECKS == 1 will have a bloated ABI.
• An asserts build with LLVM_ENABLE_ABI_BREAKING_CHECKS == 0 will miss some debugging / checks.

But it's better than not supporting cross-linking at all.

(I don't have an opinion about whether there should be an LLVM_NDEBUG flag that was used pervasively instead of NDEBUG, but I think it's irrelevant for this patch. Even if we had LLVM_NDEBUG, then LLVM_ENABLE_ABI_BREAKING_CHECKS would still be the right thing to use here.)

[dexonsmith]

You'll also need to update uses, such as:

void SelectionDAG::InsertNode(SDNode *N) {
  AllNodes.push_back(N);
#ifndef NDEBUG
  N->PersistentId = NextPersistentId++;
  VerifySDNode(N);
#endif
  for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
    DUL->NodeInserted(N);
}

Not sure what we want here. Could either of:

#ifndef NDEBUG
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
  N->PersistentId = NextPersistentId++;
#endif
  VerifySDNode(N);
#endif

or:

#if LLVM_ENABLE_ABI_BREAKING_CHECKS
  N->PersistentId = NextPersistentId++;
#endif
#ifndef NDEBUG
  VerifySDNode(N);
#endif

Depending on whether maintaining these persistent IDs is expensive. My intuition would be to do the latter; I doubt they're expensive to maintain, so if they're in the ABI we might as well take advantage of them for better debugging. Someone more familiar with SelectionDAG can make the call though.

Also, I don't have an informed opinion on whether this is a good thing to do. It could be that debugging release builds of SelectionDAG with persistent IDs is so valuable that it's worth the memory overhead. Hopefully someone else can chime in on that and the previous question (maybe @craig.topper or @bogner have opinions).

llvm/include/llvm/CodeGen/SelectionDAG.h

283

These should all be #if LLVM_ENABLE_ABI_BREAKING_CHECKS.

[kovdan01]

@dexonsmith Thanks for your comments! Decided to choose the last approach that you mentioned - keep and use PersistentId regardless build type or any macro. The problem with #if LLVM_ENABLE_ABI_BREAKING_CHECKS is testing with LLVM_ABI_BREAKING_CHECKS set to FORCE_OFF during initial CMake configuration - some tests rely on PersistentId. I suppose that having PersistentId present in all builds is definitely worth small CPU overhead compared to the current state.

[kovdan01]

Fix formatting according to pre-merge checks. @dexonsmith Please let me know if you have some comments on the changes. I added more info in my previous comment. Thanks!

[kovdan01]

@dexonsmith Previously you requested changes to this revision. Please let me know if you still see some problems - updated the revision, please see my last comments for details. Thanks!

[dexonsmith]

Thanks for the pings! I'd missed your updates.

In D120714#3377826, @kovdan01 wrote:

@dexonsmith Thanks for your comments! Decided to choose the last approach that you mentioned - keep and use PersistentId regardless build type or any macro. The problem with #if LLVM_ENABLE_ABI_BREAKING_CHECKS is testing with LLVM_ABI_BREAKING_CHECKS set to FORCE_OFF during initial CMake configuration - some tests rely on PersistentId. I suppose that having PersistentId present in all builds is definitely worth small CPU overhead compared to the current state.

Which tests are you talking about? Can those tests be marked as UNSUPPORTED when ABI-breaking checks are off?

If not, why not?

It would be good to add a comment to the sources explaining why LLVM_ENABLE_ABI_BREAKING_CHECKS can't/shouldn't be used for PersistentId, and potentially a FIXME with how to fix the blockers such as they are. Probably next to the declaration of the field.

[kovdan01]

[CodeGen] Place SDNode debug ID declaration under appropriate #if

[kovdan01]

@dexonsmith

In D120714#3400246, @dexonsmith wrote:

Thanks for the pings! I'd missed your updates.

In D120714#3377826, @kovdan01 wrote:

@dexonsmith Thanks for your comments! Decided to choose the last approach that you mentioned - keep and use PersistentId regardless build type or any macro. The problem with #if LLVM_ENABLE_ABI_BREAKING_CHECKS is testing with LLVM_ABI_BREAKING_CHECKS set to FORCE_OFF during initial CMake configuration - some tests rely on PersistentId. I suppose that having PersistentId present in all builds is definitely worth small CPU overhead compared to the current state.

Which tests are you talking about? Can those tests be marked as UNSUPPORTED when ABI-breaking checks are off?

If not, why not?

It would be good to add a comment to the sources explaining why LLVM_ENABLE_ABI_BREAKING_CHECKS can't/shouldn't be used for PersistentId, and potentially a FIXME with how to fix the blockers such as they are. Probably next to the declaration of the field.

Currently there is no check for ABI-breaking changes (see llvm/test/lit.site.cfg.py.in). Of course, that could be easily added, but I decided to update the tests themselves to make them work with SDNode debug IDs both in t<number> and 0x<hex address> formats. Also changes update_llc_test_checks.py, and it looks like that we can support more test scenarios for isel in it (not only resulting selection DAG, but also initial and intermediate ones, instcombine phase, etc.)

[dexonsmith]

In D120714#3417193, @kovdan01 wrote:

@dexonsmith

In D120714#3400246, @dexonsmith wrote:

Thanks for the pings! I'd missed your updates.

In D120714#3377826, @kovdan01 wrote:

@dexonsmith Thanks for your comments! Decided to choose the last approach that you mentioned - keep and use PersistentId regardless build type or any macro. The problem with #if LLVM_ENABLE_ABI_BREAKING_CHECKS is testing with LLVM_ABI_BREAKING_CHECKS set to FORCE_OFF during initial CMake configuration - some tests rely on PersistentId. I suppose that having PersistentId present in all builds is definitely worth small CPU overhead compared to the current state.

Which tests are you talking about? Can those tests be marked as UNSUPPORTED when ABI-breaking checks are off?

If not, why not?

It would be good to add a comment to the sources explaining why LLVM_ENABLE_ABI_BREAKING_CHECKS can't/shouldn't be used for PersistentId, and potentially a FIXME with how to fix the blockers such as they are. Probably next to the declaration of the field.

Currently there is no check for ABI-breaking changes (see llvm/test/lit.site.cfg.py.in). Of course, that could be easily added, but I decided to update the tests themselves to make them work with SDNode debug IDs both in t<number> and 0x<hex address> formats. Also changes update_llc_test_checks.py, and it looks like that we can support more test scenarios for isel in it (not only resulting selection DAG, but also initial and intermediate ones, instcombine phase, etc.)

Hmm, the tests look much harder to read now. I'm not sure that's better.

Seems simpler/cleaner to use REQUIRES: asserts, abi-breaking-checks.

[kovdan01]

In D120714#3417416, @dexonsmith wrote:

Hmm, the tests look much harder to read now. I'm not sure that's better.

Seems simpler/cleaner to use REQUIRES: asserts, abi-breaking-checks.

OK, makes sense. Updated the patch following your advice.

[kovdan01]

Fix broken tests for targets not covered by the patch previously

[kovdan01]

@dexonsmith Please let me know if you see some issues in the patch. Thanks!

[dexonsmith]

In D120714#3429834, @kovdan01 wrote:

@dexonsmith Please let me know if you see some issues in the patch. Thanks!

LGTM! Thanks for this.

[thakis]

+1 to craig.topper's point. It's true that this is what ABI_BREAKING_CHECKS is for, but we should only use this if it saves significant memory. This uint16_t lives next to two bools, so removing it doesn't save any memory (it'll just become padding) as far as I can tell.

Have you seen an actual memory use improvement from this?

As far as I can tell, this adds a bunch of complexity without a benefit (?)

[kovdan01]

In D120714#3432615, @thakis wrote:

+1 to craig.topper's point. It's true that this is what ABI_BREAKING_CHECKS is for, but we should only use this if it saves significant memory. This uint16_t lives next to two bools, so removing it doesn't save any memory (it'll just become padding) as far as I can tell.

Have you seen an actual memory use improvement from this?

As far as I can tell, this adds a bunch of complexity without a benefit (?)

Hmm, I missed the fact that removing PersistentId will not save memory because of alignment and padding. Initially the motivation was more about stylish improvement – not having fields that we do not need, and then I just extrapolated that to possible memory usage enhancement without keeping padding in mind.

Experimented with that stuff, and I actually do not see memory usage decrease, you are correct: sizeof(SDNode) remains 80 on x86-64 linux. Regarding SelectionDAG – its layout, I suppose, could be changed somehow to save memory, but that will not give noticeable improvements because we do not have many SelectionDAG objects.

I suppose that the patch might become useful in terms of memory usage enhancement in future (if SDNode’s layout changes somehow), but as for now that’s more about codestyle.

If your usecase requires having PersistentId declared and kept correct in all build types and/or complexity looks inapplicable for you, I can revert the patch and submit a new one adding a commect why we do not place these fields under defines not to confure anyone more. Please let me know if reverting the patch is crucial for you. Thanks!

[thakis]

I think we should revert this then. It makes a whole bunch of tests not run by default when abi_breaking_checks are off, and it kind of needlessly adds abi_breaking_checks as a lit feature. Having fewer lit features is desirable, and if this doesn't have a measurable benefit I don't think we should take on that cost.

llvm/cmake/modules/HandleLLVMOptions.cmake

if (LLVM_ENABLE_STRICT_FIXED_SIZE_VECTORS)
   add_definitions(-DSTRICT_FIXED_SIZE_VECTORS)
 endif()
 
 string(TOUPPER "${LLVM_ABI_BREAKING_CHECKS}" uppercase_LLVM_ABI_BREAKING_CHECKS)
 
 if( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "WITH_ASSERTS" )
   if( LLVM_ENABLE_ASSERTIONS )
     set( LLVM_ENABLE_ABI_BREAKING_CHECKS 1 )
+  else()
+    set( LLVM_ENABLE_ABI_BREAKING_CHECKS 0 )
   endif()
 elseif( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "FORCE_ON" )
   set( LLVM_ENABLE_ABI_BREAKING_CHECKS 1 )
 elseif( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "FORCE_OFF" )
-  # We don't need to do anything special to turn off ABI breaking checks.
+  set( LLVM_ENABLE_ABI_BREAKING_CHECKS 0 )
 elseif( NOT DEFINED LLVM_ABI_BREAKING_CHECKS )
   # Treat LLVM_ABI_BREAKING_CHECKS like "FORCE_OFF" when it has not been
   # defined.
+  set( LLVM_ENABLE_ABI_BREAKING_CHECKS 0 )
 else()
   message(FATAL_ERROR "Unknown value for LLVM_ABI_BREAKING_CHECKS: \"${LLVM_ABI_BREAKING_CHECKS}\"!")
 endif()
 
 if( LLVM_REVERSE_ITERATION )
   set( LLVM_ENABLE_REVERSE_ITERATION 1 )
 endif()
 

llvm/include/llvm/CodeGen/SelectionDAG.h

class SelectionDAG {
   struct CallSiteDbgInfo {
     CallSiteInfo CSInfo;
     MDNode *HeapAllocSite = nullptr;
     bool NoMerge = false;
   };
 
   DenseMap<const SDNode *, CallSiteDbgInfo> SDCallSiteDbgInfo;
 
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
   uint16_t NextPersistentId = 0;
+#endif
 
   /// Are instruction referencing variable locations desired for this function?
   bool UseInstrRefDebugInfo = false;
 
 public:
   /// Clients of various APIs that cause global effects on
   /// the DAG can optionally implement this interface.  This allows the clients
   /// to handle the various sorts of updates that happen.

llvm/include/llvm/CodeGen/SelectionDAGNodes.h

private:
   /// Return a pointer to the specified value type.
   static const EVT *getValueTypeList(EVT VT);
 
   SDNodeFlags Flags;
 
 public:
   /// Unique and persistent id per SDNode in the DAG.
   /// Used for debug printing.
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
   uint16_t PersistentId;
+#endif
 
   //===--------------------------------------------------------------------===//
   //  Accessors
   //
 
   /// Return the SelectionDAG opcode value for this node. For
   /// pre-isel nodes (those for which isMachineOpcode returns false), these
   /// are the opcode values in the ISD and <target>ISD namespaces. For

 class HandleSDNode : public SDNode {
   SDUse Op;
 
 public:
   explicit HandleSDNode(SDValue X)
     : SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) {
     // HandleSDNodes are never inserted into the DAG, so they won't be
     // auto-numbered. Use ID 65535 as a sentinel.
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
     PersistentId = 0xffff;
+#endif
 
     // Manually set up the operand list. This node type is special in that it's
     // always stack allocated and SelectionDAG does not manage its operands.
     // TODO: This should either (a) not be in the SDNode hierarchy, or (b) not
     // be so special.
     Op.setUser(this);
     Op.setInitial(X);
     NumOperands = 1;

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 #endif // NDEBUG
 
 /// Insert a newly allocated node into the DAG.
 ///
 /// Handles insertion into the all nodes list and CSE map, as well as
 /// verification and other common operations when a new node is allocated.
 void SelectionDAG::InsertNode(SDNode *N) {
   AllNodes.push_back(N);
-#ifndef NDEBUG
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
   N->PersistentId = NextPersistentId++;
+#endif
+#ifndef NDEBUG
   VerifySDNode(N);
 #endif
   for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     DUL->NodeInserted(N);
 }
 
 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
 /// correspond to it.  This is useful when we're about to delete or repurpose
return MF->getFunction().hasOptSize() ||
       llvm::shouldOptimizeForSize(FLI->MBB->getBasicBlock(), PSI, BFI);
 }
 
 void SelectionDAG::allnodes_clear() {
   assert(&*AllNodes.begin() == &EntryNode);
   AllNodes.remove(AllNodes.begin());
   while (!AllNodes.empty())
     DeallocateNode(&AllNodes.front());
-#ifndef NDEBUG
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
   NextPersistentId = 0;
 #endif
 }
 
 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
                                           void *&InsertPos) {
   SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
   if (N) {

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
   case ISD::PRE_DEC:    return "<pre-dec>";
   case ISD::POST_INC:   return "<post-inc>";
   case ISD::POST_DEC:   return "<post-dec>";
   }
 }
 
 static Printable PrintNodeId(const SDNode &Node) {
   return Printable([&Node](raw_ostream &OS) {
-#ifndef NDEBUG
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
     OS << 't' << Node.PersistentId;
 #else
-    OS << (const void*)&Node;
+    OS << (const void *)&Node;
 #endif
   });
 }
 
 // Print the MMO with more information from the SelectionDAG.
 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
                             const MachineFunction *MF, const Module *M,
                             const MachineFrameInfo *MFI,

llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp

struct DOTGraphTraits<SelectionDAG*> : public DefaultDOTGraphTraits {
     static bool renderGraphFromBottomUp() {
       return true;
     }
 
     static std::string getNodeIdentifierLabel(const SDNode *Node,
                                               const SelectionDAG *Graph) {
       std::string R;
       raw_string_ostream OS(R);
-#ifndef NDEBUG
+#if LLVM_ENABLE_ABI_BREAKING_CHECKS
       OS << 't' << Node->PersistentId;
 #else
       OS << static_cast<const void *>(Node);
 #endif
       return R;
     }
 
     /// If you want to override the dot attributes printed for a particular

llvm/test/CodeGen/AArch64/pow.75.ll

 ; RUN: llc < %s -mtriple=aarch64-- -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 declare float @llvm.pow.f32(float, float)
 declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
 declare double @llvm.pow.f64(double, double)
 declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
 
 define float @pow_f32_three_fourth_fmf(float %x) nounwind {
 ; CHECK: Combining: {{.*}}: f32 = fpow ninf nsz afn [[X:t[0-9]+]], ConstantFP:f32<7.500000e-01>

llvm/test/CodeGen/AArch64/split-vector-insert.ll

 ; RUN: llc < %s -debug-only=legalize-types 2>&1 | FileCheck %s --check-prefix=CHECK-LEGALIZATION
 ; RUN: llc < %s | FileCheck %s
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 target triple = "aarch64-unknown-linux-gnu"
 attributes #0 = {"target-features"="+sve"}
 
 declare <vscale x 2 x i64> @llvm.experimental.vector.insert.nxv2i64.v8i64(<vscale x 2 x i64>, <8 x i64>, i64)
 declare <vscale x 2 x double> @llvm.experimental.vector.insert.nxv2f64.v8f64(<vscale x 2 x double>, <8 x double>, i64)
 
 define <vscale x 2 x i64> @test_nxv2i64_v8i64(<vscale x 2 x i64> %a, <8 x i64> %b) #0 {

llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll

 ; REQUIRES: arm-registered-target
 ; REQUIRES: asserts
+; REQUIRES: abi_breaking_checks
 ; RUN: llc -o /dev/null %s -debug-only=legalize-types 2>&1 | FileCheck %s
 
 ; This test check that when v4f64 gets broken down to two v2f64 it maintains
 ; the "nnan" flags.
 
 ; CHECK: Legalizing node: [[VFOUR:t.*]]: v4f64 = BUILD_VECTOR
 ; CHECK-NEXT: Analyzing result type: v4f64
 ; CHECK-NEXT: Split node result: [[VFOUR]]: v4f64 = BUILD_VECTOR

llvm/test/CodeGen/ARM/pow.75.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabihf -mattr=neon -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 declare float @llvm.pow.f32(float, float)
 declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
 declare double @llvm.pow.f64(double, double)
 declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
 
 define float @pow_f32_three_fourth_fmf(float %x) nounwind {
 ; CHECK: Combining: {{.*}}: f32 = fpow ninf nsz afn [[X:t[0-9]+]], ConstantFP:f32<7.500000e-01>

llvm/test/CodeGen/Hexagon/mapped_intrinsics.ll

 ; RUN: llc -march=hexagon -debug-only=isel < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 ; This test validates that ISel picks the correct equivalent of below mentioned intrinsics
 ; For S2_asr_i_r_rnd_goodsyntax:
 ;   if (#u5 == 0) Assembler mapped to: Rd = Rs
 ;   else Rd = asr(Rs,#u5-1):rnd
 ; For S2_asr_i_p_rnd_goodsyntax:
 ;   if (#u6 == 0) Assembler mapped to: Rdd = combine(Rss.H32,Rss.L32)
 ;   else Rdd = asr(Rss,#u6-1):rnd

llvm/test/CodeGen/Mips/address-selection.ll

 ; RUN: llc -march=mips < %s -debug 2>&1 | FileCheck %s --check-prefix=MIPS
 ; RUN: llc -march=mips -relocation-model=pic -mattr=+xgot < %s \
 ; RUN:     -debug 2>&1 | FileCheck %s --check-prefix=MIPS-XGOT
 
 ; RUN: llc -march=mips -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM
 ; RUN: llc -march=mips -relocation-model=pic -mattr=+xgot,+micromips < %s \
 ; RUN:     -debug 2>&1 | FileCheck %s --check-prefix=MM-XGOT
 
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 ; Tests that the correct ISA is selected for computing a global address.
 
 @x = global i32 0
 @a = global i32 1
 declare i32 @y(i32*, i32)
 
 define i32 @z() {

llvm/test/CodeGen/Mips/cconv/byval.ll

 
 ; RUN: llc < %s -mtriple=mips-linux-gnu -verify-machineinstrs -debug 2>&1 \
 ; RUN:   | FileCheck %s --check-prefix=O32-SDAG
 ; RUN: llc < %s -mtriple=mips64-linux-gnu -target-abi n32 -verify-machineinstrs \
 ; RUN:   -debug 2>&1 | FileCheck %s --check-prefix=N32-SDAG
 ; RUN: llc < %s -mtriple=mips64-linux-gnu -target-abi n64 -verify-machineinstrs \
 ; RUN:   -debug 2>&1 | FileCheck %s --check-prefix=N64-SDAG
 
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 ; Test that reserved argument area is shared between the memcpy call and the
 ; call to f2. This eliminates the nested call sequence nodes.
 
 ; Also, test that a basic call to memcpy reserves its outgoing argument area.
 
 ; FIXME: We should also be explicit about testing that the loads for the
 ;        arguments are scheduled after the memcpy, but that wasn't enforced in

llvm/test/CodeGen/Mips/cstmaterialization/isel-materialization.ll

 ; RUN: llc -march=mips < %s -debug 2>&1 | FileCheck %s --check-prefix=MIPS
 ; RUN: llc -march=mips -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM
 
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 ; Test that the correct ISA is selected for the materialization of constants.
 
 ; The four parameters are picked to use these instructions: li16, addiu, lui,
 ; lui+addiu.
 
 declare void @e(i32)
 declare void @f(i32, i32, i32)

llvm/test/CodeGen/Mips/frameindex.ll

 ; RUN: llc -mtriple=mips-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS32
 ; RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MM
 ; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS64
 
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 ; CHECK-LABEL: Instruction selection ends:
 
 ; MIPS32: t{{[0-9]+}}: i{{[0-9]+}} = LEA_ADDiu TargetFrameIndex:i32<0>, TargetConstant:i32<0>
 ; MM: t{{[0-9]+}}: i{{[0-9]+}} = LEA_ADDiu_MM TargetFrameIndex:i32<0>, TargetConstant:i32<0>
 ; MIPS64: t{{[0-9]+}}: i{{[0-9]+}} = LEA_ADDiu64 TargetFrameIndex:i64<0>, TargetConstant:i64<0>
 
 define i32 @k() {
 entry:
   %h = alloca i32, align 4
   %call = call i32 @g(i32* %h)
   ret i32 %call
 }
 
 declare i32 @g(i32*)

llvm/test/CodeGen/Mips/llvm-ir/isel.ll

 ; RUN: llc --mtriple=mips-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS
 ; RUN: llc --mtriple=mips-mti-linux-gnu < %s -mattr=+micromips -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MM
 
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 ; Test that the correct mul instruction is selected upfront.
 
 ; CHECK-LABEL: Instruction selection ends:
 ; MIPS: t{{[0-9]+}}: i32,i32 = MUL t{{[0-9]+}}, t{{[0-9]+}}
 ; MM: t{{[0-9]+}}: i32,i32 = MUL_MM t{{[0-9]+}}, t{{[0-9]+}}
 
 define i32 @mul(i32 %a, i32 %b) {
 entry:
   %0 = mul i32 %a, %b
   ret i32 %0
 }

llvm/test/CodeGen/PowerPC/add_cmp.ll

-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s \
 ; RUN:   -verify-machineinstrs -debug 2>&1 | FileCheck %s
 
 define zeroext i1 @addiCmpiUnsigned(i32 zeroext %x) {
 entry:
-  %add = add nuw i32 10, %x 
+  %add = add nuw i32 10, %x
   %cmp = icmp ugt i32 %add, 100
   ret i1 %cmp
 
 ; CHECK: === addiCmpiUnsigned
 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiUnsigned:entry'
 ; CHECK:   [[REG1:t[0-9]+]]: i32 = truncate {{t[0-9]+}}
 ; CHECK:   [[REG2:t[0-9]+]]: i32 = add nuw [[REG1]], Constant:i32<10>
 ; CHECK:   {{t[0-9]+}}: i1 = setcc [[REG2]], Constant:i32<100>, setugt:ch
 }
 
 define zeroext i1 @addiCmpiSigned(i32 signext %x) {
 entry:
-  %add = add nsw i32 16, %x 
+  %add = add nsw i32 16, %x
   %cmp = icmp sgt i32 %add, 30
   ret i1 %cmp
 
 ; CHECK: === addiCmpiSigned
 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiSigned:entry'
 ; CHECK:   [[REG1:t[0-9]+]]: i32 = truncate {{t[0-9]+}}
 ; CHECK:   [[REG2:t[0-9]+]]: i32 = add nsw [[REG1]], Constant:i32<16>
 ; CHECK:   {{t[0-9]+}}: i1 = setcc [[REG2]], Constant:i32<30>, setgt:ch
 }
 
 define zeroext i1 @addiCmpiUnsignedOverflow(i32 zeroext %x) {
 entry:
-  %add = add nuw i32 110, %x 
+  %add = add nuw i32 110, %x
   %cmp = icmp ugt i32 %add, 100
   ret i1 %cmp
 
 ; CHECK: === addiCmpiUnsignedOverflow
 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiUnsignedOverflow:entry'
 ; CHECK:   [[REG1:t[0-9]+]]: i32 = truncate {{t[0-9]+}}
 ; CHECK:   [[REG2:t[0-9]+]]: i32 = add nuw [[REG1]], Constant:i32<110>
 ; CHECK:   {{t[0-9]+}}: i1 = setcc [[REG2]], Constant:i32<100>, setugt:ch
 }
 
 define zeroext i1 @addiCmpiSignedOverflow(i16 signext %x) {
 entry:
-  %add = add nsw i16 16, %x 
+  %add = add nsw i16 16, %x
   %cmp = icmp sgt i16 %add, -32767
   ret i1 %cmp
 
 ; CHECK: === addiCmpiSignedOverflow
 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiSignedOverflow:entry'
 ; CHECK:   [[REG1:t[0-9]+]]: i16 = truncate {{t[0-9]+}}
 ; CHECK:   [[REG2:t[0-9]+]]: i16 = add nsw [[REG1]], Constant:i16<16>
 ; CHECK:   {{t[0-9]+}}: i1 = setcc [[REG2]], Constant:i16<-32767>, setgt:ch
 }
 

llvm/test/CodeGen/PowerPC/fmf-propagation.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: llc < %s -mtriple=powerpc64le -debug-only=isel -o /dev/null 2>&1                        | FileCheck %s --check-prefix=FMFDEBUG
 ; RUN: llc < %s -mtriple=powerpc64le                                                           | FileCheck %s --check-prefix=FMF
 ; RUN: llc < %s -mtriple=powerpc64le -debug-only=isel -o /dev/null 2>&1 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s --check-prefix=GLOBALDEBUG
 ; RUN: llc < %s -mtriple=powerpc64le -enable-unsafe-fp-math -enable-no-nans-fp-math -enable-no-signed-zeros-fp-math | FileCheck %s --check-prefix=GLOBAL
 
 ; Test FP transforms using instruction/node-level fast-math-flags.
 ; We're also checking debug output to verify that FMF is propagated to the newly created nodes.
 ; The run with the global unsafe param tests the pre-FMF behavior using regular instructions/nodes.

llvm/test/CodeGen/PowerPC/pow.75.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 declare float @llvm.pow.f32(float, float)
 declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
 declare double @llvm.pow.f64(double, double)
 declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
 
 define float @pow_f32_three_fourth_fmf(float %x) nounwind {
 ; CHECK: Combining: {{.*}}: f32 = fpow ninf nsz afn [[X:t[0-9]+]], ConstantFP:f32<7.500000e-01>

llvm/test/CodeGen/SystemZ/combine_loads_from_build_pair.ll

 ; RUN: llc -verify-machineinstrs  -mtriple=s390x-linux-gnu < %s -debug -stop-after=machineverifier 2>&1 | FileCheck %s
+; REQUIRES: asserts, abi_breaking_checks
 
-; REQUIRES: asserts
 define i128 @func1({ i128, i8* } %struct) {
 ; Verify that we get a combine on the build_pair, creating a LD8 load somewhere
 ; between "Initial selection DAG" and "Optimized lowered selection DAG".
 ; The target is big-endian, and stack grows towards higher addresses,
 ; so we expect the LD8 to load from the address used in the original HIBITS
 ; load.
 ; CHECK-LABEL: Initial selection DAG:
 ; CHECK:     [[LOBITS:t[0-9]+]]: i64,ch = load<(load (s64))>

llvm/test/CodeGen/SystemZ/isel-debug.ll

 ; RUN: llc < %s -mtriple=s390x-linux-gnu -debug-only=systemz-isel -o - 2>&1 | \
 ; RUN:   FileCheck %s
 
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ;
 ; Check that some debug output is printed without problems.
 ; CHECK: SystemZAddressingMode
 ; CHECK: Base t5: i64,ch = load<(load (s64) from %ir.0)>
 ; CHECK: Index
 ; CHECK: Disp
 
 define void @fun(i64* %ptr) {
 entry:
   %0 = bitcast i64* %ptr to i32**
   %1 = load i32*, i32** %0, align 8
   %xpv_pv = getelementptr inbounds i32, i32* %1
   store i32 0, i32* %xpv_pv
   ret void
 }

llvm/test/CodeGen/VE/Vector/vp_srem.ll

-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: not --crash llc < %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
 
-; CHECK:  t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 
+; CHECK:  t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
 ; CHECK:  [[A]]: v256i32
 ; CHECK:  [[B]]: v256i32
 ; CHECK:  [[MASK]]: v256i1
 ; CHECK:  [[EVL]]: i32
 
 define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
   %r0 = call <256 x i32> @llvm.vp.srem.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
   ret <256 x i32> %r0
 }
 
 ; integer arith
 declare <256 x i32> @llvm.vp.srem.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/VE/Vector/vp_urem.ll

-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: not --crash llc < %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
 
-; CHECK:  t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 
+; CHECK:  t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
 ; CHECK:  [[A]]: v256i32
 ; CHECK:  [[B]]: v256i32
 ; CHECK:  [[MASK]]: v256i1
 ; CHECK:  [[EVL]]: i32
 
 define <256 x i32> @test_vp_int(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n) {
   %r0 = call <256 x i32> @llvm.vp.urem.v256i32(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %n)
   ret <256 x i32> %r0
 }
 
 ; integer arith
 declare <256 x i32> @llvm.vp.urem.v256i32(<256 x i32>, <256 x i32>, <256 x i1>, i32)

llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll

-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -o /dev/null -debug-only=isel 2>&1 | FileCheck %s
 
 ; Make sure we emit the basic block exports and the TokenFactor before the
 ; inlineasm_br. Not sure how to get a MachineIR change so this reads the debug
 ; output from SelectionDAG.
 
 ; CHECK: t0: ch = EntryToken
 ; CHECK-NEXT: t16: i64 = BlockAddress<@test, %fail> 0

llvm/test/CodeGen/X86/fmf-propagation.ll

-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx512f -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck %s
 
 ; This tests the propagation of fast-math-flags from IR instructions to SDNodeFlags.
 
 ; CHECK-LABEL: Initial selection DAG: %bb.0 'fmf_transfer:'
 
 ; CHECK:         t5: f32 = fadd nsz t2, t4
 ; CHECK-NEXT:    t6: f32 = fadd arcp t5, t4

llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll

-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck -check-prefix=DBGDAG %s
 
 ; It's OK to merge the load / store of the first 2 components, but
 ; they must not be placed on the same chain after merging.
 
 ; X86-LABEL: {{^}}merge_store_partial_overlap_load:
 ; X86-DAG: movzwl ([[BASEREG:%[a-z]+]]), %e[[LO2:[a-z]+]]

llvm/test/CodeGen/X86/pow.75.ll

 ; RUN: llc < %s -mtriple=x86_64-- -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts
+; REQUIRES: asserts, abi_breaking_checks
 
 declare float @llvm.pow.f32(float, float)
 declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
 declare double @llvm.pow.f64(double, double)
 declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
 
 define float @pow_f32_three_fourth_fmf(float %x) nounwind {
 ; CHECK: Combining: {{.*}}: f32 = fpow ninf nsz afn [[X:t[0-9]+]], ConstantFP:f32<7.500000e-01>

llvm/test/lit.cfg.py

if config.have_curl:
     config.available_features.add('curl')
 
 if config.have_opt_viewer_modules:
     config.available_features.add('have_opt_viewer_modules')
 
 if config.expensive_checks:
     config.available_features.add('expensive_checks')
 
+if config.abi_breaking_checks:
+    config.available_features.add('abi_breaking_checks')
+
 if "MemoryWithOrigins" in config.llvm_use_sanitizer:
     config.available_features.add('use_msan_with_origins')
 
 def exclude_unsupported_files_for_aix(dirname):
    for filename in os.listdir(dirname):
        source_path = os.path.join( dirname, filename)
        if os.path.isdir(source_path):
            continue

llvm/test/lit.site.cfg.py.in

 config.libcxx_used = @LLVM_LIBCXX_USED@
 config.has_plugins = @LLVM_ENABLE_PLUGINS@
 config.linked_bye_extension = @LLVM_BYE_LINK_INTO_TOOLS@
 config.have_tf_aot = @LLVM_HAVE_TF_AOT@
 config.have_tf_api = @LLVM_HAVE_TF_API@
 config.llvm_inliner_model_autogenerated = @LLVM_INLINER_MODEL_AUTOGENERATED@
 config.llvm_raevict_model_autogenerated = @LLVM_RAEVICT_MODEL_AUTOGENERATED@
 config.expensive_checks = @LLVM_ENABLE_EXPENSIVE_CHECKS@
+config.abi_breaking_checks = @LLVM_ENABLE_ABI_BREAKING_CHECKS@
 
 import lit.llvm
 lit.llvm.initialize(lit_config, config)
 
 # Let the main config do the real work.
 lit_config.load_config(
     config, os.path.join(config.llvm_src_root, "test/lit.cfg.py"))

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/amdgpu-isel-support.test

 # REQUIRES: asserts
+# REQUIRES: abi_breaking_checks
 # REQUIRES: amdgpu-registered-target
 ## Basic test checking that update_llc_test_checks.py can update a file with isel debug output
 
 # RUN: cp -f %S/Inputs/amdgpu_isel.ll %t.ll && %update_llc_test_checks %t.ll
 # RUN: cat %S/Inputs/amdgpu_isel.ll.expected > %t.expected.ll
 # RUN: diff -u %t.expected.ll %t.ll
 
 # RUN: cp -f %S/Inputs/amdgpu_asm.ll %t.ll && %update_llc_test_checks %t.ll
 # RUN: cat %S/Inputs/amdgpu_asm.ll.expected > %t.expected.ll
 # RUN: diff -u %t.expected.ll %t.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/lanai-isel-support.test

 # REQUIRES: asserts
+# REQUIRES: abi_breaking_checks
 # REQUIRES: lanai-registered-target
 ## Basic test checking that update_llc_test_checks.py can update a file with isel debug output
 
 # RUN: cp -f %S/Inputs/lanai_isel.ll %t.ll && %update_llc_test_checks %t.ll
 # RUN: cat %S/Inputs/lanai_isel.ll.expected > %t.expected.ll
 # RUN: diff -u %t.expected.ll %t.ll
 
 # RUN: cp -f %S/Inputs/lanai_asm.ll %t.ll && %update_llc_test_checks %t.ll
 # RUN: cat %S/Inputs/lanai_asm.ll.expected > %t.expected.ll
 # RUN: diff -u %t.expected.ll %t.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/x86-isel-support.test

 # REQUIRES: asserts
+# REQUIRES: abi_breaking_checks
 # REQUIRES: x86-registered-target
 ## Basic test checking that update_llc_test_checks.py can update a file with isel debug output
 
 # RUN: cp -f %S/Inputs/x86_isel.ll %t.ll && %update_llc_test_checks %t.ll
 # RUN: cat %S/Inputs/x86_isel.ll.expected > %t.expected.ll
 # RUN: diff -u %t.expected.ll %t.ll
 
 # RUN: cp -f %S/Inputs/x86_asm.ll %t.ll && %update_llc_test_checks %t.ll
 # RUN: cat %S/Inputs/x86_asm.ll.expected > %t.expected.ll
 # RUN: diff -u %t.expected.ll %t.ll