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Differential D113967

[RISCV] Reverse the order of loading/storing callee-saved registers.
ClosedPublic

Authored by HsiangKai on Nov 16 2021, 12:24 AM.

Details

Reviewers
frasercrmck
rogfer01
craig.topper
asb
luismarques
Commits
rG137d3474ca39: [RISCV] Reverse the order of loading/storing callee-saved registers.
Summary

Currently, we restore the return address register as the last restoring
instruction in the epilog. The next instruction is ret usually. It is
a use of return address register. In some microarchitectures, there is
load-to-use data hazard. To avoid the load-to-use data hazard, we could
separate the load instruction from its use as far as possible. In this
patch, we reverse the order of loading/storing callee-saved registers to
increase the distance of load ra and ret in the epilog.

Diff Detail

Event Timeline

HsiangKai created this revision.Nov 16 2021, 12:24 AM
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence and 25 others. · View Herald TranscriptNov 16 2021, 12:24 AM
HsiangKai requested review of this revision.Nov 16 2021, 12:24 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 16 2021, 12:24 AM
Herald added subscribers: llvm-commits, MaskRay. · View Herald Transcript
Harbormaster completed remote builds in B134441: Diff 387513.Nov 16 2021, 1:15 AM
jrtc27 added a comment.Nov 16 2021, 12:23 PM

What's the benefit of reversing the spills? Seems unnecessary to me. GCC will emit spills and loads in the same order for RISC-V.

jrtc27 added a comment.Nov 16 2021, 12:26 PM

Though, I'm unconvinced about whether the hazard in the epilogue matters in practice. In a simple in-order micoarchitecture if restoring ra stalls then it doesn't matter where that is, you can't execute out-of-order. In a superscalar core you'll just speculate past the ret anyway, which should predict accurately for anything with a half-decent RAS, though I guess you'll have unresolved speculation for longer that might be an issue. Is there a particular microarchitecture you've measured an appreciable difference for this on?

HsiangKai added a comment.Nov 17 2021, 4:35 AM
In D113967#3135737, @jrtc27 wrote:

Though, I'm unconvinced about whether the hazard in the epilogue matters in practice. In a simple in-order micoarchitecture if restoring ra stalls then it doesn't matter where that is, you can't execute out-of-order. In a superscalar core you'll just speculate past the ret anyway, which should predict accurately for anything with a half-decent RAS, though I guess you'll have unresolved speculation for longer that might be an issue. Is there a particular microarchitecture you've measured an appreciable difference for this on?

What if there are two bubbles between load instruction and the using instruction in the pipeline? In the current RISC-V LLVM implementation, there is only one instruction, i.e., stack pointer adjustment, between load ra and ret. The ret will cost an additional cycle for the bubble unless we schedule the epilogue to fill the bubble. However, there is no scheduling for epilogue code in LLVM. In GCC implementation, it will put the load ra at first in the epilogue code. Here is an example. https://godbolt.org/z/3rnfrcnhT

I agree we could keep the order of prologue in the current implementation. I reorder them just for symmetry. It is not necessary in this patch. The point is to reorder the epilogue restoring code.

The intention of this patch is to have more instructions to fill the bubbles if there are any bubbles between load and use. It will increase the live range of ra, but it should have no negative impact in the epilogue code.

asb added a comment.Nov 17 2021, 7:07 AM
In D113967#3135737, @jrtc27 wrote:

Though, I'm unconvinced about whether the hazard in the epilogue matters in practice. In a simple in-order micoarchitecture if restoring ra stalls then it doesn't matter where that is, you can't execute out-of-order. In a superscalar core you'll just speculate past the ret anyway, which should predict accurately for anything with a half-decent RAS, though I guess you'll have unresolved speculation for longer that might be an issue. Is there a particular microarchitecture you've measured an appreciable difference for this on?

The target is probably cores using a microarchitecture similar to Rocket. It has a "non-blocking D-cache" where the integer pipeline won't stall upon a cache miss until the register value is actually read (provided there are sufficient MSHRs).

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
440

Worth adding a comment to explain why list is being iterated in reverse order.

1045

Worth adding a comment to explain why list is being iterated in reverse order.

1075

I think the comment above needs updating now, and again it would be worth explaining the desired iteration order.

jrtc27 added a comment.Nov 17 2021, 7:10 AM
In D113967#3137613, @asb wrote:
In D113967#3135737, @jrtc27 wrote:

Though, I'm unconvinced about whether the hazard in the epilogue matters in practice. In a simple in-order micoarchitecture if restoring ra stalls then it doesn't matter where that is, you can't execute out-of-order. In a superscalar core you'll just speculate past the ret anyway, which should predict accurately for anything with a half-decent RAS, though I guess you'll have unresolved speculation for longer that might be an issue. Is there a particular microarchitecture you've measured an appreciable difference for this on?

The target is probably cores using a microarchitecture similar to Rocket. It has a "non-blocking D-cache" where the integer pipeline won't stall upon a cache miss until the register value is actually read (provided there are sufficient MSHRs).

Can it actually issue additional loads in the meantime though, i.e. everything else that appears in between the restore and the stack adjustment? I wouldn't expect so for an in-order core, which is why I asked what I did. I'm struggling to see a case where this would ever matter.

HsiangKai updated this revision to Diff 387966.Nov 17 2021, 9:30 AM

Address @asb's comments.

Harbormaster completed remote builds in B134756: Diff 387966.Nov 17 2021, 10:13 AM
craig.topper added a comment.Nov 17 2021, 4:28 PM

Additional context I got from Andrew Waterman

The ability to partially hide the latency of a cache miss using a non-blocking cache is more of a secondary concern.  The latency of a load hit is the parameter we're more sensitive to.

The problem manifests primarily in in-order processors, where the ret instruction will be stalled until its operands are available, hence speculative execution past the ret instruction will not occur.  Single-issue in-order processors with at least two cycles of load-use delay are likely to manifest this stall.  In-order superscalars are likely to manifest this stall even with smaller load-use delays.

While this is much less of an issue for out-of-order processors, this change has some value even there: the earlier an instructions' operands are available, the lower its occupancy in the issue window, reducing pressure on issue-window capacity.
kito-cheng added a comment.Nov 17 2021, 7:37 PM

An ASCII pipeline diagram to demonstrate why reorder that could help:

Consider a typical RISC 5 stage pipeline CPU:

IF: Instruction Fetch
ID: Instruction Decode
EXE: Instruction Execute
MEM: Memory Access
WB: Write Back

Assume we need 2 cycle to read memory and NO forwording.

lw s1, 4(sp) # 4-byte Folded Reload
lw s0, 8(sp) # 4-byte Folded Reload
lw ra, 12(sp) # 4-byte Folded Reload
addi sp, sp, 16
ret
CycleIFIDEXEMEMWBComment
Nlw s1
N + 1lw s0lw s1
N + 2lw ralw s0lw s1
N + 3addilw ralw s0lw s1Reading sp + 4 (1st cycle)
N + 4addilw ralw s0lw s1Reading sp + 4 (stall for 2nd cycle)
N + 5retaddilw ralw s0lw s1Reading sp + 8 (1st cycle)
N + 6retaddilw ralw s0Reading sp + 8 (stall for 2st cycle)
N + 7retaddilw ralw s0Reading sp + 12 (1st cycle)
N + 8retaddilw raReading sp + 12 (stall for 2st cycle)
N + 9retaddilw raret stall due to ra isn't ready to read.
N + 10retaddi

...

lw ra, 12(sp) # 4-byte Folded Reload
lw s0, 8(sp) # 4-byte Folded Reload
lw s1, 4(sp) # 4-byte Folded Reload
addi sp, sp, 16
ret
CycleIFIDEXEMEMWBComment
Nlw ra
N + 1lw s0lw ra
N + 2lw s1lw s0lw ra
N + 3addilw s1lw s0lw raReading sp + 12 (1st cycle)
N + 4addilw s1lw s0lw raReading sp + 12 (stall for 2nd cycle)
N + 5retaddilw s1lw s0lw raReading sp + 8 (1st cycle)
N + 6retaddilw s1lw s0Reading sp + 8 (stall for 2st cycle)
N + 7retaddilw s1lw s0Reading sp + 12 (1st cycle)
N + 8retaddilw s1Reading sp + 12 (stall for 1st cycle)
N + 9retaddilw s1NO stall for ret!

...

jrtc27 added a comment.Nov 17 2021, 7:40 PM

Sure, I realise that if you have an extremely basic pipeline without forwarding then it does matter. I just didn't think anyone seriously cared about such microarchitectures in this day and age, or if they did then they at least didn't expect any kind of half-decent performance out of them. Not against this change, just surprised it's ever particularly noticeable.

jrtc27 added a comment.Nov 17 2021, 7:42 PM

In-order superscalar is a good point though, and the FU740 is precisely such a pipeline where you can issue both a load and a branch in the same cycle, so I guess the current codegen is hurting a noticeable amount there.

kito-cheng added a comment.Nov 17 2021, 7:55 PM

There is still lot of low-end RISC-V CPU used in embedded world, which might use such u-arch and benefit for such code gen change as I know :p

HsiangKai added a comment.Nov 17 2021, 9:06 PM
In D113967#3139233, @jrtc27 wrote:

In-order superscalar is a good point though, and the FU740 is precisely such a pipeline where you can issue both a load and a branch in the same cycle, so I guess the current codegen is hurting a noticeable amount there.

Yeah, in-order superscalar is the case. We found the performance downgrade in U74 compared with GCC codegen.

jrtc27 added a comment.Nov 20 2021, 12:48 PM

Just some comment nits, otherwise ready to land IMO

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
1070

Missing "the" before "return address"

1071

I wouldn't talk about filling bubbles, there may not be any anyway. Just say it avoids potential load-to-use data hazards, as in the commit message.

1072

RISC-V registers don't have a $ prefix.

HsiangKai updated this revision to Diff 388787.Nov 21 2021, 6:56 PM

Address @jrtc27's comments.

Harbormaster completed remote builds in B135332: Diff 388787.Nov 21 2021, 7:33 PM
asb accepted this revision.Nov 22 2021, 4:02 AM

LGTM, thanks!

This revision is now accepted and ready to land.Nov 22 2021, 4:02 AM
Closed by commit rG137d3474ca39: [RISCV] Reverse the order of loading/storing callee-saved registers. (authored by HsiangKai). · Explain WhyNov 22 2021, 7:02 AM
This revision was automatically updated to reflect the committed changes.
HsiangKai added a commit: rG137d3474ca39: [RISCV] Reverse the order of loading/storing callee-saved registers..

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Diff 388909

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

Show First 20 Lines • Show All 431 Lines • ▼ Show 20 Linesvoid RISCVFrameLowering::emitPrologue(MachineFunction &MF,
// registers as the frame pointer must be modified after it has been saved // registers as the frame pointer must be modified after it has been saved
// to the stack, not before. // to the stack, not before.
// FIXME: assumes exactly one instruction is used to save each callee-saved // FIXME: assumes exactly one instruction is used to save each callee-saved
// register. // register.
std::advance(MBBI, getNonLibcallCSI(MF, CSI).size()); std::advance(MBBI, getNonLibcallCSI(MF, CSI).size());
// Iterate over list of callee-saved registers and emit .cfi_offset // Iterate over list of callee-saved registers and emit .cfi_offset
// directives. // directives.
for (const auto &Entry : CSI) { for (const auto &Entry : CSI) {
asbUnsubmitted
Not Done
ReplyInline Actions

Worth adding a comment to explain why list is being iterated in reverse order.

asb: Worth adding a comment to explain why list is being iterated in reverse order.
int FrameIdx = Entry.getFrameIdx(); int FrameIdx = Entry.getFrameIdx();
int64_t Offset; int64_t Offset;
// Offsets for objects with fixed locations (IE: those saved by libcall) are // Offsets for objects with fixed locations (IE: those saved by libcall) are
// simply calculated from the frame index. // simply calculated from the frame index.
if (FrameIdx < 0) if (FrameIdx < 0)
Offset = FrameIdx * (int64_t) STI.getXLen() / 8; Offset = FrameIdx * (int64_t) STI.getXLen() / 8;
else else
Offset = MFI.getObjectOffset(Entry.getFrameIdx()) - Offset = MFI.getObjectOffset(Entry.getFrameIdx()) -
▲ Show 20 Lines • Show All 588 Lines • ▼ Show 20 Lines if (SpillLibCall) {
// Add registers spilled in libcall as liveins. // Add registers spilled in libcall as liveins.
for (auto &CS : CSI) for (auto &CS : CSI)
MBB.addLiveIn(CS.getReg()); MBB.addLiveIn(CS.getReg());
} }
// Manually spill values not spilled by libcall. // Manually spill values not spilled by libcall.
const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI); const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI);
for (auto &CS : NonLibcallCSI) { for (auto &CS : NonLibcallCSI) {
asbUnsubmitted
Not Done
ReplyInline Actions

Worth adding a comment to explain why list is being iterated in reverse order.

asb: Worth adding a comment to explain why list is being iterated in reverse order.
// Insert the spill to the stack frame. // Insert the spill to the stack frame.
Register Reg = CS.getReg(); Register Reg = CS.getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.storeRegToStackSlot(MBB, MI, Reg, !MBB.isLiveIn(Reg), CS.getFrameIdx(), TII.storeRegToStackSlot(MBB, MI, Reg, !MBB.isLiveIn(Reg), CS.getFrameIdx(),
RC, TRI); RC, TRI);
} }
return true; return true;
} }
bool RISCVFrameLowering::restoreCalleeSavedRegisters( bool RISCVFrameLowering::restoreCalleeSavedRegisters(
MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const { MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
if (CSI.empty()) if (CSI.empty())
return true; return true;
MachineFunction *MF = MBB.getParent(); MachineFunction *MF = MBB.getParent();
const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo(); const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
DebugLoc DL; DebugLoc DL;
if (MI != MBB.end() && !MI->isDebugInstr()) if (MI != MBB.end() && !MI->isDebugInstr())
DL = MI->getDebugLoc(); DL = MI->getDebugLoc();
// Manually restore values not restored by libcall. Insert in reverse order. // Manually restore values not restored by libcall.
// Keep the same order as in the prologue. There is no need to reverse the
// order in the epilogue. In addition, the return address will be restored
jrtc27Unsubmitted
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Missing "the" before "return address"

jrtc27: Missing "the" before "return address"
// first in the epilogue. It increases the opportunity to avoid the
jrtc27Unsubmitted
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I wouldn't talk about filling bubbles, there may not be any anyway. Just say it avoids potential load-to-use data hazards, as in the commit message.

jrtc27: I wouldn't talk about filling bubbles, there may not be any anyway. Just say it avoids…
// load-to-use data hazard between loading RA and return by RA.
jrtc27Unsubmitted
Not Done
ReplyInline Actions

RISC-V registers don't have a $ prefix.

jrtc27: RISC-V registers don't have a $ prefix.
// loadRegFromStackSlot can insert multiple instructions. // loadRegFromStackSlot can insert multiple instructions.
const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI); const auto &NonLibcallCSI = getNonLibcallCSI(*MF, CSI);
for (auto &CS : reverse(NonLibcallCSI)) { for (auto &CS : NonLibcallCSI) {
asbUnsubmitted
Not Done
ReplyInline Actions

I think the comment above needs updating now, and again it would be worth explaining the desired iteration order.

asb: I think the comment above needs updating now, and again it would be worth explaining the…
Register Reg = CS.getReg(); Register Reg = CS.getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI); TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI);
assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!"); assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!");
} }
const char *RestoreLibCall = getRestoreLibCallName(*MF, CSI); const char *RestoreLibCall = getRestoreLibCallName(*MF, CSI);
if (RestoreLibCall) { if (RestoreLibCall) {
▲ Show 20 Lines • Show All 87 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/aext-to-sext.ll

Show All 19 Lines
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: .LBB0_2: # %bb2 ; RV64I-NEXT: .LBB0_2: # %bb2
; RV64I-NEXT: # =>This Inner Loop Header: Depth=1 ; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
; RV64I-NEXT: call hoge@plt ; RV64I-NEXT: call hoge@plt
; RV64I-NEXT: addiw s1, s1, 1 ; RV64I-NEXT: addiw s1, s1, 1
; RV64I-NEXT: bne s1, s0, .LBB0_2 ; RV64I-NEXT: bne s1, s0, .LBB0_2
; RV64I-NEXT: .LBB0_3: # %bb6 ; RV64I-NEXT: .LBB0_3: # %bb6
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
bb: bb:
%tmp = icmp eq i32 %arg, %arg1 %tmp = icmp eq i32 %arg, %arg1
br i1 %tmp, label %bb6, label %bb2 br i1 %tmp, label %bb6, label %bb2
bb2: ; preds = %bb2, %bb bb2: ; preds = %bb2, %bb
%tmp3 = phi i32 [ %tmp4, %bb2 ], [ %arg, %bb ] %tmp3 = phi i32 [ %tmp4, %bb2 ], [ %arg, %bb ]
Show All 39 Lines

llvm/test/CodeGen/RISCV/alloca.ll

Show All 14 Lines
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: addi s0, sp, 16 ; RV32I-NEXT: addi s0, sp, 16
; RV32I-NEXT: addi a0, a0, 15 ; RV32I-NEXT: addi a0, a0, 15
; RV32I-NEXT: andi a0, a0, -16 ; RV32I-NEXT: andi a0, a0, -16
; RV32I-NEXT: sub a0, sp, a0 ; RV32I-NEXT: sub a0, sp, a0
; RV32I-NEXT: mv sp, a0 ; RV32I-NEXT: mv sp, a0
; RV32I-NEXT: call notdead@plt ; RV32I-NEXT: call notdead@plt
; RV32I-NEXT: addi sp, s0, -16 ; RV32I-NEXT: addi sp, s0, -16
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
%1 = alloca i8, i32 %n %1 = alloca i8, i32 %n
call void @notdead(i8* %1) call void @notdead(i8* %1)
ret void ret void
} }
declare i8* @llvm.stacksave() declare i8* @llvm.stacksave()
Show All 10 Lines
; RV32I-NEXT: mv s1, sp ; RV32I-NEXT: mv s1, sp
; RV32I-NEXT: addi a0, a0, 15 ; RV32I-NEXT: addi a0, a0, 15
; RV32I-NEXT: andi a0, a0, -16 ; RV32I-NEXT: andi a0, a0, -16
; RV32I-NEXT: sub a0, sp, a0 ; RV32I-NEXT: sub a0, sp, a0
; RV32I-NEXT: mv sp, a0 ; RV32I-NEXT: mv sp, a0
; RV32I-NEXT: call notdead@plt ; RV32I-NEXT: call notdead@plt
; RV32I-NEXT: mv sp, s1 ; RV32I-NEXT: mv sp, s1
; RV32I-NEXT: addi sp, s0, -16 ; RV32I-NEXT: addi sp, s0, -16
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
%sp = call i8* @llvm.stacksave() %sp = call i8* @llvm.stacksave()
%addr = alloca i8, i32 %n %addr = alloca i8, i32 %n
call void @notdead(i8* %addr) call void @notdead(i8* %addr)
call void @llvm.stackrestore(i8* %sp) call void @llvm.stackrestore(i8* %sp)
ret void ret void
} }
Show All 27 Lines
; RV32I-NEXT: li a4, 5 ; RV32I-NEXT: li a4, 5
; RV32I-NEXT: li a5, 6 ; RV32I-NEXT: li a5, 6
; RV32I-NEXT: li a6, 7 ; RV32I-NEXT: li a6, 7
; RV32I-NEXT: li a7, 8 ; RV32I-NEXT: li a7, 8
; RV32I-NEXT: sw t0, 0(sp) ; RV32I-NEXT: sw t0, 0(sp)
; RV32I-NEXT: call func@plt ; RV32I-NEXT: call func@plt
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: addi sp, s0, -16 ; RV32I-NEXT: addi sp, s0, -16
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
%1 = alloca i8, i32 %n %1 = alloca i8, i32 %n
call void @func(i8* %1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, call void @func(i8* %1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8,
i32 9, i32 10, i32 11, i32 12) i32 9, i32 10, i32 11, i32 12)
ret void ret void
} }

llvm/test/CodeGen/RISCV/atomic-rmw.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 2,028 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB35_1 ; RV32I-NEXT: blt s1, a0, .LBB35_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB35_1 ; RV32I-NEXT: j .LBB35_1
; RV32I-NEXT: .LBB35_4: # %atomicrmw.end ; RV32I-NEXT: .LBB35_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i8_monotonic: ; RV32IA-LABEL: atomicrmw_max_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB35_1 ; RV64I-NEXT: blt s1, a0, .LBB35_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB35_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB35_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB35_1 ; RV64I-NEXT: j .LBB35_1
; RV64I-NEXT: .LBB35_4: # %atomicrmw.end ; RV64I-NEXT: .LBB35_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i8_monotonic: ; RV64IA-LABEL: atomicrmw_max_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB36_1 ; RV32I-NEXT: blt s1, a0, .LBB36_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB36_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB36_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB36_1 ; RV32I-NEXT: j .LBB36_1
; RV32I-NEXT: .LBB36_4: # %atomicrmw.end ; RV32I-NEXT: .LBB36_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i8_acquire: ; RV32IA-LABEL: atomicrmw_max_i8_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB36_1 ; RV64I-NEXT: blt s1, a0, .LBB36_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB36_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB36_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB36_1 ; RV64I-NEXT: j .LBB36_1
; RV64I-NEXT: .LBB36_4: # %atomicrmw.end ; RV64I-NEXT: .LBB36_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i8_acquire: ; RV64IA-LABEL: atomicrmw_max_i8_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB37_1 ; RV32I-NEXT: blt s1, a0, .LBB37_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB37_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB37_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB37_1 ; RV32I-NEXT: j .LBB37_1
; RV32I-NEXT: .LBB37_4: # %atomicrmw.end ; RV32I-NEXT: .LBB37_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i8_release: ; RV32IA-LABEL: atomicrmw_max_i8_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB37_1 ; RV64I-NEXT: blt s1, a0, .LBB37_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB37_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB37_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB37_1 ; RV64I-NEXT: j .LBB37_1
; RV64I-NEXT: .LBB37_4: # %atomicrmw.end ; RV64I-NEXT: .LBB37_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i8_release: ; RV64IA-LABEL: atomicrmw_max_i8_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB38_1 ; RV32I-NEXT: blt s1, a0, .LBB38_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB38_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB38_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB38_1 ; RV32I-NEXT: j .LBB38_1
; RV32I-NEXT: .LBB38_4: # %atomicrmw.end ; RV32I-NEXT: .LBB38_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i8_acq_rel: ; RV32IA-LABEL: atomicrmw_max_i8_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB38_1 ; RV64I-NEXT: blt s1, a0, .LBB38_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB38_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB38_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB38_1 ; RV64I-NEXT: j .LBB38_1
; RV64I-NEXT: .LBB38_4: # %atomicrmw.end ; RV64I-NEXT: .LBB38_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i8_acq_rel: ; RV64IA-LABEL: atomicrmw_max_i8_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB39_1 ; RV32I-NEXT: blt s1, a0, .LBB39_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB39_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB39_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB39_1 ; RV32I-NEXT: j .LBB39_1
; RV32I-NEXT: .LBB39_4: # %atomicrmw.end ; RV32I-NEXT: .LBB39_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i8_seq_cst: ; RV32IA-LABEL: atomicrmw_max_i8_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB39_1 ; RV64I-NEXT: blt s1, a0, .LBB39_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB39_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB39_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB39_1 ; RV64I-NEXT: j .LBB39_1
; RV64I-NEXT: .LBB39_4: # %atomicrmw.end ; RV64I-NEXT: .LBB39_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i8_seq_cst: ; RV64IA-LABEL: atomicrmw_max_i8_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB40_1 ; RV32I-NEXT: bge s1, a0, .LBB40_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB40_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB40_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB40_1 ; RV32I-NEXT: j .LBB40_1
; RV32I-NEXT: .LBB40_4: # %atomicrmw.end ; RV32I-NEXT: .LBB40_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i8_monotonic: ; RV32IA-LABEL: atomicrmw_min_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB40_1 ; RV64I-NEXT: bge s1, a0, .LBB40_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB40_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB40_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB40_1 ; RV64I-NEXT: j .LBB40_1
; RV64I-NEXT: .LBB40_4: # %atomicrmw.end ; RV64I-NEXT: .LBB40_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i8_monotonic: ; RV64IA-LABEL: atomicrmw_min_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB41_1 ; RV32I-NEXT: bge s1, a0, .LBB41_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB41_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB41_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB41_1 ; RV32I-NEXT: j .LBB41_1
; RV32I-NEXT: .LBB41_4: # %atomicrmw.end ; RV32I-NEXT: .LBB41_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i8_acquire: ; RV32IA-LABEL: atomicrmw_min_i8_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB41_1 ; RV64I-NEXT: bge s1, a0, .LBB41_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB41_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB41_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB41_1 ; RV64I-NEXT: j .LBB41_1
; RV64I-NEXT: .LBB41_4: # %atomicrmw.end ; RV64I-NEXT: .LBB41_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i8_acquire: ; RV64IA-LABEL: atomicrmw_min_i8_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB42_1 ; RV32I-NEXT: bge s1, a0, .LBB42_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB42_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB42_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB42_1 ; RV32I-NEXT: j .LBB42_1
; RV32I-NEXT: .LBB42_4: # %atomicrmw.end ; RV32I-NEXT: .LBB42_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i8_release: ; RV32IA-LABEL: atomicrmw_min_i8_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB42_1 ; RV64I-NEXT: bge s1, a0, .LBB42_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB42_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB42_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB42_1 ; RV64I-NEXT: j .LBB42_1
; RV64I-NEXT: .LBB42_4: # %atomicrmw.end ; RV64I-NEXT: .LBB42_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i8_release: ; RV64IA-LABEL: atomicrmw_min_i8_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB43_1 ; RV32I-NEXT: bge s1, a0, .LBB43_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB43_1 ; RV32I-NEXT: j .LBB43_1
; RV32I-NEXT: .LBB43_4: # %atomicrmw.end ; RV32I-NEXT: .LBB43_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i8_acq_rel: ; RV32IA-LABEL: atomicrmw_min_i8_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB43_1 ; RV64I-NEXT: bge s1, a0, .LBB43_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB43_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB43_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB43_1 ; RV64I-NEXT: j .LBB43_1
; RV64I-NEXT: .LBB43_4: # %atomicrmw.end ; RV64I-NEXT: .LBB43_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i8_acq_rel: ; RV64IA-LABEL: atomicrmw_min_i8_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB44_1 ; RV32I-NEXT: bge s1, a0, .LBB44_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB44_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB44_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB44_1 ; RV32I-NEXT: j .LBB44_1
; RV32I-NEXT: .LBB44_4: # %atomicrmw.end ; RV32I-NEXT: .LBB44_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i8_seq_cst: ; RV32IA-LABEL: atomicrmw_min_i8_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB44_1 ; RV64I-NEXT: bge s1, a0, .LBB44_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB44_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB44_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB44_1 ; RV64I-NEXT: j .LBB44_1
; RV64I-NEXT: .LBB44_4: # %atomicrmw.end ; RV64I-NEXT: .LBB44_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i8_seq_cst: ; RV64IA-LABEL: atomicrmw_min_i8_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a0, .LBB45_1 ; RV32I-NEXT: bltu s1, a0, .LBB45_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB45_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB45_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB45_1 ; RV32I-NEXT: j .LBB45_1
; RV32I-NEXT: .LBB45_4: # %atomicrmw.end ; RV32I-NEXT: .LBB45_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i8_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB45_1 ; RV64I-NEXT: bltu s1, a0, .LBB45_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB45_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB45_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB45_1 ; RV64I-NEXT: j .LBB45_1
; RV64I-NEXT: .LBB45_4: # %atomicrmw.end ; RV64I-NEXT: .LBB45_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i8_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a0, .LBB46_1 ; RV32I-NEXT: bltu s1, a0, .LBB46_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB46_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB46_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB46_1 ; RV32I-NEXT: j .LBB46_1
; RV32I-NEXT: .LBB46_4: # %atomicrmw.end ; RV32I-NEXT: .LBB46_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i8_acquire: ; RV32IA-LABEL: atomicrmw_umax_i8_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB46_1 ; RV64I-NEXT: bltu s1, a0, .LBB46_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB46_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB46_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB46_1 ; RV64I-NEXT: j .LBB46_1
; RV64I-NEXT: .LBB46_4: # %atomicrmw.end ; RV64I-NEXT: .LBB46_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i8_acquire: ; RV64IA-LABEL: atomicrmw_umax_i8_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a0, .LBB47_1 ; RV32I-NEXT: bltu s1, a0, .LBB47_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB47_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB47_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB47_1 ; RV32I-NEXT: j .LBB47_1
; RV32I-NEXT: .LBB47_4: # %atomicrmw.end ; RV32I-NEXT: .LBB47_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i8_release: ; RV32IA-LABEL: atomicrmw_umax_i8_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB47_1 ; RV64I-NEXT: bltu s1, a0, .LBB47_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB47_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB47_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB47_1 ; RV64I-NEXT: j .LBB47_1
; RV64I-NEXT: .LBB47_4: # %atomicrmw.end ; RV64I-NEXT: .LBB47_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i8_release: ; RV64IA-LABEL: atomicrmw_umax_i8_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a0, .LBB48_1 ; RV32I-NEXT: bltu s1, a0, .LBB48_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB48_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB48_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB48_1 ; RV32I-NEXT: j .LBB48_1
; RV32I-NEXT: .LBB48_4: # %atomicrmw.end ; RV32I-NEXT: .LBB48_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i8_acq_rel: ; RV32IA-LABEL: atomicrmw_umax_i8_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB48_1 ; RV64I-NEXT: bltu s1, a0, .LBB48_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB48_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB48_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB48_1 ; RV64I-NEXT: j .LBB48_1
; RV64I-NEXT: .LBB48_4: # %atomicrmw.end ; RV64I-NEXT: .LBB48_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i8_acq_rel: ; RV64IA-LABEL: atomicrmw_umax_i8_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a0, .LBB49_1 ; RV32I-NEXT: bltu s1, a0, .LBB49_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB49_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB49_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB49_1 ; RV32I-NEXT: j .LBB49_1
; RV32I-NEXT: .LBB49_4: # %atomicrmw.end ; RV32I-NEXT: .LBB49_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i8_seq_cst: ; RV32IA-LABEL: atomicrmw_umax_i8_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB49_1 ; RV64I-NEXT: bltu s1, a0, .LBB49_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB49_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB49_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB49_1 ; RV64I-NEXT: j .LBB49_1
; RV64I-NEXT: .LBB49_4: # %atomicrmw.end ; RV64I-NEXT: .LBB49_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i8_seq_cst: ; RV64IA-LABEL: atomicrmw_umax_i8_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a0, .LBB50_1 ; RV32I-NEXT: bgeu s1, a0, .LBB50_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB50_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB50_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB50_1 ; RV32I-NEXT: j .LBB50_1
; RV32I-NEXT: .LBB50_4: # %atomicrmw.end ; RV32I-NEXT: .LBB50_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i8_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB50_1 ; RV64I-NEXT: bgeu s1, a0, .LBB50_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB50_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB50_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB50_1 ; RV64I-NEXT: j .LBB50_1
; RV64I-NEXT: .LBB50_4: # %atomicrmw.end ; RV64I-NEXT: .LBB50_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i8_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a0, .LBB51_1 ; RV32I-NEXT: bgeu s1, a0, .LBB51_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB51_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB51_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB51_1 ; RV32I-NEXT: j .LBB51_1
; RV32I-NEXT: .LBB51_4: # %atomicrmw.end ; RV32I-NEXT: .LBB51_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i8_acquire: ; RV32IA-LABEL: atomicrmw_umin_i8_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB51_1 ; RV64I-NEXT: bgeu s1, a0, .LBB51_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB51_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB51_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB51_1 ; RV64I-NEXT: j .LBB51_1
; RV64I-NEXT: .LBB51_4: # %atomicrmw.end ; RV64I-NEXT: .LBB51_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i8_acquire: ; RV64IA-LABEL: atomicrmw_umin_i8_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a0, .LBB52_1 ; RV32I-NEXT: bgeu s1, a0, .LBB52_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB52_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB52_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB52_1 ; RV32I-NEXT: j .LBB52_1
; RV32I-NEXT: .LBB52_4: # %atomicrmw.end ; RV32I-NEXT: .LBB52_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i8_release: ; RV32IA-LABEL: atomicrmw_umin_i8_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB52_1 ; RV64I-NEXT: bgeu s1, a0, .LBB52_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB52_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB52_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB52_1 ; RV64I-NEXT: j .LBB52_1
; RV64I-NEXT: .LBB52_4: # %atomicrmw.end ; RV64I-NEXT: .LBB52_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i8_release: ; RV64IA-LABEL: atomicrmw_umin_i8_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a0, .LBB53_1 ; RV32I-NEXT: bgeu s1, a0, .LBB53_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB53_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB53_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB53_1 ; RV32I-NEXT: j .LBB53_1
; RV32I-NEXT: .LBB53_4: # %atomicrmw.end ; RV32I-NEXT: .LBB53_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i8_acq_rel: ; RV32IA-LABEL: atomicrmw_umin_i8_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB53_1 ; RV64I-NEXT: bgeu s1, a0, .LBB53_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB53_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB53_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB53_1 ; RV64I-NEXT: j .LBB53_1
; RV64I-NEXT: .LBB53_4: # %atomicrmw.end ; RV64I-NEXT: .LBB53_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i8_acq_rel: ; RV64IA-LABEL: atomicrmw_umin_i8_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a0, .LBB54_1 ; RV32I-NEXT: bgeu s1, a0, .LBB54_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB54_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB54_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB54_1 ; RV32I-NEXT: j .LBB54_1
; RV32I-NEXT: .LBB54_4: # %atomicrmw.end ; RV32I-NEXT: .LBB54_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i8_seq_cst: ; RV32IA-LABEL: atomicrmw_umin_i8_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB54_1 ; RV64I-NEXT: bgeu s1, a0, .LBB54_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB54_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB54_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB54_1 ; RV64I-NEXT: j .LBB54_1
; RV64I-NEXT: .LBB54_4: # %atomicrmw.end ; RV64I-NEXT: .LBB54_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i8_seq_cst: ; RV64IA-LABEL: atomicrmw_umin_i8_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 2,130 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB90_1 ; RV32I-NEXT: blt s1, a0, .LBB90_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB90_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB90_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB90_1 ; RV32I-NEXT: j .LBB90_1
; RV32I-NEXT: .LBB90_4: # %atomicrmw.end ; RV32I-NEXT: .LBB90_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i16_monotonic: ; RV32IA-LABEL: atomicrmw_max_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB90_1 ; RV64I-NEXT: blt s1, a0, .LBB90_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB90_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB90_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB90_1 ; RV64I-NEXT: j .LBB90_1
; RV64I-NEXT: .LBB90_4: # %atomicrmw.end ; RV64I-NEXT: .LBB90_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i16_monotonic: ; RV64IA-LABEL: atomicrmw_max_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB91_1 ; RV32I-NEXT: blt s1, a0, .LBB91_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB91_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB91_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB91_1 ; RV32I-NEXT: j .LBB91_1
; RV32I-NEXT: .LBB91_4: # %atomicrmw.end ; RV32I-NEXT: .LBB91_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i16_acquire: ; RV32IA-LABEL: atomicrmw_max_i16_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB91_1 ; RV64I-NEXT: blt s1, a0, .LBB91_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB91_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB91_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB91_1 ; RV64I-NEXT: j .LBB91_1
; RV64I-NEXT: .LBB91_4: # %atomicrmw.end ; RV64I-NEXT: .LBB91_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i16_acquire: ; RV64IA-LABEL: atomicrmw_max_i16_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB92_1 ; RV32I-NEXT: blt s1, a0, .LBB92_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB92_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB92_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB92_1 ; RV32I-NEXT: j .LBB92_1
; RV32I-NEXT: .LBB92_4: # %atomicrmw.end ; RV32I-NEXT: .LBB92_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i16_release: ; RV32IA-LABEL: atomicrmw_max_i16_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB92_1 ; RV64I-NEXT: blt s1, a0, .LBB92_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB92_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB92_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB92_1 ; RV64I-NEXT: j .LBB92_1
; RV64I-NEXT: .LBB92_4: # %atomicrmw.end ; RV64I-NEXT: .LBB92_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i16_release: ; RV64IA-LABEL: atomicrmw_max_i16_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB93_1 ; RV32I-NEXT: blt s1, a0, .LBB93_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB93_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB93_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB93_1 ; RV32I-NEXT: j .LBB93_1
; RV32I-NEXT: .LBB93_4: # %atomicrmw.end ; RV32I-NEXT: .LBB93_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i16_acq_rel: ; RV32IA-LABEL: atomicrmw_max_i16_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB93_1 ; RV64I-NEXT: blt s1, a0, .LBB93_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB93_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB93_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB93_1 ; RV64I-NEXT: j .LBB93_1
; RV64I-NEXT: .LBB93_4: # %atomicrmw.end ; RV64I-NEXT: .LBB93_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i16_acq_rel: ; RV64IA-LABEL: atomicrmw_max_i16_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a0, .LBB94_1 ; RV32I-NEXT: blt s1, a0, .LBB94_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB94_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB94_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB94_1 ; RV32I-NEXT: j .LBB94_1
; RV32I-NEXT: .LBB94_4: # %atomicrmw.end ; RV32I-NEXT: .LBB94_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i16_seq_cst: ; RV32IA-LABEL: atomicrmw_max_i16_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB94_1 ; RV64I-NEXT: blt s1, a0, .LBB94_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB94_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB94_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB94_1 ; RV64I-NEXT: j .LBB94_1
; RV64I-NEXT: .LBB94_4: # %atomicrmw.end ; RV64I-NEXT: .LBB94_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i16_seq_cst: ; RV64IA-LABEL: atomicrmw_max_i16_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB95_1 ; RV32I-NEXT: bge s1, a0, .LBB95_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB95_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB95_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB95_1 ; RV32I-NEXT: j .LBB95_1
; RV32I-NEXT: .LBB95_4: # %atomicrmw.end ; RV32I-NEXT: .LBB95_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i16_monotonic: ; RV32IA-LABEL: atomicrmw_min_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB95_1 ; RV64I-NEXT: bge s1, a0, .LBB95_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB95_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB95_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB95_1 ; RV64I-NEXT: j .LBB95_1
; RV64I-NEXT: .LBB95_4: # %atomicrmw.end ; RV64I-NEXT: .LBB95_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i16_monotonic: ; RV64IA-LABEL: atomicrmw_min_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB96_1 ; RV32I-NEXT: bge s1, a0, .LBB96_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB96_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB96_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB96_1 ; RV32I-NEXT: j .LBB96_1
; RV32I-NEXT: .LBB96_4: # %atomicrmw.end ; RV32I-NEXT: .LBB96_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i16_acquire: ; RV32IA-LABEL: atomicrmw_min_i16_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB96_1 ; RV64I-NEXT: bge s1, a0, .LBB96_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB96_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB96_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB96_1 ; RV64I-NEXT: j .LBB96_1
; RV64I-NEXT: .LBB96_4: # %atomicrmw.end ; RV64I-NEXT: .LBB96_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i16_acquire: ; RV64IA-LABEL: atomicrmw_min_i16_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB97_1 ; RV32I-NEXT: bge s1, a0, .LBB97_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB97_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB97_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB97_1 ; RV32I-NEXT: j .LBB97_1
; RV32I-NEXT: .LBB97_4: # %atomicrmw.end ; RV32I-NEXT: .LBB97_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i16_release: ; RV32IA-LABEL: atomicrmw_min_i16_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB97_1 ; RV64I-NEXT: bge s1, a0, .LBB97_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB97_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB97_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB97_1 ; RV64I-NEXT: j .LBB97_1
; RV64I-NEXT: .LBB97_4: # %atomicrmw.end ; RV64I-NEXT: .LBB97_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i16_release: ; RV64IA-LABEL: atomicrmw_min_i16_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB98_1 ; RV32I-NEXT: bge s1, a0, .LBB98_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB98_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB98_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB98_1 ; RV32I-NEXT: j .LBB98_1
; RV32I-NEXT: .LBB98_4: # %atomicrmw.end ; RV32I-NEXT: .LBB98_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i16_acq_rel: ; RV32IA-LABEL: atomicrmw_min_i16_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB98_1 ; RV64I-NEXT: bge s1, a0, .LBB98_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB98_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB98_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB98_1 ; RV64I-NEXT: j .LBB98_1
; RV64I-NEXT: .LBB98_4: # %atomicrmw.end ; RV64I-NEXT: .LBB98_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i16_acq_rel: ; RV64IA-LABEL: atomicrmw_min_i16_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a0, .LBB99_1 ; RV32I-NEXT: bge s1, a0, .LBB99_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB99_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB99_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB99_1 ; RV32I-NEXT: j .LBB99_1
; RV32I-NEXT: .LBB99_4: # %atomicrmw.end ; RV32I-NEXT: .LBB99_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i16_seq_cst: ; RV32IA-LABEL: atomicrmw_min_i16_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB99_1 ; RV64I-NEXT: bge s1, a0, .LBB99_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB99_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB99_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB99_1 ; RV64I-NEXT: j .LBB99_1
; RV64I-NEXT: .LBB99_4: # %atomicrmw.end ; RV64I-NEXT: .LBB99_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i16_seq_cst: ; RV64IA-LABEL: atomicrmw_min_i16_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bltu s1, a0, .LBB100_1 ; RV32I-NEXT: bltu s1, a0, .LBB100_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB100_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB100_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB100_1 ; RV32I-NEXT: j .LBB100_1
; RV32I-NEXT: .LBB100_4: # %atomicrmw.end ; RV32I-NEXT: .LBB100_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i16_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bltu s1, a0, .LBB100_1 ; RV64I-NEXT: bltu s1, a0, .LBB100_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB100_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB100_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB100_1 ; RV64I-NEXT: j .LBB100_1
; RV64I-NEXT: .LBB100_4: # %atomicrmw.end ; RV64I-NEXT: .LBB100_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i16_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bltu s1, a0, .LBB101_1 ; RV32I-NEXT: bltu s1, a0, .LBB101_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB101_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB101_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB101_1 ; RV32I-NEXT: j .LBB101_1
; RV32I-NEXT: .LBB101_4: # %atomicrmw.end ; RV32I-NEXT: .LBB101_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i16_acquire: ; RV32IA-LABEL: atomicrmw_umax_i16_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bltu s1, a0, .LBB101_1 ; RV64I-NEXT: bltu s1, a0, .LBB101_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB101_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB101_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB101_1 ; RV64I-NEXT: j .LBB101_1
; RV64I-NEXT: .LBB101_4: # %atomicrmw.end ; RV64I-NEXT: .LBB101_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i16_acquire: ; RV64IA-LABEL: atomicrmw_umax_i16_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bltu s1, a0, .LBB102_1 ; RV32I-NEXT: bltu s1, a0, .LBB102_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB102_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB102_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB102_1 ; RV32I-NEXT: j .LBB102_1
; RV32I-NEXT: .LBB102_4: # %atomicrmw.end ; RV32I-NEXT: .LBB102_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i16_release: ; RV32IA-LABEL: atomicrmw_umax_i16_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bltu s1, a0, .LBB102_1 ; RV64I-NEXT: bltu s1, a0, .LBB102_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB102_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB102_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB102_1 ; RV64I-NEXT: j .LBB102_1
; RV64I-NEXT: .LBB102_4: # %atomicrmw.end ; RV64I-NEXT: .LBB102_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i16_release: ; RV64IA-LABEL: atomicrmw_umax_i16_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bltu s1, a0, .LBB103_1 ; RV32I-NEXT: bltu s1, a0, .LBB103_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB103_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB103_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB103_1 ; RV32I-NEXT: j .LBB103_1
; RV32I-NEXT: .LBB103_4: # %atomicrmw.end ; RV32I-NEXT: .LBB103_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i16_acq_rel: ; RV32IA-LABEL: atomicrmw_umax_i16_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bltu s1, a0, .LBB103_1 ; RV64I-NEXT: bltu s1, a0, .LBB103_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB103_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB103_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB103_1 ; RV64I-NEXT: j .LBB103_1
; RV64I-NEXT: .LBB103_4: # %atomicrmw.end ; RV64I-NEXT: .LBB103_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i16_acq_rel: ; RV64IA-LABEL: atomicrmw_umax_i16_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bltu s1, a0, .LBB104_1 ; RV32I-NEXT: bltu s1, a0, .LBB104_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB104_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB104_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB104_1 ; RV32I-NEXT: j .LBB104_1
; RV32I-NEXT: .LBB104_4: # %atomicrmw.end ; RV32I-NEXT: .LBB104_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i16_seq_cst: ; RV32IA-LABEL: atomicrmw_umax_i16_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bltu s1, a0, .LBB104_1 ; RV64I-NEXT: bltu s1, a0, .LBB104_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB104_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB104_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB104_1 ; RV64I-NEXT: j .LBB104_1
; RV64I-NEXT: .LBB104_4: # %atomicrmw.end ; RV64I-NEXT: .LBB104_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i16_seq_cst: ; RV64IA-LABEL: atomicrmw_umax_i16_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bgeu s1, a0, .LBB105_1 ; RV32I-NEXT: bgeu s1, a0, .LBB105_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB105_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB105_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB105_1 ; RV32I-NEXT: j .LBB105_1
; RV32I-NEXT: .LBB105_4: # %atomicrmw.end ; RV32I-NEXT: .LBB105_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i16_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bgeu s1, a0, .LBB105_1 ; RV64I-NEXT: bgeu s1, a0, .LBB105_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB105_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB105_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB105_1 ; RV64I-NEXT: j .LBB105_1
; RV64I-NEXT: .LBB105_4: # %atomicrmw.end ; RV64I-NEXT: .LBB105_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i16_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bgeu s1, a0, .LBB106_1 ; RV32I-NEXT: bgeu s1, a0, .LBB106_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB106_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB106_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB106_1 ; RV32I-NEXT: j .LBB106_1
; RV32I-NEXT: .LBB106_4: # %atomicrmw.end ; RV32I-NEXT: .LBB106_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i16_acquire: ; RV32IA-LABEL: atomicrmw_umin_i16_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bgeu s1, a0, .LBB106_1 ; RV64I-NEXT: bgeu s1, a0, .LBB106_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB106_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB106_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB106_1 ; RV64I-NEXT: j .LBB106_1
; RV64I-NEXT: .LBB106_4: # %atomicrmw.end ; RV64I-NEXT: .LBB106_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i16_acquire: ; RV64IA-LABEL: atomicrmw_umin_i16_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bgeu s1, a0, .LBB107_1 ; RV32I-NEXT: bgeu s1, a0, .LBB107_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB107_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB107_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB107_1 ; RV32I-NEXT: j .LBB107_1
; RV32I-NEXT: .LBB107_4: # %atomicrmw.end ; RV32I-NEXT: .LBB107_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i16_release: ; RV32IA-LABEL: atomicrmw_umin_i16_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bgeu s1, a0, .LBB107_1 ; RV64I-NEXT: bgeu s1, a0, .LBB107_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB107_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB107_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB107_1 ; RV64I-NEXT: j .LBB107_1
; RV64I-NEXT: .LBB107_4: # %atomicrmw.end ; RV64I-NEXT: .LBB107_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i16_release: ; RV64IA-LABEL: atomicrmw_umin_i16_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bgeu s1, a0, .LBB108_1 ; RV32I-NEXT: bgeu s1, a0, .LBB108_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB108_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB108_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB108_1 ; RV32I-NEXT: j .LBB108_1
; RV32I-NEXT: .LBB108_4: # %atomicrmw.end ; RV32I-NEXT: .LBB108_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i16_acq_rel: ; RV32IA-LABEL: atomicrmw_umin_i16_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bgeu s1, a0, .LBB108_1 ; RV64I-NEXT: bgeu s1, a0, .LBB108_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB108_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB108_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB108_1 ; RV64I-NEXT: j .LBB108_1
; RV64I-NEXT: .LBB108_4: # %atomicrmw.end ; RV64I-NEXT: .LBB108_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i16_acq_rel: ; RV64IA-LABEL: atomicrmw_umin_i16_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a1 ; RV32I-NEXT: mv a2, a1
; RV32I-NEXT: bgeu s1, a0, .LBB109_1 ; RV32I-NEXT: bgeu s1, a0, .LBB109_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB109_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB109_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB109_1 ; RV32I-NEXT: j .LBB109_1
; RV32I-NEXT: .LBB109_4: # %atomicrmw.end ; RV32I-NEXT: .LBB109_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i16_seq_cst: ; RV32IA-LABEL: atomicrmw_umin_i16_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv a2, a1 ; RV64I-NEXT: mv a2, a1
; RV64I-NEXT: bgeu s1, a0, .LBB109_1 ; RV64I-NEXT: bgeu s1, a0, .LBB109_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB109_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB109_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB109_1 ; RV64I-NEXT: j .LBB109_1
; RV64I-NEXT: .LBB109_4: # %atomicrmw.end ; RV64I-NEXT: .LBB109_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i16_seq_cst: ; RV64IA-LABEL: atomicrmw_umin_i16_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 1,316 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a3, .LBB145_1 ; RV32I-NEXT: blt s1, a3, .LBB145_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB145_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB145_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB145_1 ; RV32I-NEXT: j .LBB145_1
; RV32I-NEXT: .LBB145_4: # %atomicrmw.end ; RV32I-NEXT: .LBB145_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i32_monotonic: ; RV32IA-LABEL: atomicrmw_max_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomax.w a0, a1, (a0) ; RV32IA-NEXT: amomax.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB145_1 ; RV64I-NEXT: blt s1, a0, .LBB145_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB145_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB145_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB145_1 ; RV64I-NEXT: j .LBB145_1
; RV64I-NEXT: .LBB145_4: # %atomicrmw.end ; RV64I-NEXT: .LBB145_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i32_monotonic: ; RV64IA-LABEL: atomicrmw_max_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w a0, a1, (a0) ; RV64IA-NEXT: amomax.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b monotonic %1 = atomicrmw max i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a3, .LBB146_1 ; RV32I-NEXT: blt s1, a3, .LBB146_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB146_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB146_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB146_1 ; RV32I-NEXT: j .LBB146_1
; RV32I-NEXT: .LBB146_4: # %atomicrmw.end ; RV32I-NEXT: .LBB146_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i32_acquire: ; RV32IA-LABEL: atomicrmw_max_i32_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomax.w.aq a0, a1, (a0) ; RV32IA-NEXT: amomax.w.aq a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB146_1 ; RV64I-NEXT: blt s1, a0, .LBB146_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB146_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB146_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB146_1 ; RV64I-NEXT: j .LBB146_1
; RV64I-NEXT: .LBB146_4: # %atomicrmw.end ; RV64I-NEXT: .LBB146_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i32_acquire: ; RV64IA-LABEL: atomicrmw_max_i32_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w.aq a0, a1, (a0) ; RV64IA-NEXT: amomax.w.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b acquire %1 = atomicrmw max i32* %a, i32 %b acquire
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a3, .LBB147_1 ; RV32I-NEXT: blt s1, a3, .LBB147_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB147_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB147_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB147_1 ; RV32I-NEXT: j .LBB147_1
; RV32I-NEXT: .LBB147_4: # %atomicrmw.end ; RV32I-NEXT: .LBB147_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i32_release: ; RV32IA-LABEL: atomicrmw_max_i32_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomax.w.rl a0, a1, (a0) ; RV32IA-NEXT: amomax.w.rl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB147_1 ; RV64I-NEXT: blt s1, a0, .LBB147_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB147_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB147_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB147_1 ; RV64I-NEXT: j .LBB147_1
; RV64I-NEXT: .LBB147_4: # %atomicrmw.end ; RV64I-NEXT: .LBB147_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i32_release: ; RV64IA-LABEL: atomicrmw_max_i32_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w.rl a0, a1, (a0) ; RV64IA-NEXT: amomax.w.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b release %1 = atomicrmw max i32* %a, i32 %b release
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a3, .LBB148_1 ; RV32I-NEXT: blt s1, a3, .LBB148_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB148_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB148_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB148_1 ; RV32I-NEXT: j .LBB148_1
; RV32I-NEXT: .LBB148_4: # %atomicrmw.end ; RV32I-NEXT: .LBB148_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i32_acq_rel: ; RV32IA-LABEL: atomicrmw_max_i32_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB148_1 ; RV64I-NEXT: blt s1, a0, .LBB148_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB148_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB148_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB148_1 ; RV64I-NEXT: j .LBB148_1
; RV64I-NEXT: .LBB148_4: # %atomicrmw.end ; RV64I-NEXT: .LBB148_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i32_acq_rel: ; RV64IA-LABEL: atomicrmw_max_i32_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomax.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b acq_rel %1 = atomicrmw max i32* %a, i32 %b acq_rel
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a3, .LBB149_1 ; RV32I-NEXT: blt s1, a3, .LBB149_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB149_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB149_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB149_1 ; RV32I-NEXT: j .LBB149_1
; RV32I-NEXT: .LBB149_4: # %atomicrmw.end ; RV32I-NEXT: .LBB149_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i32_seq_cst: ; RV32IA-LABEL: atomicrmw_max_i32_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB149_1 ; RV64I-NEXT: blt s1, a0, .LBB149_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB149_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB149_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB149_1 ; RV64I-NEXT: j .LBB149_1
; RV64I-NEXT: .LBB149_4: # %atomicrmw.end ; RV64I-NEXT: .LBB149_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i32_seq_cst: ; RV64IA-LABEL: atomicrmw_max_i32_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomax.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b seq_cst %1 = atomicrmw max i32* %a, i32 %b seq_cst
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a3, .LBB150_1 ; RV32I-NEXT: bge s1, a3, .LBB150_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB150_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB150_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB150_1 ; RV32I-NEXT: j .LBB150_1
; RV32I-NEXT: .LBB150_4: # %atomicrmw.end ; RV32I-NEXT: .LBB150_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i32_monotonic: ; RV32IA-LABEL: atomicrmw_min_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomin.w a0, a1, (a0) ; RV32IA-NEXT: amomin.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB150_1 ; RV64I-NEXT: bge s1, a0, .LBB150_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB150_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB150_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB150_1 ; RV64I-NEXT: j .LBB150_1
; RV64I-NEXT: .LBB150_4: # %atomicrmw.end ; RV64I-NEXT: .LBB150_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i32_monotonic: ; RV64IA-LABEL: atomicrmw_min_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w a0, a1, (a0) ; RV64IA-NEXT: amomin.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b monotonic %1 = atomicrmw min i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a3, .LBB151_1 ; RV32I-NEXT: bge s1, a3, .LBB151_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB151_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB151_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB151_1 ; RV32I-NEXT: j .LBB151_1
; RV32I-NEXT: .LBB151_4: # %atomicrmw.end ; RV32I-NEXT: .LBB151_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i32_acquire: ; RV32IA-LABEL: atomicrmw_min_i32_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomin.w.aq a0, a1, (a0) ; RV32IA-NEXT: amomin.w.aq a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB151_1 ; RV64I-NEXT: bge s1, a0, .LBB151_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB151_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB151_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB151_1 ; RV64I-NEXT: j .LBB151_1
; RV64I-NEXT: .LBB151_4: # %atomicrmw.end ; RV64I-NEXT: .LBB151_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i32_acquire: ; RV64IA-LABEL: atomicrmw_min_i32_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w.aq a0, a1, (a0) ; RV64IA-NEXT: amomin.w.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b acquire %1 = atomicrmw min i32* %a, i32 %b acquire
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a3, .LBB152_1 ; RV32I-NEXT: bge s1, a3, .LBB152_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB152_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB152_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB152_1 ; RV32I-NEXT: j .LBB152_1
; RV32I-NEXT: .LBB152_4: # %atomicrmw.end ; RV32I-NEXT: .LBB152_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i32_release: ; RV32IA-LABEL: atomicrmw_min_i32_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomin.w.rl a0, a1, (a0) ; RV32IA-NEXT: amomin.w.rl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB152_1 ; RV64I-NEXT: bge s1, a0, .LBB152_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB152_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB152_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB152_1 ; RV64I-NEXT: j .LBB152_1
; RV64I-NEXT: .LBB152_4: # %atomicrmw.end ; RV64I-NEXT: .LBB152_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i32_release: ; RV64IA-LABEL: atomicrmw_min_i32_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w.rl a0, a1, (a0) ; RV64IA-NEXT: amomin.w.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b release %1 = atomicrmw min i32* %a, i32 %b release
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a3, .LBB153_1 ; RV32I-NEXT: bge s1, a3, .LBB153_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB153_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB153_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB153_1 ; RV32I-NEXT: j .LBB153_1
; RV32I-NEXT: .LBB153_4: # %atomicrmw.end ; RV32I-NEXT: .LBB153_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i32_acq_rel: ; RV32IA-LABEL: atomicrmw_min_i32_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB153_1 ; RV64I-NEXT: bge s1, a0, .LBB153_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB153_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB153_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB153_1 ; RV64I-NEXT: j .LBB153_1
; RV64I-NEXT: .LBB153_4: # %atomicrmw.end ; RV64I-NEXT: .LBB153_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i32_acq_rel: ; RV64IA-LABEL: atomicrmw_min_i32_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomin.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b acq_rel %1 = atomicrmw min i32* %a, i32 %b acq_rel
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a3, .LBB154_1 ; RV32I-NEXT: bge s1, a3, .LBB154_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB154_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB154_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB154_1 ; RV32I-NEXT: j .LBB154_1
; RV32I-NEXT: .LBB154_4: # %atomicrmw.end ; RV32I-NEXT: .LBB154_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i32_seq_cst: ; RV32IA-LABEL: atomicrmw_min_i32_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB154_1 ; RV64I-NEXT: bge s1, a0, .LBB154_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB154_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB154_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB154_1 ; RV64I-NEXT: j .LBB154_1
; RV64I-NEXT: .LBB154_4: # %atomicrmw.end ; RV64I-NEXT: .LBB154_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i32_seq_cst: ; RV64IA-LABEL: atomicrmw_min_i32_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomin.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b seq_cst %1 = atomicrmw min i32* %a, i32 %b seq_cst
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a3, .LBB155_1 ; RV32I-NEXT: bltu s1, a3, .LBB155_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB155_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB155_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB155_1 ; RV32I-NEXT: j .LBB155_1
; RV32I-NEXT: .LBB155_4: # %atomicrmw.end ; RV32I-NEXT: .LBB155_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i32_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomaxu.w a0, a1, (a0) ; RV32IA-NEXT: amomaxu.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB155_1 ; RV64I-NEXT: bltu s1, a0, .LBB155_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB155_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB155_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB155_1 ; RV64I-NEXT: j .LBB155_1
; RV64I-NEXT: .LBB155_4: # %atomicrmw.end ; RV64I-NEXT: .LBB155_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i32_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w a0, a1, (a0) ; RV64IA-NEXT: amomaxu.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b monotonic %1 = atomicrmw umax i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a3, .LBB156_1 ; RV32I-NEXT: bltu s1, a3, .LBB156_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB156_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB156_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB156_1 ; RV32I-NEXT: j .LBB156_1
; RV32I-NEXT: .LBB156_4: # %atomicrmw.end ; RV32I-NEXT: .LBB156_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i32_acquire: ; RV32IA-LABEL: atomicrmw_umax_i32_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomaxu.w.aq a0, a1, (a0) ; RV32IA-NEXT: amomaxu.w.aq a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB156_1 ; RV64I-NEXT: bltu s1, a0, .LBB156_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB156_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB156_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB156_1 ; RV64I-NEXT: j .LBB156_1
; RV64I-NEXT: .LBB156_4: # %atomicrmw.end ; RV64I-NEXT: .LBB156_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i32_acquire: ; RV64IA-LABEL: atomicrmw_umax_i32_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w.aq a0, a1, (a0) ; RV64IA-NEXT: amomaxu.w.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b acquire %1 = atomicrmw umax i32* %a, i32 %b acquire
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a3, .LBB157_1 ; RV32I-NEXT: bltu s1, a3, .LBB157_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB157_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB157_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB157_1 ; RV32I-NEXT: j .LBB157_1
; RV32I-NEXT: .LBB157_4: # %atomicrmw.end ; RV32I-NEXT: .LBB157_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i32_release: ; RV32IA-LABEL: atomicrmw_umax_i32_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomaxu.w.rl a0, a1, (a0) ; RV32IA-NEXT: amomaxu.w.rl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB157_1 ; RV64I-NEXT: bltu s1, a0, .LBB157_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB157_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB157_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB157_1 ; RV64I-NEXT: j .LBB157_1
; RV64I-NEXT: .LBB157_4: # %atomicrmw.end ; RV64I-NEXT: .LBB157_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i32_release: ; RV64IA-LABEL: atomicrmw_umax_i32_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w.rl a0, a1, (a0) ; RV64IA-NEXT: amomaxu.w.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b release %1 = atomicrmw umax i32* %a, i32 %b release
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a3, .LBB158_1 ; RV32I-NEXT: bltu s1, a3, .LBB158_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB158_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB158_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB158_1 ; RV32I-NEXT: j .LBB158_1
; RV32I-NEXT: .LBB158_4: # %atomicrmw.end ; RV32I-NEXT: .LBB158_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i32_acq_rel: ; RV32IA-LABEL: atomicrmw_umax_i32_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB158_1 ; RV64I-NEXT: bltu s1, a0, .LBB158_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB158_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB158_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB158_1 ; RV64I-NEXT: j .LBB158_1
; RV64I-NEXT: .LBB158_4: # %atomicrmw.end ; RV64I-NEXT: .LBB158_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i32_acq_rel: ; RV64IA-LABEL: atomicrmw_umax_i32_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b acq_rel %1 = atomicrmw umax i32* %a, i32 %b acq_rel
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a3, .LBB159_1 ; RV32I-NEXT: bltu s1, a3, .LBB159_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB159_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB159_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB159_1 ; RV32I-NEXT: j .LBB159_1
; RV32I-NEXT: .LBB159_4: # %atomicrmw.end ; RV32I-NEXT: .LBB159_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i32_seq_cst: ; RV32IA-LABEL: atomicrmw_umax_i32_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB159_1 ; RV64I-NEXT: bltu s1, a0, .LBB159_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB159_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB159_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB159_1 ; RV64I-NEXT: j .LBB159_1
; RV64I-NEXT: .LBB159_4: # %atomicrmw.end ; RV64I-NEXT: .LBB159_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i32_seq_cst: ; RV64IA-LABEL: atomicrmw_umax_i32_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b seq_cst %1 = atomicrmw umax i32* %a, i32 %b seq_cst
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a3, .LBB160_1 ; RV32I-NEXT: bgeu s1, a3, .LBB160_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB160_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB160_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB160_1 ; RV32I-NEXT: j .LBB160_1
; RV32I-NEXT: .LBB160_4: # %atomicrmw.end ; RV32I-NEXT: .LBB160_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i32_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amominu.w a0, a1, (a0) ; RV32IA-NEXT: amominu.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB160_1 ; RV64I-NEXT: bgeu s1, a0, .LBB160_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB160_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB160_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB160_1 ; RV64I-NEXT: j .LBB160_1
; RV64I-NEXT: .LBB160_4: # %atomicrmw.end ; RV64I-NEXT: .LBB160_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i32_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w a0, a1, (a0) ; RV64IA-NEXT: amominu.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b monotonic %1 = atomicrmw umin i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a3, .LBB161_1 ; RV32I-NEXT: bgeu s1, a3, .LBB161_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB161_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB161_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB161_1 ; RV32I-NEXT: j .LBB161_1
; RV32I-NEXT: .LBB161_4: # %atomicrmw.end ; RV32I-NEXT: .LBB161_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i32_acquire: ; RV32IA-LABEL: atomicrmw_umin_i32_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amominu.w.aq a0, a1, (a0) ; RV32IA-NEXT: amominu.w.aq a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB161_1 ; RV64I-NEXT: bgeu s1, a0, .LBB161_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB161_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB161_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB161_1 ; RV64I-NEXT: j .LBB161_1
; RV64I-NEXT: .LBB161_4: # %atomicrmw.end ; RV64I-NEXT: .LBB161_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i32_acquire: ; RV64IA-LABEL: atomicrmw_umin_i32_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w.aq a0, a1, (a0) ; RV64IA-NEXT: amominu.w.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b acquire %1 = atomicrmw umin i32* %a, i32 %b acquire
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a3, .LBB162_1 ; RV32I-NEXT: bgeu s1, a3, .LBB162_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB162_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB162_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB162_1 ; RV32I-NEXT: j .LBB162_1
; RV32I-NEXT: .LBB162_4: # %atomicrmw.end ; RV32I-NEXT: .LBB162_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i32_release: ; RV32IA-LABEL: atomicrmw_umin_i32_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amominu.w.rl a0, a1, (a0) ; RV32IA-NEXT: amominu.w.rl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB162_1 ; RV64I-NEXT: bgeu s1, a0, .LBB162_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB162_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB162_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB162_1 ; RV64I-NEXT: j .LBB162_1
; RV64I-NEXT: .LBB162_4: # %atomicrmw.end ; RV64I-NEXT: .LBB162_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i32_release: ; RV64IA-LABEL: atomicrmw_umin_i32_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w.rl a0, a1, (a0) ; RV64IA-NEXT: amominu.w.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b release %1 = atomicrmw umin i32* %a, i32 %b release
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a3, .LBB163_1 ; RV32I-NEXT: bgeu s1, a3, .LBB163_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB163_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB163_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB163_1 ; RV32I-NEXT: j .LBB163_1
; RV32I-NEXT: .LBB163_4: # %atomicrmw.end ; RV32I-NEXT: .LBB163_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i32_acq_rel: ; RV32IA-LABEL: atomicrmw_umin_i32_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB163_1 ; RV64I-NEXT: bgeu s1, a0, .LBB163_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB163_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB163_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB163_1 ; RV64I-NEXT: j .LBB163_1
; RV64I-NEXT: .LBB163_4: # %atomicrmw.end ; RV64I-NEXT: .LBB163_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i32_acq_rel: ; RV64IA-LABEL: atomicrmw_umin_i32_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amominu.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b acq_rel %1 = atomicrmw umin i32* %a, i32 %b acq_rel
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a3, .LBB164_1 ; RV32I-NEXT: bgeu s1, a3, .LBB164_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB164_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB164_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB164_1 ; RV32I-NEXT: j .LBB164_1
; RV32I-NEXT: .LBB164_4: # %atomicrmw.end ; RV32I-NEXT: .LBB164_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i32_seq_cst: ; RV32IA-LABEL: atomicrmw_umin_i32_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0) ; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB164_1 ; RV64I-NEXT: bgeu s1, a0, .LBB164_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB164_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB164_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB164_1 ; RV64I-NEXT: j .LBB164_1
; RV64I-NEXT: .LBB164_4: # %atomicrmw.end ; RV64I-NEXT: .LBB164_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i32_seq_cst: ; RV64IA-LABEL: atomicrmw_umin_i32_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w.aqrl a0, a1, (a0) ; RV64IA-NEXT: amominu.w.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b seq_cst %1 = atomicrmw umin i32* %a, i32 %b seq_cst
▲ Show 20 Lines • Show All 1,448 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB200_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB200_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB200_1 ; RV32I-NEXT: j .LBB200_1
; RV32I-NEXT: .LBB200_7: # %atomicrmw.end ; RV32I-NEXT: .LBB200_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i64_monotonic: ; RV32IA-LABEL: atomicrmw_max_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB200_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB200_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB200_1 ; RV32IA-NEXT: j .LBB200_1
; RV32IA-NEXT: .LBB200_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB200_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_max_i64_monotonic: ; RV64I-LABEL: atomicrmw_max_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a3, .LBB200_1 ; RV64I-NEXT: blt s1, a3, .LBB200_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB200_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB200_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB200_1 ; RV64I-NEXT: j .LBB200_1
; RV64I-NEXT: .LBB200_4: # %atomicrmw.end ; RV64I-NEXT: .LBB200_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i64_monotonic: ; RV64IA-LABEL: atomicrmw_max_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.d a0, a1, (a0) ; RV64IA-NEXT: amomax.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i64* %a, i64 %b monotonic %1 = atomicrmw max i64* %a, i64 %b monotonic
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB201_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB201_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB201_1 ; RV32I-NEXT: j .LBB201_1
; RV32I-NEXT: .LBB201_7: # %atomicrmw.end ; RV32I-NEXT: .LBB201_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i64_acquire: ; RV32IA-LABEL: atomicrmw_max_i64_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB201_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB201_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB201_1 ; RV32IA-NEXT: j .LBB201_1
; RV32IA-NEXT: .LBB201_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB201_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_max_i64_acquire: ; RV64I-LABEL: atomicrmw_max_i64_acquire:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a3, .LBB201_1 ; RV64I-NEXT: blt s1, a3, .LBB201_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB201_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB201_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB201_1 ; RV64I-NEXT: j .LBB201_1
; RV64I-NEXT: .LBB201_4: # %atomicrmw.end ; RV64I-NEXT: .LBB201_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i64_acquire: ; RV64IA-LABEL: atomicrmw_max_i64_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.d.aq a0, a1, (a0) ; RV64IA-NEXT: amomax.d.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i64* %a, i64 %b acquire %1 = atomicrmw max i64* %a, i64 %b acquire
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB202_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB202_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB202_1 ; RV32I-NEXT: j .LBB202_1
; RV32I-NEXT: .LBB202_7: # %atomicrmw.end ; RV32I-NEXT: .LBB202_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i64_release: ; RV32IA-LABEL: atomicrmw_max_i64_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
Show All 34 Lines
; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB202_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB202_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB202_1 ; RV32IA-NEXT: j .LBB202_1
; RV32IA-NEXT: .LBB202_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB202_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_max_i64_release: ; RV64I-LABEL: atomicrmw_max_i64_release:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a3, .LBB202_1 ; RV64I-NEXT: blt s1, a3, .LBB202_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB202_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB202_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB202_1 ; RV64I-NEXT: j .LBB202_1
; RV64I-NEXT: .LBB202_4: # %atomicrmw.end ; RV64I-NEXT: .LBB202_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i64_release: ; RV64IA-LABEL: atomicrmw_max_i64_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.d.rl a0, a1, (a0) ; RV64IA-NEXT: amomax.d.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i64* %a, i64 %b release %1 = atomicrmw max i64* %a, i64 %b release
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB203_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB203_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB203_1 ; RV32I-NEXT: j .LBB203_1
; RV32I-NEXT: .LBB203_7: # %atomicrmw.end ; RV32I-NEXT: .LBB203_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i64_acq_rel: ; RV32IA-LABEL: atomicrmw_max_i64_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
Show All 34 Lines
; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB203_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB203_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB203_1 ; RV32IA-NEXT: j .LBB203_1
; RV32IA-NEXT: .LBB203_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB203_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_max_i64_acq_rel: ; RV64I-LABEL: atomicrmw_max_i64_acq_rel:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a3, .LBB203_1 ; RV64I-NEXT: blt s1, a3, .LBB203_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB203_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB203_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB203_1 ; RV64I-NEXT: j .LBB203_1
; RV64I-NEXT: .LBB203_4: # %atomicrmw.end ; RV64I-NEXT: .LBB203_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i64_acq_rel: ; RV64IA-LABEL: atomicrmw_max_i64_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomax.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i64* %a, i64 %b acq_rel %1 = atomicrmw max i64* %a, i64 %b acq_rel
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB204_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB204_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB204_1 ; RV32I-NEXT: j .LBB204_1
; RV32I-NEXT: .LBB204_7: # %atomicrmw.end ; RV32I-NEXT: .LBB204_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i64_seq_cst: ; RV32IA-LABEL: atomicrmw_max_i64_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
Show All 34 Lines
; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB204_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB204_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB204_1 ; RV32IA-NEXT: j .LBB204_1
; RV32IA-NEXT: .LBB204_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB204_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_max_i64_seq_cst: ; RV64I-LABEL: atomicrmw_max_i64_seq_cst:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a3, .LBB204_1 ; RV64I-NEXT: blt s1, a3, .LBB204_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB204_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB204_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB204_1 ; RV64I-NEXT: j .LBB204_1
; RV64I-NEXT: .LBB204_4: # %atomicrmw.end ; RV64I-NEXT: .LBB204_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i64_seq_cst: ; RV64IA-LABEL: atomicrmw_max_i64_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomax.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i64* %a, i64 %b seq_cst %1 = atomicrmw max i64* %a, i64 %b seq_cst
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB205_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB205_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB205_1 ; RV32I-NEXT: j .LBB205_1
; RV32I-NEXT: .LBB205_7: # %atomicrmw.end ; RV32I-NEXT: .LBB205_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i64_monotonic: ; RV32IA-LABEL: atomicrmw_min_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB205_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB205_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB205_1 ; RV32IA-NEXT: j .LBB205_1
; RV32IA-NEXT: .LBB205_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB205_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_min_i64_monotonic: ; RV64I-LABEL: atomicrmw_min_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a3, .LBB205_1 ; RV64I-NEXT: bge s1, a3, .LBB205_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB205_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB205_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB205_1 ; RV64I-NEXT: j .LBB205_1
; RV64I-NEXT: .LBB205_4: # %atomicrmw.end ; RV64I-NEXT: .LBB205_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i64_monotonic: ; RV64IA-LABEL: atomicrmw_min_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.d a0, a1, (a0) ; RV64IA-NEXT: amomin.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i64* %a, i64 %b monotonic %1 = atomicrmw min i64* %a, i64 %b monotonic
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB206_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB206_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB206_1 ; RV32I-NEXT: j .LBB206_1
; RV32I-NEXT: .LBB206_7: # %atomicrmw.end ; RV32I-NEXT: .LBB206_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i64_acquire: ; RV32IA-LABEL: atomicrmw_min_i64_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB206_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB206_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB206_1 ; RV32IA-NEXT: j .LBB206_1
; RV32IA-NEXT: .LBB206_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB206_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_min_i64_acquire: ; RV64I-LABEL: atomicrmw_min_i64_acquire:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a3, .LBB206_1 ; RV64I-NEXT: bge s1, a3, .LBB206_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB206_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB206_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB206_1 ; RV64I-NEXT: j .LBB206_1
; RV64I-NEXT: .LBB206_4: # %atomicrmw.end ; RV64I-NEXT: .LBB206_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i64_acquire: ; RV64IA-LABEL: atomicrmw_min_i64_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.d.aq a0, a1, (a0) ; RV64IA-NEXT: amomin.d.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i64* %a, i64 %b acquire %1 = atomicrmw min i64* %a, i64 %b acquire
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB207_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB207_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB207_1 ; RV32I-NEXT: j .LBB207_1
; RV32I-NEXT: .LBB207_7: # %atomicrmw.end ; RV32I-NEXT: .LBB207_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i64_release: ; RV32IA-LABEL: atomicrmw_min_i64_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB207_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB207_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB207_1 ; RV32IA-NEXT: j .LBB207_1
; RV32IA-NEXT: .LBB207_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB207_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_min_i64_release: ; RV64I-LABEL: atomicrmw_min_i64_release:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a3, .LBB207_1 ; RV64I-NEXT: bge s1, a3, .LBB207_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB207_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB207_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB207_1 ; RV64I-NEXT: j .LBB207_1
; RV64I-NEXT: .LBB207_4: # %atomicrmw.end ; RV64I-NEXT: .LBB207_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i64_release: ; RV64IA-LABEL: atomicrmw_min_i64_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.d.rl a0, a1, (a0) ; RV64IA-NEXT: amomin.d.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i64* %a, i64 %b release %1 = atomicrmw min i64* %a, i64 %b release
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB208_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB208_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB208_1 ; RV32I-NEXT: j .LBB208_1
; RV32I-NEXT: .LBB208_7: # %atomicrmw.end ; RV32I-NEXT: .LBB208_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i64_acq_rel: ; RV32IA-LABEL: atomicrmw_min_i64_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB208_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB208_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB208_1 ; RV32IA-NEXT: j .LBB208_1
; RV32IA-NEXT: .LBB208_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB208_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_min_i64_acq_rel: ; RV64I-LABEL: atomicrmw_min_i64_acq_rel:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a3, .LBB208_1 ; RV64I-NEXT: bge s1, a3, .LBB208_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB208_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB208_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB208_1 ; RV64I-NEXT: j .LBB208_1
; RV64I-NEXT: .LBB208_4: # %atomicrmw.end ; RV64I-NEXT: .LBB208_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i64_acq_rel: ; RV64IA-LABEL: atomicrmw_min_i64_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomin.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i64* %a, i64 %b acq_rel %1 = atomicrmw min i64* %a, i64 %b acq_rel
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB209_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB209_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB209_1 ; RV32I-NEXT: j .LBB209_1
; RV32I-NEXT: .LBB209_7: # %atomicrmw.end ; RV32I-NEXT: .LBB209_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i64_seq_cst: ; RV32IA-LABEL: atomicrmw_min_i64_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB209_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB209_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB209_1 ; RV32IA-NEXT: j .LBB209_1
; RV32IA-NEXT: .LBB209_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB209_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_min_i64_seq_cst: ; RV64I-LABEL: atomicrmw_min_i64_seq_cst:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a3, .LBB209_1 ; RV64I-NEXT: bge s1, a3, .LBB209_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB209_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB209_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB209_1 ; RV64I-NEXT: j .LBB209_1
; RV64I-NEXT: .LBB209_4: # %atomicrmw.end ; RV64I-NEXT: .LBB209_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i64_seq_cst: ; RV64IA-LABEL: atomicrmw_min_i64_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomin.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i64* %a, i64 %b seq_cst %1 = atomicrmw min i64* %a, i64 %b seq_cst
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB210_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB210_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB210_1 ; RV32I-NEXT: j .LBB210_1
; RV32I-NEXT: .LBB210_7: # %atomicrmw.end ; RV32I-NEXT: .LBB210_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i64_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB210_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB210_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB210_1 ; RV32IA-NEXT: j .LBB210_1
; RV32IA-NEXT: .LBB210_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB210_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umax_i64_monotonic: ; RV64I-LABEL: atomicrmw_umax_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a3, .LBB210_1 ; RV64I-NEXT: bltu s1, a3, .LBB210_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB210_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB210_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB210_1 ; RV64I-NEXT: j .LBB210_1
; RV64I-NEXT: .LBB210_4: # %atomicrmw.end ; RV64I-NEXT: .LBB210_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i64_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.d a0, a1, (a0) ; RV64IA-NEXT: amomaxu.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i64* %a, i64 %b monotonic %1 = atomicrmw umax i64* %a, i64 %b monotonic
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB211_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB211_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB211_1 ; RV32I-NEXT: j .LBB211_1
; RV32I-NEXT: .LBB211_7: # %atomicrmw.end ; RV32I-NEXT: .LBB211_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i64_acquire: ; RV32IA-LABEL: atomicrmw_umax_i64_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB211_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB211_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB211_1 ; RV32IA-NEXT: j .LBB211_1
; RV32IA-NEXT: .LBB211_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB211_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umax_i64_acquire: ; RV64I-LABEL: atomicrmw_umax_i64_acquire:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a3, .LBB211_1 ; RV64I-NEXT: bltu s1, a3, .LBB211_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB211_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB211_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB211_1 ; RV64I-NEXT: j .LBB211_1
; RV64I-NEXT: .LBB211_4: # %atomicrmw.end ; RV64I-NEXT: .LBB211_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i64_acquire: ; RV64IA-LABEL: atomicrmw_umax_i64_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.d.aq a0, a1, (a0) ; RV64IA-NEXT: amomaxu.d.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i64* %a, i64 %b acquire %1 = atomicrmw umax i64* %a, i64 %b acquire
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB212_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB212_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB212_1 ; RV32I-NEXT: j .LBB212_1
; RV32I-NEXT: .LBB212_7: # %atomicrmw.end ; RV32I-NEXT: .LBB212_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i64_release: ; RV32IA-LABEL: atomicrmw_umax_i64_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB212_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB212_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB212_1 ; RV32IA-NEXT: j .LBB212_1
; RV32IA-NEXT: .LBB212_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB212_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umax_i64_release: ; RV64I-LABEL: atomicrmw_umax_i64_release:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a3, .LBB212_1 ; RV64I-NEXT: bltu s1, a3, .LBB212_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB212_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB212_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB212_1 ; RV64I-NEXT: j .LBB212_1
; RV64I-NEXT: .LBB212_4: # %atomicrmw.end ; RV64I-NEXT: .LBB212_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i64_release: ; RV64IA-LABEL: atomicrmw_umax_i64_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.d.rl a0, a1, (a0) ; RV64IA-NEXT: amomaxu.d.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i64* %a, i64 %b release %1 = atomicrmw umax i64* %a, i64 %b release
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB213_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB213_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB213_1 ; RV32I-NEXT: j .LBB213_1
; RV32I-NEXT: .LBB213_7: # %atomicrmw.end ; RV32I-NEXT: .LBB213_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i64_acq_rel: ; RV32IA-LABEL: atomicrmw_umax_i64_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB213_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB213_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB213_1 ; RV32IA-NEXT: j .LBB213_1
; RV32IA-NEXT: .LBB213_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB213_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umax_i64_acq_rel: ; RV64I-LABEL: atomicrmw_umax_i64_acq_rel:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a3, .LBB213_1 ; RV64I-NEXT: bltu s1, a3, .LBB213_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB213_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB213_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB213_1 ; RV64I-NEXT: j .LBB213_1
; RV64I-NEXT: .LBB213_4: # %atomicrmw.end ; RV64I-NEXT: .LBB213_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i64_acq_rel: ; RV64IA-LABEL: atomicrmw_umax_i64_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomaxu.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i64* %a, i64 %b acq_rel %1 = atomicrmw umax i64* %a, i64 %b acq_rel
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB214_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB214_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB214_1 ; RV32I-NEXT: j .LBB214_1
; RV32I-NEXT: .LBB214_7: # %atomicrmw.end ; RV32I-NEXT: .LBB214_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i64_seq_cst: ; RV32IA-LABEL: atomicrmw_umax_i64_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB214_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB214_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB214_1 ; RV32IA-NEXT: j .LBB214_1
; RV32IA-NEXT: .LBB214_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB214_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umax_i64_seq_cst: ; RV64I-LABEL: atomicrmw_umax_i64_seq_cst:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a3, .LBB214_1 ; RV64I-NEXT: bltu s1, a3, .LBB214_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB214_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB214_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB214_1 ; RV64I-NEXT: j .LBB214_1
; RV64I-NEXT: .LBB214_4: # %atomicrmw.end ; RV64I-NEXT: .LBB214_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i64_seq_cst: ; RV64IA-LABEL: atomicrmw_umax_i64_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amomaxu.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i64* %a, i64 %b seq_cst %1 = atomicrmw umax i64* %a, i64 %b seq_cst
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB215_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB215_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB215_1 ; RV32I-NEXT: j .LBB215_1
; RV32I-NEXT: .LBB215_7: # %atomicrmw.end ; RV32I-NEXT: .LBB215_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i64_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB215_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB215_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB215_1 ; RV32IA-NEXT: j .LBB215_1
; RV32IA-NEXT: .LBB215_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB215_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umin_i64_monotonic: ; RV64I-LABEL: atomicrmw_umin_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a3, .LBB215_1 ; RV64I-NEXT: bgeu s1, a3, .LBB215_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB215_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB215_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB215_1 ; RV64I-NEXT: j .LBB215_1
; RV64I-NEXT: .LBB215_4: # %atomicrmw.end ; RV64I-NEXT: .LBB215_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i64_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.d a0, a1, (a0) ; RV64IA-NEXT: amominu.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i64* %a, i64 %b monotonic %1 = atomicrmw umin i64* %a, i64 %b monotonic
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB216_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB216_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB216_1 ; RV32I-NEXT: j .LBB216_1
; RV32I-NEXT: .LBB216_7: # %atomicrmw.end ; RV32I-NEXT: .LBB216_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i64_acquire: ; RV32IA-LABEL: atomicrmw_umin_i64_acquire:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB216_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB216_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB216_1 ; RV32IA-NEXT: j .LBB216_1
; RV32IA-NEXT: .LBB216_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB216_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umin_i64_acquire: ; RV64I-LABEL: atomicrmw_umin_i64_acquire:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a3, .LBB216_1 ; RV64I-NEXT: bgeu s1, a3, .LBB216_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB216_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB216_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB216_1 ; RV64I-NEXT: j .LBB216_1
; RV64I-NEXT: .LBB216_4: # %atomicrmw.end ; RV64I-NEXT: .LBB216_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i64_acquire: ; RV64IA-LABEL: atomicrmw_umin_i64_acquire:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.d.aq a0, a1, (a0) ; RV64IA-NEXT: amominu.d.aq a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i64* %a, i64 %b acquire %1 = atomicrmw umin i64* %a, i64 %b acquire
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB217_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB217_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB217_1 ; RV32I-NEXT: j .LBB217_1
; RV32I-NEXT: .LBB217_7: # %atomicrmw.end ; RV32I-NEXT: .LBB217_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i64_release: ; RV32IA-LABEL: atomicrmw_umin_i64_release:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB217_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB217_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB217_1 ; RV32IA-NEXT: j .LBB217_1
; RV32IA-NEXT: .LBB217_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB217_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umin_i64_release: ; RV64I-LABEL: atomicrmw_umin_i64_release:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a3, .LBB217_1 ; RV64I-NEXT: bgeu s1, a3, .LBB217_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB217_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB217_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB217_1 ; RV64I-NEXT: j .LBB217_1
; RV64I-NEXT: .LBB217_4: # %atomicrmw.end ; RV64I-NEXT: .LBB217_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i64_release: ; RV64IA-LABEL: atomicrmw_umin_i64_release:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.d.rl a0, a1, (a0) ; RV64IA-NEXT: amominu.d.rl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i64* %a, i64 %b release %1 = atomicrmw umin i64* %a, i64 %b release
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB218_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB218_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB218_1 ; RV32I-NEXT: j .LBB218_1
; RV32I-NEXT: .LBB218_7: # %atomicrmw.end ; RV32I-NEXT: .LBB218_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i64_acq_rel: ; RV32IA-LABEL: atomicrmw_umin_i64_acq_rel:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB218_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB218_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB218_1 ; RV32IA-NEXT: j .LBB218_1
; RV32IA-NEXT: .LBB218_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB218_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umin_i64_acq_rel: ; RV64I-LABEL: atomicrmw_umin_i64_acq_rel:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a3, .LBB218_1 ; RV64I-NEXT: bgeu s1, a3, .LBB218_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB218_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB218_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB218_1 ; RV64I-NEXT: j .LBB218_1
; RV64I-NEXT: .LBB218_4: # %atomicrmw.end ; RV64I-NEXT: .LBB218_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i64_acq_rel: ; RV64IA-LABEL: atomicrmw_umin_i64_acq_rel:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amominu.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i64* %a, i64 %b acq_rel %1 = atomicrmw umin i64* %a, i64 %b acq_rel
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB219_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB219_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB219_1 ; RV32I-NEXT: j .LBB219_1
; RV32I-NEXT: .LBB219_7: # %atomicrmw.end ; RV32I-NEXT: .LBB219_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i64_seq_cst: ; RV32IA-LABEL: atomicrmw_umin_i64_seq_cst:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
Show All 35 Lines
; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB219_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB219_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB219_1 ; RV32IA-NEXT: j .LBB219_1
; RV32IA-NEXT: .LBB219_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB219_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umin_i64_seq_cst: ; RV64I-LABEL: atomicrmw_umin_i64_seq_cst:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a3, .LBB219_1 ; RV64I-NEXT: bgeu s1, a3, .LBB219_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB219_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB219_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB219_1 ; RV64I-NEXT: j .LBB219_1
; RV64I-NEXT: .LBB219_4: # %atomicrmw.end ; RV64I-NEXT: .LBB219_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i64_seq_cst: ; RV64IA-LABEL: atomicrmw_umin_i64_seq_cst:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.d.aqrl a0, a1, (a0) ; RV64IA-NEXT: amominu.d.aqrl a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i64* %a, i64 %b seq_cst %1 = atomicrmw umin i64* %a, i64 %b seq_cst
ret i64 %1 ret i64 %1
} }

llvm/test/CodeGen/RISCV/atomic-signext.ll

Show First 20 Lines • Show All 605 Lines • ▼ Show 20 Lines
; RV32I-NEXT: blt s1, a0, .LBB10_1 ; RV32I-NEXT: blt s1, a0, .LBB10_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB10_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB10_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB10_1 ; RV32I-NEXT: j .LBB10_1
; RV32I-NEXT: .LBB10_4: # %atomicrmw.end ; RV32I-NEXT: .LBB10_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a3, 24 ; RV32I-NEXT: slli a0, a3, 24
; RV32I-NEXT: srai a0, a0, 24 ; RV32I-NEXT: srai a0, a0, 24
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i8_monotonic: ; RV32IA-LABEL: atomicrmw_max_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
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; RV64I-NEXT: blt s1, a0, .LBB10_1 ; RV64I-NEXT: blt s1, a0, .LBB10_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB10_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB10_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB10_1 ; RV64I-NEXT: j .LBB10_1
; RV64I-NEXT: .LBB10_4: # %atomicrmw.end ; RV64I-NEXT: .LBB10_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a3, 56 ; RV64I-NEXT: slli a0, a3, 56
; RV64I-NEXT: srai a0, a0, 56 ; RV64I-NEXT: srai a0, a0, 56
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i8_monotonic: ; RV64IA-LABEL: atomicrmw_max_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; RV32I-NEXT: bge s1, a0, .LBB11_1 ; RV32I-NEXT: bge s1, a0, .LBB11_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB11_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB11_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB11_1 ; RV32I-NEXT: j .LBB11_1
; RV32I-NEXT: .LBB11_4: # %atomicrmw.end ; RV32I-NEXT: .LBB11_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a3, 24 ; RV32I-NEXT: slli a0, a3, 24
; RV32I-NEXT: srai a0, a0, 24 ; RV32I-NEXT: srai a0, a0, 24
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i8_monotonic: ; RV32IA-LABEL: atomicrmw_min_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; RV64I-NEXT: bge s1, a0, .LBB11_1 ; RV64I-NEXT: bge s1, a0, .LBB11_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB11_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB11_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB11_1 ; RV64I-NEXT: j .LBB11_1
; RV64I-NEXT: .LBB11_4: # %atomicrmw.end ; RV64I-NEXT: .LBB11_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a3, 56 ; RV64I-NEXT: slli a0, a3, 56
; RV64I-NEXT: srai a0, a0, 56 ; RV64I-NEXT: srai a0, a0, 56
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i8_monotonic: ; RV64IA-LABEL: atomicrmw_min_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32I-NEXT: bltu s1, a0, .LBB12_1 ; RV32I-NEXT: bltu s1, a0, .LBB12_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB12_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB12_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB12_1 ; RV32I-NEXT: j .LBB12_1
; RV32I-NEXT: .LBB12_4: # %atomicrmw.end ; RV32I-NEXT: .LBB12_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a3, 24 ; RV32I-NEXT: slli a0, a3, 24
; RV32I-NEXT: srai a0, a0, 24 ; RV32I-NEXT: srai a0, a0, 24
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i8_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; RV64I-NEXT: bltu s1, a0, .LBB12_1 ; RV64I-NEXT: bltu s1, a0, .LBB12_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB12_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB12_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB12_1 ; RV64I-NEXT: j .LBB12_1
; RV64I-NEXT: .LBB12_4: # %atomicrmw.end ; RV64I-NEXT: .LBB12_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a3, 56 ; RV64I-NEXT: slli a0, a3, 56
; RV64I-NEXT: srai a0, a0, 56 ; RV64I-NEXT: srai a0, a0, 56
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i8_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; RV32I-NEXT: bgeu s1, a0, .LBB13_1 ; RV32I-NEXT: bgeu s1, a0, .LBB13_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB13_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB13_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB13_1 ; RV32I-NEXT: j .LBB13_1
; RV32I-NEXT: .LBB13_4: # %atomicrmw.end ; RV32I-NEXT: .LBB13_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a3, 24 ; RV32I-NEXT: slli a0, a3, 24
; RV32I-NEXT: srai a0, a0, 24 ; RV32I-NEXT: srai a0, a0, 24
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i8_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i8_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: li a3, 255 ; RV32IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; RV64I-NEXT: bgeu s1, a0, .LBB13_1 ; RV64I-NEXT: bgeu s1, a0, .LBB13_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB13_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB13_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB13_1 ; RV64I-NEXT: j .LBB13_1
; RV64I-NEXT: .LBB13_4: # %atomicrmw.end ; RV64I-NEXT: .LBB13_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a3, 56 ; RV64I-NEXT: slli a0, a3, 56
; RV64I-NEXT: srai a0, a0, 56 ; RV64I-NEXT: srai a0, a0, 56
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i8_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i8_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: li a3, 255 ; RV64IA-NEXT: li a3, 255
▲ Show 20 Lines • Show All 525 Lines • ▼ Show 20 Lines
; RV32I-NEXT: blt s1, a0, .LBB21_1 ; RV32I-NEXT: blt s1, a0, .LBB21_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB21_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB21_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB21_1 ; RV32I-NEXT: j .LBB21_1
; RV32I-NEXT: .LBB21_4: # %atomicrmw.end ; RV32I-NEXT: .LBB21_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a3, 16 ; RV32I-NEXT: slli a0, a3, 16
; RV32I-NEXT: srai a0, a0, 16 ; RV32I-NEXT: srai a0, a0, 16
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i16_monotonic: ; RV32IA-LABEL: atomicrmw_max_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV64I-NEXT: blt s1, a0, .LBB21_1 ; RV64I-NEXT: blt s1, a0, .LBB21_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB21_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB21_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB21_1 ; RV64I-NEXT: j .LBB21_1
; RV64I-NEXT: .LBB21_4: # %atomicrmw.end ; RV64I-NEXT: .LBB21_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a3, 48 ; RV64I-NEXT: slli a0, a3, 48
; RV64I-NEXT: srai a0, a0, 48 ; RV64I-NEXT: srai a0, a0, 48
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i16_monotonic: ; RV64IA-LABEL: atomicrmw_max_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV32I-NEXT: bge s1, a0, .LBB22_1 ; RV32I-NEXT: bge s1, a0, .LBB22_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB22_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB22_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB22_1 ; RV32I-NEXT: j .LBB22_1
; RV32I-NEXT: .LBB22_4: # %atomicrmw.end ; RV32I-NEXT: .LBB22_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a3, 16 ; RV32I-NEXT: slli a0, a3, 16
; RV32I-NEXT: srai a0, a0, 16 ; RV32I-NEXT: srai a0, a0, 16
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i16_monotonic: ; RV32IA-LABEL: atomicrmw_min_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: andi a3, a0, 24 ; RV32IA-NEXT: andi a3, a0, 24
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; RV64I-NEXT: bge s1, a0, .LBB22_1 ; RV64I-NEXT: bge s1, a0, .LBB22_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB22_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB22_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB22_1 ; RV64I-NEXT: j .LBB22_1
; RV64I-NEXT: .LBB22_4: # %atomicrmw.end ; RV64I-NEXT: .LBB22_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a3, 48 ; RV64I-NEXT: slli a0, a3, 48
; RV64I-NEXT: srai a0, a0, 48 ; RV64I-NEXT: srai a0, a0, 48
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i16_monotonic: ; RV64IA-LABEL: atomicrmw_min_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slli a0, a0, 3 ; RV64IA-NEXT: slli a0, a0, 3
; RV64IA-NEXT: andi a3, a0, 24 ; RV64IA-NEXT: andi a3, a0, 24
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; RV32I-NEXT: bltu s1, a0, .LBB23_1 ; RV32I-NEXT: bltu s1, a0, .LBB23_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB23_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB23_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB23_1 ; RV32I-NEXT: j .LBB23_1
; RV32I-NEXT: .LBB23_4: # %atomicrmw.end ; RV32I-NEXT: .LBB23_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a1, 16 ; RV32I-NEXT: slli a0, a1, 16
; RV32I-NEXT: srai a0, a0, 16 ; RV32I-NEXT: srai a0, a0, 16
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i16_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; RV64I-NEXT: bltu s1, a0, .LBB23_1 ; RV64I-NEXT: bltu s1, a0, .LBB23_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB23_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB23_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB23_1 ; RV64I-NEXT: j .LBB23_1
; RV64I-NEXT: .LBB23_4: # %atomicrmw.end ; RV64I-NEXT: .LBB23_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a1, 48 ; RV64I-NEXT: slli a0, a1, 48
; RV64I-NEXT: srai a0, a0, 48 ; RV64I-NEXT: srai a0, a0, 48
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i16_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
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; RV32I-NEXT: bgeu s1, a0, .LBB24_1 ; RV32I-NEXT: bgeu s1, a0, .LBB24_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB24_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB24_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: j .LBB24_1 ; RV32I-NEXT: j .LBB24_1
; RV32I-NEXT: .LBB24_4: # %atomicrmw.end ; RV32I-NEXT: .LBB24_4: # %atomicrmw.end
; RV32I-NEXT: slli a0, a1, 16 ; RV32I-NEXT: slli a0, a1, 16
; RV32I-NEXT: srai a0, a0, 16 ; RV32I-NEXT: srai a0, a0, 16
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i16_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i16_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: andi a6, a0, -4 ; RV32IA-NEXT: andi a6, a0, -4
; RV32IA-NEXT: slli a0, a0, 3 ; RV32IA-NEXT: slli a0, a0, 3
; RV32IA-NEXT: lui a3, 16 ; RV32IA-NEXT: lui a3, 16
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; RV64I-NEXT: bgeu s1, a0, .LBB24_1 ; RV64I-NEXT: bgeu s1, a0, .LBB24_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB24_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB24_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB24_1 ; RV64I-NEXT: j .LBB24_1
; RV64I-NEXT: .LBB24_4: # %atomicrmw.end ; RV64I-NEXT: .LBB24_4: # %atomicrmw.end
; RV64I-NEXT: slli a0, a1, 48 ; RV64I-NEXT: slli a0, a1, 48
; RV64I-NEXT: srai a0, a0, 48 ; RV64I-NEXT: srai a0, a0, 48
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i16_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i16_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: andi a6, a0, -4 ; RV64IA-NEXT: andi a6, a0, -4
; RV64IA-NEXT: slliw a0, a0, 3 ; RV64IA-NEXT: slliw a0, a0, 3
; RV64IA-NEXT: lui a3, 16 ; RV64IA-NEXT: lui a3, 16
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: blt s1, a3, .LBB32_1 ; RV32I-NEXT: blt s1, a3, .LBB32_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB32_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB32_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB32_1 ; RV32I-NEXT: j .LBB32_1
; RV32I-NEXT: .LBB32_4: # %atomicrmw.end ; RV32I-NEXT: .LBB32_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i32_monotonic: ; RV32IA-LABEL: atomicrmw_max_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomax.w a0, a1, (a0) ; RV32IA-NEXT: amomax.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a0, .LBB32_1 ; RV64I-NEXT: blt s1, a0, .LBB32_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB32_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB32_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB32_1 ; RV64I-NEXT: j .LBB32_1
; RV64I-NEXT: .LBB32_4: # %atomicrmw.end ; RV64I-NEXT: .LBB32_4: # %atomicrmw.end
; RV64I-NEXT: sext.w a0, a3 ; RV64I-NEXT: sext.w a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i32_monotonic: ; RV64IA-LABEL: atomicrmw_max_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.w a0, a1, (a0) ; RV64IA-NEXT: amomax.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i32* %a, i32 %b monotonic %1 = atomicrmw max i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bge s1, a3, .LBB33_1 ; RV32I-NEXT: bge s1, a3, .LBB33_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB33_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB33_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB33_1 ; RV32I-NEXT: j .LBB33_1
; RV32I-NEXT: .LBB33_4: # %atomicrmw.end ; RV32I-NEXT: .LBB33_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i32_monotonic: ; RV32IA-LABEL: atomicrmw_min_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomin.w a0, a1, (a0) ; RV32IA-NEXT: amomin.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a0, .LBB33_1 ; RV64I-NEXT: bge s1, a0, .LBB33_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB33_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB33_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB33_1 ; RV64I-NEXT: j .LBB33_1
; RV64I-NEXT: .LBB33_4: # %atomicrmw.end ; RV64I-NEXT: .LBB33_4: # %atomicrmw.end
; RV64I-NEXT: sext.w a0, a3 ; RV64I-NEXT: sext.w a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i32_monotonic: ; RV64IA-LABEL: atomicrmw_min_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.w a0, a1, (a0) ; RV64IA-NEXT: amomin.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i32* %a, i32 %b monotonic %1 = atomicrmw min i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bltu s1, a3, .LBB34_1 ; RV32I-NEXT: bltu s1, a3, .LBB34_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB34_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB34_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB34_1 ; RV32I-NEXT: j .LBB34_1
; RV32I-NEXT: .LBB34_4: # %atomicrmw.end ; RV32I-NEXT: .LBB34_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i32_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amomaxu.w a0, a1, (a0) ; RV32IA-NEXT: amomaxu.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
Show All 25 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a0, .LBB34_1 ; RV64I-NEXT: bltu s1, a0, .LBB34_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB34_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB34_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB34_1 ; RV64I-NEXT: j .LBB34_1
; RV64I-NEXT: .LBB34_4: # %atomicrmw.end ; RV64I-NEXT: .LBB34_4: # %atomicrmw.end
; RV64I-NEXT: sext.w a0, a3 ; RV64I-NEXT: sext.w a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i32_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.w a0, a1, (a0) ; RV64IA-NEXT: amomaxu.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i32* %a, i32 %b monotonic %1 = atomicrmw umax i32* %a, i32 %b monotonic
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; RV32I-NEXT: mv a2, a3 ; RV32I-NEXT: mv a2, a3
; RV32I-NEXT: bgeu s1, a3, .LBB35_1 ; RV32I-NEXT: bgeu s1, a3, .LBB35_1
; RV32I-NEXT: # %bb.3: # %atomicrmw.start ; RV32I-NEXT: # %bb.3: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: j .LBB35_1 ; RV32I-NEXT: j .LBB35_1
; RV32I-NEXT: .LBB35_4: # %atomicrmw.end ; RV32I-NEXT: .LBB35_4: # %atomicrmw.end
; RV32I-NEXT: mv a0, a3 ; RV32I-NEXT: mv a0, a3
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i32_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i32_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: amominu.w a0, a1, (a0) ; RV32IA-NEXT: amominu.w a0, a1, (a0)
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a0, .LBB35_1 ; RV64I-NEXT: bgeu s1, a0, .LBB35_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB35_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB35_2 Depth=1
; RV64I-NEXT: mv a2, s2 ; RV64I-NEXT: mv a2, s2
; RV64I-NEXT: j .LBB35_1 ; RV64I-NEXT: j .LBB35_1
; RV64I-NEXT: .LBB35_4: # %atomicrmw.end ; RV64I-NEXT: .LBB35_4: # %atomicrmw.end
; RV64I-NEXT: sext.w a0, a3 ; RV64I-NEXT: sext.w a0, a3
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i32_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i32_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.w a0, a1, (a0) ; RV64IA-NEXT: amominu.w a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i32* %a, i32 %b monotonic %1 = atomicrmw umin i32* %a, i32 %b monotonic
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB43_1 ; RV32I-NEXT: j .LBB43_1
; RV32I-NEXT: .LBB43_7: # %atomicrmw.end ; RV32I-NEXT: .LBB43_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_max_i64_monotonic: ; RV32IA-LABEL: atomicrmw_max_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB43_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB43_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB43_1 ; RV32IA-NEXT: j .LBB43_1
; RV32IA-NEXT: .LBB43_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB43_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_max_i64_monotonic: ; RV64I-LABEL: atomicrmw_max_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: blt s1, a3, .LBB43_1 ; RV64I-NEXT: blt s1, a3, .LBB43_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB43_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB43_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB43_1 ; RV64I-NEXT: j .LBB43_1
; RV64I-NEXT: .LBB43_4: # %atomicrmw.end ; RV64I-NEXT: .LBB43_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_max_i64_monotonic: ; RV64IA-LABEL: atomicrmw_max_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomax.d a0, a1, (a0) ; RV64IA-NEXT: amomax.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw max i64* %a, i64 %b monotonic %1 = atomicrmw max i64* %a, i64 %b monotonic
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; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB44_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB44_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB44_1 ; RV32I-NEXT: j .LBB44_1
; RV32I-NEXT: .LBB44_7: # %atomicrmw.end ; RV32I-NEXT: .LBB44_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_min_i64_monotonic: ; RV32IA-LABEL: atomicrmw_min_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB44_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB44_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB44_1 ; RV32IA-NEXT: j .LBB44_1
; RV32IA-NEXT: .LBB44_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB44_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_min_i64_monotonic: ; RV64I-LABEL: atomicrmw_min_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bge s1, a3, .LBB44_1 ; RV64I-NEXT: bge s1, a3, .LBB44_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB44_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB44_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB44_1 ; RV64I-NEXT: j .LBB44_1
; RV64I-NEXT: .LBB44_4: # %atomicrmw.end ; RV64I-NEXT: .LBB44_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_min_i64_monotonic: ; RV64IA-LABEL: atomicrmw_min_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomin.d a0, a1, (a0) ; RV64IA-NEXT: amomin.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw min i64* %a, i64 %b monotonic %1 = atomicrmw min i64* %a, i64 %b monotonic
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB45_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB45_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB45_1 ; RV32I-NEXT: j .LBB45_1
; RV32I-NEXT: .LBB45_7: # %atomicrmw.end ; RV32I-NEXT: .LBB45_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umax_i64_monotonic: ; RV32IA-LABEL: atomicrmw_umax_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB45_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB45_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB45_1 ; RV32IA-NEXT: j .LBB45_1
; RV32IA-NEXT: .LBB45_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB45_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umax_i64_monotonic: ; RV64I-LABEL: atomicrmw_umax_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bltu s1, a3, .LBB45_1 ; RV64I-NEXT: bltu s1, a3, .LBB45_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB45_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB45_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB45_1 ; RV64I-NEXT: j .LBB45_1
; RV64I-NEXT: .LBB45_4: # %atomicrmw.end ; RV64I-NEXT: .LBB45_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umax_i64_monotonic: ; RV64IA-LABEL: atomicrmw_umax_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amomaxu.d a0, a1, (a0) ; RV64IA-NEXT: amomaxu.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umax i64* %a, i64 %b monotonic %1 = atomicrmw umax i64* %a, i64 %b monotonic
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.6: # %atomicrmw.start ; RV32I-NEXT: # %bb.6: # %atomicrmw.start
; RV32I-NEXT: # in Loop: Header=BB46_2 Depth=1 ; RV32I-NEXT: # in Loop: Header=BB46_2 Depth=1
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: j .LBB46_1 ; RV32I-NEXT: j .LBB46_1
; RV32I-NEXT: .LBB46_7: # %atomicrmw.end ; RV32I-NEXT: .LBB46_7: # %atomicrmw.end
; RV32I-NEXT: mv a0, a4 ; RV32I-NEXT: mv a0, a4
; RV32I-NEXT: mv a1, a5 ; RV32I-NEXT: mv a1, a5
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IA-LABEL: atomicrmw_umin_i64_monotonic: ; RV32IA-LABEL: atomicrmw_umin_i64_monotonic:
; RV32IA: # %bb.0: ; RV32IA: # %bb.0:
; RV32IA-NEXT: addi sp, sp, -32 ; RV32IA-NEXT: addi sp, sp, -32
; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
Show All 35 Lines
; RV32IA-NEXT: # %bb.6: # %atomicrmw.start ; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
; RV32IA-NEXT: # in Loop: Header=BB46_2 Depth=1 ; RV32IA-NEXT: # in Loop: Header=BB46_2 Depth=1
; RV32IA-NEXT: mv a2, s2 ; RV32IA-NEXT: mv a2, s2
; RV32IA-NEXT: mv a3, s1 ; RV32IA-NEXT: mv a3, s1
; RV32IA-NEXT: j .LBB46_1 ; RV32IA-NEXT: j .LBB46_1
; RV32IA-NEXT: .LBB46_7: # %atomicrmw.end ; RV32IA-NEXT: .LBB46_7: # %atomicrmw.end
; RV32IA-NEXT: mv a0, a4 ; RV32IA-NEXT: mv a0, a4
; RV32IA-NEXT: mv a1, a5 ; RV32IA-NEXT: mv a1, a5
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32IA-NEXT: addi sp, sp, 32 ; RV32IA-NEXT: addi sp, sp, 32
; RV32IA-NEXT: ret ; RV32IA-NEXT: ret
; ;
; RV64I-LABEL: atomicrmw_umin_i64_monotonic: ; RV64I-LABEL: atomicrmw_umin_i64_monotonic:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a2, a3 ; RV64I-NEXT: mv a2, a3
; RV64I-NEXT: bgeu s1, a3, .LBB46_1 ; RV64I-NEXT: bgeu s1, a3, .LBB46_1
; RV64I-NEXT: # %bb.3: # %atomicrmw.start ; RV64I-NEXT: # %bb.3: # %atomicrmw.start
; RV64I-NEXT: # in Loop: Header=BB46_2 Depth=1 ; RV64I-NEXT: # in Loop: Header=BB46_2 Depth=1
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: j .LBB46_1 ; RV64I-NEXT: j .LBB46_1
; RV64I-NEXT: .LBB46_4: # %atomicrmw.end ; RV64I-NEXT: .LBB46_4: # %atomicrmw.end
; RV64I-NEXT: mv a0, a3 ; RV64I-NEXT: mv a0, a3
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IA-LABEL: atomicrmw_umin_i64_monotonic: ; RV64IA-LABEL: atomicrmw_umin_i64_monotonic:
; RV64IA: # %bb.0: ; RV64IA: # %bb.0:
; RV64IA-NEXT: amominu.d a0, a1, (a0) ; RV64IA-NEXT: amominu.d a0, a1, (a0)
; RV64IA-NEXT: ret ; RV64IA-NEXT: ret
%1 = atomicrmw umin i64* %a, i64 %b monotonic %1 = atomicrmw umin i64* %a, i64 %b monotonic
ret i64 %1 ret i64 %1
} }

llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll

Show First 20 Lines • Show All 487 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.1: ; RV32I-NEXT: # %bb.1:
; RV32I-NEXT: srli a0, a0, 24 ; RV32I-NEXT: srli a0, a0, 24
; RV32I-NEXT: addi a0, a0, 32 ; RV32I-NEXT: addi a0, a0, 32
; RV32I-NEXT: j .LBB7_3 ; RV32I-NEXT: j .LBB7_3
; RV32I-NEXT: .LBB7_2: ; RV32I-NEXT: .LBB7_2:
; RV32I-NEXT: srli a0, s2, 24 ; RV32I-NEXT: srli a0, s2, 24
; RV32I-NEXT: .LBB7_3: ; RV32I-NEXT: .LBB7_3:
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_cttz_i64: ; RV64I-LABEL: test_cttz_i64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: beqz a0, .LBB7_2 ; RV64I-NEXT: beqz a0, .LBB7_2
; RV64I-NEXT: # %bb.1: # %cond.false ; RV64I-NEXT: # %bb.1: # %cond.false
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
▲ Show 20 Lines • Show All 276 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.1: ; RV32I-NEXT: # %bb.1:
; RV32I-NEXT: srli a0, a0, 24 ; RV32I-NEXT: srli a0, a0, 24
; RV32I-NEXT: addi a0, a0, 32 ; RV32I-NEXT: addi a0, a0, 32
; RV32I-NEXT: j .LBB11_3 ; RV32I-NEXT: j .LBB11_3
; RV32I-NEXT: .LBB11_2: ; RV32I-NEXT: .LBB11_2:
; RV32I-NEXT: srli a0, s2, 24 ; RV32I-NEXT: srli a0, s2, 24
; RV32I-NEXT: .LBB11_3: ; RV32I-NEXT: .LBB11_3:
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_cttz_i64_zero_undef: ; RV64I-LABEL: test_cttz_i64_zero_undef:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: addi a1, a0, -1 ; RV64I-NEXT: addi a1, a0, -1
▲ Show 20 Lines • Show All 151 Lines • ▼ Show 20 Lines
; RV32I-NEXT: srli a1, a0, 4 ; RV32I-NEXT: srli a1, a0, 4
; RV32I-NEXT: add a0, a0, a1 ; RV32I-NEXT: add a0, a0, a1
; RV32I-NEXT: and a0, a0, s4 ; RV32I-NEXT: and a0, a0, s4
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call __mulsi3@plt ; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: srli a0, a0, 24 ; RV32I-NEXT: srli a0, a0, 24
; RV32I-NEXT: add a0, a0, s5 ; RV32I-NEXT: add a0, a0, s5
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_ctpop_i64: ; RV64I-LABEL: test_ctpop_i64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: srli a1, a0, 1 ; RV64I-NEXT: srli a1, a0, 1
▲ Show 20 Lines • Show All 123 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll

Show First 20 Lines • Show All 236 Lines • ▼ Show 20 Lines
; ILP32F-NEXT: fsw ft7, 28(a1) ; ILP32F-NEXT: fsw ft7, 28(a1)
; ILP32F-NEXT: fsw ft6, 24(a1) ; ILP32F-NEXT: fsw ft6, 24(a1)
; ILP32F-NEXT: fsw ft5, 20(a1) ; ILP32F-NEXT: fsw ft5, 20(a1)
; ILP32F-NEXT: fsw ft4, 16(a1) ; ILP32F-NEXT: fsw ft4, 16(a1)
; ILP32F-NEXT: fsw ft3, %lo(var+12)(a0) ; ILP32F-NEXT: fsw ft3, %lo(var+12)(a0)
; ILP32F-NEXT: fsw ft2, %lo(var+8)(a0) ; ILP32F-NEXT: fsw ft2, %lo(var+8)(a0)
; ILP32F-NEXT: fsw ft1, %lo(var+4)(a0) ; ILP32F-NEXT: fsw ft1, %lo(var+4)(a0)
; ILP32F-NEXT: fsw ft0, %lo(var)(a0) ; ILP32F-NEXT: fsw ft0, %lo(var)(a0)
; ILP32F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload ; ILP32F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; ILP32F-NEXT: addi sp, sp, 48 ; ILP32F-NEXT: addi sp, sp, 48
; ILP32F-NEXT: ret ; ILP32F-NEXT: ret
; ;
; LP64F-LABEL: callee: ; LP64F-LABEL: callee:
; LP64F: # %bb.0: ; LP64F: # %bb.0:
; LP64F-NEXT: addi sp, sp, -48 ; LP64F-NEXT: addi sp, sp, -48
; LP64F-NEXT: fsw fs0, 44(sp) # 4-byte Folded Spill ; LP64F-NEXT: fsw fs0, 44(sp) # 4-byte Folded Spill
; LP64F-NEXT: fsw fs1, 40(sp) # 4-byte Folded Spill ; LP64F-NEXT: fsw fs1, 40(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; LP64F-NEXT: fsw ft7, 28(a1) ; LP64F-NEXT: fsw ft7, 28(a1)
; LP64F-NEXT: fsw ft6, 24(a1) ; LP64F-NEXT: fsw ft6, 24(a1)
; LP64F-NEXT: fsw ft5, 20(a1) ; LP64F-NEXT: fsw ft5, 20(a1)
; LP64F-NEXT: fsw ft4, 16(a1) ; LP64F-NEXT: fsw ft4, 16(a1)
; LP64F-NEXT: fsw ft3, %lo(var+12)(a0) ; LP64F-NEXT: fsw ft3, %lo(var+12)(a0)
; LP64F-NEXT: fsw ft2, %lo(var+8)(a0) ; LP64F-NEXT: fsw ft2, %lo(var+8)(a0)
; LP64F-NEXT: fsw ft1, %lo(var+4)(a0) ; LP64F-NEXT: fsw ft1, %lo(var+4)(a0)
; LP64F-NEXT: fsw ft0, %lo(var)(a0) ; LP64F-NEXT: fsw ft0, %lo(var)(a0)
; LP64F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload ; LP64F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; LP64F-NEXT: addi sp, sp, 48 ; LP64F-NEXT: addi sp, sp, 48
; LP64F-NEXT: ret ; LP64F-NEXT: ret
; ;
; ILP32D-LABEL: callee: ; ILP32D-LABEL: callee:
; ILP32D: # %bb.0: ; ILP32D: # %bb.0:
; ILP32D-NEXT: addi sp, sp, -96 ; ILP32D-NEXT: addi sp, sp, -96
; ILP32D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill ; ILP32D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill
; ILP32D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill ; ILP32D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; ILP32D-NEXT: fsw ft7, 28(a1) ; ILP32D-NEXT: fsw ft7, 28(a1)
; ILP32D-NEXT: fsw ft6, 24(a1) ; ILP32D-NEXT: fsw ft6, 24(a1)
; ILP32D-NEXT: fsw ft5, 20(a1) ; ILP32D-NEXT: fsw ft5, 20(a1)
; ILP32D-NEXT: fsw ft4, 16(a1) ; ILP32D-NEXT: fsw ft4, 16(a1)
; ILP32D-NEXT: fsw ft3, %lo(var+12)(a0) ; ILP32D-NEXT: fsw ft3, %lo(var+12)(a0)
; ILP32D-NEXT: fsw ft2, %lo(var+8)(a0) ; ILP32D-NEXT: fsw ft2, %lo(var+8)(a0)
; ILP32D-NEXT: fsw ft1, %lo(var+4)(a0) ; ILP32D-NEXT: fsw ft1, %lo(var+4)(a0)
; ILP32D-NEXT: fsw ft0, %lo(var)(a0) ; ILP32D-NEXT: fsw ft0, %lo(var)(a0)
; ILP32D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload ; ILP32D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; ILP32D-NEXT: addi sp, sp, 96 ; ILP32D-NEXT: addi sp, sp, 96
; ILP32D-NEXT: ret ; ILP32D-NEXT: ret
; ;
; LP64D-LABEL: callee: ; LP64D-LABEL: callee:
; LP64D: # %bb.0: ; LP64D: # %bb.0:
; LP64D-NEXT: addi sp, sp, -96 ; LP64D-NEXT: addi sp, sp, -96
; LP64D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill ; LP64D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill
; LP64D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill ; LP64D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; LP64D-NEXT: fsw ft7, 28(a1) ; LP64D-NEXT: fsw ft7, 28(a1)
; LP64D-NEXT: fsw ft6, 24(a1) ; LP64D-NEXT: fsw ft6, 24(a1)
; LP64D-NEXT: fsw ft5, 20(a1) ; LP64D-NEXT: fsw ft5, 20(a1)
; LP64D-NEXT: fsw ft4, 16(a1) ; LP64D-NEXT: fsw ft4, 16(a1)
; LP64D-NEXT: fsw ft3, %lo(var+12)(a0) ; LP64D-NEXT: fsw ft3, %lo(var+12)(a0)
; LP64D-NEXT: fsw ft2, %lo(var+8)(a0) ; LP64D-NEXT: fsw ft2, %lo(var+8)(a0)
; LP64D-NEXT: fsw ft1, %lo(var+4)(a0) ; LP64D-NEXT: fsw ft1, %lo(var+4)(a0)
; LP64D-NEXT: fsw ft0, %lo(var)(a0) ; LP64D-NEXT: fsw ft0, %lo(var)(a0)
; LP64D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload ; LP64D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; LP64D-NEXT: addi sp, sp, 96 ; LP64D-NEXT: addi sp, sp, 96
; LP64D-NEXT: ret ; LP64D-NEXT: ret
%val = load [32 x float], [32 x float]* @var %val = load [32 x float], [32 x float]* @var
store volatile [32 x float] %val, [32 x float]* @var store volatile [32 x float] %val, [32 x float]* @var
ret void ret void
} }
; This function tests that RISCVRegisterInfo::getCallPreservedMask returns ; This function tests that RISCVRegisterInfo::getCallPreservedMask returns
▲ Show 20 Lines • Show All 136 Lines • ▼ Show 20 Lines
; ILP32-NEXT: flw ft0, 116(sp) # 4-byte Folded Reload ; ILP32-NEXT: flw ft0, 116(sp) # 4-byte Folded Reload
; ILP32-NEXT: fsw ft0, %lo(var+12)(s0) ; ILP32-NEXT: fsw ft0, %lo(var+12)(s0)
; ILP32-NEXT: flw ft0, 120(sp) # 4-byte Folded Reload ; ILP32-NEXT: flw ft0, 120(sp) # 4-byte Folded Reload
; ILP32-NEXT: fsw ft0, %lo(var+8)(s0) ; ILP32-NEXT: fsw ft0, %lo(var+8)(s0)
; ILP32-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload ; ILP32-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; ILP32-NEXT: fsw ft0, %lo(var+4)(s0) ; ILP32-NEXT: fsw ft0, %lo(var+4)(s0)
; ILP32-NEXT: flw ft0, 128(sp) # 4-byte Folded Reload ; ILP32-NEXT: flw ft0, 128(sp) # 4-byte Folded Reload
; ILP32-NEXT: fsw ft0, %lo(var)(s0) ; ILP32-NEXT: fsw ft0, %lo(var)(s0)
; ILP32-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw ra, 140(sp) # 4-byte Folded Reload ; ILP32-NEXT: lw ra, 140(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; ILP32-NEXT: addi sp, sp, 144 ; ILP32-NEXT: addi sp, sp, 144
; ILP32-NEXT: ret ; ILP32-NEXT: ret
; ;
; LP64-LABEL: caller: ; LP64-LABEL: caller:
; LP64: # %bb.0: ; LP64: # %bb.0:
; LP64-NEXT: addi sp, sp, -160 ; LP64-NEXT: addi sp, sp, -160
; LP64-NEXT: sd ra, 152(sp) # 8-byte Folded Spill ; LP64-NEXT: sd ra, 152(sp) # 8-byte Folded Spill
; LP64-NEXT: sd s0, 144(sp) # 8-byte Folded Spill ; LP64-NEXT: sd s0, 144(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 124 Lines • ▼ Show 20 Lines
; LP64-NEXT: flw ft0, 120(sp) # 4-byte Folded Reload ; LP64-NEXT: flw ft0, 120(sp) # 4-byte Folded Reload
; LP64-NEXT: fsw ft0, %lo(var+12)(s0) ; LP64-NEXT: fsw ft0, %lo(var+12)(s0)
; LP64-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload ; LP64-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; LP64-NEXT: fsw ft0, %lo(var+8)(s0) ; LP64-NEXT: fsw ft0, %lo(var+8)(s0)
; LP64-NEXT: flw ft0, 128(sp) # 4-byte Folded Reload ; LP64-NEXT: flw ft0, 128(sp) # 4-byte Folded Reload
; LP64-NEXT: fsw ft0, %lo(var+4)(s0) ; LP64-NEXT: fsw ft0, %lo(var+4)(s0)
; LP64-NEXT: flw ft0, 132(sp) # 4-byte Folded Reload ; LP64-NEXT: flw ft0, 132(sp) # 4-byte Folded Reload
; LP64-NEXT: fsw ft0, %lo(var)(s0) ; LP64-NEXT: fsw ft0, %lo(var)(s0)
; LP64-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; LP64-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; LP64-NEXT: ld ra, 152(sp) # 8-byte Folded Reload ; LP64-NEXT: ld ra, 152(sp) # 8-byte Folded Reload
; LP64-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; LP64-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; LP64-NEXT: addi sp, sp, 160 ; LP64-NEXT: addi sp, sp, 160
; LP64-NEXT: ret ; LP64-NEXT: ret
; ;
; ILP32F-LABEL: caller: ; ILP32F-LABEL: caller:
; ILP32F: # %bb.0: ; ILP32F: # %bb.0:
; ILP32F-NEXT: addi sp, sp, -144 ; ILP32F-NEXT: addi sp, sp, -144
; ILP32F-NEXT: sw ra, 140(sp) # 4-byte Folded Spill ; ILP32F-NEXT: sw ra, 140(sp) # 4-byte Folded Spill
; ILP32F-NEXT: sw s0, 136(sp) # 4-byte Folded Spill ; ILP32F-NEXT: sw s0, 136(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; ILP32F-NEXT: flw ft0, 68(sp) # 4-byte Folded Reload ; ILP32F-NEXT: flw ft0, 68(sp) # 4-byte Folded Reload
; ILP32F-NEXT: fsw ft0, %lo(var+12)(s0) ; ILP32F-NEXT: fsw ft0, %lo(var+12)(s0)
; ILP32F-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload ; ILP32F-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload
; ILP32F-NEXT: fsw ft0, %lo(var+8)(s0) ; ILP32F-NEXT: fsw ft0, %lo(var+8)(s0)
; ILP32F-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload ; ILP32F-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload
; ILP32F-NEXT: fsw ft0, %lo(var+4)(s0) ; ILP32F-NEXT: fsw ft0, %lo(var+4)(s0)
; ILP32F-NEXT: flw ft0, 80(sp) # 4-byte Folded Reload ; ILP32F-NEXT: flw ft0, 80(sp) # 4-byte Folded Reload
; ILP32F-NEXT: fsw ft0, %lo(var)(s0) ; ILP32F-NEXT: fsw ft0, %lo(var)(s0)
; ILP32F-NEXT: flw fs11, 84(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs10, 88(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs9, 92(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs8, 96(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs7, 100(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs6, 104(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs5, 108(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs4, 112(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs3, 116(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs2, 120(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs1, 124(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs0, 128(sp) # 4-byte Folded Reload
; ILP32F-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; ILP32F-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; ILP32F-NEXT: lw ra, 140(sp) # 4-byte Folded Reload ; ILP32F-NEXT: lw ra, 140(sp) # 4-byte Folded Reload
; ILP32F-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; ILP32F-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs0, 128(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs1, 124(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs2, 120(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs3, 116(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs4, 112(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs5, 108(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs6, 104(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs7, 100(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs8, 96(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs9, 92(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs10, 88(sp) # 4-byte Folded Reload
; ILP32F-NEXT: flw fs11, 84(sp) # 4-byte Folded Reload
; ILP32F-NEXT: addi sp, sp, 144 ; ILP32F-NEXT: addi sp, sp, 144
; ILP32F-NEXT: ret ; ILP32F-NEXT: ret
; ;
; LP64F-LABEL: caller: ; LP64F-LABEL: caller:
; LP64F: # %bb.0: ; LP64F: # %bb.0:
; LP64F-NEXT: addi sp, sp, -160 ; LP64F-NEXT: addi sp, sp, -160
; LP64F-NEXT: sd ra, 152(sp) # 8-byte Folded Spill ; LP64F-NEXT: sd ra, 152(sp) # 8-byte Folded Spill
; LP64F-NEXT: sd s0, 144(sp) # 8-byte Folded Spill ; LP64F-NEXT: sd s0, 144(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; LP64F-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload ; LP64F-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload
; LP64F-NEXT: fsw ft0, %lo(var+12)(s0) ; LP64F-NEXT: fsw ft0, %lo(var+12)(s0)
; LP64F-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload ; LP64F-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload
; LP64F-NEXT: fsw ft0, %lo(var+8)(s0) ; LP64F-NEXT: fsw ft0, %lo(var+8)(s0)
; LP64F-NEXT: flw ft0, 80(sp) # 4-byte Folded Reload ; LP64F-NEXT: flw ft0, 80(sp) # 4-byte Folded Reload
; LP64F-NEXT: fsw ft0, %lo(var+4)(s0) ; LP64F-NEXT: fsw ft0, %lo(var+4)(s0)
; LP64F-NEXT: flw ft0, 84(sp) # 4-byte Folded Reload ; LP64F-NEXT: flw ft0, 84(sp) # 4-byte Folded Reload
; LP64F-NEXT: fsw ft0, %lo(var)(s0) ; LP64F-NEXT: fsw ft0, %lo(var)(s0)
; LP64F-NEXT: flw fs11, 88(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs10, 92(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs9, 96(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs8, 100(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs7, 104(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs6, 108(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs5, 112(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs4, 116(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs3, 120(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs2, 124(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs1, 128(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs0, 132(sp) # 4-byte Folded Reload
; LP64F-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; LP64F-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; LP64F-NEXT: ld ra, 152(sp) # 8-byte Folded Reload ; LP64F-NEXT: ld ra, 152(sp) # 8-byte Folded Reload
; LP64F-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; LP64F-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; LP64F-NEXT: flw fs0, 132(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs1, 128(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs2, 124(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs3, 120(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs4, 116(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs5, 112(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs6, 108(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs7, 104(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs8, 100(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs9, 96(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs10, 92(sp) # 4-byte Folded Reload
; LP64F-NEXT: flw fs11, 88(sp) # 4-byte Folded Reload
; LP64F-NEXT: addi sp, sp, 160 ; LP64F-NEXT: addi sp, sp, 160
; LP64F-NEXT: ret ; LP64F-NEXT: ret
; ;
; ILP32D-LABEL: caller: ; ILP32D-LABEL: caller:
; ILP32D: # %bb.0: ; ILP32D: # %bb.0:
; ILP32D-NEXT: addi sp, sp, -192 ; ILP32D-NEXT: addi sp, sp, -192
; ILP32D-NEXT: sw ra, 188(sp) # 4-byte Folded Spill ; ILP32D-NEXT: sw ra, 188(sp) # 4-byte Folded Spill
; ILP32D-NEXT: sw s0, 184(sp) # 4-byte Folded Spill ; ILP32D-NEXT: sw s0, 184(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; ILP32D-NEXT: flw ft0, 64(sp) # 4-byte Folded Reload ; ILP32D-NEXT: flw ft0, 64(sp) # 4-byte Folded Reload
; ILP32D-NEXT: fsw ft0, %lo(var+12)(s0) ; ILP32D-NEXT: fsw ft0, %lo(var+12)(s0)
; ILP32D-NEXT: flw ft0, 68(sp) # 4-byte Folded Reload ; ILP32D-NEXT: flw ft0, 68(sp) # 4-byte Folded Reload
; ILP32D-NEXT: fsw ft0, %lo(var+8)(s0) ; ILP32D-NEXT: fsw ft0, %lo(var+8)(s0)
; ILP32D-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload ; ILP32D-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload
; ILP32D-NEXT: fsw ft0, %lo(var+4)(s0) ; ILP32D-NEXT: fsw ft0, %lo(var+4)(s0)
; ILP32D-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload ; ILP32D-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload
; ILP32D-NEXT: fsw ft0, %lo(var)(s0) ; ILP32D-NEXT: fsw ft0, %lo(var)(s0)
; ILP32D-NEXT: fld fs11, 80(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 88(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 96(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 104(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 112(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 120(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 128(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 136(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 144(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 152(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 160(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs0, 168(sp) # 8-byte Folded Reload
; ILP32D-NEXT: lw s1, 180(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw s0, 184(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw ra, 188(sp) # 4-byte Folded Reload ; ILP32D-NEXT: lw ra, 188(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw s0, 184(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw s1, 180(sp) # 4-byte Folded Reload
; ILP32D-NEXT: fld fs0, 168(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 160(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 152(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 144(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 136(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 128(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 120(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 112(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 104(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 96(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 88(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs11, 80(sp) # 8-byte Folded Reload
; ILP32D-NEXT: addi sp, sp, 192 ; ILP32D-NEXT: addi sp, sp, 192
; ILP32D-NEXT: ret ; ILP32D-NEXT: ret
; ;
; LP64D-LABEL: caller: ; LP64D-LABEL: caller:
; LP64D: # %bb.0: ; LP64D: # %bb.0:
; LP64D-NEXT: addi sp, sp, -208 ; LP64D-NEXT: addi sp, sp, -208
; LP64D-NEXT: sd ra, 200(sp) # 8-byte Folded Spill ; LP64D-NEXT: sd ra, 200(sp) # 8-byte Folded Spill
; LP64D-NEXT: sd s0, 192(sp) # 8-byte Folded Spill ; LP64D-NEXT: sd s0, 192(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; LP64D-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload ; LP64D-NEXT: flw ft0, 72(sp) # 4-byte Folded Reload
; LP64D-NEXT: fsw ft0, %lo(var+12)(s0) ; LP64D-NEXT: fsw ft0, %lo(var+12)(s0)
; LP64D-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload ; LP64D-NEXT: flw ft0, 76(sp) # 4-byte Folded Reload
; LP64D-NEXT: fsw ft0, %lo(var+8)(s0) ; LP64D-NEXT: fsw ft0, %lo(var+8)(s0)
; LP64D-NEXT: flw ft0, 80(sp) # 4-byte Folded Reload ; LP64D-NEXT: flw ft0, 80(sp) # 4-byte Folded Reload
; LP64D-NEXT: fsw ft0, %lo(var+4)(s0) ; LP64D-NEXT: fsw ft0, %lo(var+4)(s0)
; LP64D-NEXT: flw ft0, 84(sp) # 4-byte Folded Reload ; LP64D-NEXT: flw ft0, 84(sp) # 4-byte Folded Reload
; LP64D-NEXT: fsw ft0, %lo(var)(s0) ; LP64D-NEXT: fsw ft0, %lo(var)(s0)
; LP64D-NEXT: fld fs11, 88(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 96(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 104(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 112(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 120(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 128(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 136(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 144(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 152(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 160(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 168(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs0, 176(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s1, 184(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s0, 192(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld ra, 200(sp) # 8-byte Folded Reload ; LP64D-NEXT: ld ra, 200(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s0, 192(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s1, 184(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs0, 176(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 168(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 160(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 152(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 144(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 136(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 128(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 120(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 112(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 104(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 96(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs11, 88(sp) # 8-byte Folded Reload
; LP64D-NEXT: addi sp, sp, 208 ; LP64D-NEXT: addi sp, sp, 208
; LP64D-NEXT: ret ; LP64D-NEXT: ret
%val = load [32 x float], [32 x float]* @var %val = load [32 x float], [32 x float]* @var
call void @callee() call void @callee()
store volatile [32 x float] %val, [32 x float]* @var store volatile [32 x float] %val, [32 x float]* @var
ret void ret void
} }

llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll

Show First 20 Lines • Show All 232 Lines • ▼ Show 20 Lines
; ILP32D-NEXT: fsd ft7, 56(a1) ; ILP32D-NEXT: fsd ft7, 56(a1)
; ILP32D-NEXT: fsd ft6, 48(a1) ; ILP32D-NEXT: fsd ft6, 48(a1)
; ILP32D-NEXT: fsd ft5, 40(a1) ; ILP32D-NEXT: fsd ft5, 40(a1)
; ILP32D-NEXT: fsd ft4, 32(a1) ; ILP32D-NEXT: fsd ft4, 32(a1)
; ILP32D-NEXT: fsd ft3, 24(a1) ; ILP32D-NEXT: fsd ft3, 24(a1)
; ILP32D-NEXT: fsd ft2, 16(a1) ; ILP32D-NEXT: fsd ft2, 16(a1)
; ILP32D-NEXT: fsd ft1, %lo(var+8)(a0) ; ILP32D-NEXT: fsd ft1, %lo(var+8)(a0)
; ILP32D-NEXT: fsd ft0, %lo(var)(a0) ; ILP32D-NEXT: fsd ft0, %lo(var)(a0)
; ILP32D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload ; ILP32D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; ILP32D-NEXT: addi sp, sp, 96 ; ILP32D-NEXT: addi sp, sp, 96
; ILP32D-NEXT: ret ; ILP32D-NEXT: ret
; ;
; LP64D-LABEL: callee: ; LP64D-LABEL: callee:
; LP64D: # %bb.0: ; LP64D: # %bb.0:
; LP64D-NEXT: addi sp, sp, -96 ; LP64D-NEXT: addi sp, sp, -96
; LP64D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill ; LP64D-NEXT: fsd fs0, 88(sp) # 8-byte Folded Spill
; LP64D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill ; LP64D-NEXT: fsd fs1, 80(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; LP64D-NEXT: fsd ft7, 56(a1) ; LP64D-NEXT: fsd ft7, 56(a1)
; LP64D-NEXT: fsd ft6, 48(a1) ; LP64D-NEXT: fsd ft6, 48(a1)
; LP64D-NEXT: fsd ft5, 40(a1) ; LP64D-NEXT: fsd ft5, 40(a1)
; LP64D-NEXT: fsd ft4, 32(a1) ; LP64D-NEXT: fsd ft4, 32(a1)
; LP64D-NEXT: fsd ft3, 24(a1) ; LP64D-NEXT: fsd ft3, 24(a1)
; LP64D-NEXT: fsd ft2, 16(a1) ; LP64D-NEXT: fsd ft2, 16(a1)
; LP64D-NEXT: fsd ft1, %lo(var+8)(a0) ; LP64D-NEXT: fsd ft1, %lo(var+8)(a0)
; LP64D-NEXT: fsd ft0, %lo(var)(a0) ; LP64D-NEXT: fsd ft0, %lo(var)(a0)
; LP64D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload ; LP64D-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; LP64D-NEXT: addi sp, sp, 96 ; LP64D-NEXT: addi sp, sp, 96
; LP64D-NEXT: ret ; LP64D-NEXT: ret
%val = load [32 x double], [32 x double]* @var %val = load [32 x double], [32 x double]* @var
store volatile [32 x double] %val, [32 x double]* @var store volatile [32 x double] %val, [32 x double]* @var
ret void ret void
} }
; This function tests that RISCVRegisterInfo::getCallPreservedMask returns ; This function tests that RISCVRegisterInfo::getCallPreservedMask returns
▲ Show 20 Lines • Show All 136 Lines • ▼ Show 20 Lines
; ILP32-NEXT: fld ft0, 224(sp) # 8-byte Folded Reload ; ILP32-NEXT: fld ft0, 224(sp) # 8-byte Folded Reload
; ILP32-NEXT: fsd ft0, 24(s1) ; ILP32-NEXT: fsd ft0, 24(s1)
; ILP32-NEXT: fld ft0, 232(sp) # 8-byte Folded Reload ; ILP32-NEXT: fld ft0, 232(sp) # 8-byte Folded Reload
; ILP32-NEXT: fsd ft0, 16(s1) ; ILP32-NEXT: fsd ft0, 16(s1)
; ILP32-NEXT: fld ft0, 240(sp) # 8-byte Folded Reload ; ILP32-NEXT: fld ft0, 240(sp) # 8-byte Folded Reload
; ILP32-NEXT: fsd ft0, %lo(var+8)(s0) ; ILP32-NEXT: fsd ft0, %lo(var+8)(s0)
; ILP32-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload ; ILP32-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
; ILP32-NEXT: fsd ft0, %lo(var)(s0) ; ILP32-NEXT: fsd ft0, %lo(var)(s0)
; ILP32-NEXT: lw s1, 260(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw s0, 264(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw ra, 268(sp) # 4-byte Folded Reload ; ILP32-NEXT: lw ra, 268(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw s0, 264(sp) # 4-byte Folded Reload
; ILP32-NEXT: lw s1, 260(sp) # 4-byte Folded Reload
; ILP32-NEXT: addi sp, sp, 272 ; ILP32-NEXT: addi sp, sp, 272
; ILP32-NEXT: ret ; ILP32-NEXT: ret
; ;
; LP64-LABEL: caller: ; LP64-LABEL: caller:
; LP64: # %bb.0: ; LP64: # %bb.0:
; LP64-NEXT: addi sp, sp, -288 ; LP64-NEXT: addi sp, sp, -288
; LP64-NEXT: sd ra, 280(sp) # 8-byte Folded Spill ; LP64-NEXT: sd ra, 280(sp) # 8-byte Folded Spill
; LP64-NEXT: sd s0, 272(sp) # 8-byte Folded Spill ; LP64-NEXT: sd s0, 272(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 124 Lines • ▼ Show 20 Lines
; LP64-NEXT: fld ft0, 232(sp) # 8-byte Folded Reload ; LP64-NEXT: fld ft0, 232(sp) # 8-byte Folded Reload
; LP64-NEXT: fsd ft0, 24(s1) ; LP64-NEXT: fsd ft0, 24(s1)
; LP64-NEXT: fld ft0, 240(sp) # 8-byte Folded Reload ; LP64-NEXT: fld ft0, 240(sp) # 8-byte Folded Reload
; LP64-NEXT: fsd ft0, 16(s1) ; LP64-NEXT: fsd ft0, 16(s1)
; LP64-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload ; LP64-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
; LP64-NEXT: fsd ft0, %lo(var+8)(s0) ; LP64-NEXT: fsd ft0, %lo(var+8)(s0)
; LP64-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload ; LP64-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload
; LP64-NEXT: fsd ft0, %lo(var)(s0) ; LP64-NEXT: fsd ft0, %lo(var)(s0)
; LP64-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; LP64-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; LP64-NEXT: ld ra, 280(sp) # 8-byte Folded Reload ; LP64-NEXT: ld ra, 280(sp) # 8-byte Folded Reload
; LP64-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; LP64-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; LP64-NEXT: addi sp, sp, 288 ; LP64-NEXT: addi sp, sp, 288
; LP64-NEXT: ret ; LP64-NEXT: ret
; ;
; ILP32D-LABEL: caller: ; ILP32D-LABEL: caller:
; ILP32D: # %bb.0: ; ILP32D: # %bb.0:
; ILP32D-NEXT: addi sp, sp, -272 ; ILP32D-NEXT: addi sp, sp, -272
; ILP32D-NEXT: sw ra, 268(sp) # 4-byte Folded Spill ; ILP32D-NEXT: sw ra, 268(sp) # 4-byte Folded Spill
; ILP32D-NEXT: sw s0, 264(sp) # 4-byte Folded Spill ; ILP32D-NEXT: sw s0, 264(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; ILP32D-NEXT: fld ft0, 128(sp) # 8-byte Folded Reload ; ILP32D-NEXT: fld ft0, 128(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fsd ft0, 24(s1) ; ILP32D-NEXT: fsd ft0, 24(s1)
; ILP32D-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload ; ILP32D-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fsd ft0, 16(s1) ; ILP32D-NEXT: fsd ft0, 16(s1)
; ILP32D-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload ; ILP32D-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fsd ft0, %lo(var+8)(s0) ; ILP32D-NEXT: fsd ft0, %lo(var+8)(s0)
; ILP32D-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload ; ILP32D-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fsd ft0, %lo(var)(s0) ; ILP32D-NEXT: fsd ft0, %lo(var)(s0)
; ILP32D-NEXT: fld fs11, 160(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 168(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 176(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 184(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 192(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 200(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 208(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 216(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 224(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 232(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 240(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs0, 248(sp) # 8-byte Folded Reload
; ILP32D-NEXT: lw s1, 260(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw s0, 264(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw ra, 268(sp) # 4-byte Folded Reload ; ILP32D-NEXT: lw ra, 268(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw s0, 264(sp) # 4-byte Folded Reload
; ILP32D-NEXT: lw s1, 260(sp) # 4-byte Folded Reload
; ILP32D-NEXT: fld fs0, 248(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs1, 240(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs2, 232(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs3, 224(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs4, 216(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs5, 208(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs6, 200(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs7, 192(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs8, 184(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs9, 176(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs10, 168(sp) # 8-byte Folded Reload
; ILP32D-NEXT: fld fs11, 160(sp) # 8-byte Folded Reload
; ILP32D-NEXT: addi sp, sp, 272 ; ILP32D-NEXT: addi sp, sp, 272
; ILP32D-NEXT: ret ; ILP32D-NEXT: ret
; ;
; LP64D-LABEL: caller: ; LP64D-LABEL: caller:
; LP64D: # %bb.0: ; LP64D: # %bb.0:
; LP64D-NEXT: addi sp, sp, -288 ; LP64D-NEXT: addi sp, sp, -288
; LP64D-NEXT: sd ra, 280(sp) # 8-byte Folded Spill ; LP64D-NEXT: sd ra, 280(sp) # 8-byte Folded Spill
; LP64D-NEXT: sd s0, 272(sp) # 8-byte Folded Spill ; LP64D-NEXT: sd s0, 272(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; LP64D-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload ; LP64D-NEXT: fld ft0, 136(sp) # 8-byte Folded Reload
; LP64D-NEXT: fsd ft0, 24(s1) ; LP64D-NEXT: fsd ft0, 24(s1)
; LP64D-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload ; LP64D-NEXT: fld ft0, 144(sp) # 8-byte Folded Reload
; LP64D-NEXT: fsd ft0, 16(s1) ; LP64D-NEXT: fsd ft0, 16(s1)
; LP64D-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload ; LP64D-NEXT: fld ft0, 152(sp) # 8-byte Folded Reload
; LP64D-NEXT: fsd ft0, %lo(var+8)(s0) ; LP64D-NEXT: fsd ft0, %lo(var+8)(s0)
; LP64D-NEXT: fld ft0, 160(sp) # 8-byte Folded Reload ; LP64D-NEXT: fld ft0, 160(sp) # 8-byte Folded Reload
; LP64D-NEXT: fsd ft0, %lo(var)(s0) ; LP64D-NEXT: fsd ft0, %lo(var)(s0)
; LP64D-NEXT: fld fs11, 168(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 176(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 184(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 192(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 200(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 208(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 216(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 224(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 232(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 240(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 248(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs0, 256(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld ra, 280(sp) # 8-byte Folded Reload ; LP64D-NEXT: ld ra, 280(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; LP64D-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs0, 256(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs1, 248(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs2, 240(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs3, 232(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs4, 224(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs5, 216(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs6, 208(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs7, 200(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs8, 192(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs9, 184(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs10, 176(sp) # 8-byte Folded Reload
; LP64D-NEXT: fld fs11, 168(sp) # 8-byte Folded Reload
; LP64D-NEXT: addi sp, sp, 288 ; LP64D-NEXT: addi sp, sp, 288
; LP64D-NEXT: ret ; LP64D-NEXT: ret
%val = load [32 x double], [32 x double]* @var %val = load [32 x double], [32 x double]* @var
call void @callee() call void @callee()
store volatile [32 x double] %val, [32 x double]* @var store volatile [32 x double] %val, [32 x double]* @var
ret void ret void
} }

llvm/test/CodeGen/RISCV/callee-saved-gprs.ll

Show First 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lw a0, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var+12)(a7) ; RV32I-NEXT: sw a0, %lo(var+12)(a7)
; RV32I-NEXT: lw a0, 16(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var+8)(a7) ; RV32I-NEXT: sw a0, %lo(var+8)(a7)
; RV32I-NEXT: lw a0, 20(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var+4)(a7) ; RV32I-NEXT: sw a0, %lo(var+4)(a7)
; RV32I-NEXT: lw a0, 24(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var)(a7) ; RV32I-NEXT: sw a0, %lo(var)(a7)
; RV32I-NEXT: lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 76(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 80 ; RV32I-NEXT: addi sp, sp, 80
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32I-WITH-FP-LABEL: callee: ; RV32I-WITH-FP-LABEL: callee:
; RV32I-WITH-FP: # %bb.0: ; RV32I-WITH-FP: # %bb.0:
; RV32I-WITH-FP-NEXT: addi sp, sp, -80 ; RV32I-WITH-FP-NEXT: addi sp, sp, -80
; RV32I-WITH-FP-NEXT: sw ra, 76(sp) # 4-byte Folded Spill ; RV32I-WITH-FP-NEXT: sw ra, 76(sp) # 4-byte Folded Spill
; RV32I-WITH-FP-NEXT: sw s0, 72(sp) # 4-byte Folded Spill ; RV32I-WITH-FP-NEXT: sw s0, 72(sp) # 4-byte Folded Spill
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; RV32I-WITH-FP-NEXT: lw a0, -68(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -68(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var+12)(a7) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var+12)(a7)
; RV32I-WITH-FP-NEXT: lw a0, -64(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -64(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var+8)(a7) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var+8)(a7)
; RV32I-WITH-FP-NEXT: lw a0, -60(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -60(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var+4)(a7) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var+4)(a7)
; RV32I-WITH-FP-NEXT: lw a0, -56(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -56(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var)(a7) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var)(a7)
; RV32I-WITH-FP-NEXT: lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw ra, 76(sp) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s0, 72(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s1, 68(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s2, 64(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s3, 60(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s4, 56(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s5, 52(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s6, 48(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s7, 44(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s8, 40(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s9, 36(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s10, 32(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s11, 28(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: addi sp, sp, 80 ; RV32I-WITH-FP-NEXT: addi sp, sp, 80
; RV32I-WITH-FP-NEXT: ret ; RV32I-WITH-FP-NEXT: ret
; ;
; RV64I-LABEL: callee: ; RV64I-LABEL: callee:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -160 ; RV64I-NEXT: addi sp, sp, -160
; RV64I-NEXT: sd ra, 152(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 152(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 144(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 144(sp) # 8-byte Folded Spill
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; RV64I-NEXT: ld a0, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var+12)(a7) ; RV64I-NEXT: sw a0, %lo(var+12)(a7)
; RV64I-NEXT: ld a0, 32(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var+8)(a7) ; RV64I-NEXT: sw a0, %lo(var+8)(a7)
; RV64I-NEXT: ld a0, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var+4)(a7) ; RV64I-NEXT: sw a0, %lo(var+4)(a7)
; RV64I-NEXT: ld a0, 48(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var)(a7) ; RV64I-NEXT: sw a0, %lo(var)(a7)
; RV64I-NEXT: ld s11, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s10, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s9, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 96(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 104(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 128(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 152(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 152(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 128(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 104(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 96(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s9, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s10, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s11, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 160 ; RV64I-NEXT: addi sp, sp, 160
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64I-WITH-FP-LABEL: callee: ; RV64I-WITH-FP-LABEL: callee:
; RV64I-WITH-FP: # %bb.0: ; RV64I-WITH-FP: # %bb.0:
; RV64I-WITH-FP-NEXT: addi sp, sp, -160 ; RV64I-WITH-FP-NEXT: addi sp, sp, -160
; RV64I-WITH-FP-NEXT: sd ra, 152(sp) # 8-byte Folded Spill ; RV64I-WITH-FP-NEXT: sd ra, 152(sp) # 8-byte Folded Spill
; RV64I-WITH-FP-NEXT: sd s0, 144(sp) # 8-byte Folded Spill ; RV64I-WITH-FP-NEXT: sd s0, 144(sp) # 8-byte Folded Spill
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; RV64I-WITH-FP-NEXT: ld a0, -136(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -136(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var+12)(a7) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var+12)(a7)
; RV64I-WITH-FP-NEXT: ld a0, -128(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -128(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var+8)(a7) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var+8)(a7)
; RV64I-WITH-FP-NEXT: ld a0, -120(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -120(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var+4)(a7) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var+4)(a7)
; RV64I-WITH-FP-NEXT: ld a0, -112(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -112(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var)(a7) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var)(a7)
; RV64I-WITH-FP-NEXT: ld s11, 56(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s10, 64(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s9, 72(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s8, 80(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s7, 88(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s6, 96(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s5, 104(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s4, 112(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s3, 120(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s2, 128(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld ra, 152(sp) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld ra, 152(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s0, 144(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s1, 136(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s2, 128(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s3, 120(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s4, 112(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s5, 104(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s6, 96(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s7, 88(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s8, 80(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s9, 72(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s10, 64(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s11, 56(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: addi sp, sp, 160 ; RV64I-WITH-FP-NEXT: addi sp, sp, 160
; RV64I-WITH-FP-NEXT: ret ; RV64I-WITH-FP-NEXT: ret
%val = load [32 x i32], [32 x i32]* @var %val = load [32 x i32], [32 x i32]* @var
store volatile [32 x i32] %val, [32 x i32]* @var store volatile [32 x i32] %val, [32 x i32]* @var
ret void ret void
} }
; This function tests that RISCVRegisterInfo::getCallPreservedMask returns ; This function tests that RISCVRegisterInfo::getCallPreservedMask returns
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; RV32I-NEXT: lw a0, 76(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 76(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var+12)(s0) ; RV32I-NEXT: sw a0, %lo(var+12)(s0)
; RV32I-NEXT: lw a0, 80(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 80(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var+8)(s0) ; RV32I-NEXT: sw a0, %lo(var+8)(s0)
; RV32I-NEXT: lw a0, 84(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 84(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var+4)(s0) ; RV32I-NEXT: sw a0, %lo(var+4)(s0)
; RV32I-NEXT: lw a0, 88(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw a0, 88(sp) # 4-byte Folded Reload
; RV32I-NEXT: sw a0, %lo(var)(s0) ; RV32I-NEXT: sw a0, %lo(var)(s0)
; RV32I-NEXT: lw s11, 92(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s10, 96(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 100(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 104(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 108(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 112(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 116(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 120(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 124(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 128(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 140(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 140(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 128(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 124(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 120(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 116(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 112(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 108(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 104(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 100(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s10, 96(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s11, 92(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 144 ; RV32I-NEXT: addi sp, sp, 144
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32I-WITH-FP-LABEL: caller: ; RV32I-WITH-FP-LABEL: caller:
; RV32I-WITH-FP: # %bb.0: ; RV32I-WITH-FP: # %bb.0:
; RV32I-WITH-FP-NEXT: addi sp, sp, -144 ; RV32I-WITH-FP-NEXT: addi sp, sp, -144
; RV32I-WITH-FP-NEXT: sw ra, 140(sp) # 4-byte Folded Spill ; RV32I-WITH-FP-NEXT: sw ra, 140(sp) # 4-byte Folded Spill
; RV32I-WITH-FP-NEXT: sw s0, 136(sp) # 4-byte Folded Spill ; RV32I-WITH-FP-NEXT: sw s0, 136(sp) # 4-byte Folded Spill
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; RV32I-WITH-FP-NEXT: lw a0, -68(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -68(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var+12)(s6) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var+12)(s6)
; RV32I-WITH-FP-NEXT: lw a0, -64(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -64(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var+8)(s6) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var+8)(s6)
; RV32I-WITH-FP-NEXT: lw a0, -60(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -60(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var+4)(s6) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var+4)(s6)
; RV32I-WITH-FP-NEXT: lw a0, -56(s0) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw a0, -56(s0) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: sw a0, %lo(var)(s6) ; RV32I-WITH-FP-NEXT: sw a0, %lo(var)(s6)
; RV32I-WITH-FP-NEXT: lw s11, 92(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s10, 96(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s9, 100(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s8, 104(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s7, 108(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s6, 112(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s5, 116(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s4, 120(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s3, 124(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s2, 128(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw ra, 140(sp) # 4-byte Folded Reload ; RV32I-WITH-FP-NEXT: lw ra, 140(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s1, 132(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s2, 128(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s3, 124(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s4, 120(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s5, 116(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s6, 112(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s7, 108(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s8, 104(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s9, 100(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s10, 96(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: lw s11, 92(sp) # 4-byte Folded Reload
; RV32I-WITH-FP-NEXT: addi sp, sp, 144 ; RV32I-WITH-FP-NEXT: addi sp, sp, 144
; RV32I-WITH-FP-NEXT: ret ; RV32I-WITH-FP-NEXT: ret
; ;
; RV64I-LABEL: caller: ; RV64I-LABEL: caller:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -288 ; RV64I-NEXT: addi sp, sp, -288
; RV64I-NEXT: sd ra, 280(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 280(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 272(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 272(sp) # 8-byte Folded Spill
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; RV64I-NEXT: ld a0, 152(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 152(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var+12)(s0) ; RV64I-NEXT: sw a0, %lo(var+12)(s0)
; RV64I-NEXT: ld a0, 160(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 160(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var+8)(s0) ; RV64I-NEXT: sw a0, %lo(var+8)(s0)
; RV64I-NEXT: ld a0, 168(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 168(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var+4)(s0) ; RV64I-NEXT: sw a0, %lo(var+4)(s0)
; RV64I-NEXT: ld a0, 176(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld a0, 176(sp) # 8-byte Folded Reload
; RV64I-NEXT: sw a0, %lo(var)(s0) ; RV64I-NEXT: sw a0, %lo(var)(s0)
; RV64I-NEXT: ld s11, 184(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s10, 192(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s9, 200(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 208(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 216(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 224(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 232(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 240(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 248(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 256(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 280(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 280(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 256(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 248(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 240(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 232(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 224(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 216(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 208(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s9, 200(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s10, 192(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s11, 184(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 288 ; RV64I-NEXT: addi sp, sp, 288
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64I-WITH-FP-LABEL: caller: ; RV64I-WITH-FP-LABEL: caller:
; RV64I-WITH-FP: # %bb.0: ; RV64I-WITH-FP: # %bb.0:
; RV64I-WITH-FP-NEXT: addi sp, sp, -288 ; RV64I-WITH-FP-NEXT: addi sp, sp, -288
; RV64I-WITH-FP-NEXT: sd ra, 280(sp) # 8-byte Folded Spill ; RV64I-WITH-FP-NEXT: sd ra, 280(sp) # 8-byte Folded Spill
; RV64I-WITH-FP-NEXT: sd s0, 272(sp) # 8-byte Folded Spill ; RV64I-WITH-FP-NEXT: sd s0, 272(sp) # 8-byte Folded Spill
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; RV64I-WITH-FP-NEXT: ld a0, -136(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -136(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var+12)(s6) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var+12)(s6)
; RV64I-WITH-FP-NEXT: ld a0, -128(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -128(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var+8)(s6) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var+8)(s6)
; RV64I-WITH-FP-NEXT: ld a0, -120(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -120(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var+4)(s6) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var+4)(s6)
; RV64I-WITH-FP-NEXT: ld a0, -112(s0) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld a0, -112(s0) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: sw a0, %lo(var)(s6) ; RV64I-WITH-FP-NEXT: sw a0, %lo(var)(s6)
; RV64I-WITH-FP-NEXT: ld s11, 184(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s10, 192(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s9, 200(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s8, 208(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s7, 216(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s6, 224(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s5, 232(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s4, 240(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s3, 248(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s2, 256(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld ra, 280(sp) # 8-byte Folded Reload ; RV64I-WITH-FP-NEXT: ld ra, 280(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s0, 272(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s1, 264(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s2, 256(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s3, 248(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s4, 240(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s5, 232(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s6, 224(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s7, 216(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s8, 208(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s9, 200(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s10, 192(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: ld s11, 184(sp) # 8-byte Folded Reload
; RV64I-WITH-FP-NEXT: addi sp, sp, 288 ; RV64I-WITH-FP-NEXT: addi sp, sp, 288
; RV64I-WITH-FP-NEXT: ret ; RV64I-WITH-FP-NEXT: ret
%val = load [32 x i32], [32 x i32]* @var %val = load [32 x i32], [32 x i32]* @var
call void @callee() call void @callee()
store volatile [32 x i32] %val, [32 x i32]* @var store volatile [32 x i32] %val, [32 x i32]* @var
ret void ret void
} }

llvm/test/CodeGen/RISCV/calling-conv-half.ll

Show All 17 Lines
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: lui a0, 16 ; RV32I-NEXT: lui a0, 16
; RV32I-NEXT: addi a0, a0, -1 ; RV32I-NEXT: addi a0, a0, -1
; RV32I-NEXT: and a0, a1, a0 ; RV32I-NEXT: and a0, a1, a0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: call __fixsfsi@plt ; RV32I-NEXT: call __fixsfsi@plt
; RV32I-NEXT: add a0, s0, a0 ; RV32I-NEXT: add a0, s0, a0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: callee_half_in_regs: ; RV64I-LABEL: callee_half_in_regs:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: lui a0, 16 ; RV64I-NEXT: lui a0, 16
; RV64I-NEXT: addiw a0, a0, -1 ; RV64I-NEXT: addiw a0, a0, -1
; RV64I-NEXT: and a0, a1, a0 ; RV64I-NEXT: and a0, a1, a0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: call __fixsfdi@plt ; RV64I-NEXT: call __fixsfdi@plt
; RV64I-NEXT: addw a0, s0, a0 ; RV64I-NEXT: addw a0, s0, a0
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV32IF-LABEL: callee_half_in_regs: ; RV32IF-LABEL: callee_half_in_regs:
; RV32IF: # %bb.0: ; RV32IF: # %bb.0:
; RV32IF-NEXT: addi sp, sp, -16 ; RV32IF-NEXT: addi sp, sp, -16
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32IF-NEXT: mv s0, a0 ; RV32IF-NEXT: mv s0, a0
; RV32IF-NEXT: mv a0, a1 ; RV32IF-NEXT: mv a0, a1
; RV32IF-NEXT: call __gnu_h2f_ieee@plt ; RV32IF-NEXT: call __gnu_h2f_ieee@plt
; RV32IF-NEXT: fmv.w.x ft0, a0 ; RV32IF-NEXT: fmv.w.x ft0, a0
; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz ; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz
; RV32IF-NEXT: add a0, s0, a0 ; RV32IF-NEXT: add a0, s0, a0
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; ;
; RV64IF-LABEL: callee_half_in_regs: ; RV64IF-LABEL: callee_half_in_regs:
; RV64IF: # %bb.0: ; RV64IF: # %bb.0:
; RV64IF-NEXT: addi sp, sp, -16 ; RV64IF-NEXT: addi sp, sp, -16
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64IF-NEXT: mv s0, a0 ; RV64IF-NEXT: mv s0, a0
; RV64IF-NEXT: mv a0, a1 ; RV64IF-NEXT: mv a0, a1
; RV64IF-NEXT: call __gnu_h2f_ieee@plt ; RV64IF-NEXT: call __gnu_h2f_ieee@plt
; RV64IF-NEXT: fmv.w.x ft0, a0 ; RV64IF-NEXT: fmv.w.x ft0, a0
; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz ; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz
; RV64IF-NEXT: addw a0, s0, a0 ; RV64IF-NEXT: addw a0, s0, a0
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: addi sp, sp, 16 ; RV64IF-NEXT: addi sp, sp, 16
; RV64IF-NEXT: ret ; RV64IF-NEXT: ret
; ;
; RV32-ILP32F-LABEL: callee_half_in_regs: ; RV32-ILP32F-LABEL: callee_half_in_regs:
; RV32-ILP32F: # %bb.0: ; RV32-ILP32F: # %bb.0:
; RV32-ILP32F-NEXT: addi sp, sp, -16 ; RV32-ILP32F-NEXT: addi sp, sp, -16
; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-ILP32F-NEXT: mv s0, a0 ; RV32-ILP32F-NEXT: mv s0, a0
; RV32-ILP32F-NEXT: fmv.x.w a0, fa0 ; RV32-ILP32F-NEXT: fmv.x.w a0, fa0
; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt ; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt
; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz ; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
; RV32-ILP32F-NEXT: add a0, s0, a0 ; RV32-ILP32F-NEXT: add a0, s0, a0
; RV32-ILP32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-ILP32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-ILP32F-NEXT: addi sp, sp, 16 ; RV32-ILP32F-NEXT: addi sp, sp, 16
; RV32-ILP32F-NEXT: ret ; RV32-ILP32F-NEXT: ret
; ;
; RV64-LP64F-LABEL: callee_half_in_regs: ; RV64-LP64F-LABEL: callee_half_in_regs:
; RV64-LP64F: # %bb.0: ; RV64-LP64F: # %bb.0:
; RV64-LP64F-NEXT: addi sp, sp, -16 ; RV64-LP64F-NEXT: addi sp, sp, -16
; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64-LP64F-NEXT: mv s0, a0 ; RV64-LP64F-NEXT: mv s0, a0
; RV64-LP64F-NEXT: fmv.x.w a0, fa0 ; RV64-LP64F-NEXT: fmv.x.w a0, fa0
; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt ; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt
; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz ; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
; RV64-LP64F-NEXT: addw a0, s0, a0 ; RV64-LP64F-NEXT: addw a0, s0, a0
; RV64-LP64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-LP64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-LP64F-NEXT: addi sp, sp, 16 ; RV64-LP64F-NEXT: addi sp, sp, 16
; RV64-LP64F-NEXT: ret ; RV64-LP64F-NEXT: ret
%b_fptosi = fptosi half %b to i32 %b_fptosi = fptosi half %b to i32
%1 = add i32 %a, %b_fptosi %1 = add i32 %a, %b_fptosi
ret i32 %1 ret i32 %1
} }
define i32 @caller_half_in_regs() nounwind { define i32 @caller_half_in_regs() nounwind {
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; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: lhu a0, 16(sp) ; RV32I-NEXT: lhu a0, 16(sp)
; RV32I-NEXT: mv s0, a7 ; RV32I-NEXT: mv s0, a7
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: call __fixsfsi@plt ; RV32I-NEXT: call __fixsfsi@plt
; RV32I-NEXT: add a0, s0, a0 ; RV32I-NEXT: add a0, s0, a0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: callee_half_on_stack: ; RV64I-LABEL: callee_half_on_stack:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: lhu a0, 16(sp) ; RV64I-NEXT: lhu a0, 16(sp)
; RV64I-NEXT: mv s0, a7 ; RV64I-NEXT: mv s0, a7
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: call __fixsfdi@plt ; RV64I-NEXT: call __fixsfdi@plt
; RV64I-NEXT: addw a0, s0, a0 ; RV64I-NEXT: addw a0, s0, a0
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV32IF-LABEL: callee_half_on_stack: ; RV32IF-LABEL: callee_half_on_stack:
; RV32IF: # %bb.0: ; RV32IF: # %bb.0:
; RV32IF-NEXT: addi sp, sp, -16 ; RV32IF-NEXT: addi sp, sp, -16
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32IF-NEXT: lhu a0, 16(sp) ; RV32IF-NEXT: lhu a0, 16(sp)
; RV32IF-NEXT: mv s0, a7 ; RV32IF-NEXT: mv s0, a7
; RV32IF-NEXT: call __gnu_h2f_ieee@plt ; RV32IF-NEXT: call __gnu_h2f_ieee@plt
; RV32IF-NEXT: fmv.w.x ft0, a0 ; RV32IF-NEXT: fmv.w.x ft0, a0
; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz ; RV32IF-NEXT: fcvt.w.s a0, ft0, rtz
; RV32IF-NEXT: add a0, s0, a0 ; RV32IF-NEXT: add a0, s0, a0
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; ;
; RV64IF-LABEL: callee_half_on_stack: ; RV64IF-LABEL: callee_half_on_stack:
; RV64IF: # %bb.0: ; RV64IF: # %bb.0:
; RV64IF-NEXT: addi sp, sp, -16 ; RV64IF-NEXT: addi sp, sp, -16
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64IF-NEXT: lhu a0, 16(sp) ; RV64IF-NEXT: lhu a0, 16(sp)
; RV64IF-NEXT: mv s0, a7 ; RV64IF-NEXT: mv s0, a7
; RV64IF-NEXT: call __gnu_h2f_ieee@plt ; RV64IF-NEXT: call __gnu_h2f_ieee@plt
; RV64IF-NEXT: fmv.w.x ft0, a0 ; RV64IF-NEXT: fmv.w.x ft0, a0
; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz ; RV64IF-NEXT: fcvt.l.s a0, ft0, rtz
; RV64IF-NEXT: addw a0, s0, a0 ; RV64IF-NEXT: addw a0, s0, a0
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: addi sp, sp, 16 ; RV64IF-NEXT: addi sp, sp, 16
; RV64IF-NEXT: ret ; RV64IF-NEXT: ret
; ;
; RV32-ILP32F-LABEL: callee_half_on_stack: ; RV32-ILP32F-LABEL: callee_half_on_stack:
; RV32-ILP32F: # %bb.0: ; RV32-ILP32F: # %bb.0:
; RV32-ILP32F-NEXT: addi sp, sp, -16 ; RV32-ILP32F-NEXT: addi sp, sp, -16
; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-ILP32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-ILP32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-ILP32F-NEXT: mv s0, a7 ; RV32-ILP32F-NEXT: mv s0, a7
; RV32-ILP32F-NEXT: fmv.x.w a0, fa0 ; RV32-ILP32F-NEXT: fmv.x.w a0, fa0
; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt ; RV32-ILP32F-NEXT: call __gnu_h2f_ieee@plt
; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz ; RV32-ILP32F-NEXT: fcvt.w.s a0, fa0, rtz
; RV32-ILP32F-NEXT: add a0, s0, a0 ; RV32-ILP32F-NEXT: add a0, s0, a0
; RV32-ILP32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-ILP32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-ILP32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-ILP32F-NEXT: addi sp, sp, 16 ; RV32-ILP32F-NEXT: addi sp, sp, 16
; RV32-ILP32F-NEXT: ret ; RV32-ILP32F-NEXT: ret
; ;
; RV64-LP64F-LABEL: callee_half_on_stack: ; RV64-LP64F-LABEL: callee_half_on_stack:
; RV64-LP64F: # %bb.0: ; RV64-LP64F: # %bb.0:
; RV64-LP64F-NEXT: addi sp, sp, -16 ; RV64-LP64F-NEXT: addi sp, sp, -16
; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-LP64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64-LP64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64-LP64F-NEXT: mv s0, a7 ; RV64-LP64F-NEXT: mv s0, a7
; RV64-LP64F-NEXT: fmv.x.w a0, fa0 ; RV64-LP64F-NEXT: fmv.x.w a0, fa0
; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt ; RV64-LP64F-NEXT: call __gnu_h2f_ieee@plt
; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz ; RV64-LP64F-NEXT: fcvt.l.s a0, fa0, rtz
; RV64-LP64F-NEXT: addw a0, s0, a0 ; RV64-LP64F-NEXT: addw a0, s0, a0
; RV64-LP64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-LP64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-LP64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-LP64F-NEXT: addi sp, sp, 16 ; RV64-LP64F-NEXT: addi sp, sp, 16
; RV64-LP64F-NEXT: ret ; RV64-LP64F-NEXT: ret
%1 = fptosi half %i to i32 %1 = fptosi half %i to i32
%2 = add i32 %h, %1 %2 = add i32 %h, %1
ret i32 %2 ret i32 %2
} }
define i32 @caller_half_on_stack() nounwind { define i32 @caller_half_on_stack() nounwind {
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llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll

Show All 22 Lines
; RV32I-FPELIM-NEXT: addi sp, sp, -16 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: mv s0, a0 ; RV32I-FPELIM-NEXT: mv s0, a0
; RV32I-FPELIM-NEXT: mv a0, a1 ; RV32I-FPELIM-NEXT: mv a0, a1
; RV32I-FPELIM-NEXT: mv a1, a2 ; RV32I-FPELIM-NEXT: mv a1, a2
; RV32I-FPELIM-NEXT: call __fixdfsi@plt ; RV32I-FPELIM-NEXT: call __fixdfsi@plt
; RV32I-FPELIM-NEXT: add a0, s0, a0 ; RV32I-FPELIM-NEXT: add a0, s0, a0
; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 16 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: callee_double_in_regs: ; RV32I-WITHFP-LABEL: callee_double_in_regs:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: mv s1, a0 ; RV32I-WITHFP-NEXT: mv s1, a0
; RV32I-WITHFP-NEXT: mv a0, a1 ; RV32I-WITHFP-NEXT: mv a0, a1
; RV32I-WITHFP-NEXT: mv a1, a2 ; RV32I-WITHFP-NEXT: mv a1, a2
; RV32I-WITHFP-NEXT: call __fixdfsi@plt ; RV32I-WITHFP-NEXT: call __fixdfsi@plt
; RV32I-WITHFP-NEXT: add a0, s1, a0 ; RV32I-WITHFP-NEXT: add a0, s1, a0
; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%b_fptosi = fptosi double %b to i32 %b_fptosi = fptosi double %b to i32
%1 = add i32 %a, %b_fptosi %1 = add i32 %a, %b_fptosi
ret i32 %1 ret i32 %1
} }
define i32 @caller_double_in_regs() nounwind { define i32 @caller_double_in_regs() nounwind {
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; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: li a0, 1 ; RV32I-WITHFP-NEXT: li a0, 1
; RV32I-WITHFP-NEXT: lui a2, 262144 ; RV32I-WITHFP-NEXT: lui a2, 262144
; RV32I-WITHFP-NEXT: li a1, 0 ; RV32I-WITHFP-NEXT: li a1, 0
; RV32I-WITHFP-NEXT: call callee_double_in_regs@plt ; RV32I-WITHFP-NEXT: call callee_double_in_regs@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_double_in_regs(i32 1, double 2.0) %1 = call i32 @callee_double_in_regs(i32 1, double 2.0)
ret i32 %1 ret i32 %1
} }
; Check 2x*xlen values are aligned appropriately when passed on the stack ; Check 2x*xlen values are aligned appropriately when passed on the stack
; Must keep define on a single line due to an update_llc_test_checks.py limitation ; Must keep define on a single line due to an update_llc_test_checks.py limitation
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; RV32I-WITHFP-NEXT: lw a2, 0(s0) ; RV32I-WITHFP-NEXT: lw a2, 0(s0)
; RV32I-WITHFP-NEXT: lw a3, 8(s0) ; RV32I-WITHFP-NEXT: lw a3, 8(s0)
; RV32I-WITHFP-NEXT: lw a4, 16(s0) ; RV32I-WITHFP-NEXT: lw a4, 16(s0)
; RV32I-WITHFP-NEXT: add a0, a0, a7 ; RV32I-WITHFP-NEXT: add a0, a0, a7
; RV32I-WITHFP-NEXT: add a0, a0, a2 ; RV32I-WITHFP-NEXT: add a0, a0, a2
; RV32I-WITHFP-NEXT: add a0, a0, a3 ; RV32I-WITHFP-NEXT: add a0, a0, a3
; RV32I-WITHFP-NEXT: add a0, a0, a4 ; RV32I-WITHFP-NEXT: add a0, a0, a4
; RV32I-WITHFP-NEXT: add a0, a0, a1 ; RV32I-WITHFP-NEXT: add a0, a0, a1
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = bitcast fp128 %c to i128 %1 = bitcast fp128 %c to i128
%2 = trunc i128 %1 to i32 %2 = trunc i128 %1 to i32
%3 = add i32 %2, %g %3 = add i32 %2, %g
%4 = add i32 %3, %h %4 = add i32 %3, %h
%5 = bitcast double %i to i64 %5 = bitcast double %i to i64
%6 = trunc i64 %5 to i32 %6 = trunc i64 %5 to i32
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
; RV32I-WITHFP-NEXT: li a1, 11 ; RV32I-WITHFP-NEXT: li a1, 11
; RV32I-WITHFP-NEXT: addi a2, s0, -32 ; RV32I-WITHFP-NEXT: addi a2, s0, -32
; RV32I-WITHFP-NEXT: li a3, 12 ; RV32I-WITHFP-NEXT: li a3, 12
; RV32I-WITHFP-NEXT: li a4, 13 ; RV32I-WITHFP-NEXT: li a4, 13
; RV32I-WITHFP-NEXT: li a6, 4 ; RV32I-WITHFP-NEXT: li a6, 4
; RV32I-WITHFP-NEXT: li a7, 14 ; RV32I-WITHFP-NEXT: li a7, 14
; RV32I-WITHFP-NEXT: sw t0, -32(s0) ; RV32I-WITHFP-NEXT: sw t0, -32(s0)
; RV32I-WITHFP-NEXT: call callee_aligned_stack@plt ; RV32I-WITHFP-NEXT: call callee_aligned_stack@plt
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 64 ; RV32I-WITHFP-NEXT: addi sp, sp, 64
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_aligned_stack(i32 1, i32 11, %1 = call i32 @callee_aligned_stack(i32 1, i32 11,
fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13,
i64 20000000000, i32 14, i32 15, double 2.720000e+00, i32 16, i64 20000000000, i32 14, i32 15, double 2.720000e+00, i32 16,
[2 x i32] [i32 17, i32 18]) [2 x i32] [i32 17, i32 18])
ret void ret void
} }
define double @callee_small_scalar_ret() nounwind { define double @callee_small_scalar_ret() nounwind {
; RV32I-FPELIM-LABEL: callee_small_scalar_ret: ; RV32I-FPELIM-LABEL: callee_small_scalar_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: lui a1, 261888 ; RV32I-FPELIM-NEXT: lui a1, 261888
; RV32I-FPELIM-NEXT: li a0, 0 ; RV32I-FPELIM-NEXT: li a0, 0
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: callee_small_scalar_ret: ; RV32I-WITHFP-LABEL: callee_small_scalar_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: lui a1, 261888 ; RV32I-WITHFP-NEXT: lui a1, 261888
; RV32I-WITHFP-NEXT: li a0, 0 ; RV32I-WITHFP-NEXT: li a0, 0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
ret double 1.0 ret double 1.0
} }
define i64 @caller_small_scalar_ret() nounwind { define i64 @caller_small_scalar_ret() nounwind {
; RV32I-FPELIM-LABEL: caller_small_scalar_ret: ; RV32I-FPELIM-LABEL: caller_small_scalar_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: addi sp, sp, -16 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: call callee_small_scalar_ret@plt ; RV32I-FPELIM-NEXT: call callee_small_scalar_ret@plt
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 16 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: caller_small_scalar_ret: ; RV32I-WITHFP-LABEL: caller_small_scalar_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: call callee_small_scalar_ret@plt ; RV32I-WITHFP-NEXT: call callee_small_scalar_ret@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call double @callee_small_scalar_ret() %1 = call double @callee_small_scalar_ret()
%2 = bitcast double %1 to i64 %2 = bitcast double %1 to i64
ret i64 %2 ret i64 %2
} }

llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll

Show All 31 Lines
; ;
; RV32I-WITHFP-LABEL: callee_i64_in_regs: ; RV32I-WITHFP-LABEL: callee_i64_in_regs:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: add a0, a0, a1 ; RV32I-WITHFP-NEXT: add a0, a0, a1
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%b_trunc = trunc i64 %b to i32 %b_trunc = trunc i64 %b to i32
%1 = add i32 %a, %b_trunc %1 = add i32 %a, %b_trunc
ret i32 %1 ret i32 %1
} }
define i32 @caller_i64_in_regs() nounwind { define i32 @caller_i64_in_regs() nounwind {
Show All 14 Lines
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: li a0, 1 ; RV32I-WITHFP-NEXT: li a0, 1
; RV32I-WITHFP-NEXT: li a1, 2 ; RV32I-WITHFP-NEXT: li a1, 2
; RV32I-WITHFP-NEXT: li a2, 0 ; RV32I-WITHFP-NEXT: li a2, 0
; RV32I-WITHFP-NEXT: call callee_i64_in_regs@plt ; RV32I-WITHFP-NEXT: call callee_i64_in_regs@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_i64_in_regs(i32 1, i64 2) %1 = call i32 @callee_i64_in_regs(i32 1, i64 2)
ret i32 %1 ret i32 %1
} }
; Check that the stack is used once the GPRs are exhausted ; Check that the stack is used once the GPRs are exhausted
Show All 35 Lines
; RV32I-WITHFP-NEXT: xor a1, a4, t1 ; RV32I-WITHFP-NEXT: xor a1, a4, t1
; RV32I-WITHFP-NEXT: xor a2, a3, a7 ; RV32I-WITHFP-NEXT: xor a2, a3, a7
; RV32I-WITHFP-NEXT: or a1, a2, a1 ; RV32I-WITHFP-NEXT: or a1, a2, a1
; RV32I-WITHFP-NEXT: seqz a1, a1 ; RV32I-WITHFP-NEXT: seqz a1, a1
; RV32I-WITHFP-NEXT: add a0, a1, a0 ; RV32I-WITHFP-NEXT: add a0, a1, a0
; RV32I-WITHFP-NEXT: add a0, a0, a5 ; RV32I-WITHFP-NEXT: add a0, a0, a5
; RV32I-WITHFP-NEXT: add a0, a0, a6 ; RV32I-WITHFP-NEXT: add a0, a0, a6
; RV32I-WITHFP-NEXT: add a0, a0, t0 ; RV32I-WITHFP-NEXT: add a0, a0, t0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%a_ext = zext i8 %a to i32 %a_ext = zext i8 %a to i32
%b_ext = zext i16 %b to i32 %b_ext = zext i16 %b to i32
%1 = add i32 %a_ext, %b_ext %1 = add i32 %a_ext, %b_ext
%2 = add i32 %1, %c %2 = add i32 %1, %c
%3 = icmp eq i64 %d, %g %3 = icmp eq i64 %d, %g
%4 = zext i1 %3 to i32 %4 = zext i1 %3 to i32
Show All 38 Lines
; RV32I-WITHFP-NEXT: li a2, 3 ; RV32I-WITHFP-NEXT: li a2, 3
; RV32I-WITHFP-NEXT: li a3, 4 ; RV32I-WITHFP-NEXT: li a3, 4
; RV32I-WITHFP-NEXT: li a5, 5 ; RV32I-WITHFP-NEXT: li a5, 5
; RV32I-WITHFP-NEXT: li a6, 6 ; RV32I-WITHFP-NEXT: li a6, 6
; RV32I-WITHFP-NEXT: li a7, 7 ; RV32I-WITHFP-NEXT: li a7, 7
; RV32I-WITHFP-NEXT: sw zero, 0(sp) ; RV32I-WITHFP-NEXT: sw zero, 0(sp)
; RV32I-WITHFP-NEXT: li a4, 0 ; RV32I-WITHFP-NEXT: li a4, 0
; RV32I-WITHFP-NEXT: call callee_many_scalars@plt ; RV32I-WITHFP-NEXT: call callee_many_scalars@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_many_scalars(i8 1, i16 2, i32 3, i64 4, i32 5, i32 6, i64 7, i32 8) %1 = call i32 @callee_many_scalars(i8 1, i16 2, i32 3, i64 4, i32 5, i32 6, i64 7, i32 8)
ret i32 %1 ret i32 %1
} }
; Check that i128 and fp128 are passed indirectly ; Check that i128 and fp128 are passed indirectly
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; RV32I-WITHFP-NEXT: xor a2, a2, a5 ; RV32I-WITHFP-NEXT: xor a2, a2, a5
; RV32I-WITHFP-NEXT: xor a3, a3, a4 ; RV32I-WITHFP-NEXT: xor a3, a3, a4
; RV32I-WITHFP-NEXT: or a2, a3, a2 ; RV32I-WITHFP-NEXT: or a2, a3, a2
; RV32I-WITHFP-NEXT: xor a0, a0, a1 ; RV32I-WITHFP-NEXT: xor a0, a0, a1
; RV32I-WITHFP-NEXT: xor a1, a7, a6 ; RV32I-WITHFP-NEXT: xor a1, a7, a6
; RV32I-WITHFP-NEXT: or a0, a1, a0 ; RV32I-WITHFP-NEXT: or a0, a1, a0
; RV32I-WITHFP-NEXT: or a0, a0, a2 ; RV32I-WITHFP-NEXT: or a0, a0, a2
; RV32I-WITHFP-NEXT: seqz a0, a0 ; RV32I-WITHFP-NEXT: seqz a0, a0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%b_bitcast = bitcast fp128 %b to i128 %b_bitcast = bitcast fp128 %b to i128
%1 = icmp eq i128 %a, %b_bitcast %1 = icmp eq i128 %a, %b_bitcast
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
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; RV32I-WITHFP-NEXT: sw zero, -12(s0) ; RV32I-WITHFP-NEXT: sw zero, -12(s0)
; RV32I-WITHFP-NEXT: sw zero, -16(s0) ; RV32I-WITHFP-NEXT: sw zero, -16(s0)
; RV32I-WITHFP-NEXT: sw zero, -20(s0) ; RV32I-WITHFP-NEXT: sw zero, -20(s0)
; RV32I-WITHFP-NEXT: li a2, 1 ; RV32I-WITHFP-NEXT: li a2, 1
; RV32I-WITHFP-NEXT: addi a0, s0, -24 ; RV32I-WITHFP-NEXT: addi a0, s0, -24
; RV32I-WITHFP-NEXT: addi a1, s0, -48 ; RV32I-WITHFP-NEXT: addi a1, s0, -48
; RV32I-WITHFP-NEXT: sw a2, -24(s0) ; RV32I-WITHFP-NEXT: sw a2, -24(s0)
; RV32I-WITHFP-NEXT: call callee_large_scalars@plt ; RV32I-WITHFP-NEXT: call callee_large_scalars@plt
; RV32I-WITHFP-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 48 ; RV32I-WITHFP-NEXT: addi sp, sp, 48
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_large_scalars(i128 1, fp128 0xL00000000000000007FFF000000000000) %1 = call i32 @callee_large_scalars(i128 1, fp128 0xL00000000000000007FFF000000000000)
ret i32 %1 ret i32 %1
} }
; Check that arguments larger than 2*xlen are handled correctly when their ; Check that arguments larger than 2*xlen are handled correctly when their
; address is passed on the stack rather than in memory ; address is passed on the stack rather than in memory
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; RV32I-WITHFP-NEXT: xor a4, a5, a4 ; RV32I-WITHFP-NEXT: xor a4, a5, a4
; RV32I-WITHFP-NEXT: xor a1, a1, a3 ; RV32I-WITHFP-NEXT: xor a1, a1, a3
; RV32I-WITHFP-NEXT: or a1, a1, a4 ; RV32I-WITHFP-NEXT: or a1, a1, a4
; RV32I-WITHFP-NEXT: xor a0, a2, a0 ; RV32I-WITHFP-NEXT: xor a0, a2, a0
; RV32I-WITHFP-NEXT: xor a2, t0, a6 ; RV32I-WITHFP-NEXT: xor a2, t0, a6
; RV32I-WITHFP-NEXT: or a0, a2, a0 ; RV32I-WITHFP-NEXT: or a0, a2, a0
; RV32I-WITHFP-NEXT: or a0, a0, a1 ; RV32I-WITHFP-NEXT: or a0, a0, a1
; RV32I-WITHFP-NEXT: seqz a0, a0 ; RV32I-WITHFP-NEXT: seqz a0, a0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%j_bitcast = bitcast fp128 %j to i128 %j_bitcast = bitcast fp128 %j to i128
%1 = icmp eq i128 %h, %j_bitcast %1 = icmp eq i128 %h, %j_bitcast
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
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; RV32I-WITHFP-NEXT: li a2, 3 ; RV32I-WITHFP-NEXT: li a2, 3
; RV32I-WITHFP-NEXT: li a3, 4 ; RV32I-WITHFP-NEXT: li a3, 4
; RV32I-WITHFP-NEXT: li a4, 5 ; RV32I-WITHFP-NEXT: li a4, 5
; RV32I-WITHFP-NEXT: li a5, 6 ; RV32I-WITHFP-NEXT: li a5, 6
; RV32I-WITHFP-NEXT: li a6, 7 ; RV32I-WITHFP-NEXT: li a6, 7
; RV32I-WITHFP-NEXT: addi a7, s0, -24 ; RV32I-WITHFP-NEXT: addi a7, s0, -24
; RV32I-WITHFP-NEXT: sw t0, -24(s0) ; RV32I-WITHFP-NEXT: sw t0, -24(s0)
; RV32I-WITHFP-NEXT: call callee_large_scalars_exhausted_regs@plt ; RV32I-WITHFP-NEXT: call callee_large_scalars_exhausted_regs@plt
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 64 ; RV32I-WITHFP-NEXT: addi sp, sp, 64
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_large_scalars_exhausted_regs( %1 = call i32 @callee_large_scalars_exhausted_regs(
i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 8, i32 9, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 8, i32 9,
fp128 0xL00000000000000007FFF000000000000) fp128 0xL00000000000000007FFF000000000000)
ret i32 %1 ret i32 %1
} }
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; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 32 ; RV32I-WITHFP-NEXT: addi s0, sp, 32
; RV32I-WITHFP-NEXT: mv a2, a1 ; RV32I-WITHFP-NEXT: mv a2, a1
; RV32I-WITHFP-NEXT: mv a1, a0 ; RV32I-WITHFP-NEXT: mv a1, a0
; RV32I-WITHFP-NEXT: addi a0, s0, -24 ; RV32I-WITHFP-NEXT: addi a0, s0, -24
; RV32I-WITHFP-NEXT: call __floatditf@plt ; RV32I-WITHFP-NEXT: call __floatditf@plt
; RV32I-WITHFP-NEXT: lw a0, -24(s0) ; RV32I-WITHFP-NEXT: lw a0, -24(s0)
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 32 ; RV32I-WITHFP-NEXT: addi sp, sp, 32
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = sitofp i64 %a to fp128 %1 = sitofp i64 %a to fp128
%2 = bitcast fp128 %1 to i128 %2 = bitcast fp128 %1 to i128
%3 = trunc i128 %2 to i32 %3 = trunc i128 %2 to i32
ret i32 %3 ret i32 %3
} }
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; RV32I-WITHFP-LABEL: callee_small_coerced_struct: ; RV32I-WITHFP-LABEL: callee_small_coerced_struct:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: xor a0, a0, a1 ; RV32I-WITHFP-NEXT: xor a0, a0, a1
; RV32I-WITHFP-NEXT: seqz a0, a0 ; RV32I-WITHFP-NEXT: seqz a0, a0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = extractvalue [2 x i32] %a.coerce, 0 %1 = extractvalue [2 x i32] %a.coerce, 0
%2 = extractvalue [2 x i32] %a.coerce, 1 %2 = extractvalue [2 x i32] %a.coerce, 1
%3 = icmp eq i32 %1, %2 %3 = icmp eq i32 %1, %2
%4 = zext i1 %3 to i32 %4 = zext i1 %3 to i32
ret i32 %4 ret i32 %4
} }
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; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: li a0, 1 ; RV32I-WITHFP-NEXT: li a0, 1
; RV32I-WITHFP-NEXT: li a1, 2 ; RV32I-WITHFP-NEXT: li a1, 2
; RV32I-WITHFP-NEXT: call callee_small_coerced_struct@plt ; RV32I-WITHFP-NEXT: call callee_small_coerced_struct@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_small_coerced_struct([2 x i32] [i32 1, i32 2]) %1 = call i32 @callee_small_coerced_struct([2 x i32] [i32 1, i32 2])
ret i32 %1 ret i32 %1
} }
; Check large struct arguments, which are passed byval ; Check large struct arguments, which are passed byval
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; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: lw a1, 0(a0) ; RV32I-WITHFP-NEXT: lw a1, 0(a0)
; RV32I-WITHFP-NEXT: lw a0, 12(a0) ; RV32I-WITHFP-NEXT: lw a0, 12(a0)
; RV32I-WITHFP-NEXT: add a0, a1, a0 ; RV32I-WITHFP-NEXT: add a0, a1, a0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = getelementptr inbounds %struct.large, %struct.large* %a, i32 0, i32 0 %1 = getelementptr inbounds %struct.large, %struct.large* %a, i32 0, i32 0
%2 = getelementptr inbounds %struct.large, %struct.large* %a, i32 0, i32 3 %2 = getelementptr inbounds %struct.large, %struct.large* %a, i32 0, i32 3
%3 = load i32, i32* %1 %3 = load i32, i32* %1
%4 = load i32, i32* %2 %4 = load i32, i32* %2
%5 = add i32 %3, %4 %5 = add i32 %3, %4
ret i32 %5 ret i32 %5
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; RV32I-WITHFP-NEXT: li a3, 4 ; RV32I-WITHFP-NEXT: li a3, 4
; RV32I-WITHFP-NEXT: sw a3, -12(s0) ; RV32I-WITHFP-NEXT: sw a3, -12(s0)
; RV32I-WITHFP-NEXT: sw a0, -40(s0) ; RV32I-WITHFP-NEXT: sw a0, -40(s0)
; RV32I-WITHFP-NEXT: sw a1, -36(s0) ; RV32I-WITHFP-NEXT: sw a1, -36(s0)
; RV32I-WITHFP-NEXT: sw a2, -32(s0) ; RV32I-WITHFP-NEXT: sw a2, -32(s0)
; RV32I-WITHFP-NEXT: sw a3, -28(s0) ; RV32I-WITHFP-NEXT: sw a3, -28(s0)
; RV32I-WITHFP-NEXT: addi a0, s0, -40 ; RV32I-WITHFP-NEXT: addi a0, s0, -40
; RV32I-WITHFP-NEXT: call callee_large_struct@plt ; RV32I-WITHFP-NEXT: call callee_large_struct@plt
; RV32I-WITHFP-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 48 ; RV32I-WITHFP-NEXT: addi sp, sp, 48
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%ls = alloca %struct.large, align 4 %ls = alloca %struct.large, align 4
%1 = bitcast %struct.large* %ls to i8* %1 = bitcast %struct.large* %ls to i8*
%a = getelementptr inbounds %struct.large, %struct.large* %ls, i32 0, i32 0 %a = getelementptr inbounds %struct.large, %struct.large* %ls, i32 0, i32 0
store i32 1, i32* %a store i32 1, i32* %a
%b = getelementptr inbounds %struct.large, %struct.large* %ls, i32 0, i32 1 %b = getelementptr inbounds %struct.large, %struct.large* %ls, i32 0, i32 1
store i32 2, i32* %b store i32 2, i32* %b
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; RV32I-WITHFP-NEXT: lw a2, 0(s0) ; RV32I-WITHFP-NEXT: lw a2, 0(s0)
; RV32I-WITHFP-NEXT: lw a3, 8(s0) ; RV32I-WITHFP-NEXT: lw a3, 8(s0)
; RV32I-WITHFP-NEXT: lw a4, 16(s0) ; RV32I-WITHFP-NEXT: lw a4, 16(s0)
; RV32I-WITHFP-NEXT: add a0, a0, a7 ; RV32I-WITHFP-NEXT: add a0, a0, a7
; RV32I-WITHFP-NEXT: add a0, a0, a2 ; RV32I-WITHFP-NEXT: add a0, a0, a2
; RV32I-WITHFP-NEXT: add a0, a0, a3 ; RV32I-WITHFP-NEXT: add a0, a0, a3
; RV32I-WITHFP-NEXT: add a0, a0, a4 ; RV32I-WITHFP-NEXT: add a0, a0, a4
; RV32I-WITHFP-NEXT: add a0, a0, a1 ; RV32I-WITHFP-NEXT: add a0, a0, a1
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = bitcast fp128 %c to i128 %1 = bitcast fp128 %c to i128
%2 = trunc i128 %1 to i32 %2 = trunc i128 %1 to i32
%3 = add i32 %2, %g %3 = add i32 %2, %g
%4 = add i32 %3, %h %4 = add i32 %3, %h
%5 = trunc i64 %i to i32 %5 = trunc i64 %i to i32
%6 = add i32 %4, %5 %6 = add i32 %4, %5
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines
; RV32I-WITHFP-NEXT: li a1, 11 ; RV32I-WITHFP-NEXT: li a1, 11
; RV32I-WITHFP-NEXT: addi a2, s0, -32 ; RV32I-WITHFP-NEXT: addi a2, s0, -32
; RV32I-WITHFP-NEXT: li a3, 12 ; RV32I-WITHFP-NEXT: li a3, 12
; RV32I-WITHFP-NEXT: li a4, 13 ; RV32I-WITHFP-NEXT: li a4, 13
; RV32I-WITHFP-NEXT: li a6, 4 ; RV32I-WITHFP-NEXT: li a6, 4
; RV32I-WITHFP-NEXT: li a7, 14 ; RV32I-WITHFP-NEXT: li a7, 14
; RV32I-WITHFP-NEXT: sw t0, -32(s0) ; RV32I-WITHFP-NEXT: sw t0, -32(s0)
; RV32I-WITHFP-NEXT: call callee_aligned_stack@plt ; RV32I-WITHFP-NEXT: call callee_aligned_stack@plt
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 64 ; RV32I-WITHFP-NEXT: addi sp, sp, 64
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_aligned_stack(i32 1, i32 11, %1 = call i32 @callee_aligned_stack(i32 1, i32 11,
fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13,
i64 20000000000, i32 14, i32 15, i64 16, i32 17, i64 20000000000, i32 14, i32 15, i64 16, i32 17,
[2 x i32] [i32 18, i32 19]) [2 x i32] [i32 18, i32 19])
ret void ret void
} }
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; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: lui a0, 466866 ; RV32I-WITHFP-NEXT: lui a0, 466866
; RV32I-WITHFP-NEXT: addi a0, a0, 1677 ; RV32I-WITHFP-NEXT: addi a0, a0, 1677
; RV32I-WITHFP-NEXT: li a1, 287 ; RV32I-WITHFP-NEXT: li a1, 287
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
ret i64 1234567898765 ret i64 1234567898765
} }
define i32 @caller_small_scalar_ret() nounwind { define i32 @caller_small_scalar_ret() nounwind {
; RV32I-FPELIM-LABEL: caller_small_scalar_ret: ; RV32I-FPELIM-LABEL: caller_small_scalar_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
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; RV32I-WITHFP-NEXT: lui a2, 56 ; RV32I-WITHFP-NEXT: lui a2, 56
; RV32I-WITHFP-NEXT: addi a2, a2, 580 ; RV32I-WITHFP-NEXT: addi a2, a2, 580
; RV32I-WITHFP-NEXT: xor a1, a1, a2 ; RV32I-WITHFP-NEXT: xor a1, a1, a2
; RV32I-WITHFP-NEXT: lui a2, 200614 ; RV32I-WITHFP-NEXT: lui a2, 200614
; RV32I-WITHFP-NEXT: addi a2, a2, 647 ; RV32I-WITHFP-NEXT: addi a2, a2, 647
; RV32I-WITHFP-NEXT: xor a0, a0, a2 ; RV32I-WITHFP-NEXT: xor a0, a0, a2
; RV32I-WITHFP-NEXT: or a0, a0, a1 ; RV32I-WITHFP-NEXT: or a0, a0, a1
; RV32I-WITHFP-NEXT: seqz a0, a0 ; RV32I-WITHFP-NEXT: seqz a0, a0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i64 @callee_small_scalar_ret() %1 = call i64 @callee_small_scalar_ret()
%2 = icmp eq i64 987654321234567, %1 %2 = icmp eq i64 987654321234567, %1
%3 = zext i1 %2 to i32 %3 = zext i1 %2 to i32
ret i32 %3 ret i32 %3
} }
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; RV32I-WITHFP-LABEL: callee_small_struct_ret: ; RV32I-WITHFP-LABEL: callee_small_struct_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: li a0, 1 ; RV32I-WITHFP-NEXT: li a0, 1
; RV32I-WITHFP-NEXT: li a1, 0 ; RV32I-WITHFP-NEXT: li a1, 0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
ret %struct.small { i32 1, i32* null } ret %struct.small { i32 1, i32* null }
} }
define i32 @caller_small_struct_ret() nounwind { define i32 @caller_small_struct_ret() nounwind {
; RV32I-FPELIM-LABEL: caller_small_struct_ret: ; RV32I-FPELIM-LABEL: caller_small_struct_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: addi sp, sp, -16 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: call callee_small_struct_ret@plt ; RV32I-FPELIM-NEXT: call callee_small_struct_ret@plt
; RV32I-FPELIM-NEXT: add a0, a0, a1 ; RV32I-FPELIM-NEXT: add a0, a0, a1
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 16 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: caller_small_struct_ret: ; RV32I-WITHFP-LABEL: caller_small_struct_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: call callee_small_struct_ret@plt ; RV32I-WITHFP-NEXT: call callee_small_struct_ret@plt
; RV32I-WITHFP-NEXT: add a0, a0, a1 ; RV32I-WITHFP-NEXT: add a0, a0, a1
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call %struct.small @callee_small_struct_ret() %1 = call %struct.small @callee_small_struct_ret()
%2 = extractvalue %struct.small %1, 0 %2 = extractvalue %struct.small %1, 0
%3 = extractvalue %struct.small %1, 1 %3 = extractvalue %struct.small %1, 1
%4 = ptrtoint i32* %3 to i32 %4 = ptrtoint i32* %3 to i32
%5 = add i32 %2, %4 %5 = add i32 %2, %4
ret i32 %5 ret i32 %5
Show All 17 Lines
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: lui a1, 524272 ; RV32I-WITHFP-NEXT: lui a1, 524272
; RV32I-WITHFP-NEXT: sw a1, 12(a0) ; RV32I-WITHFP-NEXT: sw a1, 12(a0)
; RV32I-WITHFP-NEXT: sw zero, 8(a0) ; RV32I-WITHFP-NEXT: sw zero, 8(a0)
; RV32I-WITHFP-NEXT: sw zero, 4(a0) ; RV32I-WITHFP-NEXT: sw zero, 4(a0)
; RV32I-WITHFP-NEXT: sw zero, 0(a0) ; RV32I-WITHFP-NEXT: sw zero, 0(a0)
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
ret fp128 0xL00000000000000007FFF000000000000 ret fp128 0xL00000000000000007FFF000000000000
} }
define void @caller_large_scalar_ret() nounwind { define void @caller_large_scalar_ret() nounwind {
; RV32I-FPELIM-LABEL: caller_large_scalar_ret: ; RV32I-FPELIM-LABEL: caller_large_scalar_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: addi sp, sp, -32 ; RV32I-FPELIM-NEXT: addi sp, sp, -32
; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: mv a0, sp ; RV32I-FPELIM-NEXT: mv a0, sp
; RV32I-FPELIM-NEXT: call callee_large_scalar_ret@plt ; RV32I-FPELIM-NEXT: call callee_large_scalar_ret@plt
; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 32 ; RV32I-FPELIM-NEXT: addi sp, sp, 32
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: caller_large_scalar_ret: ; RV32I-WITHFP-LABEL: caller_large_scalar_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -32 ; RV32I-WITHFP-NEXT: addi sp, sp, -32
; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 32 ; RV32I-WITHFP-NEXT: addi s0, sp, 32
; RV32I-WITHFP-NEXT: addi a0, s0, -32 ; RV32I-WITHFP-NEXT: addi a0, s0, -32
; RV32I-WITHFP-NEXT: call callee_large_scalar_ret@plt ; RV32I-WITHFP-NEXT: call callee_large_scalar_ret@plt
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 32 ; RV32I-WITHFP-NEXT: addi sp, sp, 32
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call fp128 @callee_large_scalar_ret() %1 = call fp128 @callee_large_scalar_ret()
ret void ret void
} }
; Check return of >2x xlen structs ; Check return of >2x xlen structs
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; RV32I-WITHFP-NEXT: li a1, 1 ; RV32I-WITHFP-NEXT: li a1, 1
; RV32I-WITHFP-NEXT: sw a1, 0(a0) ; RV32I-WITHFP-NEXT: sw a1, 0(a0)
; RV32I-WITHFP-NEXT: li a1, 2 ; RV32I-WITHFP-NEXT: li a1, 2
; RV32I-WITHFP-NEXT: sw a1, 4(a0) ; RV32I-WITHFP-NEXT: sw a1, 4(a0)
; RV32I-WITHFP-NEXT: li a1, 3 ; RV32I-WITHFP-NEXT: li a1, 3
; RV32I-WITHFP-NEXT: sw a1, 8(a0) ; RV32I-WITHFP-NEXT: sw a1, 8(a0)
; RV32I-WITHFP-NEXT: li a1, 4 ; RV32I-WITHFP-NEXT: li a1, 4
; RV32I-WITHFP-NEXT: sw a1, 12(a0) ; RV32I-WITHFP-NEXT: sw a1, 12(a0)
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%a = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 0 %a = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 0
store i32 1, i32* %a, align 4 store i32 1, i32* %a, align 4
%b = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 1 %b = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 1
store i32 2, i32* %b, align 4 store i32 2, i32* %b, align 4
%c = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 2 %c = getelementptr inbounds %struct.large, %struct.large* %agg.result, i32 0, i32 2
store i32 3, i32* %c, align 4 store i32 3, i32* %c, align 4
Show All 22 Lines
; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 32 ; RV32I-WITHFP-NEXT: addi s0, sp, 32
; RV32I-WITHFP-NEXT: addi a0, s0, -24 ; RV32I-WITHFP-NEXT: addi a0, s0, -24
; RV32I-WITHFP-NEXT: call callee_large_struct_ret@plt ; RV32I-WITHFP-NEXT: call callee_large_struct_ret@plt
; RV32I-WITHFP-NEXT: lw a0, -24(s0) ; RV32I-WITHFP-NEXT: lw a0, -24(s0)
; RV32I-WITHFP-NEXT: lw a1, -12(s0) ; RV32I-WITHFP-NEXT: lw a1, -12(s0)
; RV32I-WITHFP-NEXT: add a0, a0, a1 ; RV32I-WITHFP-NEXT: add a0, a0, a1
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 32 ; RV32I-WITHFP-NEXT: addi sp, sp, 32
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = alloca %struct.large %1 = alloca %struct.large
call void @callee_large_struct_ret(%struct.large* sret(%struct.large) %1) call void @callee_large_struct_ret(%struct.large* sret(%struct.large) %1)
%2 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 0 %2 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 0
%3 = load i32, i32* %2 %3 = load i32, i32* %2
%4 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 3 %4 = getelementptr inbounds %struct.large, %struct.large* %1, i32 0, i32 3
%5 = load i32, i32* %4 %5 = load i32, i32* %4
%6 = add i32 %3, %5 %6 = add i32 %3, %5
ret i32 %6 ret i32 %6
} }

llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll

Show All 16 Lines
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: addi sp, sp, -16 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: mv s0, a0 ; RV32I-FPELIM-NEXT: mv s0, a0
; RV32I-FPELIM-NEXT: mv a0, a1 ; RV32I-FPELIM-NEXT: mv a0, a1
; RV32I-FPELIM-NEXT: call __fixsfsi@plt ; RV32I-FPELIM-NEXT: call __fixsfsi@plt
; RV32I-FPELIM-NEXT: add a0, s0, a0 ; RV32I-FPELIM-NEXT: add a0, s0, a0
; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 16 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: callee_float_in_regs: ; RV32I-WITHFP-LABEL: callee_float_in_regs:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: mv s1, a0 ; RV32I-WITHFP-NEXT: mv s1, a0
; RV32I-WITHFP-NEXT: mv a0, a1 ; RV32I-WITHFP-NEXT: mv a0, a1
; RV32I-WITHFP-NEXT: call __fixsfsi@plt ; RV32I-WITHFP-NEXT: call __fixsfsi@plt
; RV32I-WITHFP-NEXT: add a0, s1, a0 ; RV32I-WITHFP-NEXT: add a0, s1, a0
; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%b_fptosi = fptosi float %b to i32 %b_fptosi = fptosi float %b to i32
%1 = add i32 %a, %b_fptosi %1 = add i32 %a, %b_fptosi
ret i32 %1 ret i32 %1
} }
define i32 @caller_float_in_regs() nounwind { define i32 @caller_float_in_regs() nounwind {
Show All 12 Lines
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: li a0, 1 ; RV32I-WITHFP-NEXT: li a0, 1
; RV32I-WITHFP-NEXT: lui a1, 262144 ; RV32I-WITHFP-NEXT: lui a1, 262144
; RV32I-WITHFP-NEXT: call callee_float_in_regs@plt ; RV32I-WITHFP-NEXT: call callee_float_in_regs@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_float_in_regs(i32 1, float 2.0) %1 = call i32 @callee_float_in_regs(i32 1, float 2.0)
ret i32 %1 ret i32 %1
} }
define i32 @callee_float_on_stack(i64 %a, i64 %b, i64 %c, i64 %d, float %e) nounwind { define i32 @callee_float_on_stack(i64 %a, i64 %b, i64 %c, i64 %d, float %e) nounwind {
; RV32I-FPELIM-LABEL: callee_float_on_stack: ; RV32I-FPELIM-LABEL: callee_float_on_stack:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: lw a0, 0(sp) ; RV32I-FPELIM-NEXT: lw a0, 0(sp)
; RV32I-FPELIM-NEXT: add a0, a6, a0 ; RV32I-FPELIM-NEXT: add a0, a6, a0
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: callee_float_on_stack: ; RV32I-WITHFP-LABEL: callee_float_on_stack:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: lw a0, 0(s0) ; RV32I-WITHFP-NEXT: lw a0, 0(s0)
; RV32I-WITHFP-NEXT: add a0, a6, a0 ; RV32I-WITHFP-NEXT: add a0, a6, a0
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = trunc i64 %d to i32 %1 = trunc i64 %d to i32
%2 = bitcast float %e to i32 %2 = bitcast float %e to i32
%3 = add i32 %1, %2 %3 = add i32 %1, %2
ret i32 %3 ret i32 %3
} }
Show All 29 Lines
; RV32I-WITHFP-NEXT: li a4, 3 ; RV32I-WITHFP-NEXT: li a4, 3
; RV32I-WITHFP-NEXT: li a6, 4 ; RV32I-WITHFP-NEXT: li a6, 4
; RV32I-WITHFP-NEXT: sw a1, 0(sp) ; RV32I-WITHFP-NEXT: sw a1, 0(sp)
; RV32I-WITHFP-NEXT: li a1, 0 ; RV32I-WITHFP-NEXT: li a1, 0
; RV32I-WITHFP-NEXT: li a3, 0 ; RV32I-WITHFP-NEXT: li a3, 0
; RV32I-WITHFP-NEXT: li a5, 0 ; RV32I-WITHFP-NEXT: li a5, 0
; RV32I-WITHFP-NEXT: li a7, 0 ; RV32I-WITHFP-NEXT: li a7, 0
; RV32I-WITHFP-NEXT: call callee_float_on_stack@plt ; RV32I-WITHFP-NEXT: call callee_float_on_stack@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call i32 @callee_float_on_stack(i64 1, i64 2, i64 3, i64 4, float 5.0) %1 = call i32 @callee_float_on_stack(i64 1, i64 2, i64 3, i64 4, float 5.0)
ret i32 %1 ret i32 %1
} }
define float @callee_tiny_scalar_ret() nounwind { define float @callee_tiny_scalar_ret() nounwind {
; RV32I-FPELIM-LABEL: callee_tiny_scalar_ret: ; RV32I-FPELIM-LABEL: callee_tiny_scalar_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: lui a0, 260096 ; RV32I-FPELIM-NEXT: lui a0, 260096
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: callee_tiny_scalar_ret: ; RV32I-WITHFP-LABEL: callee_tiny_scalar_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: lui a0, 260096 ; RV32I-WITHFP-NEXT: lui a0, 260096
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
ret float 1.0 ret float 1.0
} }
define i32 @caller_tiny_scalar_ret() nounwind { define i32 @caller_tiny_scalar_ret() nounwind {
; RV32I-FPELIM-LABEL: caller_tiny_scalar_ret: ; RV32I-FPELIM-LABEL: caller_tiny_scalar_ret:
; RV32I-FPELIM: # %bb.0: ; RV32I-FPELIM: # %bb.0:
; RV32I-FPELIM-NEXT: addi sp, sp, -16 ; RV32I-FPELIM-NEXT: addi sp, sp, -16
; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-FPELIM-NEXT: call callee_tiny_scalar_ret@plt ; RV32I-FPELIM-NEXT: call callee_tiny_scalar_ret@plt
; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 16 ; RV32I-FPELIM-NEXT: addi sp, sp, 16
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: caller_tiny_scalar_ret: ; RV32I-WITHFP-LABEL: caller_tiny_scalar_ret:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -16 ; RV32I-WITHFP-NEXT: addi sp, sp, -16
; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-WITHFP-NEXT: addi s0, sp, 16 ; RV32I-WITHFP-NEXT: addi s0, sp, 16
; RV32I-WITHFP-NEXT: call callee_tiny_scalar_ret@plt ; RV32I-WITHFP-NEXT: call callee_tiny_scalar_ret@plt
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 16 ; RV32I-WITHFP-NEXT: addi sp, sp, 16
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%1 = call float @callee_tiny_scalar_ret() %1 = call float @callee_tiny_scalar_ret()
%2 = bitcast float %1 to i32 %2 = bitcast float %1 to i32
ret i32 %2 ret i32 %2
} }

llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll

Show All 13 Lines
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: call __fixdfdi@plt ; RV64I-NEXT: call __fixdfdi@plt
; RV64I-NEXT: add a0, s0, a0 ; RV64I-NEXT: add a0, s0, a0
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_fptosi = fptosi double %b to i64 %b_fptosi = fptosi double %b to i64
%1 = add i64 %a, %b_fptosi %1 = add i64 %a, %b_fptosi
ret i64 %1 ret i64 %1
} }
define i64 @caller_double_in_regs() nounwind { define i64 @caller_double_in_regs() nounwind {
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llvm/test/CodeGen/RISCV/calling-conv-lp64.ll

Show All 18 Lines
; RV64I-FPELIM: # %bb.0: ; RV64I-FPELIM: # %bb.0:
; RV64I-FPELIM-NEXT: addi sp, sp, -16 ; RV64I-FPELIM-NEXT: addi sp, sp, -16
; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-FPELIM-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-FPELIM-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-FPELIM-NEXT: mv s0, a0 ; RV64I-FPELIM-NEXT: mv s0, a0
; RV64I-FPELIM-NEXT: mv a0, a1 ; RV64I-FPELIM-NEXT: mv a0, a1
; RV64I-FPELIM-NEXT: call __fixsfdi@plt ; RV64I-FPELIM-NEXT: call __fixsfdi@plt
; RV64I-FPELIM-NEXT: add a0, s0, a0 ; RV64I-FPELIM-NEXT: add a0, s0, a0
; RV64I-FPELIM-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-FPELIM-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-FPELIM-NEXT: addi sp, sp, 16 ; RV64I-FPELIM-NEXT: addi sp, sp, 16
; RV64I-FPELIM-NEXT: ret ; RV64I-FPELIM-NEXT: ret
; ;
; RV64I-WITHFP-LABEL: callee_float_in_regs: ; RV64I-WITHFP-LABEL: callee_float_in_regs:
; RV64I-WITHFP: # %bb.0: ; RV64I-WITHFP: # %bb.0:
; RV64I-WITHFP-NEXT: addi sp, sp, -32 ; RV64I-WITHFP-NEXT: addi sp, sp, -32
; RV64I-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: addi s0, sp, 32 ; RV64I-WITHFP-NEXT: addi s0, sp, 32
; RV64I-WITHFP-NEXT: mv s1, a0 ; RV64I-WITHFP-NEXT: mv s1, a0
; RV64I-WITHFP-NEXT: mv a0, a1 ; RV64I-WITHFP-NEXT: mv a0, a1
; RV64I-WITHFP-NEXT: call __fixsfdi@plt ; RV64I-WITHFP-NEXT: call __fixsfdi@plt
; RV64I-WITHFP-NEXT: add a0, s1, a0 ; RV64I-WITHFP-NEXT: add a0, s1, a0
; RV64I-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: addi sp, sp, 32 ; RV64I-WITHFP-NEXT: addi sp, sp, 32
; RV64I-WITHFP-NEXT: ret ; RV64I-WITHFP-NEXT: ret
%b_fptosi = fptosi float %b to i64 %b_fptosi = fptosi float %b to i64
%1 = add i64 %a, %b_fptosi %1 = add i64 %a, %b_fptosi
ret i64 %1 ret i64 %1
} }
define i64 @caller_float_in_regs() nounwind { define i64 @caller_float_in_regs() nounwind {
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; RV64I-WITHFP: # %bb.0: ; RV64I-WITHFP: # %bb.0:
; RV64I-WITHFP-NEXT: addi sp, sp, -16 ; RV64I-WITHFP-NEXT: addi sp, sp, -16
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: addi s0, sp, 16 ; RV64I-WITHFP-NEXT: addi s0, sp, 16
; RV64I-WITHFP-NEXT: li a0, 1 ; RV64I-WITHFP-NEXT: li a0, 1
; RV64I-WITHFP-NEXT: lui a1, 262144 ; RV64I-WITHFP-NEXT: lui a1, 262144
; RV64I-WITHFP-NEXT: call callee_float_in_regs@plt ; RV64I-WITHFP-NEXT: call callee_float_in_regs@plt
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: addi sp, sp, 16 ; RV64I-WITHFP-NEXT: addi sp, sp, 16
; RV64I-WITHFP-NEXT: ret ; RV64I-WITHFP-NEXT: ret
%1 = call i64 @callee_float_in_regs(i64 1, float 2.0) %1 = call i64 @callee_float_in_regs(i64 1, float 2.0)
ret i64 %1 ret i64 %1
} }
define i64 @callee_float_on_stack(i128 %a, i128 %b, i128 %c, i128 %d, float %e) nounwind { define i64 @callee_float_on_stack(i128 %a, i128 %b, i128 %c, i128 %d, float %e) nounwind {
; RV64I-FPELIM-LABEL: callee_float_on_stack: ; RV64I-FPELIM-LABEL: callee_float_on_stack:
; RV64I-FPELIM: # %bb.0: ; RV64I-FPELIM: # %bb.0:
; RV64I-FPELIM-NEXT: lw a0, 0(sp) ; RV64I-FPELIM-NEXT: lw a0, 0(sp)
; RV64I-FPELIM-NEXT: ret ; RV64I-FPELIM-NEXT: ret
; ;
; RV64I-WITHFP-LABEL: callee_float_on_stack: ; RV64I-WITHFP-LABEL: callee_float_on_stack:
; RV64I-WITHFP: # %bb.0: ; RV64I-WITHFP: # %bb.0:
; RV64I-WITHFP-NEXT: addi sp, sp, -16 ; RV64I-WITHFP-NEXT: addi sp, sp, -16
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: addi s0, sp, 16 ; RV64I-WITHFP-NEXT: addi s0, sp, 16
; RV64I-WITHFP-NEXT: lw a0, 0(s0) ; RV64I-WITHFP-NEXT: lw a0, 0(s0)
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: addi sp, sp, 16 ; RV64I-WITHFP-NEXT: addi sp, sp, 16
; RV64I-WITHFP-NEXT: ret ; RV64I-WITHFP-NEXT: ret
%1 = trunc i128 %d to i64 %1 = trunc i128 %d to i64
%2 = bitcast float %e to i32 %2 = bitcast float %e to i32
%3 = sext i32 %2 to i64 %3 = sext i32 %2 to i64
%4 = add i64 %1, %3 %4 = add i64 %1, %3
ret i64 %3 ret i64 %3
} }
Show All 30 Lines
; RV64I-WITHFP-NEXT: li a4, 3 ; RV64I-WITHFP-NEXT: li a4, 3
; RV64I-WITHFP-NEXT: li a6, 4 ; RV64I-WITHFP-NEXT: li a6, 4
; RV64I-WITHFP-NEXT: sd a1, 0(sp) ; RV64I-WITHFP-NEXT: sd a1, 0(sp)
; RV64I-WITHFP-NEXT: li a1, 0 ; RV64I-WITHFP-NEXT: li a1, 0
; RV64I-WITHFP-NEXT: li a3, 0 ; RV64I-WITHFP-NEXT: li a3, 0
; RV64I-WITHFP-NEXT: li a5, 0 ; RV64I-WITHFP-NEXT: li a5, 0
; RV64I-WITHFP-NEXT: li a7, 0 ; RV64I-WITHFP-NEXT: li a7, 0
; RV64I-WITHFP-NEXT: call callee_float_on_stack@plt ; RV64I-WITHFP-NEXT: call callee_float_on_stack@plt
; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: addi sp, sp, 32 ; RV64I-WITHFP-NEXT: addi sp, sp, 32
; RV64I-WITHFP-NEXT: ret ; RV64I-WITHFP-NEXT: ret
%1 = call i64 @callee_float_on_stack(i128 1, i128 2, i128 3, i128 4, float 5.0) %1 = call i64 @callee_float_on_stack(i128 1, i128 2, i128 3, i128 4, float 5.0)
ret i64 %1 ret i64 %1
} }
define float @callee_tiny_scalar_ret() nounwind { define float @callee_tiny_scalar_ret() nounwind {
; RV64I-FPELIM-LABEL: callee_tiny_scalar_ret: ; RV64I-FPELIM-LABEL: callee_tiny_scalar_ret:
; RV64I-FPELIM: # %bb.0: ; RV64I-FPELIM: # %bb.0:
; RV64I-FPELIM-NEXT: lui a0, 260096 ; RV64I-FPELIM-NEXT: lui a0, 260096
; RV64I-FPELIM-NEXT: ret ; RV64I-FPELIM-NEXT: ret
; ;
; RV64I-WITHFP-LABEL: callee_tiny_scalar_ret: ; RV64I-WITHFP-LABEL: callee_tiny_scalar_ret:
; RV64I-WITHFP: # %bb.0: ; RV64I-WITHFP: # %bb.0:
; RV64I-WITHFP-NEXT: addi sp, sp, -16 ; RV64I-WITHFP-NEXT: addi sp, sp, -16
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: addi s0, sp, 16 ; RV64I-WITHFP-NEXT: addi s0, sp, 16
; RV64I-WITHFP-NEXT: lui a0, 260096 ; RV64I-WITHFP-NEXT: lui a0, 260096
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: addi sp, sp, 16 ; RV64I-WITHFP-NEXT: addi sp, sp, 16
; RV64I-WITHFP-NEXT: ret ; RV64I-WITHFP-NEXT: ret
ret float 1.0 ret float 1.0
} }
; The sign extension of the float return is necessary, as softened floats are ; The sign extension of the float return is necessary, as softened floats are
; passed anyext. ; passed anyext.
Show All 11 Lines
; RV64I-WITHFP-LABEL: caller_tiny_scalar_ret: ; RV64I-WITHFP-LABEL: caller_tiny_scalar_ret:
; RV64I-WITHFP: # %bb.0: ; RV64I-WITHFP: # %bb.0:
; RV64I-WITHFP-NEXT: addi sp, sp, -16 ; RV64I-WITHFP-NEXT: addi sp, sp, -16
; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-WITHFP-NEXT: addi s0, sp, 16 ; RV64I-WITHFP-NEXT: addi s0, sp, 16
; RV64I-WITHFP-NEXT: call callee_tiny_scalar_ret@plt ; RV64I-WITHFP-NEXT: call callee_tiny_scalar_ret@plt
; RV64I-WITHFP-NEXT: sext.w a0, a0 ; RV64I-WITHFP-NEXT: sext.w a0, a0
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-WITHFP-NEXT: addi sp, sp, 16 ; RV64I-WITHFP-NEXT: addi sp, sp, 16
; RV64I-WITHFP-NEXT: ret ; RV64I-WITHFP-NEXT: ret
%1 = call float @callee_tiny_scalar_ret() %1 = call float @callee_tiny_scalar_ret()
%2 = bitcast float %1 to i32 %2 = bitcast float %1 to i32
%3 = sext i32 %2 to i64 %3 = sext i32 %2 to i64
ret i64 %3 ret i64 %3
} }

llvm/test/CodeGen/RISCV/calls.ll

Show First 20 Lines • Show All 174 Lines • ▼ Show 20 Lines
; RV32I-LABEL: test_call_fastcc: ; RV32I-LABEL: test_call_fastcc:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: call fastcc_function@plt ; RV32I-NEXT: call fastcc_function@plt
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32I-PIC-LABEL: test_call_fastcc: ; RV32I-PIC-LABEL: test_call_fastcc:
; RV32I-PIC: # %bb.0: ; RV32I-PIC: # %bb.0:
; RV32I-PIC-NEXT: addi sp, sp, -16 ; RV32I-PIC-NEXT: addi sp, sp, -16
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-PIC-NEXT: mv s0, a0 ; RV32I-PIC-NEXT: mv s0, a0
; RV32I-PIC-NEXT: call fastcc_function@plt ; RV32I-PIC-NEXT: call fastcc_function@plt
; RV32I-PIC-NEXT: mv a0, s0 ; RV32I-PIC-NEXT: mv a0, s0
; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-PIC-NEXT: addi sp, sp, 16 ; RV32I-PIC-NEXT: addi sp, sp, 16
; RV32I-PIC-NEXT: ret ; RV32I-PIC-NEXT: ret
%1 = call fastcc i32 @fastcc_function(i32 %a, i32 %b) %1 = call fastcc i32 @fastcc_function(i32 %a, i32 %b)
ret i32 %a ret i32 %a
} }
declare i32 @external_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind declare i32 @external_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind
Show All 10 Lines
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a3, a0 ; RV32I-NEXT: mv a3, a0
; RV32I-NEXT: mv a4, a0 ; RV32I-NEXT: mv a4, a0
; RV32I-NEXT: mv a5, a0 ; RV32I-NEXT: mv a5, a0
; RV32I-NEXT: mv a6, a0 ; RV32I-NEXT: mv a6, a0
; RV32I-NEXT: mv a7, a0 ; RV32I-NEXT: mv a7, a0
; RV32I-NEXT: call external_many_args@plt ; RV32I-NEXT: call external_many_args@plt
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32I-PIC-LABEL: test_call_external_many_args: ; RV32I-PIC-LABEL: test_call_external_many_args:
; RV32I-PIC: # %bb.0: ; RV32I-PIC: # %bb.0:
; RV32I-PIC-NEXT: addi sp, sp, -16 ; RV32I-PIC-NEXT: addi sp, sp, -16
; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-PIC-NEXT: mv s0, a0 ; RV32I-PIC-NEXT: mv s0, a0
; RV32I-PIC-NEXT: sw a0, 4(sp) ; RV32I-PIC-NEXT: sw a0, 4(sp)
; RV32I-PIC-NEXT: sw a0, 0(sp) ; RV32I-PIC-NEXT: sw a0, 0(sp)
; RV32I-PIC-NEXT: mv a1, a0 ; RV32I-PIC-NEXT: mv a1, a0
; RV32I-PIC-NEXT: mv a2, a0 ; RV32I-PIC-NEXT: mv a2, a0
; RV32I-PIC-NEXT: mv a3, a0 ; RV32I-PIC-NEXT: mv a3, a0
; RV32I-PIC-NEXT: mv a4, a0 ; RV32I-PIC-NEXT: mv a4, a0
; RV32I-PIC-NEXT: mv a5, a0 ; RV32I-PIC-NEXT: mv a5, a0
; RV32I-PIC-NEXT: mv a6, a0 ; RV32I-PIC-NEXT: mv a6, a0
; RV32I-PIC-NEXT: mv a7, a0 ; RV32I-PIC-NEXT: mv a7, a0
; RV32I-PIC-NEXT: call external_many_args@plt ; RV32I-PIC-NEXT: call external_many_args@plt
; RV32I-PIC-NEXT: mv a0, s0 ; RV32I-PIC-NEXT: mv a0, s0
; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-PIC-NEXT: addi sp, sp, 16 ; RV32I-PIC-NEXT: addi sp, sp, 16
; RV32I-PIC-NEXT: ret ; RV32I-PIC-NEXT: ret
%1 = call i32 @external_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a, %1 = call i32 @external_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
i32 %a, i32 %a, i32 %a, i32 %a, i32 %a) i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
ret i32 %a ret i32 %a
} }
define i32 @defined_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 %j) nounwind { define i32 @defined_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 %j) nounwind {
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llvm/test/CodeGen/RISCV/copysign-casts.ll

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; RV32IFD-NEXT: addi sp, sp, -16 ; RV32IFD-NEXT: addi sp, sp, -16
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill ; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
; RV32IFD-NEXT: fmv.d fs0, fa0 ; RV32IFD-NEXT: fmv.d fs0, fa0
; RV32IFD-NEXT: fmv.x.w a0, fa1 ; RV32IFD-NEXT: fmv.x.w a0, fa1
; RV32IFD-NEXT: call __gnu_h2f_ieee@plt ; RV32IFD-NEXT: call __gnu_h2f_ieee@plt
; RV32IFD-NEXT: fcvt.d.s ft0, fa0 ; RV32IFD-NEXT: fcvt.d.s ft0, fa0
; RV32IFD-NEXT: fsgnj.d fa0, fs0, ft0 ; RV32IFD-NEXT: fsgnj.d fa0, fs0, ft0
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IFD-NEXT: addi sp, sp, 16 ; RV32IFD-NEXT: addi sp, sp, 16
; RV32IFD-NEXT: ret ; RV32IFD-NEXT: ret
; ;
; RV64IFD-LABEL: fold_promote_d_h: ; RV64IFD-LABEL: fold_promote_d_h:
; RV64IFD: # %bb.0: ; RV64IFD: # %bb.0:
; RV64IFD-NEXT: addi sp, sp, -16 ; RV64IFD-NEXT: addi sp, sp, -16
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: fmv.d fs0, fa0 ; RV64IFD-NEXT: fmv.d fs0, fa0
; RV64IFD-NEXT: fmv.x.w a0, fa1 ; RV64IFD-NEXT: fmv.x.w a0, fa1
; RV64IFD-NEXT: call __gnu_h2f_ieee@plt ; RV64IFD-NEXT: call __gnu_h2f_ieee@plt
; RV64IFD-NEXT: fcvt.d.s ft0, fa0 ; RV64IFD-NEXT: fcvt.d.s ft0, fa0
; RV64IFD-NEXT: fsgnj.d fa0, fs0, ft0 ; RV64IFD-NEXT: fsgnj.d fa0, fs0, ft0
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: addi sp, sp, 16 ; RV64IFD-NEXT: addi sp, sp, 16
; RV64IFD-NEXT: ret ; RV64IFD-NEXT: ret
; ;
; RV32IFZFH-LABEL: fold_promote_d_h: ; RV32IFZFH-LABEL: fold_promote_d_h:
; RV32IFZFH: # %bb.0: ; RV32IFZFH: # %bb.0:
; RV32IFZFH-NEXT: fmv.x.h a2, fa0 ; RV32IFZFH-NEXT: fmv.x.h a2, fa0
; RV32IFZFH-NEXT: lui a3, 524288 ; RV32IFZFH-NEXT: lui a3, 524288
; RV32IFZFH-NEXT: addi a3, a3, -1 ; RV32IFZFH-NEXT: addi a3, a3, -1
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; RV32IF: # %bb.0: ; RV32IF: # %bb.0:
; RV32IF-NEXT: addi sp, sp, -16 ; RV32IF-NEXT: addi sp, sp, -16
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill ; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
; RV32IF-NEXT: fmv.s fs0, fa0 ; RV32IF-NEXT: fmv.s fs0, fa0
; RV32IF-NEXT: fmv.x.w a0, fa1 ; RV32IF-NEXT: fmv.x.w a0, fa1
; RV32IF-NEXT: call __gnu_h2f_ieee@plt ; RV32IF-NEXT: call __gnu_h2f_ieee@plt
; RV32IF-NEXT: fsgnj.s fa0, fs0, fa0 ; RV32IF-NEXT: fsgnj.s fa0, fs0, fa0
; RV32IF-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; ;
; RV32IFD-LABEL: fold_promote_f_h: ; RV32IFD-LABEL: fold_promote_f_h:
; RV32IFD: # %bb.0: ; RV32IFD: # %bb.0:
; RV32IFD-NEXT: addi sp, sp, -16 ; RV32IFD-NEXT: addi sp, sp, -16
; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill ; RV32IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
; RV32IFD-NEXT: fmv.s fs0, fa0 ; RV32IFD-NEXT: fmv.s fs0, fa0
; RV32IFD-NEXT: fmv.x.w a0, fa1 ; RV32IFD-NEXT: fmv.x.w a0, fa1
; RV32IFD-NEXT: call __gnu_h2f_ieee@plt ; RV32IFD-NEXT: call __gnu_h2f_ieee@plt
; RV32IFD-NEXT: fsgnj.s fa0, fs0, fa0 ; RV32IFD-NEXT: fsgnj.s fa0, fs0, fa0
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IFD-NEXT: addi sp, sp, 16 ; RV32IFD-NEXT: addi sp, sp, 16
; RV32IFD-NEXT: ret ; RV32IFD-NEXT: ret
; ;
; RV64IFD-LABEL: fold_promote_f_h: ; RV64IFD-LABEL: fold_promote_f_h:
; RV64IFD: # %bb.0: ; RV64IFD: # %bb.0:
; RV64IFD-NEXT: addi sp, sp, -16 ; RV64IFD-NEXT: addi sp, sp, -16
; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: fmv.s fs0, fa0 ; RV64IFD-NEXT: fmv.s fs0, fa0
; RV64IFD-NEXT: fmv.x.w a0, fa1 ; RV64IFD-NEXT: fmv.x.w a0, fa1
; RV64IFD-NEXT: call __gnu_h2f_ieee@plt ; RV64IFD-NEXT: call __gnu_h2f_ieee@plt
; RV64IFD-NEXT: fsgnj.s fa0, fs0, fa0 ; RV64IFD-NEXT: fsgnj.s fa0, fs0, fa0
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: addi sp, sp, 16 ; RV64IFD-NEXT: addi sp, sp, 16
; RV64IFD-NEXT: ret ; RV64IFD-NEXT: ret
; ;
; RV32IFZFH-LABEL: fold_promote_f_h: ; RV32IFZFH-LABEL: fold_promote_f_h:
; RV32IFZFH: # %bb.0: ; RV32IFZFH: # %bb.0:
; RV32IFZFH-NEXT: fcvt.s.h ft0, fa1 ; RV32IFZFH-NEXT: fcvt.s.h ft0, fa1
; RV32IFZFH-NEXT: fsgnj.s fa0, fa0, ft0 ; RV32IFZFH-NEXT: fsgnj.s fa0, fa0, ft0
; RV32IFZFH-NEXT: ret ; RV32IFZFH-NEXT: ret
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llvm/test/CodeGen/RISCV/double-arith.ll

Show First 20 Lines • Show All 807 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a4, a0 ; RV32I-NEXT: mv a4, a0
; RV32I-NEXT: lui a0, 524288 ; RV32I-NEXT: lui a0, 524288
; RV32I-NEXT: xor a5, a1, a0 ; RV32I-NEXT: xor a5, a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: mv a2, s3 ; RV32I-NEXT: mv a2, s3
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call fma@plt ; RV32I-NEXT: call fma@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmsub_d: ; RV64I-LABEL: fmsub_d:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, a2 ; RV64I-NEXT: mv a0, a2
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: li a1, -1 ; RV64I-NEXT: li a1, -1
; RV64I-NEXT: slli a1, a1, 63 ; RV64I-NEXT: slli a1, a1, 63
; RV64I-NEXT: xor a2, a0, a1 ; RV64I-NEXT: xor a2, a0, a1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call fma@plt ; RV64I-NEXT: call fma@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%c_ = fadd double 0.0, %c ; avoid negation using xor %c_ = fadd double 0.0, %c ; avoid negation using xor
%negc = fsub double -0.0, %c_ %negc = fsub double -0.0, %c_
%1 = call double @llvm.fma.f64(double %a, double %b, double %negc) %1 = call double @llvm.fma.f64(double %a, double %b, double %negc)
ret double %1 ret double %1
} }
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lui a0, 524288 ; RV32I-NEXT: lui a0, 524288
; RV32I-NEXT: xor a2, s1, a0 ; RV32I-NEXT: xor a2, s1, a0
; RV32I-NEXT: xor a5, a1, a0 ; RV32I-NEXT: xor a5, a1, a0
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: mv a1, a2 ; RV32I-NEXT: mv a1, a2
; RV32I-NEXT: mv a2, s3 ; RV32I-NEXT: mv a2, s3
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call fma@plt ; RV32I-NEXT: call fma@plt
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_d: ; RV64I-LABEL: fnmadd_d:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 9 Lines
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: li a1, -1 ; RV64I-NEXT: li a1, -1
; RV64I-NEXT: slli a2, a1, 63 ; RV64I-NEXT: slli a2, a1, 63
; RV64I-NEXT: xor a1, s1, a2 ; RV64I-NEXT: xor a1, s1, a2
; RV64I-NEXT: xor a2, a0, a2 ; RV64I-NEXT: xor a2, a0, a2
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call fma@plt ; RV64I-NEXT: call fma@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd double 0.0, %a %a_ = fadd double 0.0, %a
%c_ = fadd double 0.0, %c %c_ = fadd double 0.0, %c
%nega = fsub double -0.0, %a_ %nega = fsub double -0.0, %a_
%negc = fsub double -0.0, %c_ %negc = fsub double -0.0, %c_
%1 = call double @llvm.fma.f64(double %nega, double %b, double %negc) %1 = call double @llvm.fma.f64(double %nega, double %b, double %negc)
ret double %1 ret double %1
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a4, a0 ; RV32I-NEXT: mv a4, a0
; RV32I-NEXT: lui a0, 524288 ; RV32I-NEXT: lui a0, 524288
; RV32I-NEXT: xor a3, s0, a0 ; RV32I-NEXT: xor a3, s0, a0
; RV32I-NEXT: xor a5, a1, a0 ; RV32I-NEXT: xor a5, a1, a0
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: mv a2, s5 ; RV32I-NEXT: mv a2, s5
; RV32I-NEXT: call fma@plt ; RV32I-NEXT: call fma@plt
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_d_2: ; RV64I-LABEL: fnmadd_d_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: li a1, -1 ; RV64I-NEXT: li a1, -1
; RV64I-NEXT: slli a2, a1, 63 ; RV64I-NEXT: slli a2, a1, 63
; RV64I-NEXT: xor a1, s1, a2 ; RV64I-NEXT: xor a1, s1, a2
; RV64I-NEXT: xor a2, a0, a2 ; RV64I-NEXT: xor a2, a0, a2
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call fma@plt ; RV64I-NEXT: call fma@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_ = fadd double 0.0, %b %b_ = fadd double 0.0, %b
%c_ = fadd double 0.0, %c %c_ = fadd double 0.0, %c
%negb = fsub double -0.0, %b_ %negb = fsub double -0.0, %b_
%negc = fsub double -0.0, %c_ %negc = fsub double -0.0, %c_
%1 = call double @llvm.fma.f64(double %a, double %negb, double %negc) %1 = call double @llvm.fma.f64(double %a, double %negb, double %negc)
ret double %1 ret double %1
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; RV32I-NEXT: call __adddf3@plt ; RV32I-NEXT: call __adddf3@plt
; RV32I-NEXT: lui a2, 524288 ; RV32I-NEXT: lui a2, 524288
; RV32I-NEXT: xor a1, a1, a2 ; RV32I-NEXT: xor a1, a1, a2
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: mv a3, s0
; RV32I-NEXT: mv a4, s3 ; RV32I-NEXT: mv a4, s3
; RV32I-NEXT: mv a5, s2 ; RV32I-NEXT: mv a5, s2
; RV32I-NEXT: call fma@plt ; RV32I-NEXT: call fma@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_d: ; RV64I-LABEL: fnmsub_d:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: mv s1, a1 ; RV64I-NEXT: mv s1, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: li a1, -1 ; RV64I-NEXT: li a1, -1
; RV64I-NEXT: slli a1, a1, 63 ; RV64I-NEXT: slli a1, a1, 63
; RV64I-NEXT: xor a0, a0, a1 ; RV64I-NEXT: xor a0, a0, a1
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: mv a2, s0 ; RV64I-NEXT: mv a2, s0
; RV64I-NEXT: call fma@plt ; RV64I-NEXT: call fma@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd double 0.0, %a %a_ = fadd double 0.0, %a
%nega = fsub double -0.0, %a_ %nega = fsub double -0.0, %a_
%1 = call double @llvm.fma.f64(double %nega, double %b, double %c) %1 = call double @llvm.fma.f64(double %nega, double %b, double %c)
ret double %1 ret double %1
} }
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; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: lui a0, 524288 ; RV32I-NEXT: lui a0, 524288
; RV32I-NEXT: xor a3, a1, a0 ; RV32I-NEXT: xor a3, a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: mv a4, s3 ; RV32I-NEXT: mv a4, s3
; RV32I-NEXT: mv a5, s2 ; RV32I-NEXT: mv a5, s2
; RV32I-NEXT: call fma@plt ; RV32I-NEXT: call fma@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_d_2: ; RV64I-LABEL: fnmsub_d_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: li a1, -1 ; RV64I-NEXT: li a1, -1
; RV64I-NEXT: slli a1, a1, 63 ; RV64I-NEXT: slli a1, a1, 63
; RV64I-NEXT: xor a1, a0, a1 ; RV64I-NEXT: xor a1, a0, a1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a2, s0 ; RV64I-NEXT: mv a2, s0
; RV64I-NEXT: call fma@plt ; RV64I-NEXT: call fma@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_ = fadd double 0.0, %b %b_ = fadd double 0.0, %b
%negb = fsub double -0.0, %b_ %negb = fsub double -0.0, %b_
%1 = call double @llvm.fma.f64(double %a, double %negb, double %c) %1 = call double @llvm.fma.f64(double %a, double %negb, double %c)
ret double %1 ret double %1
} }
Show All 33 Lines
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a5 ; RV32I-NEXT: mv s0, a5
; RV32I-NEXT: mv s1, a4 ; RV32I-NEXT: mv s1, a4
; RV32I-NEXT: call __muldf3@plt ; RV32I-NEXT: call __muldf3@plt
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: mv a3, s0
; RV32I-NEXT: call __adddf3@plt ; RV32I-NEXT: call __adddf3@plt
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmadd_d_contract: ; RV64I-LABEL: fmadd_d_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: call __muldf3@plt ; RV64I-NEXT: call __muldf3@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fmul contract double %a, %b %1 = fmul contract double %a, %b
%2 = fadd contract double %1, %c %2 = fadd contract double %1, %c
ret double %2 ret double %2
} }
define double @fmsub_d_contract(double %a, double %b, double %c) nounwind { define double @fmsub_d_contract(double %a, double %b, double %c) nounwind {
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; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: mv a2, s3 ; RV32I-NEXT: mv a2, s3
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call __muldf3@plt ; RV32I-NEXT: call __muldf3@plt
; RV32I-NEXT: mv a2, s4 ; RV32I-NEXT: mv a2, s4
; RV32I-NEXT: mv a3, s5 ; RV32I-NEXT: mv a3, s5
; RV32I-NEXT: call __subdf3@plt ; RV32I-NEXT: call __subdf3@plt
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmsub_d_contract: ; RV64I-LABEL: fmsub_d_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, a2 ; RV64I-NEXT: mv a0, a2
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call __muldf3@plt ; RV64I-NEXT: call __muldf3@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __subdf3@plt ; RV64I-NEXT: call __subdf3@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%c_ = fadd double 0.0, %c ; avoid negation using xor %c_ = fadd double 0.0, %c ; avoid negation using xor
%1 = fmul contract double %a, %b %1 = fmul contract double %a, %b
%2 = fsub contract double %1, %c_ %2 = fsub contract double %1, %c_
ret double %2 ret double %2
} }
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; RV32I-NEXT: mv a2, s0 ; RV32I-NEXT: mv a2, s0
; RV32I-NEXT: mv a3, s1 ; RV32I-NEXT: mv a3, s1
; RV32I-NEXT: call __muldf3@plt ; RV32I-NEXT: call __muldf3@plt
; RV32I-NEXT: lui a2, 524288 ; RV32I-NEXT: lui a2, 524288
; RV32I-NEXT: xor a1, a1, a2 ; RV32I-NEXT: xor a1, a1, a2
; RV32I-NEXT: mv a2, s2 ; RV32I-NEXT: mv a2, s2
; RV32I-NEXT: mv a3, s3 ; RV32I-NEXT: mv a3, s3
; RV32I-NEXT: call __subdf3@plt ; RV32I-NEXT: call __subdf3@plt
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_d_contract: ; RV64I-LABEL: fnmadd_d_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 16 Lines
; RV64I-NEXT: mv a0, s3 ; RV64I-NEXT: mv a0, s3
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call __muldf3@plt ; RV64I-NEXT: call __muldf3@plt
; RV64I-NEXT: li a1, -1 ; RV64I-NEXT: li a1, -1
; RV64I-NEXT: slli a1, a1, 63 ; RV64I-NEXT: slli a1, a1, 63
; RV64I-NEXT: xor a0, a0, a1 ; RV64I-NEXT: xor a0, a0, a1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __subdf3@plt ; RV64I-NEXT: call __subdf3@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd double 0.0, %a ; avoid negation using xor %a_ = fadd double 0.0, %a ; avoid negation using xor
%b_ = fadd double 0.0, %b ; avoid negation using xor %b_ = fadd double 0.0, %b ; avoid negation using xor
%c_ = fadd double 0.0, %c ; avoid negation using xor %c_ = fadd double 0.0, %c ; avoid negation using xor
%1 = fmul contract double %a_, %b_ %1 = fmul contract double %a_, %b_
%2 = fneg double %1 %2 = fneg double %1
%3 = fsub contract double %2, %c_ %3 = fsub contract double %2, %c_
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; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call __muldf3@plt ; RV32I-NEXT: call __muldf3@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a3, a1 ; RV32I-NEXT: mv a3, a1
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call __subdf3@plt ; RV32I-NEXT: call __subdf3@plt
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_d_contract: ; RV64I-LABEL: fnmsub_d_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a2 ; RV64I-NEXT: mv s2, a2
; RV64I-NEXT: mv s1, a1 ; RV64I-NEXT: mv s1, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __muldf3@plt ; RV64I-NEXT: call __muldf3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __subdf3@plt ; RV64I-NEXT: call __subdf3@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd double 0.0, %a ; avoid negation using xor %a_ = fadd double 0.0, %a ; avoid negation using xor
%b_ = fadd double 0.0, %b ; avoid negation using xor %b_ = fadd double 0.0, %b ; avoid negation using xor
%1 = fmul contract double %a_, %b_ %1 = fmul contract double %a_, %b_
%2 = fsub contract double %c, %1 %2 = fsub contract double %c, %1
ret double %2 ret double %2
} }

llvm/test/CodeGen/RISCV/double-convert.ll

Show First 20 Lines • Show All 198 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call __unorddf2@plt ; RV32I-NEXT: call __unorddf2@plt
; RV32I-NEXT: bne a0, s0, .LBB3_6 ; RV32I-NEXT: bne a0, s0, .LBB3_6
; RV32I-NEXT: # %bb.5: # %start ; RV32I-NEXT: # %bb.5: # %start
; RV32I-NEXT: mv s0, s4 ; RV32I-NEXT: mv s0, s4
; RV32I-NEXT: .LBB3_6: # %start ; RV32I-NEXT: .LBB3_6: # %start
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_w_d_sat: ; RV64I-LABEL: fcvt_w_d_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 29 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unorddf2@plt ; RV64I-NEXT: call __unorddf2@plt
; RV64I-NEXT: bne a0, s1, .LBB3_6 ; RV64I-NEXT: bne a0, s1, .LBB3_6
; RV64I-NEXT: # %bb.5: # %start ; RV64I-NEXT: # %bb.5: # %start
; RV64I-NEXT: mv s1, s3 ; RV64I-NEXT: mv s1, s3
; RV64I-NEXT: .LBB3_6: # %start ; RV64I-NEXT: .LBB3_6: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i32 @llvm.fptosi.sat.i32.f64(double %a) %0 = tail call i32 @llvm.fptosi.sat.i32.f64(double %a)
ret i32 %0 ret i32 %0
} }
declare i32 @llvm.fptosi.sat.i32.f64(double) declare i32 @llvm.fptosi.sat.i32.f64(double)
▲ Show 20 Lines • Show All 166 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.1: # %start ; RV32I-NEXT: # %bb.1: # %start
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: .LBB6_2: # %start ; RV32I-NEXT: .LBB6_2: # %start
; RV32I-NEXT: li a0, -1 ; RV32I-NEXT: li a0, -1
; RV32I-NEXT: bgtz s2, .LBB6_4 ; RV32I-NEXT: bgtz s2, .LBB6_4
; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: # %bb.3: # %start
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: .LBB6_4: # %start ; RV32I-NEXT: .LBB6_4: # %start
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_wu_d_sat: ; RV64I-LABEL: fcvt_wu_d_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __gtdf2@plt ; RV64I-NEXT: call __gtdf2@plt
; RV64I-NEXT: blez a0, .LBB6_4 ; RV64I-NEXT: blez a0, .LBB6_4
; RV64I-NEXT: # %bb.3: ; RV64I-NEXT: # %bb.3:
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: srli s1, a0, 32 ; RV64I-NEXT: srli s1, a0, 32
; RV64I-NEXT: .LBB6_4: # %start ; RV64I-NEXT: .LBB6_4: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i32 @llvm.fptoui.sat.i32.f64(double %a) %0 = tail call i32 @llvm.fptoui.sat.i32.f64(double %a)
ret i32 %0 ret i32 %0
} }
declare i32 @llvm.fptoui.sat.i32.f64(double) declare i32 @llvm.fptoui.sat.i32.f64(double)
▲ Show 20 Lines • Show All 344 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call __unorddf2@plt ; RV32I-NEXT: call __unorddf2@plt
; RV32I-NEXT: bne a0, s0, .LBB12_12 ; RV32I-NEXT: bne a0, s0, .LBB12_12
; RV32I-NEXT: # %bb.11: # %start ; RV32I-NEXT: # %bb.11: # %start
; RV32I-NEXT: mv s0, s6 ; RV32I-NEXT: mv s0, s6
; RV32I-NEXT: .LBB12_12: # %start ; RV32I-NEXT: .LBB12_12: # %start
; RV32I-NEXT: mv a0, s4 ; RV32I-NEXT: mv a0, s4
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 48 ; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_l_d_sat: ; RV64I-LABEL: fcvt_l_d_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 30 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unorddf2@plt ; RV64I-NEXT: call __unorddf2@plt
; RV64I-NEXT: bne a0, s1, .LBB12_7 ; RV64I-NEXT: bne a0, s1, .LBB12_7
; RV64I-NEXT: # %bb.6: # %start ; RV64I-NEXT: # %bb.6: # %start
; RV64I-NEXT: mv s1, s2 ; RV64I-NEXT: mv s1, s2
; RV64I-NEXT: .LBB12_7: # %start ; RV64I-NEXT: .LBB12_7: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i64 @llvm.fptosi.sat.i64.f64(double %a) %0 = tail call i64 @llvm.fptosi.sat.i64.f64(double %a)
ret i64 %0 ret i64 %0
} }
declare i64 @llvm.fptosi.sat.i64.f64(double) declare i64 @llvm.fptosi.sat.i64.f64(double)
▲ Show 20 Lines • Show All 147 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a1, s5 ; RV32I-NEXT: mv a1, s5
; RV32I-NEXT: .LBB14_6: # %start ; RV32I-NEXT: .LBB14_6: # %start
; RV32I-NEXT: bgtz s3, .LBB14_8 ; RV32I-NEXT: bgtz s3, .LBB14_8
; RV32I-NEXT: # %bb.7: # %start ; RV32I-NEXT: # %bb.7: # %start
; RV32I-NEXT: mv s2, a1 ; RV32I-NEXT: mv s2, a1
; RV32I-NEXT: .LBB14_8: # %start ; RV32I-NEXT: .LBB14_8: # %start
; RV32I-NEXT: mv a0, s4 ; RV32I-NEXT: mv a0, s4
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_lu_d_sat: ; RV64I-LABEL: fcvt_lu_d_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 16 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __gtdf2@plt ; RV64I-NEXT: call __gtdf2@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: bgtz a1, .LBB14_4 ; RV64I-NEXT: bgtz a1, .LBB14_4
; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: # %bb.3: # %start
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: .LBB14_4: # %start ; RV64I-NEXT: .LBB14_4: # %start
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i64 @llvm.fptoui.sat.i64.f64(double %a) %0 = tail call i64 @llvm.fptoui.sat.i64.f64(double %a)
ret i64 %0 ret i64 %0
} }
declare i64 @llvm.fptoui.sat.i64.f64(double) declare i64 @llvm.fptoui.sat.i64.f64(double)
▲ Show 20 Lines • Show All 347 Lines • ▼ Show 20 Lines
; RV32I-NEXT: .cfi_offset s1, -12 ; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: addi s1, a0, 1 ; RV32I-NEXT: addi s1, a0, 1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __floatsidf@plt ; RV32I-NEXT: call __floatsidf@plt
; RV32I-NEXT: sw a1, 4(s0) ; RV32I-NEXT: sw a1, 4(s0)
; RV32I-NEXT: sw a0, 0(s0) ; RV32I-NEXT: sw a0, 0(s0)
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_d_w_demanded_bits: ; RV64I-LABEL: fcvt_d_w_demanded_bits:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: .cfi_offset s1, -24 ; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: addiw s1, a0, 1 ; RV64I-NEXT: addiw s1, a0, 1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __floatsidf@plt ; RV64I-NEXT: call __floatsidf@plt
; RV64I-NEXT: sd a0, 0(s0) ; RV64I-NEXT: sd a0, 0(s0)
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%3 = add i32 %0, 1 %3 = add i32 %0, 1
%4 = sitofp i32 %3 to double %4 = sitofp i32 %3 to double
store double %4, double* %1, align 8 store double %4, double* %1, align 8
ret i32 %3 ret i32 %3
} }
Show All 25 Lines
; RV32I-NEXT: .cfi_offset s1, -12 ; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: addi s1, a0, 1 ; RV32I-NEXT: addi s1, a0, 1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __floatunsidf@plt ; RV32I-NEXT: call __floatunsidf@plt
; RV32I-NEXT: sw a1, 4(s0) ; RV32I-NEXT: sw a1, 4(s0)
; RV32I-NEXT: sw a0, 0(s0) ; RV32I-NEXT: sw a0, 0(s0)
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_d_wu_demanded_bits: ; RV64I-LABEL: fcvt_d_wu_demanded_bits:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: .cfi_offset s1, -24 ; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: addiw s1, a0, 1 ; RV64I-NEXT: addiw s1, a0, 1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __floatunsidf@plt ; RV64I-NEXT: call __floatunsidf@plt
; RV64I-NEXT: sd a0, 0(s0) ; RV64I-NEXT: sd a0, 0(s0)
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%3 = add i32 %0, 1 %3 = add i32 %0, 1
%4 = uitofp i32 %3 to double %4 = uitofp i32 %3 to double
store double %4, double* %1, align 8 store double %4, double* %1, align 8
ret i32 %3 ret i32 %3
} }

llvm/test/CodeGen/RISCV/double-fcmp.ll

Show First 20 Lines • Show All 301 Lines • ▼ Show 20 Lines
; RV32I-NEXT: snez s4, a0 ; RV32I-NEXT: snez s4, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: mv a2, s3 ; RV32I-NEXT: mv a2, s3
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call __unorddf2@plt ; RV32I-NEXT: call __unorddf2@plt
; RV32I-NEXT: seqz a0, a0 ; RV32I-NEXT: seqz a0, a0
; RV32I-NEXT: and a0, a0, s4 ; RV32I-NEXT: and a0, a0, s4
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcmp_one: ; RV64I-LABEL: fcmp_one:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: call __eqdf2@plt ; RV64I-NEXT: call __eqdf2@plt
; RV64I-NEXT: snez s2, a0 ; RV64I-NEXT: snez s2, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unorddf2@plt ; RV64I-NEXT: call __unorddf2@plt
; RV64I-NEXT: seqz a0, a0 ; RV64I-NEXT: seqz a0, a0
; RV64I-NEXT: and a0, a0, s2 ; RV64I-NEXT: and a0, a0, s2
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp one double %a, %b %1 = fcmp one double %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
define i32 @fcmp_ord(double %a, double %b) nounwind { define i32 @fcmp_ord(double %a, double %b) nounwind {
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; RV32I-NEXT: seqz s4, a0 ; RV32I-NEXT: seqz s4, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: mv a2, s3 ; RV32I-NEXT: mv a2, s3
; RV32I-NEXT: mv a3, s2 ; RV32I-NEXT: mv a3, s2
; RV32I-NEXT: call __unorddf2@plt ; RV32I-NEXT: call __unorddf2@plt
; RV32I-NEXT: snez a0, a0 ; RV32I-NEXT: snez a0, a0
; RV32I-NEXT: or a0, a0, s4 ; RV32I-NEXT: or a0, a0, s4
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcmp_ueq: ; RV64I-LABEL: fcmp_ueq:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: call __eqdf2@plt ; RV64I-NEXT: call __eqdf2@plt
; RV64I-NEXT: seqz s2, a0 ; RV64I-NEXT: seqz s2, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unorddf2@plt ; RV64I-NEXT: call __unorddf2@plt
; RV64I-NEXT: snez a0, a0 ; RV64I-NEXT: snez a0, a0
; RV64I-NEXT: or a0, a0, s2 ; RV64I-NEXT: or a0, a0, s2
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp ueq double %a, %b %1 = fcmp ueq double %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
define i32 @fcmp_ugt(double %a, double %b) nounwind { define i32 @fcmp_ugt(double %a, double %b) nounwind {
▲ Show 20 Lines • Show All 311 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/double-intrinsics.ll

Show First 20 Lines • Show All 200 Lines • ▼ Show 20 Lines
; RV32IFD-NEXT: sw a0, 8(sp) ; RV32IFD-NEXT: sw a0, 8(sp)
; RV32IFD-NEXT: sw a1, 12(sp) ; RV32IFD-NEXT: sw a1, 12(sp)
; RV32IFD-NEXT: fld ft0, 8(sp) ; RV32IFD-NEXT: fld ft0, 8(sp)
; RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload ; RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
; RV32IFD-NEXT: fadd.d ft0, ft1, ft0 ; RV32IFD-NEXT: fadd.d ft0, ft1, ft0
; RV32IFD-NEXT: fsd ft0, 8(sp) ; RV32IFD-NEXT: fsd ft0, 8(sp)
; RV32IFD-NEXT: lw a0, 8(sp) ; RV32IFD-NEXT: lw a0, 8(sp)
; RV32IFD-NEXT: lw a1, 12(sp) ; RV32IFD-NEXT: lw a1, 12(sp)
; RV32IFD-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32IFD-NEXT: addi sp, sp, 32 ; RV32IFD-NEXT: addi sp, sp, 32
; RV32IFD-NEXT: ret ; RV32IFD-NEXT: ret
; ;
; RV64IFD-LABEL: sincos_f64: ; RV64IFD-LABEL: sincos_f64:
; RV64IFD: # %bb.0: ; RV64IFD: # %bb.0:
; RV64IFD-NEXT: addi sp, sp, -32 ; RV64IFD-NEXT: addi sp, sp, -32
; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: mv s0, a0 ; RV64IFD-NEXT: mv s0, a0
; RV64IFD-NEXT: call sin@plt ; RV64IFD-NEXT: call sin@plt
; RV64IFD-NEXT: fmv.d.x ft0, a0 ; RV64IFD-NEXT: fmv.d.x ft0, a0
; RV64IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill ; RV64IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
; RV64IFD-NEXT: mv a0, s0 ; RV64IFD-NEXT: mv a0, s0
; RV64IFD-NEXT: call cos@plt ; RV64IFD-NEXT: call cos@plt
; RV64IFD-NEXT: fmv.d.x ft0, a0 ; RV64IFD-NEXT: fmv.d.x ft0, a0
; RV64IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload ; RV64IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: fadd.d ft0, ft1, ft0 ; RV64IFD-NEXT: fadd.d ft0, ft1, ft0
; RV64IFD-NEXT: fmv.x.d a0, ft0 ; RV64IFD-NEXT: fmv.x.d a0, ft0
; RV64IFD-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IFD-NEXT: addi sp, sp, 32 ; RV64IFD-NEXT: addi sp, sp, 32
; RV64IFD-NEXT: ret ; RV64IFD-NEXT: ret
; ;
; RV32I-LABEL: sincos_f64: ; RV32I-LABEL: sincos_f64:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -32 ; RV32I-NEXT: addi sp, sp, -32
; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: call sin@plt ; RV32I-NEXT: call sin@plt
; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv s2, a0
; RV32I-NEXT: mv s3, a1 ; RV32I-NEXT: mv s3, a1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call cos@plt ; RV32I-NEXT: call cos@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a3, a1 ; RV32I-NEXT: mv a3, a1
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: mv a1, s3
; RV32I-NEXT: call __adddf3@plt ; RV32I-NEXT: call __adddf3@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: sincos_f64: ; RV64I-LABEL: sincos_f64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: call sin@plt ; RV64I-NEXT: call sin@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call cos@plt ; RV64I-NEXT: call cos@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call double @llvm.sin.f64(double %a) %1 = call double @llvm.sin.f64(double %a)
%2 = call double @llvm.cos.f64(double %a) %2 = call double @llvm.cos.f64(double %a)
%3 = fadd double %1, %2 %3 = fadd double %1, %2
ret double %3 ret double %3
} }
▲ Show 20 Lines • Show All 339 Lines • ▼ Show 20 Lines
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a5 ; RV32I-NEXT: mv s0, a5
; RV32I-NEXT: mv s1, a4 ; RV32I-NEXT: mv s1, a4
; RV32I-NEXT: call __muldf3@plt ; RV32I-NEXT: call __muldf3@plt
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: mv a3, s0 ; RV32I-NEXT: mv a3, s0
; RV32I-NEXT: call __adddf3@plt ; RV32I-NEXT: call __adddf3@plt
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmuladd_f64: ; RV64I-LABEL: fmuladd_f64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: call __muldf3@plt ; RV64I-NEXT: call __muldf3@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __adddf3@plt ; RV64I-NEXT: call __adddf3@plt
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call double @llvm.fmuladd.f64(double %a, double %b, double %c) %1 = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
ret double %1 ret double %1
} }
declare double @llvm.fabs.f64(double) declare double @llvm.fabs.f64(double)
▲ Show 20 Lines • Show All 637 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/exception-pointer-register.ll

Show All 31 Lines
; RV32I-NEXT: .Ltmp1: ; RV32I-NEXT: .Ltmp1:
; RV32I-NEXT: j .LBB0_3 ; RV32I-NEXT: j .LBB0_3
; RV32I-NEXT: .LBB0_2: # %bb1 ; RV32I-NEXT: .LBB0_2: # %bb1
; RV32I-NEXT: .Ltmp2: ; RV32I-NEXT: .Ltmp2:
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call foo@plt ; RV32I-NEXT: call foo@plt
; RV32I-NEXT: .Ltmp3: ; RV32I-NEXT: .Ltmp3:
; RV32I-NEXT: .LBB0_3: # %end2 ; RV32I-NEXT: .LBB0_3: # %end2
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; RV32I-NEXT: .LBB0_4: # %lpad ; RV32I-NEXT: .LBB0_4: # %lpad
; RV32I-NEXT: .Ltmp4: ; RV32I-NEXT: .Ltmp4:
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call callee ; RV32I-NEXT: call callee
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
Show All 18 Lines
; RV64I-NEXT: .Ltmp1: ; RV64I-NEXT: .Ltmp1:
; RV64I-NEXT: j .LBB0_3 ; RV64I-NEXT: j .LBB0_3
; RV64I-NEXT: .LBB0_2: # %bb1 ; RV64I-NEXT: .LBB0_2: # %bb1
; RV64I-NEXT: .Ltmp2: ; RV64I-NEXT: .Ltmp2:
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call foo@plt ; RV64I-NEXT: call foo@plt
; RV64I-NEXT: .Ltmp3: ; RV64I-NEXT: .Ltmp3:
; RV64I-NEXT: .LBB0_3: # %end2 ; RV64I-NEXT: .LBB0_3: # %end2
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; RV64I-NEXT: .LBB0_4: # %lpad ; RV64I-NEXT: .LBB0_4: # %lpad
; RV64I-NEXT: .Ltmp4: ; RV64I-NEXT: .Ltmp4:
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call callee ; RV64I-NEXT: call callee
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
Show All 33 Lines

llvm/test/CodeGen/RISCV/fastcc-int.ll

Show All 39 Lines
; RV32-NEXT: lw t1, 52(a0) ; RV32-NEXT: lw t1, 52(a0)
; RV32-NEXT: lw s0, 56(a0) ; RV32-NEXT: lw s0, 56(a0)
; RV32-NEXT: lw a0, 60(a0) ; RV32-NEXT: lw a0, 60(a0)
; RV32-NEXT: sw a0, 8(sp) ; RV32-NEXT: sw a0, 8(sp)
; RV32-NEXT: sw s0, 4(sp) ; RV32-NEXT: sw s0, 4(sp)
; RV32-NEXT: sw t1, 0(sp) ; RV32-NEXT: sw t1, 0(sp)
; RV32-NEXT: mv a0, t0 ; RV32-NEXT: mv a0, t0
; RV32-NEXT: call callee@plt ; RV32-NEXT: call callee@plt
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 32 ; RV32-NEXT: addi sp, sp, 32
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: caller: ; RV64-LABEL: caller:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -48 ; RV64-NEXT: addi sp, sp, -48
; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 13 Lines
; RV64-NEXT: ld t1, 104(a0) ; RV64-NEXT: ld t1, 104(a0)
; RV64-NEXT: ld s0, 112(a0) ; RV64-NEXT: ld s0, 112(a0)
; RV64-NEXT: ld a0, 120(a0) ; RV64-NEXT: ld a0, 120(a0)
; RV64-NEXT: sd a0, 16(sp) ; RV64-NEXT: sd a0, 16(sp)
; RV64-NEXT: sd s0, 8(sp) ; RV64-NEXT: sd s0, 8(sp)
; RV64-NEXT: sd t1, 0(sp) ; RV64-NEXT: sd t1, 0(sp)
; RV64-NEXT: mv a0, t0 ; RV64-NEXT: mv a0, t0
; RV64-NEXT: call callee@plt ; RV64-NEXT: call callee@plt
; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 48 ; RV64-NEXT: addi sp, sp, 48
; RV64-NEXT: ret ; RV64-NEXT: ret
%C = call fastcc i32 @callee(<16 x i32> %A) %C = call fastcc i32 @callee(<16 x i32> %A)
ret i32 %C ret i32 %C
} }

llvm/test/CodeGen/RISCV/float-arith.ll

Show First 20 Lines • Show All 323 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: not a0, a0 ; RV32I-NEXT: not a0, a0
; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: lui a1, 524288
; RV32I-NEXT: addi a2, a1, -1 ; RV32I-NEXT: addi a2, a1, -1
; RV32I-NEXT: and a2, s0, a2 ; RV32I-NEXT: and a2, s0, a2
; RV32I-NEXT: and a0, a0, a1 ; RV32I-NEXT: and a0, a0, a1
; RV32I-NEXT: or a0, a2, a0 ; RV32I-NEXT: or a0, a2, a0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fsgnjn_s: ; RV64I-LABEL: fsgnjn_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: not a0, a0 ; RV64I-NEXT: not a0, a0
; RV64I-NEXT: lui a1, 524288 ; RV64I-NEXT: lui a1, 524288
; RV64I-NEXT: addiw a2, a1, -1 ; RV64I-NEXT: addiw a2, a1, -1
; RV64I-NEXT: and a2, s0, a2 ; RV64I-NEXT: and a2, s0, a2
; RV64I-NEXT: and a0, a0, a1 ; RV64I-NEXT: and a0, a0, a1
; RV64I-NEXT: or a0, a2, a0 ; RV64I-NEXT: or a0, a2, a0
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fadd float %a, %b %1 = fadd float %a, %b
%2 = fneg float %1 %2 = fneg float %1
%3 = call float @llvm.copysign.f32(float %a, float %2) %3 = call float @llvm.copysign.f32(float %a, float %2)
ret float %3 ret float %3
} }
▲ Show 20 Lines • Show All 328 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a0, a2 ; RV32I-NEXT: mv a0, a2
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: lui a1, 524288
; RV32I-NEXT: xor a2, a0, a1 ; RV32I-NEXT: xor a2, a0, a1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmsub_s: ; RV64I-LABEL: fmsub_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, a2 ; RV64I-NEXT: mv a0, a2
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: lui a1, 524288 ; RV64I-NEXT: lui a1, 524288
; RV64I-NEXT: xor a2, a0, a1 ; RV64I-NEXT: xor a2, a0, a1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%c_ = fadd float 0.0, %c ; avoid negation using xor %c_ = fadd float 0.0, %c ; avoid negation using xor
%negc = fsub float -0.0, %c_ %negc = fsub float -0.0, %c_
%1 = call float @llvm.fma.f32(float %a, float %b, float %negc) %1 = call float @llvm.fma.f32(float %a, float %b, float %negc)
ret float %1 ret float %1
} }
Show All 38 Lines
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lui a2, 524288 ; RV32I-NEXT: lui a2, 524288
; RV32I-NEXT: xor a1, s1, a2 ; RV32I-NEXT: xor a1, s1, a2
; RV32I-NEXT: xor a2, a0, a2 ; RV32I-NEXT: xor a2, a0, a2
; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_s: ; RV64I-LABEL: fnmadd_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: lui a2, 524288 ; RV64I-NEXT: lui a2, 524288
; RV64I-NEXT: xor a1, s1, a2 ; RV64I-NEXT: xor a1, s1, a2
; RV64I-NEXT: xor a2, a0, a2 ; RV64I-NEXT: xor a2, a0, a2
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd float 0.0, %a %a_ = fadd float 0.0, %a
%c_ = fadd float 0.0, %c %c_ = fadd float 0.0, %c
%nega = fsub float -0.0, %a_ %nega = fsub float -0.0, %a_
%negc = fsub float -0.0, %c_ %negc = fsub float -0.0, %c_
%1 = call float @llvm.fma.f32(float %nega, float %b, float %negc) %1 = call float @llvm.fma.f32(float %nega, float %b, float %negc)
ret float %1 ret float %1
Show All 40 Lines
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lui a2, 524288 ; RV32I-NEXT: lui a2, 524288
; RV32I-NEXT: xor a1, s1, a2 ; RV32I-NEXT: xor a1, s1, a2
; RV32I-NEXT: xor a2, a0, a2 ; RV32I-NEXT: xor a2, a0, a2
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_s_2: ; RV64I-LABEL: fnmadd_s_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv s2, a0
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: lui a2, 524288 ; RV64I-NEXT: lui a2, 524288
; RV64I-NEXT: xor a1, s1, a2 ; RV64I-NEXT: xor a1, s1, a2
; RV64I-NEXT: xor a2, a0, a2 ; RV64I-NEXT: xor a2, a0, a2
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_ = fadd float 0.0, %b %b_ = fadd float 0.0, %b
%c_ = fadd float 0.0, %c %c_ = fadd float 0.0, %c
%negb = fsub float -0.0, %b_ %negb = fsub float -0.0, %b_
%negc = fsub float -0.0, %c_ %negc = fsub float -0.0, %c_
%1 = call float @llvm.fma.f32(float %a, float %negb, float %negc) %1 = call float @llvm.fma.f32(float %a, float %negb, float %negc)
ret float %1 ret float %1
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; RV32I-NEXT: mv s1, a1 ; RV32I-NEXT: mv s1, a1
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: lui a1, 524288
; RV32I-NEXT: xor a0, a0, a1 ; RV32I-NEXT: xor a0, a0, a1
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: mv a2, s0 ; RV32I-NEXT: mv a2, s0
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_s: ; RV64I-LABEL: fnmsub_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: mv s1, a1 ; RV64I-NEXT: mv s1, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: lui a1, 524288 ; RV64I-NEXT: lui a1, 524288
; RV64I-NEXT: xor a0, a0, a1 ; RV64I-NEXT: xor a0, a0, a1
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: mv a2, s0 ; RV64I-NEXT: mv a2, s0
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd float 0.0, %a %a_ = fadd float 0.0, %a
%nega = fsub float -0.0, %a_ %nega = fsub float -0.0, %a_
%1 = call float @llvm.fma.f32(float %nega, float %b, float %c) %1 = call float @llvm.fma.f32(float %nega, float %b, float %c)
ret float %1 ret float %1
} }
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; RV32I-NEXT: mv a0, a1 ; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: lui a1, 524288
; RV32I-NEXT: xor a1, a0, a1 ; RV32I-NEXT: xor a1, a0, a1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a2, s0 ; RV32I-NEXT: mv a2, s0
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_s_2: ; RV64I-LABEL: fnmsub_s_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, a1 ; RV64I-NEXT: mv a0, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: lui a1, 524288 ; RV64I-NEXT: lui a1, 524288
; RV64I-NEXT: xor a1, a0, a1 ; RV64I-NEXT: xor a1, a0, a1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a2, s0 ; RV64I-NEXT: mv a2, s0
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_ = fadd float 0.0, %b %b_ = fadd float 0.0, %b
%negb = fsub float -0.0, %b_ %negb = fsub float -0.0, %b_
%1 = call float @llvm.fma.f32(float %a, float %negb, float %c) %1 = call float @llvm.fma.f32(float %a, float %negb, float %c)
ret float %1 ret float %1
} }
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; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a2 ; RV32I-NEXT: mv s0, a2
; RV32I-NEXT: call __mulsf3@plt ; RV32I-NEXT: call __mulsf3@plt
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmadd_s_contract: ; RV64I-LABEL: fmadd_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: call __mulsf3@plt ; RV64I-NEXT: call __mulsf3@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fmul contract float %a, %b %1 = fmul contract float %a, %b
%2 = fadd contract float %1, %c %2 = fadd contract float %1, %c
ret float %2 ret float %2
} }
define float @fmsub_s_contract(float %a, float %b, float %c) nounwind { define float @fmsub_s_contract(float %a, float %b, float %c) nounwind {
Show All 32 Lines
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call __mulsf3@plt ; RV32I-NEXT: call __mulsf3@plt
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmsub_s_contract: ; RV64I-LABEL: fmsub_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, a2 ; RV64I-NEXT: mv a0, a2
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call __mulsf3@plt ; RV64I-NEXT: call __mulsf3@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%c_ = fadd float 0.0, %c ; avoid negation using xor %c_ = fadd float 0.0, %c ; avoid negation using xor
%1 = fmul contract float %a, %b %1 = fmul contract float %a, %b
%2 = fsub contract float %1, %c_ %2 = fsub contract float %1, %c_
ret float %2 ret float %2
} }
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call __mulsf3@plt ; RV32I-NEXT: call __mulsf3@plt
; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: lui a1, 524288
; RV32I-NEXT: xor a0, a0, a1 ; RV32I-NEXT: xor a0, a0, a1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_s_contract: ; RV64I-LABEL: fnmadd_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 15 Lines
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv a0, s3 ; RV64I-NEXT: mv a0, s3
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call __mulsf3@plt ; RV64I-NEXT: call __mulsf3@plt
; RV64I-NEXT: lui a1, 524288 ; RV64I-NEXT: lui a1, 524288
; RV64I-NEXT: xor a0, a0, a1 ; RV64I-NEXT: xor a0, a0, a1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd float 0.0, %a ; avoid negation using xor %a_ = fadd float 0.0, %a ; avoid negation using xor
%b_ = fadd float 0.0, %b ; avoid negation using xor %b_ = fadd float 0.0, %b ; avoid negation using xor
%c_ = fadd float 0.0, %c ; avoid negation using xor %c_ = fadd float 0.0, %c ; avoid negation using xor
%1 = fmul contract float %a_, %b_ %1 = fmul contract float %a_, %b_
%2 = fneg float %1 %2 = fneg float %1
%3 = fsub contract float %2, %c_ %3 = fsub contract float %2, %c_
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call __mulsf3@plt ; RV32I-NEXT: call __mulsf3@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_s_contract: ; RV64I-LABEL: fnmsub_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a2 ; RV64I-NEXT: mv s2, a2
; RV64I-NEXT: mv s1, a1 ; RV64I-NEXT: mv s1, a1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: li a1, 0 ; RV64I-NEXT: li a1, 0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __mulsf3@plt ; RV64I-NEXT: call __mulsf3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd float 0.0, %a ; avoid negation using xor %a_ = fadd float 0.0, %a ; avoid negation using xor
%b_ = fadd float 0.0, %b ; avoid negation using xor %b_ = fadd float 0.0, %b ; avoid negation using xor
%1 = fmul contract float %a_, %b_ %1 = fmul contract float %a_, %b_
%2 = fsub contract float %c, %1 %2 = fsub contract float %c, %1
ret float %2 ret float %2
} }

llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll

Show First 20 Lines • Show All 73 Lines • ▼ Show 20 Lines
; RV32F-NEXT: call __adddf3@plt ; RV32F-NEXT: call __adddf3@plt
; RV32F-NEXT: mv a2, a0 ; RV32F-NEXT: mv a2, a0
; RV32F-NEXT: lui a0, 524288 ; RV32F-NEXT: lui a0, 524288
; RV32F-NEXT: addi a0, a0, -1 ; RV32F-NEXT: addi a0, a0, -1
; RV32F-NEXT: and a3, a1, a0 ; RV32F-NEXT: and a3, a1, a0
; RV32F-NEXT: mv a0, s1 ; RV32F-NEXT: mv a0, s1
; RV32F-NEXT: mv a1, s0 ; RV32F-NEXT: mv a1, s0
; RV32F-NEXT: call __adddf3@plt ; RV32F-NEXT: call __adddf3@plt
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32F-NEXT: addi sp, sp, 16 ; RV32F-NEXT: addi sp, sp, 16
; RV32F-NEXT: ret ; RV32F-NEXT: ret
; ;
; RV32FD-LABEL: bitcast_double_and: ; RV32FD-LABEL: bitcast_double_and:
; RV32FD: # %bb.0: ; RV32FD: # %bb.0:
; RV32FD-NEXT: addi sp, sp, -16 ; RV32FD-NEXT: addi sp, sp, -16
; RV32FD-NEXT: sw a2, 8(sp) ; RV32FD-NEXT: sw a2, 8(sp)
; RV32FD-NEXT: sw a3, 12(sp) ; RV32FD-NEXT: sw a3, 12(sp)
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; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64F-NEXT: mv s0, a0 ; RV64F-NEXT: mv s0, a0
; RV64F-NEXT: call __adddf3@plt ; RV64F-NEXT: call __adddf3@plt
; RV64F-NEXT: li a1, -1 ; RV64F-NEXT: li a1, -1
; RV64F-NEXT: srli a1, a1, 1 ; RV64F-NEXT: srli a1, a1, 1
; RV64F-NEXT: and a1, a0, a1 ; RV64F-NEXT: and a1, a0, a1
; RV64F-NEXT: mv a0, s0 ; RV64F-NEXT: mv a0, s0
; RV64F-NEXT: call __adddf3@plt ; RV64F-NEXT: call __adddf3@plt
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64F-NEXT: addi sp, sp, 16 ; RV64F-NEXT: addi sp, sp, 16
; RV64F-NEXT: ret ; RV64F-NEXT: ret
; ;
; RV64FD-LABEL: bitcast_double_and: ; RV64FD-LABEL: bitcast_double_and:
; RV64FD: # %bb.0: ; RV64FD: # %bb.0:
; RV64FD-NEXT: fmv.d.x ft0, a1 ; RV64FD-NEXT: fmv.d.x ft0, a1
; RV64FD-NEXT: fmv.d.x ft1, a0 ; RV64FD-NEXT: fmv.d.x ft1, a0
; RV64FD-NEXT: fadd.d ft0, ft1, ft0 ; RV64FD-NEXT: fadd.d ft0, ft1, ft0
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; RV32F-NEXT: mv s1, a0 ; RV32F-NEXT: mv s1, a0
; RV32F-NEXT: call __muldf3@plt ; RV32F-NEXT: call __muldf3@plt
; RV32F-NEXT: mv a2, a0 ; RV32F-NEXT: mv a2, a0
; RV32F-NEXT: lui a0, 524288 ; RV32F-NEXT: lui a0, 524288
; RV32F-NEXT: xor a3, a1, a0 ; RV32F-NEXT: xor a3, a1, a0
; RV32F-NEXT: mv a0, s1 ; RV32F-NEXT: mv a0, s1
; RV32F-NEXT: mv a1, s0 ; RV32F-NEXT: mv a1, s0
; RV32F-NEXT: call __muldf3@plt ; RV32F-NEXT: call __muldf3@plt
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32F-NEXT: addi sp, sp, 16 ; RV32F-NEXT: addi sp, sp, 16
; RV32F-NEXT: ret ; RV32F-NEXT: ret
; ;
; RV32FD-LABEL: bitcast_double_xor: ; RV32FD-LABEL: bitcast_double_xor:
; RV32FD: # %bb.0: ; RV32FD: # %bb.0:
; RV32FD-NEXT: addi sp, sp, -16 ; RV32FD-NEXT: addi sp, sp, -16
; RV32FD-NEXT: sw a2, 8(sp) ; RV32FD-NEXT: sw a2, 8(sp)
; RV32FD-NEXT: sw a3, 12(sp) ; RV32FD-NEXT: sw a3, 12(sp)
Show All 17 Lines
; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64F-NEXT: mv s0, a0 ; RV64F-NEXT: mv s0, a0
; RV64F-NEXT: call __muldf3@plt ; RV64F-NEXT: call __muldf3@plt
; RV64F-NEXT: li a1, -1 ; RV64F-NEXT: li a1, -1
; RV64F-NEXT: slli a1, a1, 63 ; RV64F-NEXT: slli a1, a1, 63
; RV64F-NEXT: xor a1, a0, a1 ; RV64F-NEXT: xor a1, a0, a1
; RV64F-NEXT: mv a0, s0 ; RV64F-NEXT: mv a0, s0
; RV64F-NEXT: call __muldf3@plt ; RV64F-NEXT: call __muldf3@plt
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64F-NEXT: addi sp, sp, 16 ; RV64F-NEXT: addi sp, sp, 16
; RV64F-NEXT: ret ; RV64F-NEXT: ret
; ;
; RV64FD-LABEL: bitcast_double_xor: ; RV64FD-LABEL: bitcast_double_xor:
; RV64FD: # %bb.0: ; RV64FD: # %bb.0:
; RV64FD-NEXT: fmv.d.x ft0, a1 ; RV64FD-NEXT: fmv.d.x ft0, a1
; RV64FD-NEXT: fmv.d.x ft1, a0 ; RV64FD-NEXT: fmv.d.x ft1, a0
; RV64FD-NEXT: fmul.d ft0, ft1, ft0 ; RV64FD-NEXT: fmul.d ft0, ft1, ft0
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; RV32F-NEXT: mv s1, a0 ; RV32F-NEXT: mv s1, a0
; RV32F-NEXT: call __muldf3@plt ; RV32F-NEXT: call __muldf3@plt
; RV32F-NEXT: mv a2, a0 ; RV32F-NEXT: mv a2, a0
; RV32F-NEXT: lui a0, 524288 ; RV32F-NEXT: lui a0, 524288
; RV32F-NEXT: or a3, a1, a0 ; RV32F-NEXT: or a3, a1, a0
; RV32F-NEXT: mv a0, s1 ; RV32F-NEXT: mv a0, s1
; RV32F-NEXT: mv a1, s0 ; RV32F-NEXT: mv a1, s0
; RV32F-NEXT: call __muldf3@plt ; RV32F-NEXT: call __muldf3@plt
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32F-NEXT: addi sp, sp, 16 ; RV32F-NEXT: addi sp, sp, 16
; RV32F-NEXT: ret ; RV32F-NEXT: ret
; ;
; RV32FD-LABEL: bitcast_double_or: ; RV32FD-LABEL: bitcast_double_or:
; RV32FD: # %bb.0: ; RV32FD: # %bb.0:
; RV32FD-NEXT: addi sp, sp, -16 ; RV32FD-NEXT: addi sp, sp, -16
; RV32FD-NEXT: sw a2, 8(sp) ; RV32FD-NEXT: sw a2, 8(sp)
; RV32FD-NEXT: sw a3, 12(sp) ; RV32FD-NEXT: sw a3, 12(sp)
Show All 18 Lines
; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64F-NEXT: mv s0, a0 ; RV64F-NEXT: mv s0, a0
; RV64F-NEXT: call __muldf3@plt ; RV64F-NEXT: call __muldf3@plt
; RV64F-NEXT: li a1, -1 ; RV64F-NEXT: li a1, -1
; RV64F-NEXT: slli a1, a1, 63 ; RV64F-NEXT: slli a1, a1, 63
; RV64F-NEXT: or a1, a0, a1 ; RV64F-NEXT: or a1, a0, a1
; RV64F-NEXT: mv a0, s0 ; RV64F-NEXT: mv a0, s0
; RV64F-NEXT: call __muldf3@plt ; RV64F-NEXT: call __muldf3@plt
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64F-NEXT: addi sp, sp, 16 ; RV64F-NEXT: addi sp, sp, 16
; RV64F-NEXT: ret ; RV64F-NEXT: ret
; ;
; RV64FD-LABEL: bitcast_double_or: ; RV64FD-LABEL: bitcast_double_or:
; RV64FD: # %bb.0: ; RV64FD: # %bb.0:
; RV64FD-NEXT: fmv.d.x ft0, a1 ; RV64FD-NEXT: fmv.d.x ft0, a1
; RV64FD-NEXT: fmv.d.x ft1, a0 ; RV64FD-NEXT: fmv.d.x ft1, a0
; RV64FD-NEXT: fmul.d ft0, ft1, ft0 ; RV64FD-NEXT: fmul.d ft0, ft1, ft0
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llvm/test/CodeGen/RISCV/float-br-fcmp.ll

Show First 20 Lines • Show All 662 Lines • ▼ Show 20 Lines
; RV64IF-NEXT: mv a0, s0 ; RV64IF-NEXT: mv a0, s0
; RV64IF-NEXT: call dummy@plt ; RV64IF-NEXT: call dummy@plt
; RV64IF-NEXT: fmv.w.x ft0, a0 ; RV64IF-NEXT: fmv.w.x ft0, a0
; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload ; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
; RV64IF-NEXT: feq.s a0, ft0, ft1 ; RV64IF-NEXT: feq.s a0, ft0, ft1
; RV64IF-NEXT: beqz a0, .LBB17_3 ; RV64IF-NEXT: beqz a0, .LBB17_3
; RV64IF-NEXT: # %bb.2: # %if.end4 ; RV64IF-NEXT: # %bb.2: # %if.end4
; RV64IF-NEXT: li a0, 0 ; RV64IF-NEXT: li a0, 0
; RV64IF-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64IF-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IF-NEXT: addi sp, sp, 32 ; RV64IF-NEXT: addi sp, sp, 32
; RV64IF-NEXT: ret ; RV64IF-NEXT: ret
; RV64IF-NEXT: .LBB17_3: # %if.then ; RV64IF-NEXT: .LBB17_3: # %if.then
; RV64IF-NEXT: call abort@plt ; RV64IF-NEXT: call abort@plt
entry: entry:
%call = call float @dummy(float 0.000000e+00) %call = call float @dummy(float 0.000000e+00)
%cmp = fcmp une float %call, 0.000000e+00 %cmp = fcmp une float %call, 0.000000e+00
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
Show All 17 Lines

llvm/test/CodeGen/RISCV/float-convert.ll

Show First 20 Lines • Show All 101 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: bne a0, s1, .LBB1_6 ; RV32I-NEXT: bne a0, s1, .LBB1_6
; RV32I-NEXT: # %bb.5: # %start ; RV32I-NEXT: # %bb.5: # %start
; RV32I-NEXT: mv s1, s3 ; RV32I-NEXT: mv s1, s3
; RV32I-NEXT: .LBB1_6: # %start ; RV32I-NEXT: .LBB1_6: # %start
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_w_s_sat: ; RV64I-LABEL: fcvt_w_s_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 25 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: bne a0, s1, .LBB1_6 ; RV64I-NEXT: bne a0, s1, .LBB1_6
; RV64I-NEXT: # %bb.5: # %start ; RV64I-NEXT: # %bb.5: # %start
; RV64I-NEXT: mv s1, s3 ; RV64I-NEXT: mv s1, s3
; RV64I-NEXT: .LBB1_6: # %start ; RV64I-NEXT: .LBB1_6: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i32 @llvm.fptosi.sat.i32.f32(float %a) %0 = tail call i32 @llvm.fptosi.sat.i32.f32(float %a)
ret i32 %0 ret i32 %0
} }
declare i32 @llvm.fptosi.sat.i32.f32(float) declare i32 @llvm.fptosi.sat.i32.f32(float)
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; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call __gtsf2@plt ; RV32I-NEXT: call __gtsf2@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: li a0, -1 ; RV32I-NEXT: li a0, -1
; RV32I-NEXT: bgtz a1, .LBB4_4 ; RV32I-NEXT: bgtz a1, .LBB4_4
; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: # %bb.3: # %start
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: .LBB4_4: # %start ; RV32I-NEXT: .LBB4_4: # %start
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_wu_s_sat: ; RV64I-LABEL: fcvt_wu_s_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 15 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: call __gtsf2@plt
; RV64I-NEXT: blez a0, .LBB4_4 ; RV64I-NEXT: blez a0, .LBB4_4
; RV64I-NEXT: # %bb.3: ; RV64I-NEXT: # %bb.3:
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: srli s1, a0, 32 ; RV64I-NEXT: srli s1, a0, 32
; RV64I-NEXT: .LBB4_4: # %start ; RV64I-NEXT: .LBB4_4: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i32 @llvm.fptoui.sat.i32.f32(float %a) %0 = tail call i32 @llvm.fptoui.sat.i32.f32(float %a)
ret i32 %0 ret i32 %0
} }
declare i32 @llvm.fptoui.sat.i32.f32(float) declare i32 @llvm.fptoui.sat.i32.f32(float)
▲ Show 20 Lines • Show All 295 Lines • ▼ Show 20 Lines
; RV32IF-NEXT: beqz s0, .LBB12_11 ; RV32IF-NEXT: beqz s0, .LBB12_11
; RV32IF-NEXT: .LBB12_5: # %start ; RV32IF-NEXT: .LBB12_5: # %start
; RV32IF-NEXT: bnez a3, .LBB12_12 ; RV32IF-NEXT: bnez a3, .LBB12_12
; RV32IF-NEXT: .LBB12_6: # %start ; RV32IF-NEXT: .LBB12_6: # %start
; RV32IF-NEXT: bnez a2, .LBB12_8 ; RV32IF-NEXT: bnez a2, .LBB12_8
; RV32IF-NEXT: .LBB12_7: # %start ; RV32IF-NEXT: .LBB12_7: # %start
; RV32IF-NEXT: li a1, 0 ; RV32IF-NEXT: li a1, 0
; RV32IF-NEXT: .LBB12_8: # %start ; RV32IF-NEXT: .LBB12_8: # %start
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; RV32IF-NEXT: .LBB12_9: # %start ; RV32IF-NEXT: .LBB12_9: # %start
; RV32IF-NEXT: mv a0, a2 ; RV32IF-NEXT: mv a0, a2
; RV32IF-NEXT: feq.s a2, ft0, ft0 ; RV32IF-NEXT: feq.s a2, ft0, ft0
; RV32IF-NEXT: bnez a2, .LBB12_4 ; RV32IF-NEXT: bnez a2, .LBB12_4
; RV32IF-NEXT: .LBB12_10: # %start ; RV32IF-NEXT: .LBB12_10: # %start
; RV32IF-NEXT: li a0, 0 ; RV32IF-NEXT: li a0, 0
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; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: bne a0, s1, .LBB12_12 ; RV32I-NEXT: bne a0, s1, .LBB12_12
; RV32I-NEXT: # %bb.11: # %start ; RV32I-NEXT: # %bb.11: # %start
; RV32I-NEXT: mv s1, s5 ; RV32I-NEXT: mv s1, s5
; RV32I-NEXT: .LBB12_12: # %start ; RV32I-NEXT: .LBB12_12: # %start
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_l_s_sat: ; RV64I-LABEL: fcvt_l_s_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 27 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: bne a0, s1, .LBB12_7 ; RV64I-NEXT: bne a0, s1, .LBB12_7
; RV64I-NEXT: # %bb.6: # %start ; RV64I-NEXT: # %bb.6: # %start
; RV64I-NEXT: mv s1, s2 ; RV64I-NEXT: mv s1, s2
; RV64I-NEXT: .LBB12_7: # %start ; RV64I-NEXT: .LBB12_7: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i64 @llvm.fptosi.sat.i64.f32(float %a) %0 = tail call i64 @llvm.fptosi.sat.i64.f32(float %a)
ret i64 %0 ret i64 %0
} }
declare i64 @llvm.fptosi.sat.i64.f32(float) declare i64 @llvm.fptosi.sat.i64.f32(float)
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV32IF-NEXT: # %bb.3: # %start ; RV32IF-NEXT: # %bb.3: # %start
; RV32IF-NEXT: beqz s0, .LBB14_8 ; RV32IF-NEXT: beqz s0, .LBB14_8
; RV32IF-NEXT: .LBB14_4: # %start ; RV32IF-NEXT: .LBB14_4: # %start
; RV32IF-NEXT: bnez a4, .LBB14_6 ; RV32IF-NEXT: bnez a4, .LBB14_6
; RV32IF-NEXT: .LBB14_5: # %start ; RV32IF-NEXT: .LBB14_5: # %start
; RV32IF-NEXT: mv a2, a1 ; RV32IF-NEXT: mv a2, a1
; RV32IF-NEXT: .LBB14_6: # %start ; RV32IF-NEXT: .LBB14_6: # %start
; RV32IF-NEXT: mv a1, a2 ; RV32IF-NEXT: mv a1, a2
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; RV32IF-NEXT: .LBB14_7: # %start ; RV32IF-NEXT: .LBB14_7: # %start
; RV32IF-NEXT: mv a0, a3 ; RV32IF-NEXT: mv a0, a3
; RV32IF-NEXT: bnez s0, .LBB14_4 ; RV32IF-NEXT: bnez s0, .LBB14_4
; RV32IF-NEXT: .LBB14_8: # %start ; RV32IF-NEXT: .LBB14_8: # %start
; RV32IF-NEXT: li a1, 0 ; RV32IF-NEXT: li a1, 0
; RV32IF-NEXT: beqz a4, .LBB14_5 ; RV32IF-NEXT: beqz a4, .LBB14_5
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; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call __gtsf2@plt ; RV32I-NEXT: call __gtsf2@plt
; RV32I-NEXT: bgtz a0, .LBB14_8 ; RV32I-NEXT: bgtz a0, .LBB14_8
; RV32I-NEXT: # %bb.7: # %start ; RV32I-NEXT: # %bb.7: # %start
; RV32I-NEXT: mv s3, s5 ; RV32I-NEXT: mv s3, s5
; RV32I-NEXT: .LBB14_8: # %start ; RV32I-NEXT: .LBB14_8: # %start
; RV32I-NEXT: mv a0, s4 ; RV32I-NEXT: mv a0, s4
; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: mv a1, s3
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_lu_s_sat: ; RV64I-LABEL: fcvt_lu_s_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 15 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: call __gtsf2@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: bgtz a1, .LBB14_4 ; RV64I-NEXT: bgtz a1, .LBB14_4
; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: # %bb.3: # %start
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: .LBB14_4: # %start ; RV64I-NEXT: .LBB14_4: # %start
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i64 @llvm.fptoui.sat.i64.f32(float %a) %0 = tail call i64 @llvm.fptoui.sat.i64.f32(float %a)
ret i64 %0 ret i64 %0
} }
declare i64 @llvm.fptoui.sat.i64.f32(float) declare i64 @llvm.fptoui.sat.i64.f32(float)
▲ Show 20 Lines • Show All 234 Lines • ▼ Show 20 Lines
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: .cfi_offset s1, -12 ; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: addi s1, a0, 1 ; RV32I-NEXT: addi s1, a0, 1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __floatsisf@plt ; RV32I-NEXT: call __floatsisf@plt
; RV32I-NEXT: sw a0, 0(s0) ; RV32I-NEXT: sw a0, 0(s0)
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_s_w_demanded_bits: ; RV64I-LABEL: fcvt_s_w_demanded_bits:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: .cfi_offset s1, -24 ; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: addiw s1, a0, 1 ; RV64I-NEXT: addiw s1, a0, 1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __floatsisf@plt ; RV64I-NEXT: call __floatsisf@plt
; RV64I-NEXT: sw a0, 0(s0) ; RV64I-NEXT: sw a0, 0(s0)
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%3 = add i32 %0, 1 %3 = add i32 %0, 1
%4 = sitofp i32 %3 to float %4 = sitofp i32 %3 to float
store float %4, float* %1, align 4 store float %4, float* %1, align 4
ret i32 %3 ret i32 %3
} }
Show All 24 Lines
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: .cfi_offset s1, -12 ; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: addi s1, a0, 1 ; RV32I-NEXT: addi s1, a0, 1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __floatunsisf@plt ; RV32I-NEXT: call __floatunsisf@plt
; RV32I-NEXT: sw a0, 0(s0) ; RV32I-NEXT: sw a0, 0(s0)
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_s_wu_demanded_bits: ; RV64I-LABEL: fcvt_s_wu_demanded_bits:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: .cfi_offset s1, -24 ; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: addiw s1, a0, 1 ; RV64I-NEXT: addiw s1, a0, 1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __floatunsisf@plt ; RV64I-NEXT: call __floatunsisf@plt
; RV64I-NEXT: sw a0, 0(s0) ; RV64I-NEXT: sw a0, 0(s0)
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%3 = add i32 %0, 1 %3 = add i32 %0, 1
%4 = uitofp i32 %3 to float %4 = uitofp i32 %3 to float
store float %4, float* %1, align 4 store float %4, float* %1, align 4
ret i32 %3 ret i32 %3
} }

llvm/test/CodeGen/RISCV/float-fcmp.ll

Show First 20 Lines • Show All 259 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: call __eqsf2@plt ; RV32I-NEXT: call __eqsf2@plt
; RV32I-NEXT: snez s2, a0 ; RV32I-NEXT: snez s2, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: seqz a0, a0 ; RV32I-NEXT: seqz a0, a0
; RV32I-NEXT: and a0, a0, s2 ; RV32I-NEXT: and a0, a0, s2
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcmp_one: ; RV64I-LABEL: fcmp_one:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: call __eqsf2@plt ; RV64I-NEXT: call __eqsf2@plt
; RV64I-NEXT: snez s2, a0 ; RV64I-NEXT: snez s2, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: seqz a0, a0 ; RV64I-NEXT: seqz a0, a0
; RV64I-NEXT: and a0, a0, s2 ; RV64I-NEXT: and a0, a0, s2
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp one float %a, %b %1 = fcmp one float %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
define i32 @fcmp_ord(float %a, float %b) nounwind { define i32 @fcmp_ord(float %a, float %b) nounwind {
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; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: call __eqsf2@plt ; RV32I-NEXT: call __eqsf2@plt
; RV32I-NEXT: seqz s2, a0 ; RV32I-NEXT: seqz s2, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: snez a0, a0 ; RV32I-NEXT: snez a0, a0
; RV32I-NEXT: or a0, a0, s2 ; RV32I-NEXT: or a0, a0, s2
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcmp_ueq: ; RV64I-LABEL: fcmp_ueq:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: call __eqsf2@plt ; RV64I-NEXT: call __eqsf2@plt
; RV64I-NEXT: seqz s2, a0 ; RV64I-NEXT: seqz s2, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: snez a0, a0 ; RV64I-NEXT: snez a0, a0
; RV64I-NEXT: or a0, a0, s2 ; RV64I-NEXT: or a0, a0, s2
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp ueq float %a, %b %1 = fcmp ueq float %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
define i32 @fcmp_ugt(float %a, float %b) nounwind { define i32 @fcmp_ugt(float %a, float %b) nounwind {
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llvm/test/CodeGen/RISCV/float-intrinsics.ll

Show First 20 Lines • Show All 189 Lines • ▼ Show 20 Lines
; RV32IF-NEXT: fmv.w.x ft0, a0 ; RV32IF-NEXT: fmv.w.x ft0, a0
; RV32IF-NEXT: fsw ft0, 4(sp) # 4-byte Folded Spill ; RV32IF-NEXT: fsw ft0, 4(sp) # 4-byte Folded Spill
; RV32IF-NEXT: mv a0, s0 ; RV32IF-NEXT: mv a0, s0
; RV32IF-NEXT: call cosf@plt ; RV32IF-NEXT: call cosf@plt
; RV32IF-NEXT: fmv.w.x ft0, a0 ; RV32IF-NEXT: fmv.w.x ft0, a0
; RV32IF-NEXT: flw ft1, 4(sp) # 4-byte Folded Reload ; RV32IF-NEXT: flw ft1, 4(sp) # 4-byte Folded Reload
; RV32IF-NEXT: fadd.s ft0, ft1, ft0 ; RV32IF-NEXT: fadd.s ft0, ft1, ft0
; RV32IF-NEXT: fmv.x.w a0, ft0 ; RV32IF-NEXT: fmv.x.w a0, ft0
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; ;
; RV64IF-LABEL: sincos_f32: ; RV64IF-LABEL: sincos_f32:
; RV64IF: # %bb.0: ; RV64IF: # %bb.0:
; RV64IF-NEXT: addi sp, sp, -32 ; RV64IF-NEXT: addi sp, sp, -32
; RV64IF-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64IF-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64IF-NEXT: mv s0, a0 ; RV64IF-NEXT: mv s0, a0
; RV64IF-NEXT: call sinf@plt ; RV64IF-NEXT: call sinf@plt
; RV64IF-NEXT: fmv.w.x ft0, a0 ; RV64IF-NEXT: fmv.w.x ft0, a0
; RV64IF-NEXT: fsw ft0, 12(sp) # 4-byte Folded Spill ; RV64IF-NEXT: fsw ft0, 12(sp) # 4-byte Folded Spill
; RV64IF-NEXT: mv a0, s0 ; RV64IF-NEXT: mv a0, s0
; RV64IF-NEXT: call cosf@plt ; RV64IF-NEXT: call cosf@plt
; RV64IF-NEXT: fmv.w.x ft0, a0 ; RV64IF-NEXT: fmv.w.x ft0, a0
; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload ; RV64IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
; RV64IF-NEXT: fadd.s ft0, ft1, ft0 ; RV64IF-NEXT: fadd.s ft0, ft1, ft0
; RV64IF-NEXT: fmv.x.w a0, ft0 ; RV64IF-NEXT: fmv.x.w a0, ft0
; RV64IF-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64IF-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IF-NEXT: addi sp, sp, 32 ; RV64IF-NEXT: addi sp, sp, 32
; RV64IF-NEXT: ret ; RV64IF-NEXT: ret
; ;
; RV32I-LABEL: sincos_f32: ; RV32I-LABEL: sincos_f32:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: call sinf@plt ; RV32I-NEXT: call sinf@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call cosf@plt ; RV32I-NEXT: call cosf@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: sincos_f32: ; RV64I-LABEL: sincos_f32:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: call sinf@plt ; RV64I-NEXT: call sinf@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call cosf@plt ; RV64I-NEXT: call cosf@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call float @llvm.sin.f32(float %a) %1 = call float @llvm.sin.f32(float %a)
%2 = call float @llvm.cos.f32(float %a) %2 = call float @llvm.cos.f32(float %a)
%3 = fadd float %1, %2 %3 = fadd float %1, %2
ret float %3 ret float %3
} }
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; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: mv s0, a2 ; RV32I-NEXT: mv s0, a2
; RV32I-NEXT: call __mulsf3@plt ; RV32I-NEXT: call __mulsf3@plt
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmuladd_f32: ; RV64I-LABEL: fmuladd_f32:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s0, a2 ; RV64I-NEXT: mv s0, a2
; RV64I-NEXT: call __mulsf3@plt ; RV64I-NEXT: call __mulsf3@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c) %1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
ret float %1 ret float %1
} }
declare float @llvm.fabs.f32(float) declare float @llvm.fabs.f32(float)
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llvm/test/CodeGen/RISCV/fp16-promote.ll

Show First 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; CHECK-LABEL: test_fptrunc_float: ; CHECK-LABEL: test_fptrunc_float:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-NEXT: mv s0, a0 ; CHECK-NEXT: mv s0, a0
; CHECK-NEXT: call __gnu_f2h_ieee@plt ; CHECK-NEXT: call __gnu_f2h_ieee@plt
; CHECK-NEXT: sh a0, 0(s0) ; CHECK-NEXT: sh a0, 0(s0)
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 16 ; CHECK-NEXT: addi sp, sp, 16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%a = fptrunc float %f to half %a = fptrunc float %f to half
store half %a, half* %p store half %a, half* %p
ret void ret void
} }
define void @test_fptrunc_double(double %d, half* %p) nounwind { define void @test_fptrunc_double(double %d, half* %p) nounwind {
; CHECK-LABEL: test_fptrunc_double: ; CHECK-LABEL: test_fptrunc_double:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -16 ; CHECK-NEXT: addi sp, sp, -16
; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-NEXT: mv s0, a0 ; CHECK-NEXT: mv s0, a0
; CHECK-NEXT: call __truncdfhf2@plt ; CHECK-NEXT: call __truncdfhf2@plt
; CHECK-NEXT: sh a0, 0(s0) ; CHECK-NEXT: sh a0, 0(s0)
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 16 ; CHECK-NEXT: addi sp, sp, 16
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%a = fptrunc double %d to half %a = fptrunc double %d to half
store half %a, half* %p store half %a, half* %p
ret void ret void
} }
define void @test_fadd(half* %p, half* %q) nounwind { define void @test_fadd(half* %p, half* %q) nounwind {
Show All 9 Lines
; CHECK-NEXT: lhu a0, 0(a1) ; CHECK-NEXT: lhu a0, 0(a1)
; CHECK-NEXT: call __gnu_h2f_ieee@plt ; CHECK-NEXT: call __gnu_h2f_ieee@plt
; CHECK-NEXT: fmv.s fs0, fa0 ; CHECK-NEXT: fmv.s fs0, fa0
; CHECK-NEXT: mv a0, s1 ; CHECK-NEXT: mv a0, s1
; CHECK-NEXT: call __gnu_h2f_ieee@plt ; CHECK-NEXT: call __gnu_h2f_ieee@plt
; CHECK-NEXT: fadd.s fa0, fa0, fs0 ; CHECK-NEXT: fadd.s fa0, fa0, fs0
; CHECK-NEXT: call __gnu_f2h_ieee@plt ; CHECK-NEXT: call __gnu_f2h_ieee@plt
; CHECK-NEXT: sh a0, 0(s0) ; CHECK-NEXT: sh a0, 0(s0)
; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%a = load half, half* %p %a = load half, half* %p
%b = load half, half* %q %b = load half, half* %q
%r = fadd half %a, %b %r = fadd half %a, %b
store half %r, half* %p store half %r, half* %p
ret void ret void
} }
Show All 11 Lines
; CHECK-NEXT: lhu a0, 0(a1) ; CHECK-NEXT: lhu a0, 0(a1)
; CHECK-NEXT: call __gnu_h2f_ieee@plt ; CHECK-NEXT: call __gnu_h2f_ieee@plt
; CHECK-NEXT: fmv.s fs0, fa0 ; CHECK-NEXT: fmv.s fs0, fa0
; CHECK-NEXT: mv a0, s1 ; CHECK-NEXT: mv a0, s1
; CHECK-NEXT: call __gnu_h2f_ieee@plt ; CHECK-NEXT: call __gnu_h2f_ieee@plt
; CHECK-NEXT: fmul.s fa0, fa0, fs0 ; CHECK-NEXT: fmul.s fa0, fa0, fs0
; CHECK-NEXT: call __gnu_f2h_ieee@plt ; CHECK-NEXT: call __gnu_f2h_ieee@plt
; CHECK-NEXT: sh a0, 0(s0) ; CHECK-NEXT: sh a0, 0(s0)
; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; CHECK-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; CHECK-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%a = load half, half* %p %a = load half, half* %p
%b = load half, half* %q %b = load half, half* %q
%r = fmul half %a, %b %r = fmul half %a, %b
store half %r, half* %p store half %r, half* %p
ret void ret void
} }

llvm/test/CodeGen/RISCV/frame-info.ll

Show All 21 Lines
; RV32-WITHFP-NEXT: addi sp, sp, -16 ; RV32-WITHFP-NEXT: addi sp, sp, -16
; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16 ; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-WITHFP-NEXT: .cfi_offset ra, -4 ; RV32-WITHFP-NEXT: .cfi_offset ra, -4
; RV32-WITHFP-NEXT: .cfi_offset s0, -8 ; RV32-WITHFP-NEXT: .cfi_offset s0, -8
; RV32-WITHFP-NEXT: addi s0, sp, 16 ; RV32-WITHFP-NEXT: addi s0, sp, 16
; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: addi sp, sp, 16 ; RV32-WITHFP-NEXT: addi sp, sp, 16
; RV32-WITHFP-NEXT: ret ; RV32-WITHFP-NEXT: ret
; ;
; RV64-WITHFP-LABEL: trivial: ; RV64-WITHFP-LABEL: trivial:
; RV64-WITHFP: # %bb.0: ; RV64-WITHFP: # %bb.0:
; RV64-WITHFP-NEXT: addi sp, sp, -16 ; RV64-WITHFP-NEXT: addi sp, sp, -16
; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16 ; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16
; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64-WITHFP-NEXT: .cfi_offset ra, -8 ; RV64-WITHFP-NEXT: .cfi_offset ra, -8
; RV64-WITHFP-NEXT: .cfi_offset s0, -16 ; RV64-WITHFP-NEXT: .cfi_offset s0, -16
; RV64-WITHFP-NEXT: addi s0, sp, 16 ; RV64-WITHFP-NEXT: addi s0, sp, 16
; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: addi sp, sp, 16 ; RV64-WITHFP-NEXT: addi sp, sp, 16
; RV64-WITHFP-NEXT: ret ; RV64-WITHFP-NEXT: ret
ret void ret void
} }
define void @stack_alloc(i32 signext %size) { define void @stack_alloc(i32 signext %size) {
; RV32-LABEL: stack_alloc: ; RV32-LABEL: stack_alloc:
; RV32: # %bb.0: # %entry ; RV32: # %bb.0: # %entry
; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: addi sp, sp, -16
; RV32-NEXT: .cfi_def_cfa_offset 16 ; RV32-NEXT: .cfi_def_cfa_offset 16
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-NEXT: .cfi_offset ra, -4 ; RV32-NEXT: .cfi_offset ra, -4
; RV32-NEXT: .cfi_offset s0, -8 ; RV32-NEXT: .cfi_offset s0, -8
; RV32-NEXT: addi s0, sp, 16 ; RV32-NEXT: addi s0, sp, 16
; RV32-NEXT: .cfi_def_cfa s0, 0 ; RV32-NEXT: .cfi_def_cfa s0, 0
; RV32-NEXT: addi a0, a0, 15 ; RV32-NEXT: addi a0, a0, 15
; RV32-NEXT: andi a0, a0, -16 ; RV32-NEXT: andi a0, a0, -16
; RV32-NEXT: sub a0, sp, a0 ; RV32-NEXT: sub a0, sp, a0
; RV32-NEXT: mv sp, a0 ; RV32-NEXT: mv sp, a0
; RV32-NEXT: call callee_with_args@plt ; RV32-NEXT: call callee_with_args@plt
; RV32-NEXT: addi sp, s0, -16 ; RV32-NEXT: addi sp, s0, -16
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: stack_alloc: ; RV64-LABEL: stack_alloc:
; RV64: # %bb.0: # %entry ; RV64: # %bb.0: # %entry
; RV64-NEXT: addi sp, sp, -16 ; RV64-NEXT: addi sp, sp, -16
; RV64-NEXT: .cfi_def_cfa_offset 16 ; RV64-NEXT: .cfi_def_cfa_offset 16
; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64-NEXT: .cfi_offset ra, -8 ; RV64-NEXT: .cfi_offset ra, -8
; RV64-NEXT: .cfi_offset s0, -16 ; RV64-NEXT: .cfi_offset s0, -16
; RV64-NEXT: addi s0, sp, 16 ; RV64-NEXT: addi s0, sp, 16
; RV64-NEXT: .cfi_def_cfa s0, 0 ; RV64-NEXT: .cfi_def_cfa s0, 0
; RV64-NEXT: slli a0, a0, 32 ; RV64-NEXT: slli a0, a0, 32
; RV64-NEXT: srli a0, a0, 32 ; RV64-NEXT: srli a0, a0, 32
; RV64-NEXT: addi a0, a0, 15 ; RV64-NEXT: addi a0, a0, 15
; RV64-NEXT: andi a0, a0, -16 ; RV64-NEXT: andi a0, a0, -16
; RV64-NEXT: sub a0, sp, a0 ; RV64-NEXT: sub a0, sp, a0
; RV64-NEXT: mv sp, a0 ; RV64-NEXT: mv sp, a0
; RV64-NEXT: call callee_with_args@plt ; RV64-NEXT: call callee_with_args@plt
; RV64-NEXT: addi sp, s0, -16 ; RV64-NEXT: addi sp, s0, -16
; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 16 ; RV64-NEXT: addi sp, sp, 16
; RV64-NEXT: ret ; RV64-NEXT: ret
; ;
; RV32-WITHFP-LABEL: stack_alloc: ; RV32-WITHFP-LABEL: stack_alloc:
; RV32-WITHFP: # %bb.0: # %entry ; RV32-WITHFP: # %bb.0: # %entry
; RV32-WITHFP-NEXT: addi sp, sp, -16 ; RV32-WITHFP-NEXT: addi sp, sp, -16
; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16 ; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-WITHFP-NEXT: .cfi_offset ra, -4 ; RV32-WITHFP-NEXT: .cfi_offset ra, -4
; RV32-WITHFP-NEXT: .cfi_offset s0, -8 ; RV32-WITHFP-NEXT: .cfi_offset s0, -8
; RV32-WITHFP-NEXT: addi s0, sp, 16 ; RV32-WITHFP-NEXT: addi s0, sp, 16
; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32-WITHFP-NEXT: addi a0, a0, 15 ; RV32-WITHFP-NEXT: addi a0, a0, 15
; RV32-WITHFP-NEXT: andi a0, a0, -16 ; RV32-WITHFP-NEXT: andi a0, a0, -16
; RV32-WITHFP-NEXT: sub a0, sp, a0 ; RV32-WITHFP-NEXT: sub a0, sp, a0
; RV32-WITHFP-NEXT: mv sp, a0 ; RV32-WITHFP-NEXT: mv sp, a0
; RV32-WITHFP-NEXT: call callee_with_args@plt ; RV32-WITHFP-NEXT: call callee_with_args@plt
; RV32-WITHFP-NEXT: addi sp, s0, -16 ; RV32-WITHFP-NEXT: addi sp, s0, -16
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: addi sp, sp, 16 ; RV32-WITHFP-NEXT: addi sp, sp, 16
; RV32-WITHFP-NEXT: ret ; RV32-WITHFP-NEXT: ret
; ;
; RV64-WITHFP-LABEL: stack_alloc: ; RV64-WITHFP-LABEL: stack_alloc:
; RV64-WITHFP: # %bb.0: # %entry ; RV64-WITHFP: # %bb.0: # %entry
; RV64-WITHFP-NEXT: addi sp, sp, -16 ; RV64-WITHFP-NEXT: addi sp, sp, -16
; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16 ; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16
; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64-WITHFP-NEXT: .cfi_offset ra, -8 ; RV64-WITHFP-NEXT: .cfi_offset ra, -8
; RV64-WITHFP-NEXT: .cfi_offset s0, -16 ; RV64-WITHFP-NEXT: .cfi_offset s0, -16
; RV64-WITHFP-NEXT: addi s0, sp, 16 ; RV64-WITHFP-NEXT: addi s0, sp, 16
; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV64-WITHFP-NEXT: slli a0, a0, 32 ; RV64-WITHFP-NEXT: slli a0, a0, 32
; RV64-WITHFP-NEXT: srli a0, a0, 32 ; RV64-WITHFP-NEXT: srli a0, a0, 32
; RV64-WITHFP-NEXT: addi a0, a0, 15 ; RV64-WITHFP-NEXT: addi a0, a0, 15
; RV64-WITHFP-NEXT: andi a0, a0, -16 ; RV64-WITHFP-NEXT: andi a0, a0, -16
; RV64-WITHFP-NEXT: sub a0, sp, a0 ; RV64-WITHFP-NEXT: sub a0, sp, a0
; RV64-WITHFP-NEXT: mv sp, a0 ; RV64-WITHFP-NEXT: mv sp, a0
; RV64-WITHFP-NEXT: call callee_with_args@plt ; RV64-WITHFP-NEXT: call callee_with_args@plt
; RV64-WITHFP-NEXT: addi sp, s0, -16 ; RV64-WITHFP-NEXT: addi sp, s0, -16
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: addi sp, sp, 16 ; RV64-WITHFP-NEXT: addi sp, sp, 16
; RV64-WITHFP-NEXT: ret ; RV64-WITHFP-NEXT: ret
entry: entry:
%0 = alloca i8, i32 %size, align 16 %0 = alloca i8, i32 %size, align 16
call void @callee_with_args(i8* nonnull %0) call void @callee_with_args(i8* nonnull %0)
ret void ret void
} }
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16 ; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-WITHFP-NEXT: .cfi_offset ra, -4 ; RV32-WITHFP-NEXT: .cfi_offset ra, -4
; RV32-WITHFP-NEXT: .cfi_offset s0, -8 ; RV32-WITHFP-NEXT: .cfi_offset s0, -8
; RV32-WITHFP-NEXT: addi s0, sp, 16 ; RV32-WITHFP-NEXT: addi s0, sp, 16
; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32-WITHFP-NEXT: call callee2@plt ; RV32-WITHFP-NEXT: call callee2@plt
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: addi sp, sp, 16 ; RV32-WITHFP-NEXT: addi sp, sp, 16
; RV32-WITHFP-NEXT: ret ; RV32-WITHFP-NEXT: ret
; ;
; RV64-WITHFP-LABEL: branch_and_tail_call: ; RV64-WITHFP-LABEL: branch_and_tail_call:
; RV64-WITHFP: # %bb.0: ; RV64-WITHFP: # %bb.0:
; RV64-WITHFP-NEXT: andi a0, a0, 1 ; RV64-WITHFP-NEXT: andi a0, a0, 1
; RV64-WITHFP-NEXT: beqz a0, .LBB2_2 ; RV64-WITHFP-NEXT: beqz a0, .LBB2_2
; RV64-WITHFP-NEXT: # %bb.1: # %blue_pill ; RV64-WITHFP-NEXT: # %bb.1: # %blue_pill
; RV64-WITHFP-NEXT: tail callee1@plt ; RV64-WITHFP-NEXT: tail callee1@plt
; RV64-WITHFP-NEXT: .LBB2_2: # %red_pill ; RV64-WITHFP-NEXT: .LBB2_2: # %red_pill
; RV64-WITHFP-NEXT: addi sp, sp, -16 ; RV64-WITHFP-NEXT: addi sp, sp, -16
; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16 ; RV64-WITHFP-NEXT: .cfi_def_cfa_offset 16
; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64-WITHFP-NEXT: .cfi_offset ra, -8 ; RV64-WITHFP-NEXT: .cfi_offset ra, -8
; RV64-WITHFP-NEXT: .cfi_offset s0, -16 ; RV64-WITHFP-NEXT: .cfi_offset s0, -16
; RV64-WITHFP-NEXT: addi s0, sp, 16 ; RV64-WITHFP-NEXT: addi s0, sp, 16
; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV64-WITHFP-NEXT: call callee2@plt ; RV64-WITHFP-NEXT: call callee2@plt
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: addi sp, sp, 16 ; RV64-WITHFP-NEXT: addi sp, sp, 16
; RV64-WITHFP-NEXT: ret ; RV64-WITHFP-NEXT: ret
br i1 %a, label %blue_pill, label %red_pill br i1 %a, label %blue_pill, label %red_pill
blue_pill: blue_pill:
tail call void @callee1() tail call void @callee1()
ret void ret void
red_pill: red_pill:
call void @callee2() call void @callee2()
ret void ret void
} }
declare void @callee1() declare void @callee1()
declare void @callee2() declare void @callee2()
declare void @callee_with_args(i8*) declare void @callee_with_args(i8*)

llvm/test/CodeGen/RISCV/frame.ll

Show All 31 Lines
; RV32I-WITHFP-NEXT: sw zero, -16(s0) ; RV32I-WITHFP-NEXT: sw zero, -16(s0)
; RV32I-WITHFP-NEXT: sw zero, -20(s0) ; RV32I-WITHFP-NEXT: sw zero, -20(s0)
; RV32I-WITHFP-NEXT: sw zero, -24(s0) ; RV32I-WITHFP-NEXT: sw zero, -24(s0)
; RV32I-WITHFP-NEXT: sw zero, -28(s0) ; RV32I-WITHFP-NEXT: sw zero, -28(s0)
; RV32I-WITHFP-NEXT: sw zero, -32(s0) ; RV32I-WITHFP-NEXT: sw zero, -32(s0)
; RV32I-WITHFP-NEXT: addi a0, s0, -28 ; RV32I-WITHFP-NEXT: addi a0, s0, -28
; RV32I-WITHFP-NEXT: call test1@plt ; RV32I-WITHFP-NEXT: call test1@plt
; RV32I-WITHFP-NEXT: li a0, 0 ; RV32I-WITHFP-NEXT: li a0, 0
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 32 ; RV32I-WITHFP-NEXT: addi sp, sp, 32
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%key = alloca %struct.key_t, align 4 %key = alloca %struct.key_t, align 4
%1 = bitcast %struct.key_t* %key to i8* %1 = bitcast %struct.key_t* %key to i8*
call void @llvm.memset.p0i8.i64(i8* align 4 %1, i8 0, i64 20, i1 false) call void @llvm.memset.p0i8.i64(i8* align 4 %1, i8 0, i64 20, i1 false)
%2 = getelementptr inbounds %struct.key_t, %struct.key_t* %key, i64 0, i32 1, i64 0 %2 = getelementptr inbounds %struct.key_t, %struct.key_t* %key, i64 0, i32 1, i64 0
call void @test1(i8* %2) call void @test1(i8* %2)
ret i32 0 ret i32 0
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
declare void @test1(i8*) declare void @test1(i8*)

llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll

Show All 10 Lines
define i8* @test_frameaddress_0() nounwind { define i8* @test_frameaddress_0() nounwind {
; RV32I-LABEL: test_frameaddress_0: ; RV32I-LABEL: test_frameaddress_0:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: addi s0, sp, 16 ; RV32I-NEXT: addi s0, sp, 16
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_frameaddress_0: ; RV64I-LABEL: test_frameaddress_0:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: addi s0, sp, 16 ; RV64I-NEXT: addi s0, sp, 16
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call i8* @llvm.frameaddress(i32 0) %1 = call i8* @llvm.frameaddress(i32 0)
ret i8* %1 ret i8* %1
} }
define i8* @test_frameaddress_2() nounwind { define i8* @test_frameaddress_2() nounwind {
; RV32I-LABEL: test_frameaddress_2: ; RV32I-LABEL: test_frameaddress_2:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: addi s0, sp, 16 ; RV32I-NEXT: addi s0, sp, 16
; RV32I-NEXT: lw a0, -8(s0) ; RV32I-NEXT: lw a0, -8(s0)
; RV32I-NEXT: lw a0, -8(a0) ; RV32I-NEXT: lw a0, -8(a0)
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_frameaddress_2: ; RV64I-LABEL: test_frameaddress_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: addi s0, sp, 16 ; RV64I-NEXT: addi s0, sp, 16
; RV64I-NEXT: ld a0, -16(s0) ; RV64I-NEXT: ld a0, -16(s0)
; RV64I-NEXT: ld a0, -16(a0) ; RV64I-NEXT: ld a0, -16(a0)
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call i8* @llvm.frameaddress(i32 2) %1 = call i8* @llvm.frameaddress(i32 2)
ret i8* %1 ret i8* %1
} }
define i8* @test_frameaddress_3_alloca() nounwind { define i8* @test_frameaddress_3_alloca() nounwind {
; RV32I-LABEL: test_frameaddress_3_alloca: ; RV32I-LABEL: test_frameaddress_3_alloca:
; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -112 ; RV32I-NEXT: addi sp, sp, -112
; RV32I-NEXT: sw ra, 108(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 108(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 104(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 104(sp) # 4-byte Folded Spill
; RV32I-NEXT: addi s0, sp, 112 ; RV32I-NEXT: addi s0, sp, 112
; RV32I-NEXT: addi a0, s0, -108 ; RV32I-NEXT: addi a0, s0, -108
; RV32I-NEXT: call notdead@plt ; RV32I-NEXT: call notdead@plt
; RV32I-NEXT: lw a0, -8(s0) ; RV32I-NEXT: lw a0, -8(s0)
; RV32I-NEXT: lw a0, -8(a0) ; RV32I-NEXT: lw a0, -8(a0)
; RV32I-NEXT: lw a0, -8(a0) ; RV32I-NEXT: lw a0, -8(a0)
; RV32I-NEXT: lw s0, 104(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 108(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 108(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 104(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 112 ; RV32I-NEXT: addi sp, sp, 112
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_frameaddress_3_alloca: ; RV64I-LABEL: test_frameaddress_3_alloca:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -128 ; RV64I-NEXT: addi sp, sp, -128
; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill
; RV64I-NEXT: addi s0, sp, 128 ; RV64I-NEXT: addi s0, sp, 128
; RV64I-NEXT: addi a0, s0, -116 ; RV64I-NEXT: addi a0, s0, -116
; RV64I-NEXT: call notdead@plt ; RV64I-NEXT: call notdead@plt
; RV64I-NEXT: ld a0, -16(s0) ; RV64I-NEXT: ld a0, -16(s0)
; RV64I-NEXT: ld a0, -16(a0) ; RV64I-NEXT: ld a0, -16(a0)
; RV64I-NEXT: ld a0, -16(a0) ; RV64I-NEXT: ld a0, -16(a0)
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 128 ; RV64I-NEXT: addi sp, sp, 128
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca [100 x i8] %1 = alloca [100 x i8]
%2 = bitcast [100 x i8]* %1 to i8* %2 = bitcast [100 x i8]* %1 to i8*
call void @notdead(i8* %2) call void @notdead(i8* %2)
%3 = call i8* @llvm.frameaddress(i32 3) %3 = call i8* @llvm.frameaddress(i32 3)
ret i8* %3 ret i8* %3
} }
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; RV32I: # %bb.0: ; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-NEXT: addi s0, sp, 16 ; RV32I-NEXT: addi s0, sp, 16
; RV32I-NEXT: lw a0, -8(s0) ; RV32I-NEXT: lw a0, -8(s0)
; RV32I-NEXT: lw a0, -8(a0) ; RV32I-NEXT: lw a0, -8(a0)
; RV32I-NEXT: lw a0, -4(a0) ; RV32I-NEXT: lw a0, -4(a0)
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: test_returnaddress_2: ; RV64I-LABEL: test_returnaddress_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: addi s0, sp, 16 ; RV64I-NEXT: addi s0, sp, 16
; RV64I-NEXT: ld a0, -16(s0) ; RV64I-NEXT: ld a0, -16(s0)
; RV64I-NEXT: ld a0, -16(a0) ; RV64I-NEXT: ld a0, -16(a0)
; RV64I-NEXT: ld a0, -8(a0) ; RV64I-NEXT: ld a0, -8(a0)
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call i8* @llvm.returnaddress(i32 2) %1 = call i8* @llvm.returnaddress(i32 2)
ret i8* %1 ret i8* %1
} }

llvm/test/CodeGen/RISCV/half-arith.ll

Show All 36 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fadd_s: ; RV64I-LABEL: fadd_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fadd half %a, %b %1 = fadd half %a, %b
ret half %1 ret half %1
} }
define half @fsub_s(half %a, half %b) nounwind { define half @fsub_s(half %a, half %b) nounwind {
; RV32IZFH-LABEL: fsub_s: ; RV32IZFH-LABEL: fsub_s:
Show All 20 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fsub_s: ; RV64I-LABEL: fsub_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fsub half %a, %b %1 = fsub half %a, %b
ret half %1 ret half %1
} }
define half @fmul_s(half %a, half %b) nounwind { define half @fmul_s(half %a, half %b) nounwind {
; RV32IZFH-LABEL: fmul_s: ; RV32IZFH-LABEL: fmul_s:
Show All 20 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __mulsf3@plt ; RV32I-NEXT: call __mulsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmul_s: ; RV64I-LABEL: fmul_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __mulsf3@plt ; RV64I-NEXT: call __mulsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fmul half %a, %b %1 = fmul half %a, %b
ret half %1 ret half %1
} }
define half @fdiv_s(half %a, half %b) nounwind { define half @fdiv_s(half %a, half %b) nounwind {
; RV32IZFH-LABEL: fdiv_s: ; RV32IZFH-LABEL: fdiv_s:
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; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __divsf3@plt ; RV32I-NEXT: call __divsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fdiv_s: ; RV64I-LABEL: fdiv_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __divsf3@plt ; RV64I-NEXT: call __divsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fdiv half %a, %b %1 = fdiv half %a, %b
ret half %1 ret half %1
} }
declare half @llvm.sqrt.f16(half) declare half @llvm.sqrt.f16(half)
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; RV32I-NEXT: xor a0, s0, a0 ; RV32I-NEXT: xor a0, s0, a0
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: and a0, a0, s1 ; RV32I-NEXT: and a0, a0, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call __eqsf2@plt ; RV32I-NEXT: call __eqsf2@plt
; RV32I-NEXT: seqz a0, a0 ; RV32I-NEXT: seqz a0, a0
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fneg_s: ; RV64I-LABEL: fneg_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: xor a0, s0, a0 ; RV64I-NEXT: xor a0, s0, a0
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: and a0, a0, s1 ; RV64I-NEXT: and a0, a0, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __eqsf2@plt ; RV64I-NEXT: call __eqsf2@plt
; RV64I-NEXT: seqz a0, a0 ; RV64I-NEXT: seqz a0, a0
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fadd half %a, %a %1 = fadd half %a, %a
%2 = fneg half %1 %2 = fneg half %1
%3 = fcmp oeq half %1, %2 %3 = fcmp oeq half %1, %2
%4 = zext i1 %3 to i32 %4 = zext i1 %3 to i32
ret i32 %4 ret i32 %4
} }
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; RV32I-NEXT: xor a0, a0, a1 ; RV32I-NEXT: xor a0, a0, a1
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lui a1, 1048568 ; RV32I-NEXT: lui a1, 1048568
; RV32I-NEXT: and a0, a0, a1 ; RV32I-NEXT: and a0, a0, a1
; RV32I-NEXT: lui a1, 8 ; RV32I-NEXT: lui a1, 8
; RV32I-NEXT: addi a1, a1, -1 ; RV32I-NEXT: addi a1, a1, -1
; RV32I-NEXT: and a1, s2, a1 ; RV32I-NEXT: and a1, s2, a1
; RV32I-NEXT: or a0, a1, a0 ; RV32I-NEXT: or a0, a1, a0
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fsgnjn_s: ; RV64I-LABEL: fsgnjn_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
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; RV64I-NEXT: xor a0, a0, a1 ; RV64I-NEXT: xor a0, a0, a1
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: lui a1, 1048568 ; RV64I-NEXT: lui a1, 1048568
; RV64I-NEXT: and a0, a0, a1 ; RV64I-NEXT: and a0, a0, a1
; RV64I-NEXT: lui a1, 8 ; RV64I-NEXT: lui a1, 8
; RV64I-NEXT: addiw a1, a1, -1 ; RV64I-NEXT: addiw a1, a1, -1
; RV64I-NEXT: and a1, s2, a1 ; RV64I-NEXT: and a1, s2, a1
; RV64I-NEXT: or a0, a1, a0 ; RV64I-NEXT: or a0, a1, a0
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fadd half %a, %b %1 = fadd half %a, %b
%2 = fneg half %1 %2 = fneg half %1
%3 = call half @llvm.copysign.f16(half %a, half %2) %3 = call half @llvm.copysign.f16(half %a, half %2)
ret half %3 ret half %3
} }
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; RV32I-NEXT: addi a0, a0, -1 ; RV32I-NEXT: addi a0, a0, -1
; RV32I-NEXT: and a0, s0, a0 ; RV32I-NEXT: and a0, s0, a0
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: and a0, a0, s1 ; RV32I-NEXT: and a0, a0, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fabs_s: ; RV64I-LABEL: fabs_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 18 Lines
; RV64I-NEXT: addiw a0, a0, -1 ; RV64I-NEXT: addiw a0, a0, -1
; RV64I-NEXT: and a0, s0, a0 ; RV64I-NEXT: and a0, s0, a0
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: and a0, a0, s1 ; RV64I-NEXT: and a0, a0, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fadd half %a, %b %1 = fadd half %a, %b
%2 = call half @llvm.fabs.f16(half %1) %2 = call half @llvm.fabs.f16(half %1)
%3 = fadd half %2, %1 %3 = fadd half %2, %1
ret half %3 ret half %3
} }
Show All 24 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call fminf@plt ; RV32I-NEXT: call fminf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmin_s: ; RV64I-LABEL: fmin_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call fminf@plt ; RV64I-NEXT: call fminf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.minnum.f16(half %a, half %b) %1 = call half @llvm.minnum.f16(half %a, half %b)
ret half %1 ret half %1
} }
declare half @llvm.maxnum.f16(half, half) declare half @llvm.maxnum.f16(half, half)
Show All 22 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call fmaxf@plt ; RV32I-NEXT: call fmaxf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmax_s: ; RV64I-LABEL: fmax_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call fmaxf@plt ; RV64I-NEXT: call fmaxf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.maxnum.f16(half %a, half %b) %1 = call half @llvm.maxnum.f16(half %a, half %b)
ret half %1 ret half %1
} }
define i32 @feq_s(half %a, half %b) nounwind { define i32 @feq_s(half %a, half %b) nounwind {
; RV32IZFH-LABEL: feq_s: ; RV32IZFH-LABEL: feq_s:
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; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __eqsf2@plt ; RV32I-NEXT: call __eqsf2@plt
; RV32I-NEXT: seqz a0, a0 ; RV32I-NEXT: seqz a0, a0
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: feq_s: ; RV64I-LABEL: feq_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __eqsf2@plt ; RV64I-NEXT: call __eqsf2@plt
; RV64I-NEXT: seqz a0, a0 ; RV64I-NEXT: seqz a0, a0
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp oeq half %a, %b %1 = fcmp oeq half %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
define i32 @flt_s(half %a, half %b) nounwind { define i32 @flt_s(half %a, half %b) nounwind {
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; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __ltsf2@plt ; RV32I-NEXT: call __ltsf2@plt
; RV32I-NEXT: slti a0, a0, 0 ; RV32I-NEXT: slti a0, a0, 0
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: flt_s: ; RV64I-LABEL: flt_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __ltsf2@plt ; RV64I-NEXT: call __ltsf2@plt
; RV64I-NEXT: slti a0, a0, 0 ; RV64I-NEXT: slti a0, a0, 0
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp olt half %a, %b %1 = fcmp olt half %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
define i32 @fle_s(half %a, half %b) nounwind { define i32 @fle_s(half %a, half %b) nounwind {
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; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __lesf2@plt ; RV32I-NEXT: call __lesf2@plt
; RV32I-NEXT: slti a0, a0, 1 ; RV32I-NEXT: slti a0, a0, 1
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fle_s: ; RV64I-LABEL: fle_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __lesf2@plt ; RV64I-NEXT: call __lesf2@plt
; RV64I-NEXT: slti a0, a0, 1 ; RV64I-NEXT: slti a0, a0, 1
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fcmp ole half %a, %b %1 = fcmp ole half %a, %b
%2 = zext i1 %1 to i32 %2 = zext i1 %1 to i32
ret i32 %2 ret i32 %2
} }
declare half @llvm.fma.f16(half, half, half) declare half @llvm.fma.f16(half, half, half)
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; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmadd_s: ; RV64I-LABEL: fmadd_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a2, a0 ; RV64I-NEXT: mv a2, a0
; RV64I-NEXT: mv a0, s3 ; RV64I-NEXT: mv a0, s3
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.fma.f16(half %a, half %b, half %c) %1 = call half @llvm.fma.f16(half %a, half %b, half %c)
ret half %1 ret half %1
} }
define half @fmsub_s(half %a, half %b, half %c) nounwind { define half @fmsub_s(half %a, half %b, half %c) nounwind {
; RV32IZFH-LABEL: fmsub_s: ; RV32IZFH-LABEL: fmsub_s:
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; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s4, s0 ; RV32I-NEXT: and a0, s4, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmsub_s: ; RV64I-LABEL: fmsub_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s4, s0 ; RV64I-NEXT: and a0, s4, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a2, a0 ; RV64I-NEXT: mv a2, a0
; RV64I-NEXT: mv a0, s3 ; RV64I-NEXT: mv a0, s3
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%c_ = fadd half 0.0, %c ; avoid negation using xor %c_ = fadd half 0.0, %c ; avoid negation using xor
%negc = fsub half -0.0, %c_ %negc = fsub half -0.0, %c_
%1 = call half @llvm.fma.f16(half %a, half %b, half %negc) %1 = call half @llvm.fma.f16(half %a, half %b, half %negc)
ret half %1 ret half %1
} }
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; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: and a0, s4, s1 ; RV32I-NEXT: and a0, s4, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_s: ; RV64I-LABEL: fnmadd_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 36 Lines
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: and a0, s4, s1 ; RV64I-NEXT: and a0, s4, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a2, a0 ; RV64I-NEXT: mv a2, a0
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd half 0.0, %a %a_ = fadd half 0.0, %a
%c_ = fadd half 0.0, %c %c_ = fadd half 0.0, %c
%nega = fsub half -0.0, %a_ %nega = fsub half -0.0, %a_
%negc = fsub half -0.0, %c_ %negc = fsub half -0.0, %c_
%1 = call half @llvm.fma.f16(half %nega, half %b, half %negc) %1 = call half @llvm.fma.f16(half %nega, half %b, half %negc)
ret half %1 ret half %1
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: and a0, s4, s1 ; RV32I-NEXT: and a0, s4, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_s_2: ; RV64I-LABEL: fnmadd_s_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 36 Lines
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: and a0, s4, s1 ; RV64I-NEXT: and a0, s4, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a2, a0 ; RV64I-NEXT: mv a2, a0
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_ = fadd half 0.0, %b %b_ = fadd half 0.0, %b
%c_ = fadd half 0.0, %c %c_ = fadd half 0.0, %c
%negb = fsub half -0.0, %b_ %negb = fsub half -0.0, %b_
%negc = fsub half -0.0, %c_ %negc = fsub half -0.0, %c_
%1 = call half @llvm.fma.f16(half %a, half %negb, half %negc) %1 = call half @llvm.fma.f16(half %a, half %negb, half %negc)
ret half %1 ret half %1
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s4, s0 ; RV32I-NEXT: and a0, s4, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: mv a1, s3
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_s: ; RV64I-LABEL: fnmsub_s:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 23 Lines
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s4, s0 ; RV64I-NEXT: and a0, s4, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, s3 ; RV64I-NEXT: mv a1, s3
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd half 0.0, %a %a_ = fadd half 0.0, %a
%nega = fsub half -0.0, %a_ %nega = fsub half -0.0, %a_
%1 = call half @llvm.fma.f16(half %nega, half %b, half %c) %1 = call half @llvm.fma.f16(half %nega, half %b, half %c)
ret half %1 ret half %1
} }
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s4, s0 ; RV32I-NEXT: and a0, s4, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a2, s1 ; RV32I-NEXT: mv a2, s1
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_s_2: ; RV64I-LABEL: fnmsub_s_2:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 24 Lines
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s4, s0 ; RV64I-NEXT: and a0, s4, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s3 ; RV64I-NEXT: mv a0, s3
; RV64I-NEXT: mv a2, s1 ; RV64I-NEXT: mv a2, s1
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%b_ = fadd half 0.0, %b %b_ = fadd half 0.0, %b
%negb = fsub half -0.0, %b_ %negb = fsub half -0.0, %b_
%1 = call half @llvm.fma.f16(half %a, half %negb, half %c) %1 = call half @llvm.fma.f16(half %a, half %negb, half %c)
ret half %1 ret half %1
} }
Show All 33 Lines
; RV32I-NEXT: and a0, s2, s1 ; RV32I-NEXT: and a0, s2, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv s2, a0
; RV32I-NEXT: and a0, s0, s1 ; RV32I-NEXT: and a0, s0, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmadd_s_contract: ; RV64I-LABEL: fmadd_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: and a0, s2, s1 ; RV64I-NEXT: and a0, s2, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv s2, a0
; RV64I-NEXT: and a0, s0, s1 ; RV64I-NEXT: and a0, s0, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fmul contract half %a, %b %1 = fmul contract half %a, %b
%2 = fadd contract half %1, %c %2 = fadd contract half %1, %c
ret half %2 ret half %2
} }
define half @fmsub_s_contract(half %a, half %b, half %c) nounwind { define half @fmsub_s_contract(half %a, half %b, half %c) nounwind {
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmsub_s_contract: ; RV64I-LABEL: fmsub_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 23 Lines
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%c_ = fadd half 0.0, %c ; avoid negation using xor %c_ = fadd half 0.0, %c ; avoid negation using xor
%1 = fmul contract half %a, %b %1 = fmul contract half %a, %b
%2 = fsub contract half %1, %c_ %2 = fsub contract half %1, %c_
ret half %2 ret half %2
} }
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; RV32I-NEXT: and a0, s2, s1 ; RV32I-NEXT: and a0, s2, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv s2, a0
; RV32I-NEXT: and a0, s0, s1 ; RV32I-NEXT: and a0, s0, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmadd_s_contract: ; RV64I-LABEL: fnmadd_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; RV64I-NEXT: and a0, s2, s1 ; RV64I-NEXT: and a0, s2, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv s2, a0
; RV64I-NEXT: and a0, s0, s1 ; RV64I-NEXT: and a0, s0, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd half 0.0, %a ; avoid negation using xor %a_ = fadd half 0.0, %a ; avoid negation using xor
%b_ = fadd half 0.0, %b ; avoid negation using xor %b_ = fadd half 0.0, %b ; avoid negation using xor
%c_ = fadd half 0.0, %c ; avoid negation using xor %c_ = fadd half 0.0, %c ; avoid negation using xor
%1 = fmul contract half %a_, %b_ %1 = fmul contract half %a_, %b_
%2 = fneg half %1 %2 = fneg half %1
%3 = fsub contract half %2, %c_ %3 = fsub contract half %2, %c_
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv s2, a0
; RV32I-NEXT: and a0, s1, s0 ; RV32I-NEXT: and a0, s1, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __subsf3@plt ; RV32I-NEXT: call __subsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fnmsub_s_contract: ; RV64I-LABEL: fnmsub_s_contract:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 30 Lines
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv s2, a0
; RV64I-NEXT: and a0, s1, s0 ; RV64I-NEXT: and a0, s1, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __subsf3@plt ; RV64I-NEXT: call __subsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%a_ = fadd half 0.0, %a ; avoid negation using xor %a_ = fadd half 0.0, %a ; avoid negation using xor
%b_ = fadd half 0.0, %b ; avoid negation using xor %b_ = fadd half 0.0, %b ; avoid negation using xor
%1 = fmul contract half %a_, %b_ %1 = fmul contract half %a_, %b_
%2 = fsub contract half %c, %1 %2 = fsub contract half %c, %1
ret half %2 ret half %2
} }

llvm/test/CodeGen/RISCV/half-convert.ll

Show First 20 Lines • Show All 170 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: bne a0, s1, .LBB1_6 ; RV32I-NEXT: bne a0, s1, .LBB1_6
; RV32I-NEXT: # %bb.5: # %start ; RV32I-NEXT: # %bb.5: # %start
; RV32I-NEXT: mv s1, s3 ; RV32I-NEXT: mv s1, s3
; RV32I-NEXT: .LBB1_6: # %start ; RV32I-NEXT: .LBB1_6: # %start
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_si_h_sat: ; RV64I-LABEL: fcvt_si_h_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 28 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: bne a0, s1, .LBB1_6 ; RV64I-NEXT: bne a0, s1, .LBB1_6
; RV64I-NEXT: # %bb.5: # %start ; RV64I-NEXT: # %bb.5: # %start
; RV64I-NEXT: mv s1, s3 ; RV64I-NEXT: mv s1, s3
; RV64I-NEXT: .LBB1_6: # %start ; RV64I-NEXT: .LBB1_6: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a)
ret i16 %0 ret i16 %0
} }
declare i16 @llvm.fptosi.sat.i16.f16(half) declare i16 @llvm.fptosi.sat.i16.f16(half)
▲ Show 20 Lines • Show All 211 Lines • ▼ Show 20 Lines
; RV32I-NEXT: addi a1, a0, -256 ; RV32I-NEXT: addi a1, a0, -256
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __gtsf2@plt ; RV32I-NEXT: call __gtsf2@plt
; RV32I-NEXT: bgtz a0, .LBB4_4 ; RV32I-NEXT: bgtz a0, .LBB4_4
; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: # %bb.3: # %start
; RV32I-NEXT: mv s2, s3 ; RV32I-NEXT: mv s2, s3
; RV32I-NEXT: .LBB4_4: # %start ; RV32I-NEXT: .LBB4_4: # %start
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_ui_h_sat: ; RV64I-LABEL: fcvt_ui_h_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 19 Lines
; RV64I-NEXT: addiw a1, a0, -256 ; RV64I-NEXT: addiw a1, a0, -256
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: call __gtsf2@plt
; RV64I-NEXT: bgtz a0, .LBB4_4 ; RV64I-NEXT: bgtz a0, .LBB4_4
; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: # %bb.3: # %start
; RV64I-NEXT: mv s2, s3 ; RV64I-NEXT: mv s2, s3
; RV64I-NEXT: .LBB4_4: # %start ; RV64I-NEXT: .LBB4_4: # %start
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a) %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a)
ret i16 %0 ret i16 %0
} }
declare i16 @llvm.fptoui.sat.i16.f16(half) declare i16 @llvm.fptoui.sat.i16.f16(half)
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; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: bne a0, s1, .LBB6_6 ; RV32I-NEXT: bne a0, s1, .LBB6_6
; RV32I-NEXT: # %bb.5: # %start ; RV32I-NEXT: # %bb.5: # %start
; RV32I-NEXT: mv s1, s3 ; RV32I-NEXT: mv s1, s3
; RV32I-NEXT: .LBB6_6: # %start ; RV32I-NEXT: .LBB6_6: # %start
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_w_h_sat: ; RV64I-LABEL: fcvt_w_h_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 29 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: bne a0, s1, .LBB6_6 ; RV64I-NEXT: bne a0, s1, .LBB6_6
; RV64I-NEXT: # %bb.5: # %start ; RV64I-NEXT: # %bb.5: # %start
; RV64I-NEXT: mv s1, s3 ; RV64I-NEXT: mv s1, s3
; RV64I-NEXT: .LBB6_6: # %start ; RV64I-NEXT: .LBB6_6: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i32 @llvm.fptosi.sat.i32.f16(half %a) %0 = tail call i32 @llvm.fptosi.sat.i32.f16(half %a)
ret i32 %0 ret i32 %0
} }
declare i32 @llvm.fptosi.sat.i32.f16(half) declare i32 @llvm.fptosi.sat.i32.f16(half)
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; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call __gtsf2@plt ; RV32I-NEXT: call __gtsf2@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: li a0, -1 ; RV32I-NEXT: li a0, -1
; RV32I-NEXT: bgtz a1, .LBB8_4 ; RV32I-NEXT: bgtz a1, .LBB8_4
; RV32I-NEXT: # %bb.3: # %start ; RV32I-NEXT: # %bb.3: # %start
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: .LBB8_4: # %start ; RV32I-NEXT: .LBB8_4: # %start
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_wu_h_sat: ; RV64I-LABEL: fcvt_wu_h_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 19 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: call __gtsf2@plt
; RV64I-NEXT: blez a0, .LBB8_4 ; RV64I-NEXT: blez a0, .LBB8_4
; RV64I-NEXT: # %bb.3: ; RV64I-NEXT: # %bb.3:
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: srli s1, a0, 32 ; RV64I-NEXT: srli s1, a0, 32
; RV64I-NEXT: .LBB8_4: # %start ; RV64I-NEXT: .LBB8_4: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i32 @llvm.fptoui.sat.i32.f16(half %a) %0 = tail call i32 @llvm.fptoui.sat.i32.f16(half %a)
ret i32 %0 ret i32 %0
} }
declare i32 @llvm.fptoui.sat.i32.f16(half) declare i32 @llvm.fptoui.sat.i32.f16(half)
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; RV32IZFH-NEXT: beqz s0, .LBB10_11 ; RV32IZFH-NEXT: beqz s0, .LBB10_11
; RV32IZFH-NEXT: .LBB10_5: # %start ; RV32IZFH-NEXT: .LBB10_5: # %start
; RV32IZFH-NEXT: bnez a3, .LBB10_12 ; RV32IZFH-NEXT: bnez a3, .LBB10_12
; RV32IZFH-NEXT: .LBB10_6: # %start ; RV32IZFH-NEXT: .LBB10_6: # %start
; RV32IZFH-NEXT: bnez a2, .LBB10_8 ; RV32IZFH-NEXT: bnez a2, .LBB10_8
; RV32IZFH-NEXT: .LBB10_7: # %start ; RV32IZFH-NEXT: .LBB10_7: # %start
; RV32IZFH-NEXT: li a1, 0 ; RV32IZFH-NEXT: li a1, 0
; RV32IZFH-NEXT: .LBB10_8: # %start ; RV32IZFH-NEXT: .LBB10_8: # %start
; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: addi sp, sp, 16 ; RV32IZFH-NEXT: addi sp, sp, 16
; RV32IZFH-NEXT: ret ; RV32IZFH-NEXT: ret
; RV32IZFH-NEXT: .LBB10_9: # %start ; RV32IZFH-NEXT: .LBB10_9: # %start
; RV32IZFH-NEXT: mv a0, a2 ; RV32IZFH-NEXT: mv a0, a2
; RV32IZFH-NEXT: feq.s a2, fs0, fs0 ; RV32IZFH-NEXT: feq.s a2, fs0, fs0
; RV32IZFH-NEXT: bnez a2, .LBB10_4 ; RV32IZFH-NEXT: bnez a2, .LBB10_4
; RV32IZFH-NEXT: .LBB10_10: # %start ; RV32IZFH-NEXT: .LBB10_10: # %start
; RV32IZFH-NEXT: li a0, 0 ; RV32IZFH-NEXT: li a0, 0
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; RV32IDZFH-NEXT: beqz s0, .LBB10_11 ; RV32IDZFH-NEXT: beqz s0, .LBB10_11
; RV32IDZFH-NEXT: .LBB10_5: # %start ; RV32IDZFH-NEXT: .LBB10_5: # %start
; RV32IDZFH-NEXT: bnez a3, .LBB10_12 ; RV32IDZFH-NEXT: bnez a3, .LBB10_12
; RV32IDZFH-NEXT: .LBB10_6: # %start ; RV32IDZFH-NEXT: .LBB10_6: # %start
; RV32IDZFH-NEXT: bnez a2, .LBB10_8 ; RV32IDZFH-NEXT: bnez a2, .LBB10_8
; RV32IDZFH-NEXT: .LBB10_7: # %start ; RV32IDZFH-NEXT: .LBB10_7: # %start
; RV32IDZFH-NEXT: li a1, 0 ; RV32IDZFH-NEXT: li a1, 0
; RV32IDZFH-NEXT: .LBB10_8: # %start ; RV32IDZFH-NEXT: .LBB10_8: # %start
; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IDZFH-NEXT: addi sp, sp, 16 ; RV32IDZFH-NEXT: addi sp, sp, 16
; RV32IDZFH-NEXT: ret ; RV32IDZFH-NEXT: ret
; RV32IDZFH-NEXT: .LBB10_9: # %start ; RV32IDZFH-NEXT: .LBB10_9: # %start
; RV32IDZFH-NEXT: mv a0, a2 ; RV32IDZFH-NEXT: mv a0, a2
; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 ; RV32IDZFH-NEXT: feq.s a2, fs0, fs0
; RV32IDZFH-NEXT: bnez a2, .LBB10_4 ; RV32IDZFH-NEXT: bnez a2, .LBB10_4
; RV32IDZFH-NEXT: .LBB10_10: # %start ; RV32IDZFH-NEXT: .LBB10_10: # %start
; RV32IDZFH-NEXT: li a0, 0 ; RV32IDZFH-NEXT: li a0, 0
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; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __unordsf2@plt ; RV32I-NEXT: call __unordsf2@plt
; RV32I-NEXT: bne a0, s1, .LBB10_12 ; RV32I-NEXT: bne a0, s1, .LBB10_12
; RV32I-NEXT: # %bb.11: # %start ; RV32I-NEXT: # %bb.11: # %start
; RV32I-NEXT: mv s1, s5 ; RV32I-NEXT: mv s1, s5
; RV32I-NEXT: .LBB10_12: # %start ; RV32I-NEXT: .LBB10_12: # %start
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_l_h_sat: ; RV64I-LABEL: fcvt_l_h_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 31 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __unordsf2@plt ; RV64I-NEXT: call __unordsf2@plt
; RV64I-NEXT: bne a0, s1, .LBB10_7 ; RV64I-NEXT: bne a0, s1, .LBB10_7
; RV64I-NEXT: # %bb.6: # %start ; RV64I-NEXT: # %bb.6: # %start
; RV64I-NEXT: mv s1, s2 ; RV64I-NEXT: mv s1, s2
; RV64I-NEXT: .LBB10_7: # %start ; RV64I-NEXT: .LBB10_7: # %start
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i64 @llvm.fptosi.sat.i64.f16(half %a) %0 = tail call i64 @llvm.fptosi.sat.i64.f16(half %a)
ret i64 %0 ret i64 %0
} }
declare i64 @llvm.fptosi.sat.i64.f16(half) declare i64 @llvm.fptosi.sat.i64.f16(half)
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; RV32IZFH-NEXT: # %bb.3: # %start ; RV32IZFH-NEXT: # %bb.3: # %start
; RV32IZFH-NEXT: beqz s0, .LBB12_8 ; RV32IZFH-NEXT: beqz s0, .LBB12_8
; RV32IZFH-NEXT: .LBB12_4: # %start ; RV32IZFH-NEXT: .LBB12_4: # %start
; RV32IZFH-NEXT: bnez a4, .LBB12_6 ; RV32IZFH-NEXT: bnez a4, .LBB12_6
; RV32IZFH-NEXT: .LBB12_5: # %start ; RV32IZFH-NEXT: .LBB12_5: # %start
; RV32IZFH-NEXT: mv a2, a1 ; RV32IZFH-NEXT: mv a2, a1
; RV32IZFH-NEXT: .LBB12_6: # %start ; RV32IZFH-NEXT: .LBB12_6: # %start
; RV32IZFH-NEXT: mv a1, a2 ; RV32IZFH-NEXT: mv a1, a2
; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: addi sp, sp, 16 ; RV32IZFH-NEXT: addi sp, sp, 16
; RV32IZFH-NEXT: ret ; RV32IZFH-NEXT: ret
; RV32IZFH-NEXT: .LBB12_7: # %start ; RV32IZFH-NEXT: .LBB12_7: # %start
; RV32IZFH-NEXT: mv a0, a3 ; RV32IZFH-NEXT: mv a0, a3
; RV32IZFH-NEXT: bnez s0, .LBB12_4 ; RV32IZFH-NEXT: bnez s0, .LBB12_4
; RV32IZFH-NEXT: .LBB12_8: # %start ; RV32IZFH-NEXT: .LBB12_8: # %start
; RV32IZFH-NEXT: li a1, 0 ; RV32IZFH-NEXT: li a1, 0
; RV32IZFH-NEXT: beqz a4, .LBB12_5 ; RV32IZFH-NEXT: beqz a4, .LBB12_5
Show All 35 Lines
; RV32IDZFH-NEXT: # %bb.3: # %start ; RV32IDZFH-NEXT: # %bb.3: # %start
; RV32IDZFH-NEXT: beqz s0, .LBB12_8 ; RV32IDZFH-NEXT: beqz s0, .LBB12_8
; RV32IDZFH-NEXT: .LBB12_4: # %start ; RV32IDZFH-NEXT: .LBB12_4: # %start
; RV32IDZFH-NEXT: bnez a4, .LBB12_6 ; RV32IDZFH-NEXT: bnez a4, .LBB12_6
; RV32IDZFH-NEXT: .LBB12_5: # %start ; RV32IDZFH-NEXT: .LBB12_5: # %start
; RV32IDZFH-NEXT: mv a2, a1 ; RV32IDZFH-NEXT: mv a2, a1
; RV32IDZFH-NEXT: .LBB12_6: # %start ; RV32IDZFH-NEXT: .LBB12_6: # %start
; RV32IDZFH-NEXT: mv a1, a2 ; RV32IDZFH-NEXT: mv a1, a2
; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload
; RV32IDZFH-NEXT: addi sp, sp, 16 ; RV32IDZFH-NEXT: addi sp, sp, 16
; RV32IDZFH-NEXT: ret ; RV32IDZFH-NEXT: ret
; RV32IDZFH-NEXT: .LBB12_7: # %start ; RV32IDZFH-NEXT: .LBB12_7: # %start
; RV32IDZFH-NEXT: mv a0, a3 ; RV32IDZFH-NEXT: mv a0, a3
; RV32IDZFH-NEXT: bnez s0, .LBB12_4 ; RV32IDZFH-NEXT: bnez s0, .LBB12_4
; RV32IDZFH-NEXT: .LBB12_8: # %start ; RV32IDZFH-NEXT: .LBB12_8: # %start
; RV32IDZFH-NEXT: li a1, 0 ; RV32IDZFH-NEXT: li a1, 0
; RV32IDZFH-NEXT: beqz a4, .LBB12_5 ; RV32IDZFH-NEXT: beqz a4, .LBB12_5
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call __gtsf2@plt ; RV32I-NEXT: call __gtsf2@plt
; RV32I-NEXT: bgtz a0, .LBB12_8 ; RV32I-NEXT: bgtz a0, .LBB12_8
; RV32I-NEXT: # %bb.7: # %start ; RV32I-NEXT: # %bb.7: # %start
; RV32I-NEXT: mv s3, s5 ; RV32I-NEXT: mv s3, s5
; RV32I-NEXT: .LBB12_8: # %start ; RV32I-NEXT: .LBB12_8: # %start
; RV32I-NEXT: mv a0, s4 ; RV32I-NEXT: mv a0, s4
; RV32I-NEXT: mv a1, s3 ; RV32I-NEXT: mv a1, s3
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_lu_h_sat: ; RV64I-LABEL: fcvt_lu_h_sat:
; RV64I: # %bb.0: # %start ; RV64I: # %bb.0: # %start
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 19 Lines
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __gtsf2@plt ; RV64I-NEXT: call __gtsf2@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: bgtz a1, .LBB12_4 ; RV64I-NEXT: bgtz a1, .LBB12_4
; RV64I-NEXT: # %bb.3: # %start ; RV64I-NEXT: # %bb.3: # %start
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: .LBB12_4: # %start ; RV64I-NEXT: .LBB12_4: # %start
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
start: start:
%0 = tail call i64 @llvm.fptoui.sat.i64.f16(half %a) %0 = tail call i64 @llvm.fptoui.sat.i64.f16(half %a)
ret i64 %0 ret i64 %0
} }
declare i64 @llvm.fptoui.sat.i64.f16(half) declare i64 @llvm.fptoui.sat.i64.f16(half)
▲ Show 20 Lines • Show All 807 Lines • ▼ Show 20 Lines
; RV32I-NEXT: .cfi_offset s1, -12 ; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: addi s1, a0, 1 ; RV32I-NEXT: addi s1, a0, 1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __floatsisf@plt ; RV32I-NEXT: call __floatsisf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: sh a0, 0(s0) ; RV32I-NEXT: sh a0, 0(s0)
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_h_w_demanded_bits: ; RV64I-LABEL: fcvt_h_w_demanded_bits:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: .cfi_offset s1, -24 ; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: addiw s1, a0, 1 ; RV64I-NEXT: addiw s1, a0, 1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __floatsisf@plt ; RV64I-NEXT: call __floatsisf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: sh a0, 0(s0) ; RV64I-NEXT: sh a0, 0(s0)
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%3 = add i32 %0, 1 %3 = add i32 %0, 1
%4 = sitofp i32 %3 to half %4 = sitofp i32 %3 to half
store half %4, half* %1, align 2 store half %4, half* %1, align 2
ret i32 %3 ret i32 %3
} }
Show All 39 Lines
; RV32I-NEXT: .cfi_offset s1, -12 ; RV32I-NEXT: .cfi_offset s1, -12
; RV32I-NEXT: mv s0, a1 ; RV32I-NEXT: mv s0, a1
; RV32I-NEXT: addi s1, a0, 1 ; RV32I-NEXT: addi s1, a0, 1
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call __floatunsisf@plt ; RV32I-NEXT: call __floatunsisf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: sh a0, 0(s0) ; RV32I-NEXT: sh a0, 0(s0)
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fcvt_h_wu_demanded_bits: ; RV64I-LABEL: fcvt_h_wu_demanded_bits:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: .cfi_offset s1, -24 ; RV64I-NEXT: .cfi_offset s1, -24
; RV64I-NEXT: mv s0, a1 ; RV64I-NEXT: mv s0, a1
; RV64I-NEXT: addiw s1, a0, 1 ; RV64I-NEXT: addiw s1, a0, 1
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call __floatunsisf@plt ; RV64I-NEXT: call __floatunsisf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: sh a0, 0(s0) ; RV64I-NEXT: sh a0, 0(s0)
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%3 = add i32 %0, 1 %3 = add i32 %0, 1
%4 = uitofp i32 %3 to half %4 = uitofp i32 %3 to half
store half %4, half* %1, align 2 store half %4, half* %1, align 2
ret i32 %3 ret i32 %3
} }

llvm/test/CodeGen/RISCV/half-intrinsics.ll

Show First 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a2, a0 ; RV32I-NEXT: mv a2, a0
; RV32I-NEXT: mv a0, s3 ; RV32I-NEXT: mv a0, s3
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call fmaf@plt ; RV32I-NEXT: call fmaf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fma_f16: ; RV64I-LABEL: fma_f16:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 12 Lines
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a2, a0 ; RV64I-NEXT: mv a2, a0
; RV64I-NEXT: mv a0, s3 ; RV64I-NEXT: mv a0, s3
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call fmaf@plt ; RV64I-NEXT: call fmaf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.fma.f16(half %a, half %b, half %c) %1 = call half @llvm.fma.f16(half %a, half %b, half %c)
ret half %1 ret half %1
} }
declare half @llvm.fmuladd.f16(half, half, half) declare half @llvm.fmuladd.f16(half, half, half)
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; RV32I-NEXT: and a0, s2, s1 ; RV32I-NEXT: and a0, s2, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s2, a0 ; RV32I-NEXT: mv s2, a0
; RV32I-NEXT: and a0, s0, s1 ; RV32I-NEXT: and a0, s0, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, s2 ; RV32I-NEXT: mv a1, s2
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: fmuladd_f16: ; RV64I-LABEL: fmuladd_f16:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 17 Lines
; RV64I-NEXT: and a0, s2, s1 ; RV64I-NEXT: and a0, s2, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s2, a0 ; RV64I-NEXT: mv s2, a0
; RV64I-NEXT: and a0, s0, s1 ; RV64I-NEXT: and a0, s0, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, s2 ; RV64I-NEXT: mv a1, s2
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.fmuladd.f16(half %a, half %b, half %c) %1 = call half @llvm.fmuladd.f16(half %a, half %b, half %c)
ret half %1 ret half %1
} }
declare half @llvm.fabs.f16(half) declare half @llvm.fabs.f16(half)
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call fminf@plt ; RV32I-NEXT: call fminf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: minnum_f16: ; RV64I-LABEL: minnum_f16:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call fminf@plt ; RV64I-NEXT: call fminf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.minnum.f16(half %a, half %b) %1 = call half @llvm.minnum.f16(half %a, half %b)
ret half %1 ret half %1
} }
declare half @llvm.maxnum.f16(half, half) declare half @llvm.maxnum.f16(half, half)
Show All 32 Lines
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: and a0, s2, s0 ; RV32I-NEXT: and a0, s2, s0
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, a0 ; RV32I-NEXT: mv a1, a0
; RV32I-NEXT: mv a0, s1 ; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: call fmaxf@plt ; RV32I-NEXT: call fmaxf@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: maxnum_f16: ; RV64I-LABEL: maxnum_f16:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
; RV64I-NEXT: mv s2, a1 ; RV64I-NEXT: mv s2, a1
; RV64I-NEXT: lui a1, 16 ; RV64I-NEXT: lui a1, 16
; RV64I-NEXT: addiw s0, a1, -1 ; RV64I-NEXT: addiw s0, a1, -1
; RV64I-NEXT: and a0, a0, s0 ; RV64I-NEXT: and a0, a0, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: and a0, s2, s0 ; RV64I-NEXT: and a0, s2, s0
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: mv a0, s1 ; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: call fmaxf@plt ; RV64I-NEXT: call fmaxf@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = call half @llvm.maxnum.f16(half %a, half %b) %1 = call half @llvm.maxnum.f16(half %a, half %b)
ret half %1 ret half %1
} }
declare half @llvm.copysign.f16(half, half) declare half @llvm.copysign.f16(half, half)
▲ Show 20 Lines • Show All 781 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/half-mem.ll

Show First 20 Lines • Show All 118 Lines • ▼ Show 20 Lines
; RV32IZFH-NEXT: addi sp, sp, -16 ; RV32IZFH-NEXT: addi sp, sp, -16
; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IZFH-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill ; RV32IZFH-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill
; RV32IZFH-NEXT: fmv.h fs0, fa0 ; RV32IZFH-NEXT: fmv.h fs0, fa0
; RV32IZFH-NEXT: addi a0, sp, 4 ; RV32IZFH-NEXT: addi a0, sp, 4
; RV32IZFH-NEXT: call notdead@plt ; RV32IZFH-NEXT: call notdead@plt
; RV32IZFH-NEXT: flh ft0, 4(sp) ; RV32IZFH-NEXT: flh ft0, 4(sp)
; RV32IZFH-NEXT: fadd.h fa0, ft0, fs0 ; RV32IZFH-NEXT: fadd.h fa0, ft0, fs0
; RV32IZFH-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload
; RV32IZFH-NEXT: addi sp, sp, 16 ; RV32IZFH-NEXT: addi sp, sp, 16
; RV32IZFH-NEXT: ret ; RV32IZFH-NEXT: ret
; ;
; RV64IZFH-LABEL: flh_stack: ; RV64IZFH-LABEL: flh_stack:
; RV64IZFH: # %bb.0: ; RV64IZFH: # %bb.0:
; RV64IZFH-NEXT: addi sp, sp, -16 ; RV64IZFH-NEXT: addi sp, sp, -16
; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill ; RV64IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill
; RV64IZFH-NEXT: fmv.h fs0, fa0 ; RV64IZFH-NEXT: fmv.h fs0, fa0
; RV64IZFH-NEXT: mv a0, sp ; RV64IZFH-NEXT: mv a0, sp
; RV64IZFH-NEXT: call notdead@plt ; RV64IZFH-NEXT: call notdead@plt
; RV64IZFH-NEXT: flh ft0, 0(sp) ; RV64IZFH-NEXT: flh ft0, 0(sp)
; RV64IZFH-NEXT: fadd.h fa0, ft0, fs0 ; RV64IZFH-NEXT: fadd.h fa0, ft0, fs0
; RV64IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload
; RV64IZFH-NEXT: addi sp, sp, 16 ; RV64IZFH-NEXT: addi sp, sp, 16
; RV64IZFH-NEXT: ret ; RV64IZFH-NEXT: ret
%1 = alloca half, align 4 %1 = alloca half, align 4
%2 = bitcast half* %1 to i8* %2 = bitcast half* %1 to i8*
call void @notdead(i8* %2) call void @notdead(i8* %2)
%3 = load half, half* %1 %3 = load half, half* %1
%4 = fadd half %3, %a ; force load in to FPR16 %4 = fadd half %3, %a ; force load in to FPR16
ret half %4 ret half %4
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llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll

Show All 16 Lines
; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: lui a0, 2 ; CHECK-RV32-NEXT: lui a0, 2
; CHECK-RV32-NEXT: addi a0, a0, 4 ; CHECK-RV32-NEXT: addi a0, a0, 4
; CHECK-RV32-NEXT: call read@plt ; CHECK-RV32-NEXT: call read@plt
; CHECK-RV32-NEXT: mv s0, a0 ; CHECK-RV32-NEXT: mv s0, a0
; CHECK-RV32-NEXT: call callee@plt ; CHECK-RV32-NEXT: call callee@plt
; CHECK-RV32-NEXT: mv a0, s0 ; CHECK-RV32-NEXT: mv a0, s0
; CHECK-RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 16 ; CHECK-RV32-NEXT: addi sp, sp, 16
; CHECK-RV32-NEXT: tail write@plt ; CHECK-RV32-NEXT: tail write@plt
; ;
; CHECK-RV32-F-LABEL: handler: ; CHECK-RV32-F-LABEL: handler:
; CHECK-RV32-F: # %bb.0: # %entry ; CHECK-RV32-F: # %bb.0: # %entry
; CHECK-RV32-F-NEXT: addi sp, sp, -16 ; CHECK-RV32-F-NEXT: addi sp, sp, -16
; CHECK-RV32-F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: lui a0, 2 ; CHECK-RV32-F-NEXT: lui a0, 2
; CHECK-RV32-F-NEXT: addi a0, a0, 4 ; CHECK-RV32-F-NEXT: addi a0, a0, 4
; CHECK-RV32-F-NEXT: call read@plt ; CHECK-RV32-F-NEXT: call read@plt
; CHECK-RV32-F-NEXT: mv s0, a0 ; CHECK-RV32-F-NEXT: mv s0, a0
; CHECK-RV32-F-NEXT: call callee@plt ; CHECK-RV32-F-NEXT: call callee@plt
; CHECK-RV32-F-NEXT: mv a0, s0 ; CHECK-RV32-F-NEXT: mv a0, s0
; CHECK-RV32-F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-RV32-F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: addi sp, sp, 16 ; CHECK-RV32-F-NEXT: addi sp, sp, 16
; CHECK-RV32-F-NEXT: tail write@plt ; CHECK-RV32-F-NEXT: tail write@plt
; ;
; CHECK-RV32-FD-LABEL: handler: ; CHECK-RV32-FD-LABEL: handler:
; CHECK-RV32-FD: # %bb.0: # %entry ; CHECK-RV32-FD: # %bb.0: # %entry
; CHECK-RV32-FD-NEXT: addi sp, sp, -16 ; CHECK-RV32-FD-NEXT: addi sp, sp, -16
; CHECK-RV32-FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-FD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-FD-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-RV32-FD-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-RV32-FD-NEXT: lui a0, 2 ; CHECK-RV32-FD-NEXT: lui a0, 2
; CHECK-RV32-FD-NEXT: addi a0, a0, 4 ; CHECK-RV32-FD-NEXT: addi a0, a0, 4
; CHECK-RV32-FD-NEXT: call read@plt ; CHECK-RV32-FD-NEXT: call read@plt
; CHECK-RV32-FD-NEXT: mv s0, a0 ; CHECK-RV32-FD-NEXT: mv s0, a0
; CHECK-RV32-FD-NEXT: call callee@plt ; CHECK-RV32-FD-NEXT: call callee@plt
; CHECK-RV32-FD-NEXT: mv a0, s0 ; CHECK-RV32-FD-NEXT: mv a0, s0
; CHECK-RV32-FD-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-RV32-FD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: addi sp, sp, 16 ; CHECK-RV32-FD-NEXT: addi sp, sp, 16
; CHECK-RV32-FD-NEXT: tail write@plt ; CHECK-RV32-FD-NEXT: tail write@plt
entry: entry:
%call = tail call i32 @read(i32 8196) %call = tail call i32 @read(i32 8196)
tail call void bitcast (void (...)* @callee to void ()*)() tail call void bitcast (void (...)* @callee to void ()*)()
tail call void @write(i32 %call) tail call void @write(i32 %call)
ret void ret void
} }
declare i32 @read(i32) declare i32 @read(i32)
declare void @callee(...) declare void @callee(...)
declare void @write(i32) declare void @write(i32)

llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll

Show All 29 Lines
; CHECK-RV32-NEXT: sw a1, 8(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw a1, 8(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: lui a0, %hi(a) ; CHECK-RV32-NEXT: lui a0, %hi(a)
; CHECK-RV32-NEXT: lw a0, %lo(a)(a0) ; CHECK-RV32-NEXT: lw a0, %lo(a)(a0)
; CHECK-RV32-NEXT: lui a1, %hi(b) ; CHECK-RV32-NEXT: lui a1, %hi(b)
; CHECK-RV32-NEXT: lw a1, %lo(b)(a1) ; CHECK-RV32-NEXT: lw a1, %lo(b)(a1)
; CHECK-RV32-NEXT: add a0, a1, a0 ; CHECK-RV32-NEXT: add a0, a1, a0
; CHECK-RV32-NEXT: lui a1, %hi(c) ; CHECK-RV32-NEXT: lui a1, %hi(c)
; CHECK-RV32-NEXT: sw a0, %lo(c)(a1) ; CHECK-RV32-NEXT: sw a0, %lo(c)(a1)
; CHECK-RV32-NEXT: lw a1, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 12(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 16 ; CHECK-RV32-NEXT: addi sp, sp, 16
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32IF-LABEL: foo_i32: ; CHECK-RV32IF-LABEL: foo_i32:
; CHECK-RV32IF: # %bb.0: ; CHECK-RV32IF: # %bb.0:
; CHECK-RV32IF-NEXT: addi sp, sp, -16 ; CHECK-RV32IF-NEXT: addi sp, sp, -16
; CHECK-RV32IF-NEXT: sw a0, 12(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw a1, 8(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw a1, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: lui a0, %hi(a) ; CHECK-RV32IF-NEXT: lui a0, %hi(a)
; CHECK-RV32IF-NEXT: lw a0, %lo(a)(a0) ; CHECK-RV32IF-NEXT: lw a0, %lo(a)(a0)
; CHECK-RV32IF-NEXT: lui a1, %hi(b) ; CHECK-RV32IF-NEXT: lui a1, %hi(b)
; CHECK-RV32IF-NEXT: lw a1, %lo(b)(a1) ; CHECK-RV32IF-NEXT: lw a1, %lo(b)(a1)
; CHECK-RV32IF-NEXT: add a0, a1, a0 ; CHECK-RV32IF-NEXT: add a0, a1, a0
; CHECK-RV32IF-NEXT: lui a1, %hi(c) ; CHECK-RV32IF-NEXT: lui a1, %hi(c)
; CHECK-RV32IF-NEXT: sw a0, %lo(c)(a1) ; CHECK-RV32IF-NEXT: sw a0, %lo(c)(a1)
; CHECK-RV32IF-NEXT: lw a1, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 12(sp) # 4-byte Folded Reload ; CHECK-RV32IF-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a1, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 16 ; CHECK-RV32IF-NEXT: addi sp, sp, 16
; CHECK-RV32IF-NEXT: mret ; CHECK-RV32IF-NEXT: mret
; ;
; CHECK-RV32IFD-LABEL: foo_i32: ; CHECK-RV32IFD-LABEL: foo_i32:
; CHECK-RV32IFD: # %bb.0: ; CHECK-RV32IFD: # %bb.0:
; CHECK-RV32IFD-NEXT: addi sp, sp, -16 ; CHECK-RV32IFD-NEXT: addi sp, sp, -16
; CHECK-RV32IFD-NEXT: sw a0, 12(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw a1, 8(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a1, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: lui a0, %hi(a) ; CHECK-RV32IFD-NEXT: lui a0, %hi(a)
; CHECK-RV32IFD-NEXT: lw a0, %lo(a)(a0) ; CHECK-RV32IFD-NEXT: lw a0, %lo(a)(a0)
; CHECK-RV32IFD-NEXT: lui a1, %hi(b) ; CHECK-RV32IFD-NEXT: lui a1, %hi(b)
; CHECK-RV32IFD-NEXT: lw a1, %lo(b)(a1) ; CHECK-RV32IFD-NEXT: lw a1, %lo(b)(a1)
; CHECK-RV32IFD-NEXT: add a0, a1, a0 ; CHECK-RV32IFD-NEXT: add a0, a1, a0
; CHECK-RV32IFD-NEXT: lui a1, %hi(c) ; CHECK-RV32IFD-NEXT: lui a1, %hi(c)
; CHECK-RV32IFD-NEXT: sw a0, %lo(c)(a1) ; CHECK-RV32IFD-NEXT: sw a0, %lo(c)(a1)
; CHECK-RV32IFD-NEXT: lw a1, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 12(sp) # 4-byte Folded Reload ; CHECK-RV32IFD-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a1, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: addi sp, sp, 16 ; CHECK-RV32IFD-NEXT: addi sp, sp, 16
; CHECK-RV32IFD-NEXT: mret ; CHECK-RV32IFD-NEXT: mret
%1 = load i32, i32* @a %1 = load i32, i32* @a
%2 = load i32, i32* @b %2 = load i32, i32* @b
%add = add nsw i32 %2, %1 %add = add nsw i32 %2, %1
store i32 %add, i32* @c store i32 %add, i32* @c
ret void ret void
} }
Show All 13 Lines
; CHECK-RV32-NEXT: addi s0, sp, 16 ; CHECK-RV32-NEXT: addi s0, sp, 16
; CHECK-RV32-NEXT: lui a0, %hi(a) ; CHECK-RV32-NEXT: lui a0, %hi(a)
; CHECK-RV32-NEXT: lw a0, %lo(a)(a0) ; CHECK-RV32-NEXT: lw a0, %lo(a)(a0)
; CHECK-RV32-NEXT: lui a1, %hi(b) ; CHECK-RV32-NEXT: lui a1, %hi(b)
; CHECK-RV32-NEXT: lw a1, %lo(b)(a1) ; CHECK-RV32-NEXT: lw a1, %lo(b)(a1)
; CHECK-RV32-NEXT: add a0, a1, a0 ; CHECK-RV32-NEXT: add a0, a1, a0
; CHECK-RV32-NEXT: lui a1, %hi(c) ; CHECK-RV32-NEXT: lui a1, %hi(c)
; CHECK-RV32-NEXT: sw a0, %lo(c)(a1) ; CHECK-RV32-NEXT: sw a0, %lo(c)(a1)
; CHECK-RV32-NEXT: lw a1, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 16 ; CHECK-RV32-NEXT: addi sp, sp, 16
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32IF-LABEL: foo_fp_i32: ; CHECK-RV32IF-LABEL: foo_fp_i32:
; CHECK-RV32IF: # %bb.0: ; CHECK-RV32IF: # %bb.0:
; CHECK-RV32IF-NEXT: addi sp, sp, -16 ; CHECK-RV32IF-NEXT: addi sp, sp, -16
; CHECK-RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw a0, 4(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw a0, 4(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw a1, 0(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw a1, 0(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: addi s0, sp, 16 ; CHECK-RV32IF-NEXT: addi s0, sp, 16
; CHECK-RV32IF-NEXT: lui a0, %hi(a) ; CHECK-RV32IF-NEXT: lui a0, %hi(a)
; CHECK-RV32IF-NEXT: lw a0, %lo(a)(a0) ; CHECK-RV32IF-NEXT: lw a0, %lo(a)(a0)
; CHECK-RV32IF-NEXT: lui a1, %hi(b) ; CHECK-RV32IF-NEXT: lui a1, %hi(b)
; CHECK-RV32IF-NEXT: lw a1, %lo(b)(a1) ; CHECK-RV32IF-NEXT: lw a1, %lo(b)(a1)
; CHECK-RV32IF-NEXT: add a0, a1, a0 ; CHECK-RV32IF-NEXT: add a0, a1, a0
; CHECK-RV32IF-NEXT: lui a1, %hi(c) ; CHECK-RV32IF-NEXT: lui a1, %hi(c)
; CHECK-RV32IF-NEXT: sw a0, %lo(c)(a1) ; CHECK-RV32IF-NEXT: sw a0, %lo(c)(a1)
; CHECK-RV32IF-NEXT: lw a1, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a1, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 16 ; CHECK-RV32IF-NEXT: addi sp, sp, 16
; CHECK-RV32IF-NEXT: mret ; CHECK-RV32IF-NEXT: mret
; ;
; CHECK-RV32IFD-LABEL: foo_fp_i32: ; CHECK-RV32IFD-LABEL: foo_fp_i32:
; CHECK-RV32IFD: # %bb.0: ; CHECK-RV32IFD: # %bb.0:
; CHECK-RV32IFD-NEXT: addi sp, sp, -16 ; CHECK-RV32IFD-NEXT: addi sp, sp, -16
; CHECK-RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw a0, 4(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a0, 4(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw a1, 0(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a1, 0(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: addi s0, sp, 16 ; CHECK-RV32IFD-NEXT: addi s0, sp, 16
; CHECK-RV32IFD-NEXT: lui a0, %hi(a) ; CHECK-RV32IFD-NEXT: lui a0, %hi(a)
; CHECK-RV32IFD-NEXT: lw a0, %lo(a)(a0) ; CHECK-RV32IFD-NEXT: lw a0, %lo(a)(a0)
; CHECK-RV32IFD-NEXT: lui a1, %hi(b) ; CHECK-RV32IFD-NEXT: lui a1, %hi(b)
; CHECK-RV32IFD-NEXT: lw a1, %lo(b)(a1) ; CHECK-RV32IFD-NEXT: lw a1, %lo(b)(a1)
; CHECK-RV32IFD-NEXT: add a0, a1, a0 ; CHECK-RV32IFD-NEXT: add a0, a1, a0
; CHECK-RV32IFD-NEXT: lui a1, %hi(c) ; CHECK-RV32IFD-NEXT: lui a1, %hi(c)
; CHECK-RV32IFD-NEXT: sw a0, %lo(c)(a1) ; CHECK-RV32IFD-NEXT: sw a0, %lo(c)(a1)
; CHECK-RV32IFD-NEXT: lw a1, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; CHECK-RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a1, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: addi sp, sp, 16 ; CHECK-RV32IFD-NEXT: addi sp, sp, 16
; CHECK-RV32IFD-NEXT: mret ; CHECK-RV32IFD-NEXT: mret
%1 = load i32, i32* @a %1 = load i32, i32* @a
%2 = load i32, i32* @b %2 = load i32, i32* @b
%add = add nsw i32 %2, %1 %add = add nsw i32 %2, %1
store i32 %add, i32* @c store i32 %add, i32* @c
ret void ret void
} }
Show All 24 Lines
; CHECK-RV32-NEXT: sw t6, 0(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t6, 0(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: lui a0, %hi(e) ; CHECK-RV32-NEXT: lui a0, %hi(e)
; CHECK-RV32-NEXT: lw a0, %lo(e)(a0) ; CHECK-RV32-NEXT: lw a0, %lo(e)(a0)
; CHECK-RV32-NEXT: lui a1, %hi(f) ; CHECK-RV32-NEXT: lui a1, %hi(f)
; CHECK-RV32-NEXT: lw a1, %lo(f)(a1) ; CHECK-RV32-NEXT: lw a1, %lo(f)(a1)
; CHECK-RV32-NEXT: call __addsf3@plt ; CHECK-RV32-NEXT: call __addsf3@plt
; CHECK-RV32-NEXT: lui a1, %hi(d) ; CHECK-RV32-NEXT: lui a1, %hi(d)
; CHECK-RV32-NEXT: sw a0, %lo(d)(a1) ; CHECK-RV32-NEXT: sw a0, %lo(d)(a1)
; CHECK-RV32-NEXT: lw t6, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t6, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 64 ; CHECK-RV32-NEXT: addi sp, sp, 64
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32IF-LABEL: foo_float: ; CHECK-RV32IF-LABEL: foo_float:
; CHECK-RV32IF: # %bb.0: ; CHECK-RV32IF: # %bb.0:
; CHECK-RV32IF-NEXT: addi sp, sp, -16 ; CHECK-RV32IF-NEXT: addi sp, sp, -16
; CHECK-RV32IF-NEXT: sw a0, 12(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw a0, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft0, 8(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: fsw ft0, 8(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft1, 4(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: fsw ft1, 4(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: lui a0, %hi(e) ; CHECK-RV32IF-NEXT: lui a0, %hi(e)
; CHECK-RV32IF-NEXT: flw ft0, %lo(e)(a0) ; CHECK-RV32IF-NEXT: flw ft0, %lo(e)(a0)
; CHECK-RV32IF-NEXT: lui a0, %hi(f) ; CHECK-RV32IF-NEXT: lui a0, %hi(f)
; CHECK-RV32IF-NEXT: flw ft1, %lo(f)(a0) ; CHECK-RV32IF-NEXT: flw ft1, %lo(f)(a0)
; CHECK-RV32IF-NEXT: fadd.s ft0, ft0, ft1 ; CHECK-RV32IF-NEXT: fadd.s ft0, ft0, ft1
; CHECK-RV32IF-NEXT: lui a0, %hi(d) ; CHECK-RV32IF-NEXT: lui a0, %hi(d)
; CHECK-RV32IF-NEXT: fsw ft0, %lo(d)(a0) ; CHECK-RV32IF-NEXT: fsw ft0, %lo(d)(a0)
; CHECK-RV32IF-NEXT: flw ft1, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 12(sp) # 4-byte Folded Reload ; CHECK-RV32IF-NEXT: lw a0, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft1, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 16 ; CHECK-RV32IF-NEXT: addi sp, sp, 16
; CHECK-RV32IF-NEXT: mret ; CHECK-RV32IF-NEXT: mret
; ;
; CHECK-RV32IFD-LABEL: foo_float: ; CHECK-RV32IFD-LABEL: foo_float:
; CHECK-RV32IFD: # %bb.0: ; CHECK-RV32IFD: # %bb.0:
; CHECK-RV32IFD-NEXT: addi sp, sp, -32 ; CHECK-RV32IFD-NEXT: addi sp, sp, -32
; CHECK-RV32IFD-NEXT: sw a0, 28(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a0, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft1, 8(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft1, 8(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: lui a0, %hi(e) ; CHECK-RV32IFD-NEXT: lui a0, %hi(e)
; CHECK-RV32IFD-NEXT: flw ft0, %lo(e)(a0) ; CHECK-RV32IFD-NEXT: flw ft0, %lo(e)(a0)
; CHECK-RV32IFD-NEXT: lui a0, %hi(f) ; CHECK-RV32IFD-NEXT: lui a0, %hi(f)
; CHECK-RV32IFD-NEXT: flw ft1, %lo(f)(a0) ; CHECK-RV32IFD-NEXT: flw ft1, %lo(f)(a0)
; CHECK-RV32IFD-NEXT: fadd.s ft0, ft0, ft1 ; CHECK-RV32IFD-NEXT: fadd.s ft0, ft0, ft1
; CHECK-RV32IFD-NEXT: lui a0, %hi(d) ; CHECK-RV32IFD-NEXT: lui a0, %hi(d)
; CHECK-RV32IFD-NEXT: fsw ft0, %lo(d)(a0) ; CHECK-RV32IFD-NEXT: fsw ft0, %lo(d)(a0)
; CHECK-RV32IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 28(sp) # 4-byte Folded Reload ; CHECK-RV32IFD-NEXT: lw a0, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: addi sp, sp, 32 ; CHECK-RV32IFD-NEXT: addi sp, sp, 32
; CHECK-RV32IFD-NEXT: mret ; CHECK-RV32IFD-NEXT: mret
%1 = load float, float* @e %1 = load float, float* @e
%2 = load float, float* @f %2 = load float, float* @f
%add = fadd float %1, %2 %add = fadd float %1, %2
store float %add, float* @d store float %add, float* @d
ret void ret void
} }
Show All 25 Lines
; CHECK-RV32-NEXT: addi s0, sp, 80 ; CHECK-RV32-NEXT: addi s0, sp, 80
; CHECK-RV32-NEXT: lui a0, %hi(e) ; CHECK-RV32-NEXT: lui a0, %hi(e)
; CHECK-RV32-NEXT: lw a0, %lo(e)(a0) ; CHECK-RV32-NEXT: lw a0, %lo(e)(a0)
; CHECK-RV32-NEXT: lui a1, %hi(f) ; CHECK-RV32-NEXT: lui a1, %hi(f)
; CHECK-RV32-NEXT: lw a1, %lo(f)(a1) ; CHECK-RV32-NEXT: lw a1, %lo(f)(a1)
; CHECK-RV32-NEXT: call __addsf3@plt ; CHECK-RV32-NEXT: call __addsf3@plt
; CHECK-RV32-NEXT: lui a1, %hi(d) ; CHECK-RV32-NEXT: lui a1, %hi(d)
; CHECK-RV32-NEXT: sw a0, %lo(d)(a1) ; CHECK-RV32-NEXT: sw a0, %lo(d)(a1)
; CHECK-RV32-NEXT: lw t6, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t6, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 80 ; CHECK-RV32-NEXT: addi sp, sp, 80
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32IF-LABEL: foo_fp_float: ; CHECK-RV32IF-LABEL: foo_fp_float:
; CHECK-RV32IF: # %bb.0: ; CHECK-RV32IF: # %bb.0:
; CHECK-RV32IF-NEXT: addi sp, sp, -32 ; CHECK-RV32IF-NEXT: addi sp, sp, -32
; CHECK-RV32IF-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw a0, 20(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw a0, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft0, 16(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: fsw ft0, 16(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: fsw ft1, 12(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: fsw ft1, 12(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: addi s0, sp, 32 ; CHECK-RV32IF-NEXT: addi s0, sp, 32
; CHECK-RV32IF-NEXT: lui a0, %hi(e) ; CHECK-RV32IF-NEXT: lui a0, %hi(e)
; CHECK-RV32IF-NEXT: flw ft0, %lo(e)(a0) ; CHECK-RV32IF-NEXT: flw ft0, %lo(e)(a0)
; CHECK-RV32IF-NEXT: lui a0, %hi(f) ; CHECK-RV32IF-NEXT: lui a0, %hi(f)
; CHECK-RV32IF-NEXT: flw ft1, %lo(f)(a0) ; CHECK-RV32IF-NEXT: flw ft1, %lo(f)(a0)
; CHECK-RV32IF-NEXT: fadd.s ft0, ft0, ft1 ; CHECK-RV32IF-NEXT: fadd.s ft0, ft0, ft1
; CHECK-RV32IF-NEXT: lui a0, %hi(d) ; CHECK-RV32IF-NEXT: lui a0, %hi(d)
; CHECK-RV32IF-NEXT: fsw ft0, %lo(d)(a0) ; CHECK-RV32IF-NEXT: fsw ft0, %lo(d)(a0)
; CHECK-RV32IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; CHECK-RV32IF-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft1, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 32 ; CHECK-RV32IF-NEXT: addi sp, sp, 32
; CHECK-RV32IF-NEXT: mret ; CHECK-RV32IF-NEXT: mret
; ;
; CHECK-RV32IFD-LABEL: foo_fp_float: ; CHECK-RV32IFD-LABEL: foo_fp_float:
; CHECK-RV32IFD: # %bb.0: ; CHECK-RV32IFD: # %bb.0:
; CHECK-RV32IFD-NEXT: addi sp, sp, -32 ; CHECK-RV32IFD-NEXT: addi sp, sp, -32
; CHECK-RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw a0, 20(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a0, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft1, 0(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft1, 0(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: addi s0, sp, 32 ; CHECK-RV32IFD-NEXT: addi s0, sp, 32
; CHECK-RV32IFD-NEXT: lui a0, %hi(e) ; CHECK-RV32IFD-NEXT: lui a0, %hi(e)
; CHECK-RV32IFD-NEXT: flw ft0, %lo(e)(a0) ; CHECK-RV32IFD-NEXT: flw ft0, %lo(e)(a0)
; CHECK-RV32IFD-NEXT: lui a0, %hi(f) ; CHECK-RV32IFD-NEXT: lui a0, %hi(f)
; CHECK-RV32IFD-NEXT: flw ft1, %lo(f)(a0) ; CHECK-RV32IFD-NEXT: flw ft1, %lo(f)(a0)
; CHECK-RV32IFD-NEXT: fadd.s ft0, ft0, ft1 ; CHECK-RV32IFD-NEXT: fadd.s ft0, ft0, ft1
; CHECK-RV32IFD-NEXT: lui a0, %hi(d) ; CHECK-RV32IFD-NEXT: lui a0, %hi(d)
; CHECK-RV32IFD-NEXT: fsw ft0, %lo(d)(a0) ; CHECK-RV32IFD-NEXT: fsw ft0, %lo(d)(a0)
; CHECK-RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; CHECK-RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: addi sp, sp, 32 ; CHECK-RV32IFD-NEXT: addi sp, sp, 32
; CHECK-RV32IFD-NEXT: mret ; CHECK-RV32IFD-NEXT: mret
%1 = load float, float* @e %1 = load float, float* @e
%2 = load float, float* @f %2 = load float, float* @f
%add = fadd float %1, %2 %add = fadd float %1, %2
store float %add, float* @d store float %add, float* @d
ret void ret void
} }
Show All 27 Lines
; CHECK-RV32-NEXT: lw a1, %lo(h+4)(a1) ; CHECK-RV32-NEXT: lw a1, %lo(h+4)(a1)
; CHECK-RV32-NEXT: lui a3, %hi(i) ; CHECK-RV32-NEXT: lui a3, %hi(i)
; CHECK-RV32-NEXT: lw a2, %lo(i)(a3) ; CHECK-RV32-NEXT: lw a2, %lo(i)(a3)
; CHECK-RV32-NEXT: lw a3, %lo(i+4)(a3) ; CHECK-RV32-NEXT: lw a3, %lo(i+4)(a3)
; CHECK-RV32-NEXT: call __adddf3@plt ; CHECK-RV32-NEXT: call __adddf3@plt
; CHECK-RV32-NEXT: lui a2, %hi(g) ; CHECK-RV32-NEXT: lui a2, %hi(g)
; CHECK-RV32-NEXT: sw a1, %lo(g+4)(a2) ; CHECK-RV32-NEXT: sw a1, %lo(g+4)(a2)
; CHECK-RV32-NEXT: sw a0, %lo(g)(a2) ; CHECK-RV32-NEXT: sw a0, %lo(g)(a2)
; CHECK-RV32-NEXT: lw t6, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t6, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 64 ; CHECK-RV32-NEXT: addi sp, sp, 64
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32IF-LABEL: foo_double: ; CHECK-RV32IF-LABEL: foo_double:
; CHECK-RV32IF: # %bb.0: ; CHECK-RV32IF: # %bb.0:
; CHECK-RV32IF-NEXT: addi sp, sp, -192 ; CHECK-RV32IF-NEXT: addi sp, sp, -192
; CHECK-RV32IF-NEXT: sw ra, 188(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw ra, 188(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw t0, 184(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw t0, 184(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; CHECK-RV32IF-NEXT: lw a1, %lo(h+4)(a1) ; CHECK-RV32IF-NEXT: lw a1, %lo(h+4)(a1)
; CHECK-RV32IF-NEXT: lui a3, %hi(i) ; CHECK-RV32IF-NEXT: lui a3, %hi(i)
; CHECK-RV32IF-NEXT: lw a2, %lo(i)(a3) ; CHECK-RV32IF-NEXT: lw a2, %lo(i)(a3)
; CHECK-RV32IF-NEXT: lw a3, %lo(i+4)(a3) ; CHECK-RV32IF-NEXT: lw a3, %lo(i+4)(a3)
; CHECK-RV32IF-NEXT: call __adddf3@plt ; CHECK-RV32IF-NEXT: call __adddf3@plt
; CHECK-RV32IF-NEXT: lui a2, %hi(g) ; CHECK-RV32IF-NEXT: lui a2, %hi(g)
; CHECK-RV32IF-NEXT: sw a1, %lo(g+4)(a2) ; CHECK-RV32IF-NEXT: sw a1, %lo(g+4)(a2)
; CHECK-RV32IF-NEXT: sw a0, %lo(g)(a2) ; CHECK-RV32IF-NEXT: sw a0, %lo(g)(a2)
; CHECK-RV32IF-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t6, 128(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t5, 132(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t4, 136(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t3, 140(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a7, 144(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a6, 148(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a5, 152(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a4, 156(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a3, 160(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a2, 164(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a1, 168(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 172(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw ra, 188(sp) # 4-byte Folded Reload ; CHECK-RV32IF-NEXT: lw ra, 188(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 172(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a1, 168(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a2, 164(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a3, 160(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a4, 156(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a5, 152(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a6, 148(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a7, 144(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t3, 140(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t4, 136(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t5, 132(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t6, 128(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 192 ; CHECK-RV32IF-NEXT: addi sp, sp, 192
; CHECK-RV32IF-NEXT: mret ; CHECK-RV32IF-NEXT: mret
; ;
; CHECK-RV32IFD-LABEL: foo_double: ; CHECK-RV32IFD-LABEL: foo_double:
; CHECK-RV32IFD: # %bb.0: ; CHECK-RV32IFD: # %bb.0:
; CHECK-RV32IFD-NEXT: addi sp, sp, -32 ; CHECK-RV32IFD-NEXT: addi sp, sp, -32
; CHECK-RV32IFD-NEXT: sw a0, 28(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a0, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft0, 16(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft1, 8(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft1, 8(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: lui a0, %hi(h) ; CHECK-RV32IFD-NEXT: lui a0, %hi(h)
; CHECK-RV32IFD-NEXT: fld ft0, %lo(h)(a0) ; CHECK-RV32IFD-NEXT: fld ft0, %lo(h)(a0)
; CHECK-RV32IFD-NEXT: lui a0, %hi(i) ; CHECK-RV32IFD-NEXT: lui a0, %hi(i)
; CHECK-RV32IFD-NEXT: fld ft1, %lo(i)(a0) ; CHECK-RV32IFD-NEXT: fld ft1, %lo(i)(a0)
; CHECK-RV32IFD-NEXT: fadd.d ft0, ft0, ft1 ; CHECK-RV32IFD-NEXT: fadd.d ft0, ft0, ft1
; CHECK-RV32IFD-NEXT: lui a0, %hi(g) ; CHECK-RV32IFD-NEXT: lui a0, %hi(g)
; CHECK-RV32IFD-NEXT: fsd ft0, %lo(g)(a0) ; CHECK-RV32IFD-NEXT: fsd ft0, %lo(g)(a0)
; CHECK-RV32IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 28(sp) # 4-byte Folded Reload ; CHECK-RV32IFD-NEXT: lw a0, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 16(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft1, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: addi sp, sp, 32 ; CHECK-RV32IFD-NEXT: addi sp, sp, 32
; CHECK-RV32IFD-NEXT: mret ; CHECK-RV32IFD-NEXT: mret
%1 = load double, double* @h %1 = load double, double* @h
%2 = load double, double* @i %2 = load double, double* @i
%add = fadd double %1, %2 %add = fadd double %1, %2
store double %add, double* @g store double %add, double* @g
ret void ret void
} }
Show All 28 Lines
; CHECK-RV32-NEXT: lw a1, %lo(h+4)(a1) ; CHECK-RV32-NEXT: lw a1, %lo(h+4)(a1)
; CHECK-RV32-NEXT: lui a3, %hi(i) ; CHECK-RV32-NEXT: lui a3, %hi(i)
; CHECK-RV32-NEXT: lw a2, %lo(i)(a3) ; CHECK-RV32-NEXT: lw a2, %lo(i)(a3)
; CHECK-RV32-NEXT: lw a3, %lo(i+4)(a3) ; CHECK-RV32-NEXT: lw a3, %lo(i+4)(a3)
; CHECK-RV32-NEXT: call __adddf3@plt ; CHECK-RV32-NEXT: call __adddf3@plt
; CHECK-RV32-NEXT: lui a2, %hi(g) ; CHECK-RV32-NEXT: lui a2, %hi(g)
; CHECK-RV32-NEXT: sw a1, %lo(g+4)(a2) ; CHECK-RV32-NEXT: sw a1, %lo(g+4)(a2)
; CHECK-RV32-NEXT: sw a0, %lo(g)(a2) ; CHECK-RV32-NEXT: sw a0, %lo(g)(a2)
; CHECK-RV32-NEXT: lw t6, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t6, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 80 ; CHECK-RV32-NEXT: addi sp, sp, 80
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32IF-LABEL: foo_fp_double: ; CHECK-RV32IF-LABEL: foo_fp_double:
; CHECK-RV32IF: # %bb.0: ; CHECK-RV32IF: # %bb.0:
; CHECK-RV32IF-NEXT: addi sp, sp, -208 ; CHECK-RV32IF-NEXT: addi sp, sp, -208
; CHECK-RV32IF-NEXT: sw ra, 204(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw ra, 204(sp) # 4-byte Folded Spill
; CHECK-RV32IF-NEXT: sw t0, 200(sp) # 4-byte Folded Spill ; CHECK-RV32IF-NEXT: sw t0, 200(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; CHECK-RV32IF-NEXT: lw a1, %lo(h+4)(a1) ; CHECK-RV32IF-NEXT: lw a1, %lo(h+4)(a1)
; CHECK-RV32IF-NEXT: lui a3, %hi(i) ; CHECK-RV32IF-NEXT: lui a3, %hi(i)
; CHECK-RV32IF-NEXT: lw a2, %lo(i)(a3) ; CHECK-RV32IF-NEXT: lw a2, %lo(i)(a3)
; CHECK-RV32IF-NEXT: lw a3, %lo(i+4)(a3) ; CHECK-RV32IF-NEXT: lw a3, %lo(i+4)(a3)
; CHECK-RV32IF-NEXT: call __adddf3@plt ; CHECK-RV32IF-NEXT: call __adddf3@plt
; CHECK-RV32IF-NEXT: lui a2, %hi(g) ; CHECK-RV32IF-NEXT: lui a2, %hi(g)
; CHECK-RV32IF-NEXT: sw a1, %lo(g+4)(a2) ; CHECK-RV32IF-NEXT: sw a1, %lo(g+4)(a2)
; CHECK-RV32IF-NEXT: sw a0, %lo(g)(a2) ; CHECK-RV32IF-NEXT: sw a0, %lo(g)(a2)
; CHECK-RV32IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft7, 108(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft6, 112(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft5, 116(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft4, 120(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft3, 124(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft2, 128(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft1, 132(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 136(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t6, 140(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t5, 144(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t4, 148(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t3, 152(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a7, 156(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a6, 160(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a5, 164(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a4, 168(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a3, 172(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw s0, 188(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t2, 192(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t1, 196(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t0, 200(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw ra, 204(sp) # 4-byte Folded Reload ; CHECK-RV32IF-NEXT: lw ra, 204(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t0, 200(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t1, 196(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t2, 192(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw s0, 188(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a3, 172(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a4, 168(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a5, 164(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a6, 160(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw a7, 156(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t3, 152(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t4, 148(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t5, 144(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: lw t6, 140(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft0, 136(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft1, 132(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft2, 128(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft3, 124(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft4, 120(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft5, 116(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft6, 112(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft7, 108(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa0, 104(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa1, 100(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa2, 96(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa3, 92(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa4, 88(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa5, 84(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa6, 80(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fa7, 76(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft8, 72(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft9, 68(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft10, 64(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw ft11, 60(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs8, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs9, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs10, 16(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
; CHECK-RV32IF-NEXT: addi sp, sp, 208 ; CHECK-RV32IF-NEXT: addi sp, sp, 208
; CHECK-RV32IF-NEXT: mret ; CHECK-RV32IF-NEXT: mret
; ;
; CHECK-RV32IFD-LABEL: foo_fp_double: ; CHECK-RV32IFD-LABEL: foo_fp_double:
; CHECK-RV32IFD: # %bb.0: ; CHECK-RV32IFD: # %bb.0:
; CHECK-RV32IFD-NEXT: addi sp, sp, -32 ; CHECK-RV32IFD-NEXT: addi sp, sp, -32
; CHECK-RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: sw a0, 20(sp) # 4-byte Folded Spill ; CHECK-RV32IFD-NEXT: sw a0, 20(sp) # 4-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft0, 8(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: fsd ft1, 0(sp) # 8-byte Folded Spill ; CHECK-RV32IFD-NEXT: fsd ft1, 0(sp) # 8-byte Folded Spill
; CHECK-RV32IFD-NEXT: addi s0, sp, 32 ; CHECK-RV32IFD-NEXT: addi s0, sp, 32
; CHECK-RV32IFD-NEXT: lui a0, %hi(h) ; CHECK-RV32IFD-NEXT: lui a0, %hi(h)
; CHECK-RV32IFD-NEXT: fld ft0, %lo(h)(a0) ; CHECK-RV32IFD-NEXT: fld ft0, %lo(h)(a0)
; CHECK-RV32IFD-NEXT: lui a0, %hi(i) ; CHECK-RV32IFD-NEXT: lui a0, %hi(i)
; CHECK-RV32IFD-NEXT: fld ft1, %lo(i)(a0) ; CHECK-RV32IFD-NEXT: fld ft1, %lo(i)(a0)
; CHECK-RV32IFD-NEXT: fadd.d ft0, ft0, ft1 ; CHECK-RV32IFD-NEXT: fadd.d ft0, ft0, ft1
; CHECK-RV32IFD-NEXT: lui a0, %hi(g) ; CHECK-RV32IFD-NEXT: lui a0, %hi(g)
; CHECK-RV32IFD-NEXT: fsd ft0, %lo(g)(a0) ; CHECK-RV32IFD-NEXT: fsd ft0, %lo(g)(a0)
; CHECK-RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; CHECK-RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: lw a0, 20(sp) # 4-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft0, 8(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: fld ft1, 0(sp) # 8-byte Folded Reload
; CHECK-RV32IFD-NEXT: addi sp, sp, 32 ; CHECK-RV32IFD-NEXT: addi sp, sp, 32
; CHECK-RV32IFD-NEXT: mret ; CHECK-RV32IFD-NEXT: mret
%1 = load double, double* @h %1 = load double, double* @h
%2 = load double, double* @i %2 = load double, double* @i
%add = fadd double %1, %2 %add = fadd double %1, %2
store double %add, double* @g store double %add, double* @g
ret void ret void
} }
attributes #0 = { "interrupt"="machine" } attributes #0 = { "interrupt"="machine" }
attributes #1 = { "interrupt"="machine" "frame-pointer"="all" } attributes #1 = { "interrupt"="machine" "frame-pointer"="all" }

llvm/test/CodeGen/RISCV/interrupt-attr.ll

Show First 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; CHECK-RV32-NEXT: sw a5, 24(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw a5, 24(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw a6, 20(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw a6, 20(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw a7, 16(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw a7, 16(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t3, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t3, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t4, 8(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t4, 8(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t5, 4(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t5, 4(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t6, 0(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t6, 0(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: call otherfoo@plt ; CHECK-RV32-NEXT: call otherfoo@plt
; CHECK-RV32-NEXT: lw t6, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t6, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 64 ; CHECK-RV32-NEXT: addi sp, sp, 64
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32-F-LABEL: foo_with_call: ; CHECK-RV32-F-LABEL: foo_with_call:
; CHECK-RV32-F: # %bb.0: ; CHECK-RV32-F: # %bb.0:
; CHECK-RV32-F-NEXT: addi sp, sp, -192 ; CHECK-RV32-F-NEXT: addi sp, sp, -192
; CHECK-RV32-F-NEXT: sw ra, 188(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: sw ra, 188(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: sw t0, 184(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: sw t0, 184(sp) # 4-byte Folded Spill
Show All 39 Lines
; CHECK-RV32-F-NEXT: fsw fs5, 24(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs5, 24(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs6, 20(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs6, 20(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs7, 16(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs7, 16(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs9, 8(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs9, 8(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs10, 4(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs10, 4(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs11, 0(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs11, 0(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: call otherfoo@plt ; CHECK-RV32-F-NEXT: call otherfoo@plt
; CHECK-RV32-F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t6, 128(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t5, 132(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t4, 136(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t3, 140(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a7, 144(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a6, 148(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a5, 152(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a4, 156(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a3, 160(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a2, 164(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a1, 168(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a0, 172(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw ra, 188(sp) # 4-byte Folded Reload ; CHECK-RV32-F-NEXT: lw ra, 188(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a0, 172(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a1, 168(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a2, 164(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a3, 160(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a4, 156(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a5, 152(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a6, 148(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a7, 144(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t3, 140(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t4, 136(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t5, 132(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t6, 128(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: addi sp, sp, 192 ; CHECK-RV32-F-NEXT: addi sp, sp, 192
; CHECK-RV32-F-NEXT: mret ; CHECK-RV32-F-NEXT: mret
; ;
; CHECK-RV32-FD-LABEL: foo_with_call: ; CHECK-RV32-FD-LABEL: foo_with_call:
; CHECK-RV32-FD: # %bb.0: ; CHECK-RV32-FD: # %bb.0:
; CHECK-RV32-FD-NEXT: addi sp, sp, -320 ; CHECK-RV32-FD-NEXT: addi sp, sp, -320
; CHECK-RV32-FD-NEXT: sw ra, 316(sp) # 4-byte Folded Spill ; CHECK-RV32-FD-NEXT: sw ra, 316(sp) # 4-byte Folded Spill
; CHECK-RV32-FD-NEXT: sw t0, 312(sp) # 4-byte Folded Spill ; CHECK-RV32-FD-NEXT: sw t0, 312(sp) # 4-byte Folded Spill
Show All 39 Lines
; CHECK-RV32-FD-NEXT: fsd fs5, 48(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs5, 48(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs6, 40(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs6, 40(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs7, 32(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs7, 32(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs8, 24(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs8, 24(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs9, 16(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs9, 16(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs11, 0(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs11, 0(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: call otherfoo@plt ; CHECK-RV32-FD-NEXT: call otherfoo@plt
; CHECK-RV32-FD-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft11, 96(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft10, 104(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft9, 112(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft8, 120(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa7, 128(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa6, 136(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa5, 144(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa4, 152(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa3, 160(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa2, 168(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa1, 176(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa0, 184(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft7, 192(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft6, 200(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft5, 208(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft4, 216(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft3, 224(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft2, 232(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft1, 240(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t6, 256(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t5, 260(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t4, 264(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t3, 268(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a7, 272(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a6, 276(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a5, 280(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a4, 284(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a3, 288(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a2, 292(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a1, 296(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a0, 300(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t2, 304(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t1, 308(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t0, 312(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw ra, 316(sp) # 4-byte Folded Reload ; CHECK-RV32-FD-NEXT: lw ra, 316(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t0, 312(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t1, 308(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t2, 304(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a0, 300(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a1, 296(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a2, 292(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a3, 288(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a4, 284(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a5, 280(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a6, 276(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a7, 272(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t3, 268(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t4, 264(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t5, 260(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t6, 256(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft1, 240(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft2, 232(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft3, 224(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft4, 216(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft5, 208(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft6, 200(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft7, 192(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa0, 184(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa1, 176(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa2, 168(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa3, 160(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa4, 152(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa5, 144(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa6, 136(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa7, 128(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft8, 120(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft9, 112(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft10, 104(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft11, 96(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: addi sp, sp, 320 ; CHECK-RV32-FD-NEXT: addi sp, sp, 320
; CHECK-RV32-FD-NEXT: mret ; CHECK-RV32-FD-NEXT: mret
; ;
; CHECK-RV64-LABEL: foo_with_call: ; CHECK-RV64-LABEL: foo_with_call:
; CHECK-RV64: # %bb.0: ; CHECK-RV64: # %bb.0:
; CHECK-RV64-NEXT: addi sp, sp, -128 ; CHECK-RV64-NEXT: addi sp, sp, -128
; CHECK-RV64-NEXT: sd ra, 120(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd ra, 120(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t0, 112(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t0, 112(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t1, 104(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t1, 104(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t2, 96(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t2, 96(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a0, 88(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a0, 88(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a1, 80(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a1, 80(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a2, 72(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a2, 72(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a3, 64(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a3, 64(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a4, 56(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a4, 56(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a5, 48(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a5, 48(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a6, 40(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a6, 40(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a7, 32(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a7, 32(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t3, 24(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t3, 24(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t4, 16(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t4, 16(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t5, 8(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t5, 8(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t6, 0(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t6, 0(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: call otherfoo@plt ; CHECK-RV64-NEXT: call otherfoo@plt
; CHECK-RV64-NEXT: ld t6, 0(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t5, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t4, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t3, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a7, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a6, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a5, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a4, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a3, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a2, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a1, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a0, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t2, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t1, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t0, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld ra, 120(sp) # 8-byte Folded Reload ; CHECK-RV64-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t0, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t1, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t2, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a0, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a1, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a2, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a3, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a4, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a5, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a6, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a7, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t3, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t4, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t5, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t6, 0(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: addi sp, sp, 128 ; CHECK-RV64-NEXT: addi sp, sp, 128
; CHECK-RV64-NEXT: mret ; CHECK-RV64-NEXT: mret
; ;
; CHECK-RV64-F-LABEL: foo_with_call: ; CHECK-RV64-F-LABEL: foo_with_call:
; CHECK-RV64-F: # %bb.0: ; CHECK-RV64-F: # %bb.0:
; CHECK-RV64-F-NEXT: addi sp, sp, -256 ; CHECK-RV64-F-NEXT: addi sp, sp, -256
; CHECK-RV64-F-NEXT: sd ra, 248(sp) # 8-byte Folded Spill ; CHECK-RV64-F-NEXT: sd ra, 248(sp) # 8-byte Folded Spill
; CHECK-RV64-F-NEXT: sd t0, 240(sp) # 8-byte Folded Spill ; CHECK-RV64-F-NEXT: sd t0, 240(sp) # 8-byte Folded Spill
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; CHECK-RV64-F-NEXT: fsw fs5, 24(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs5, 24(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs6, 20(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs6, 20(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs7, 16(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs7, 16(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs8, 12(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs9, 8(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs9, 8(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs10, 4(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs10, 4(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs11, 0(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs11, 0(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: call otherfoo@plt ; CHECK-RV64-F-NEXT: call otherfoo@plt
; CHECK-RV64-F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t6, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t5, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t4, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t3, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a7, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a6, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a5, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a4, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a3, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a2, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a1, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a0, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t2, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t1, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t0, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld ra, 248(sp) # 8-byte Folded Reload ; CHECK-RV64-F-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t0, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t1, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t2, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a0, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a1, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a2, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a3, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a4, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a5, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a6, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a7, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t3, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t4, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t5, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t6, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft0, 124(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft1, 120(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft2, 116(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft3, 112(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft4, 108(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft5, 104(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft6, 100(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft7, 96(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa0, 92(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa1, 88(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa2, 84(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa3, 80(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa4, 76(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa5, 72(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa6, 68(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa7, 64(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft8, 60(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft9, 56(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft10, 52(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft11, 48(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs0, 44(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs1, 40(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs2, 36(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs3, 32(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs4, 28(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs5, 24(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs6, 20(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs7, 16(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs8, 12(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs9, 8(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs10, 4(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs11, 0(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: addi sp, sp, 256 ; CHECK-RV64-F-NEXT: addi sp, sp, 256
; CHECK-RV64-F-NEXT: mret ; CHECK-RV64-F-NEXT: mret
; ;
; CHECK-RV64-FD-LABEL: foo_with_call: ; CHECK-RV64-FD-LABEL: foo_with_call:
; CHECK-RV64-FD: # %bb.0: ; CHECK-RV64-FD: # %bb.0:
; CHECK-RV64-FD-NEXT: addi sp, sp, -384 ; CHECK-RV64-FD-NEXT: addi sp, sp, -384
; CHECK-RV64-FD-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: sd t0, 368(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: sd t0, 368(sp) # 8-byte Folded Spill
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; CHECK-RV64-FD-NEXT: fsd fs5, 48(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs5, 48(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs6, 40(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs6, 40(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs7, 32(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs7, 32(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs8, 24(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs8, 24(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs9, 16(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs9, 16(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs11, 0(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs11, 0(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: call otherfoo@plt ; CHECK-RV64-FD-NEXT: call otherfoo@plt
; CHECK-RV64-FD-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft11, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft10, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft9, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft8, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa7, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa6, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa5, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa4, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa3, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa2, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa1, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa0, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft7, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft6, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft5, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft4, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft3, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft2, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft1, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t6, 256(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t5, 264(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t4, 272(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t3, 280(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a7, 288(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a6, 296(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a5, 304(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a4, 312(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a3, 320(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a2, 328(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a1, 336(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a0, 344(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t2, 352(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t1, 360(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t0, 368(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; CHECK-RV64-FD-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t0, 368(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t1, 360(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t2, 352(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a0, 344(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a1, 336(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a2, 328(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a3, 320(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a4, 312(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a5, 304(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a6, 296(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a7, 288(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t3, 280(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t4, 272(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t5, 264(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t6, 256(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft0, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft1, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft2, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft3, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft4, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft5, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft6, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft7, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa0, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa1, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa2, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa3, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa4, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa5, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa6, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa7, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft8, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft9, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft10, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft11, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs0, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs1, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs2, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs3, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs4, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs5, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs6, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs7, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs8, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs9, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs11, 0(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: addi sp, sp, 384 ; CHECK-RV64-FD-NEXT: addi sp, sp, 384
; CHECK-RV64-FD-NEXT: mret ; CHECK-RV64-FD-NEXT: mret
%call = call i32 bitcast (i32 (...)* @otherfoo to i32 ()*)() %call = call i32 bitcast (i32 (...)* @otherfoo to i32 ()*)()
ret void ret void
} }
; ;
; Additionally check frame pointer and return address are properly saved. ; Additionally check frame pointer and return address are properly saved.
Show All 17 Lines
; CHECK-RV32-NEXT: sw a6, 32(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw a6, 32(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw a7, 28(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw a7, 28(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t3, 24(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t3, 24(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t4, 20(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t4, 20(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t5, 16(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t5, 16(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: sw t6, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-NEXT: sw t6, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-NEXT: addi s0, sp, 80 ; CHECK-RV32-NEXT: addi s0, sp, 80
; CHECK-RV32-NEXT: call otherfoo@plt ; CHECK-RV32-NEXT: call otherfoo@plt
; CHECK-RV32-NEXT: lw t6, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload ; CHECK-RV32-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t0, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t1, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t2, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw s0, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw a7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t3, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t4, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t5, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: lw t6, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-NEXT: addi sp, sp, 80 ; CHECK-RV32-NEXT: addi sp, sp, 80
; CHECK-RV32-NEXT: mret ; CHECK-RV32-NEXT: mret
; ;
; CHECK-RV32-F-LABEL: foo_fp_with_call: ; CHECK-RV32-F-LABEL: foo_fp_with_call:
; CHECK-RV32-F: # %bb.0: ; CHECK-RV32-F: # %bb.0:
; CHECK-RV32-F-NEXT: addi sp, sp, -208 ; CHECK-RV32-F-NEXT: addi sp, sp, -208
; CHECK-RV32-F-NEXT: sw ra, 204(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: sw ra, 204(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: sw t0, 200(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: sw t0, 200(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; CHECK-RV32-F-NEXT: fsw fs6, 32(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs6, 32(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs7, 28(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs7, 28(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs8, 24(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs8, 24(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs9, 20(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs9, 20(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs10, 16(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs10, 16(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill ; CHECK-RV32-F-NEXT: fsw fs11, 12(sp) # 4-byte Folded Spill
; CHECK-RV32-F-NEXT: addi s0, sp, 208 ; CHECK-RV32-F-NEXT: addi s0, sp, 208
; CHECK-RV32-F-NEXT: call otherfoo@plt ; CHECK-RV32-F-NEXT: call otherfoo@plt
; CHECK-RV32-F-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs10, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs9, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs8, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft11, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft10, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft9, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft8, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa7, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa6, 80(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa5, 84(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa4, 88(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa3, 92(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa2, 96(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa1, 100(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa0, 104(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft7, 108(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft6, 112(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft5, 116(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft4, 120(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft3, 124(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft2, 128(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft1, 132(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft0, 136(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t6, 140(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t5, 144(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t4, 148(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t3, 152(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a7, 156(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a6, 160(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a5, 164(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a4, 168(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a3, 172(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw s0, 188(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t2, 192(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t1, 196(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t0, 200(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw ra, 204(sp) # 4-byte Folded Reload ; CHECK-RV32-F-NEXT: lw ra, 204(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t0, 200(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t1, 196(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t2, 192(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw s0, 188(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a0, 184(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a1, 180(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a2, 176(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a3, 172(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a4, 168(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a5, 164(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a6, 160(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw a7, 156(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t3, 152(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t4, 148(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t5, 144(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: lw t6, 140(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft0, 136(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft1, 132(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft2, 128(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft3, 124(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft4, 120(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft5, 116(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft6, 112(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft7, 108(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa0, 104(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa1, 100(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa2, 96(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa3, 92(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa4, 88(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa5, 84(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa6, 80(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fa7, 76(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft8, 72(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft9, 68(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft10, 64(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw ft11, 60(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs0, 56(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs1, 52(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs2, 48(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs3, 44(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs4, 40(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs5, 36(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs6, 32(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs7, 28(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs8, 24(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs9, 20(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs10, 16(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: flw fs11, 12(sp) # 4-byte Folded Reload
; CHECK-RV32-F-NEXT: addi sp, sp, 208 ; CHECK-RV32-F-NEXT: addi sp, sp, 208
; CHECK-RV32-F-NEXT: mret ; CHECK-RV32-F-NEXT: mret
; ;
; CHECK-RV32-FD-LABEL: foo_fp_with_call: ; CHECK-RV32-FD-LABEL: foo_fp_with_call:
; CHECK-RV32-FD: # %bb.0: ; CHECK-RV32-FD: # %bb.0:
; CHECK-RV32-FD-NEXT: addi sp, sp, -336 ; CHECK-RV32-FD-NEXT: addi sp, sp, -336
; CHECK-RV32-FD-NEXT: sw ra, 332(sp) # 4-byte Folded Spill ; CHECK-RV32-FD-NEXT: sw ra, 332(sp) # 4-byte Folded Spill
; CHECK-RV32-FD-NEXT: sw t0, 328(sp) # 4-byte Folded Spill ; CHECK-RV32-FD-NEXT: sw t0, 328(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; CHECK-RV32-FD-NEXT: fsd fs6, 48(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs6, 48(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs7, 40(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs7, 40(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs8, 32(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs8, 32(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs9, 24(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs9, 24(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs10, 16(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs10, 16(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill ; CHECK-RV32-FD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
; CHECK-RV32-FD-NEXT: addi s0, sp, 336 ; CHECK-RV32-FD-NEXT: addi s0, sp, 336
; CHECK-RV32-FD-NEXT: call otherfoo@plt ; CHECK-RV32-FD-NEXT: call otherfoo@plt
; CHECK-RV32-FD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs10, 16(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs9, 24(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs8, 32(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs7, 40(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs6, 48(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs5, 56(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs4, 64(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs3, 72(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs2, 80(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs1, 88(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs0, 96(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft11, 104(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft10, 112(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft9, 120(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft8, 128(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa7, 136(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa6, 144(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa5, 152(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa4, 160(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa3, 168(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa2, 176(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa1, 184(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa0, 192(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft7, 200(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft6, 208(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft5, 216(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft4, 224(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft3, 232(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft2, 240(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft1, 248(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t6, 268(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t5, 272(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t4, 276(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t3, 280(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a7, 284(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a6, 288(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a5, 292(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a4, 296(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a3, 300(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a2, 304(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a1, 308(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a0, 312(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw s0, 316(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t2, 320(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t1, 324(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t0, 328(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw ra, 332(sp) # 4-byte Folded Reload ; CHECK-RV32-FD-NEXT: lw ra, 332(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t0, 328(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t1, 324(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t2, 320(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw s0, 316(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a0, 312(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a1, 308(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a2, 304(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a3, 300(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a4, 296(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a5, 292(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a6, 288(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw a7, 284(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t3, 280(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t4, 276(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t5, 272(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: lw t6, 268(sp) # 4-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft1, 248(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft2, 240(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft3, 232(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft4, 224(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft5, 216(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft6, 208(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft7, 200(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa0, 192(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa1, 184(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa2, 176(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa3, 168(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa4, 160(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa5, 152(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa6, 144(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fa7, 136(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft8, 128(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft9, 120(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft10, 112(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld ft11, 104(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs0, 96(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs1, 88(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs2, 80(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs3, 72(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs4, 64(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs5, 56(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs6, 48(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs7, 40(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs8, 32(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs9, 24(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs10, 16(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
; CHECK-RV32-FD-NEXT: addi sp, sp, 336 ; CHECK-RV32-FD-NEXT: addi sp, sp, 336
; CHECK-RV32-FD-NEXT: mret ; CHECK-RV32-FD-NEXT: mret
; ;
; CHECK-RV64-LABEL: foo_fp_with_call: ; CHECK-RV64-LABEL: foo_fp_with_call:
; CHECK-RV64: # %bb.0: ; CHECK-RV64: # %bb.0:
; CHECK-RV64-NEXT: addi sp, sp, -144 ; CHECK-RV64-NEXT: addi sp, sp, -144
; CHECK-RV64-NEXT: sd ra, 136(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd ra, 136(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t0, 128(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t0, 128(sp) # 8-byte Folded Spill
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; CHECK-RV64-NEXT: sd a6, 48(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a6, 48(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd a7, 40(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd a7, 40(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t3, 32(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t3, 32(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t4, 24(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t4, 24(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t5, 16(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t5, 16(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: sd t6, 8(sp) # 8-byte Folded Spill ; CHECK-RV64-NEXT: sd t6, 8(sp) # 8-byte Folded Spill
; CHECK-RV64-NEXT: addi s0, sp, 144 ; CHECK-RV64-NEXT: addi s0, sp, 144
; CHECK-RV64-NEXT: call otherfoo@plt ; CHECK-RV64-NEXT: call otherfoo@plt
; CHECK-RV64-NEXT: ld t6, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t5, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t4, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t3, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a7, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a6, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a5, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a4, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a3, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a2, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a1, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a0, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld s0, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t2, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t1, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t0, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld ra, 136(sp) # 8-byte Folded Reload ; CHECK-RV64-NEXT: ld ra, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t0, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t1, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t2, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld s0, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a0, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a1, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a2, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a3, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a4, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a5, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a6, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld a7, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t3, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t4, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t5, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: ld t6, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-NEXT: addi sp, sp, 144 ; CHECK-RV64-NEXT: addi sp, sp, 144
; CHECK-RV64-NEXT: mret ; CHECK-RV64-NEXT: mret
; ;
; CHECK-RV64-F-LABEL: foo_fp_with_call: ; CHECK-RV64-F-LABEL: foo_fp_with_call:
; CHECK-RV64-F: # %bb.0: ; CHECK-RV64-F: # %bb.0:
; CHECK-RV64-F-NEXT: addi sp, sp, -272 ; CHECK-RV64-F-NEXT: addi sp, sp, -272
; CHECK-RV64-F-NEXT: sd ra, 264(sp) # 8-byte Folded Spill ; CHECK-RV64-F-NEXT: sd ra, 264(sp) # 8-byte Folded Spill
; CHECK-RV64-F-NEXT: sd t0, 256(sp) # 8-byte Folded Spill ; CHECK-RV64-F-NEXT: sd t0, 256(sp) # 8-byte Folded Spill
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; CHECK-RV64-F-NEXT: fsw fs6, 28(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs6, 28(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs7, 24(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs7, 24(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs8, 20(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs8, 20(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs9, 16(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs9, 16(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs10, 12(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs10, 12(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: fsw fs11, 8(sp) # 4-byte Folded Spill ; CHECK-RV64-F-NEXT: fsw fs11, 8(sp) # 4-byte Folded Spill
; CHECK-RV64-F-NEXT: addi s0, sp, 272 ; CHECK-RV64-F-NEXT: addi s0, sp, 272
; CHECK-RV64-F-NEXT: call otherfoo@plt ; CHECK-RV64-F-NEXT: call otherfoo@plt
; CHECK-RV64-F-NEXT: flw fs11, 8(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs10, 12(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs9, 16(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs8, 20(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs7, 24(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs6, 28(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs5, 32(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs4, 36(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs3, 40(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs2, 44(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs1, 48(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs0, 52(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft11, 56(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft10, 60(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft9, 64(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft8, 68(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa7, 72(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa6, 76(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa5, 80(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa4, 84(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa3, 88(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa2, 92(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa1, 96(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa0, 100(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft7, 104(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft6, 108(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft5, 112(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft4, 116(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft3, 120(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft2, 124(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft1, 128(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft0, 132(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t6, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t5, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t4, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t3, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a7, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a6, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a5, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a4, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a3, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a2, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a1, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a0, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld s0, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t2, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t1, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t0, 256(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld ra, 264(sp) # 8-byte Folded Reload ; CHECK-RV64-F-NEXT: ld ra, 264(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t0, 256(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t1, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t2, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld s0, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a0, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a1, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a2, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a3, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a4, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a5, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a6, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld a7, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t3, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t4, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t5, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: ld t6, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft0, 132(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft1, 128(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft2, 124(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft3, 120(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft4, 116(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft5, 112(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft6, 108(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft7, 104(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa0, 100(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa1, 96(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa2, 92(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa3, 88(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa4, 84(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa5, 80(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa6, 76(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fa7, 72(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft8, 68(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft9, 64(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft10, 60(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw ft11, 56(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs0, 52(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs1, 48(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs2, 44(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs3, 40(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs4, 36(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs5, 32(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs6, 28(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs7, 24(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs8, 20(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs9, 16(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs10, 12(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: flw fs11, 8(sp) # 4-byte Folded Reload
; CHECK-RV64-F-NEXT: addi sp, sp, 272 ; CHECK-RV64-F-NEXT: addi sp, sp, 272
; CHECK-RV64-F-NEXT: mret ; CHECK-RV64-F-NEXT: mret
; ;
; CHECK-RV64-FD-LABEL: foo_fp_with_call: ; CHECK-RV64-FD-LABEL: foo_fp_with_call:
; CHECK-RV64-FD: # %bb.0: ; CHECK-RV64-FD: # %bb.0:
; CHECK-RV64-FD-NEXT: addi sp, sp, -400 ; CHECK-RV64-FD-NEXT: addi sp, sp, -400
; CHECK-RV64-FD-NEXT: sd ra, 392(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: sd ra, 392(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: sd t0, 384(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: sd t0, 384(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; CHECK-RV64-FD-NEXT: fsd fs6, 48(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs6, 48(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs7, 40(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs7, 40(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs8, 32(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs8, 32(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs9, 24(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs9, 24(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs10, 16(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs10, 16(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill ; CHECK-RV64-FD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
; CHECK-RV64-FD-NEXT: addi s0, sp, 400 ; CHECK-RV64-FD-NEXT: addi s0, sp, 400
; CHECK-RV64-FD-NEXT: call otherfoo@plt ; CHECK-RV64-FD-NEXT: call otherfoo@plt
; CHECK-RV64-FD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs10, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs9, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs8, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs7, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs6, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs5, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs4, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs3, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs2, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs1, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs0, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft11, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft10, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft9, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft8, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa7, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa6, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa5, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa4, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa3, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa2, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa1, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa0, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft7, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft6, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft5, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft4, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft3, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft2, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft1, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t6, 264(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t5, 272(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t4, 280(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t3, 288(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a7, 296(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a6, 304(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a5, 312(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a4, 320(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a3, 328(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a2, 336(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a1, 344(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a0, 352(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld s0, 360(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t2, 368(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t1, 376(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t0, 384(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld ra, 392(sp) # 8-byte Folded Reload ; CHECK-RV64-FD-NEXT: ld ra, 392(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t0, 384(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t1, 376(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t2, 368(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld s0, 360(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a0, 352(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a1, 344(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a2, 336(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a3, 328(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a4, 320(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a5, 312(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a6, 304(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld a7, 296(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t3, 288(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t4, 280(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t5, 272(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: ld t6, 264(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft0, 256(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft1, 248(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft2, 240(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft3, 232(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft4, 224(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft5, 216(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft6, 208(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft7, 200(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa0, 192(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa1, 184(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa2, 176(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa3, 168(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa4, 160(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa5, 152(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa6, 144(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fa7, 136(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft8, 128(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft9, 120(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft10, 112(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld ft11, 104(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs0, 96(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs1, 88(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs2, 80(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs3, 72(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs4, 64(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs5, 56(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs6, 48(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs7, 40(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs8, 32(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs9, 24(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs10, 16(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
; CHECK-RV64-FD-NEXT: addi sp, sp, 400 ; CHECK-RV64-FD-NEXT: addi sp, sp, 400
; CHECK-RV64-FD-NEXT: mret ; CHECK-RV64-FD-NEXT: mret
%call = call i32 bitcast (i32 (...)* @otherfoo to i32 ()*)() %call = call i32 bitcast (i32 (...)* @otherfoo to i32 ()*)()
ret void ret void
} }
attributes #0 = { nounwind "interrupt"="user" } attributes #0 = { nounwind "interrupt"="user" }
attributes #1 = { nounwind "interrupt"="supervisor" } attributes #1 = { nounwind "interrupt"="supervisor" }
attributes #2 = { nounwind "interrupt"="machine" } attributes #2 = { nounwind "interrupt"="machine" }
attributes #3 = { nounwind "interrupt"="machine" "frame-pointer"="all" } attributes #3 = { nounwind "interrupt"="machine" "frame-pointer"="all" }

llvm/test/CodeGen/RISCV/large-stack.ll

Show All 28 Lines
; RV32I-WITHFP-NEXT: addi s0, sp, 2032 ; RV32I-WITHFP-NEXT: addi s0, sp, 2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa s0, 0 ; RV32I-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32I-WITHFP-NEXT: lui a0, 74565 ; RV32I-WITHFP-NEXT: lui a0, 74565
; RV32I-WITHFP-NEXT: addi a0, a0, -352 ; RV32I-WITHFP-NEXT: addi a0, a0, -352
; RV32I-WITHFP-NEXT: sub sp, sp, a0 ; RV32I-WITHFP-NEXT: sub sp, sp, a0
; RV32I-WITHFP-NEXT: lui a0, 74565 ; RV32I-WITHFP-NEXT: lui a0, 74565
; RV32I-WITHFP-NEXT: addi a0, a0, -352 ; RV32I-WITHFP-NEXT: addi a0, a0, -352
; RV32I-WITHFP-NEXT: add sp, sp, a0 ; RV32I-WITHFP-NEXT: add sp, sp, a0
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 2032 ; RV32I-WITHFP-NEXT: addi sp, sp, 2032
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%tmp = alloca [ 305419896 x i8 ] , align 4 %tmp = alloca [ 305419896 x i8 ] , align 4
ret void ret void
} }
; This test case artificially produces register pressure which should force ; This test case artificially produces register pressure which should force
; use of the emergency spill slot. ; use of the emergency spill slot.
Show All 22 Lines
; RV32I-FPELIM-NEXT: sw a0, 0(a1) ; RV32I-FPELIM-NEXT: sw a0, 0(a1)
; RV32I-FPELIM-NEXT: #APP ; RV32I-FPELIM-NEXT: #APP
; RV32I-FPELIM-NEXT: nop ; RV32I-FPELIM-NEXT: nop
; RV32I-FPELIM-EMPTY: ; RV32I-FPELIM-EMPTY:
; RV32I-FPELIM-NEXT: #NO_APP ; RV32I-FPELIM-NEXT: #NO_APP
; RV32I-FPELIM-NEXT: lui a0, 97 ; RV32I-FPELIM-NEXT: lui a0, 97
; RV32I-FPELIM-NEXT: addi a0, a0, 672 ; RV32I-FPELIM-NEXT: addi a0, a0, 672
; RV32I-FPELIM-NEXT: add sp, sp, a0 ; RV32I-FPELIM-NEXT: add sp, sp, a0
; RV32I-FPELIM-NEXT: lw s1, 2024(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: lw s0, 2028(sp) # 4-byte Folded Reload ; RV32I-FPELIM-NEXT: lw s0, 2028(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: lw s1, 2024(sp) # 4-byte Folded Reload
; RV32I-FPELIM-NEXT: addi sp, sp, 2032 ; RV32I-FPELIM-NEXT: addi sp, sp, 2032
; RV32I-FPELIM-NEXT: ret ; RV32I-FPELIM-NEXT: ret
; ;
; RV32I-WITHFP-LABEL: test_emergency_spill_slot: ; RV32I-WITHFP-LABEL: test_emergency_spill_slot:
; RV32I-WITHFP: # %bb.0: ; RV32I-WITHFP: # %bb.0:
; RV32I-WITHFP-NEXT: addi sp, sp, -2032 ; RV32I-WITHFP-NEXT: addi sp, sp, -2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032 ; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; RV32I-WITHFP-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill ; RV32I-WITHFP-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
Show All 22 Lines
; RV32I-WITHFP-NEXT: sw a0, 0(a1) ; RV32I-WITHFP-NEXT: sw a0, 0(a1)
; RV32I-WITHFP-NEXT: #APP ; RV32I-WITHFP-NEXT: #APP
; RV32I-WITHFP-NEXT: nop ; RV32I-WITHFP-NEXT: nop
; RV32I-WITHFP-EMPTY: ; RV32I-WITHFP-EMPTY:
; RV32I-WITHFP-NEXT: #NO_APP ; RV32I-WITHFP-NEXT: #NO_APP
; RV32I-WITHFP-NEXT: lui a0, 97 ; RV32I-WITHFP-NEXT: lui a0, 97
; RV32I-WITHFP-NEXT: addi a0, a0, 688 ; RV32I-WITHFP-NEXT: addi a0, a0, 688
; RV32I-WITHFP-NEXT: add sp, sp, a0 ; RV32I-WITHFP-NEXT: add sp, sp, a0
; RV32I-WITHFP-NEXT: lw s2, 2016(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload ; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s2, 2016(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: addi sp, sp, 2032 ; RV32I-WITHFP-NEXT: addi sp, sp, 2032
; RV32I-WITHFP-NEXT: ret ; RV32I-WITHFP-NEXT: ret
%data = alloca [ 100000 x i32 ] , align 4 %data = alloca [ 100000 x i32 ] , align 4
%ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %data, i32 0, i32 80000 %ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %data, i32 0, i32 80000
%1 = tail call { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } asm sideeffect "nop", "=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r"() %1 = tail call { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } asm sideeffect "nop", "=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r,=r"()
%asmresult0 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 0 %asmresult0 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 0
%asmresult1 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 1 %asmresult1 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 1
%asmresult2 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 2 %asmresult2 = extractvalue { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %1, 2
Show All 16 Lines

llvm/test/CodeGen/RISCV/mul.ll

Show First 20 Lines • Show All 1,233 Lines • ▼ Show 20 Lines
; RV32IM-NEXT: add a1, a1, a2 ; RV32IM-NEXT: add a1, a1, a2
; RV32IM-NEXT: add a1, a3, a1 ; RV32IM-NEXT: add a1, a3, a1
; RV32IM-NEXT: add a1, a1, s2 ; RV32IM-NEXT: add a1, a1, s2
; RV32IM-NEXT: mul a2, a4, a5 ; RV32IM-NEXT: mul a2, a4, a5
; RV32IM-NEXT: sw a2, 0(a0) ; RV32IM-NEXT: sw a2, 0(a0)
; RV32IM-NEXT: sw t0, 4(a0) ; RV32IM-NEXT: sw t0, 4(a0)
; RV32IM-NEXT: sw t6, 8(a0) ; RV32IM-NEXT: sw t6, 8(a0)
; RV32IM-NEXT: sw a1, 12(a0) ; RV32IM-NEXT: sw a1, 12(a0)
; RV32IM-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32IM-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT: addi sp, sp, 16 ; RV32IM-NEXT: addi sp, sp, 16
; RV32IM-NEXT: ret ; RV32IM-NEXT: ret
; ;
; RV64I-LABEL: muli128_m3840: ; RV64I-LABEL: muli128_m3840:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: srli a2, a0, 52 ; RV64I-NEXT: srli a2, a0, 52
; RV64I-NEXT: slli a3, a1, 12 ; RV64I-NEXT: slli a3, a1, 12
; RV64I-NEXT: or a2, a3, a2 ; RV64I-NEXT: or a2, a3, a2
▲ Show 20 Lines • Show All 112 Lines • ▼ Show 20 Lines
; RV32IM-NEXT: add a1, a2, a1 ; RV32IM-NEXT: add a1, a2, a1
; RV32IM-NEXT: add a1, a1, s0 ; RV32IM-NEXT: add a1, a1, s0
; RV32IM-NEXT: slli a2, a3, 6 ; RV32IM-NEXT: slli a2, a3, 6
; RV32IM-NEXT: sub a2, a3, a2 ; RV32IM-NEXT: sub a2, a3, a2
; RV32IM-NEXT: sw a2, 0(a0) ; RV32IM-NEXT: sw a2, 0(a0)
; RV32IM-NEXT: sw t0, 4(a0) ; RV32IM-NEXT: sw t0, 4(a0)
; RV32IM-NEXT: sw t6, 8(a0) ; RV32IM-NEXT: sw t6, 8(a0)
; RV32IM-NEXT: sw a1, 12(a0) ; RV32IM-NEXT: sw a1, 12(a0)
; RV32IM-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32IM-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: addi sp, sp, 16 ; RV32IM-NEXT: addi sp, sp, 16
; RV32IM-NEXT: ret ; RV32IM-NEXT: ret
; ;
; RV64I-LABEL: muli128_m63: ; RV64I-LABEL: muli128_m63:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: slli a2, a0, 6 ; RV64I-NEXT: slli a2, a0, 6
; RV64I-NEXT: sltu a3, a0, a2 ; RV64I-NEXT: sltu a3, a0, a2
; RV64I-NEXT: srli a4, a0, 58 ; RV64I-NEXT: srli a4, a0, 58
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
; RV32I-NEXT: add s1, s6, s1 ; RV32I-NEXT: add s1, s6, s1
; RV32I-NEXT: add a5, s1, a5 ; RV32I-NEXT: add a5, s1, a5
; RV32I-NEXT: add a1, a1, s5 ; RV32I-NEXT: add a1, a1, s5
; RV32I-NEXT: sltu a0, a3, a0 ; RV32I-NEXT: sltu a0, a3, a0
; RV32I-NEXT: add a0, a1, a0 ; RV32I-NEXT: add a0, a1, a0
; RV32I-NEXT: add a0, a5, a0 ; RV32I-NEXT: add a0, a5, a0
; RV32I-NEXT: add a1, a0, a4 ; RV32I-NEXT: add a1, a0, a4
; RV32I-NEXT: mv a0, a2 ; RV32I-NEXT: mv a0, a2
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 48 ; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: mulhsu_i64: ; RV32IM-LABEL: mulhsu_i64:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: srai a7, a3, 31 ; RV32IM-NEXT: srai a7, a3, 31
; RV32IM-NEXT: mulhu a6, a0, a2 ; RV32IM-NEXT: mulhu a6, a0, a2
; RV32IM-NEXT: mul a5, a1, a2 ; RV32IM-NEXT: mul a5, a1, a2
▲ Show 20 Lines • Show All 54 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir

Show All 35 Lines--- |
; CHECK-NEXT: sd a0, 0(a1) ; CHECK-NEXT: sd a0, 0(a1)
; CHECK-NEXT: ld a1, 0(sp) ; CHECK-NEXT: ld a1, 0(sp)
; CHECK-NEXT: call foo@plt ; CHECK-NEXT: call foo@plt
; CHECK-NEXT: lui a0, 2 ; CHECK-NEXT: lui a0, 2
; CHECK-NEXT: sub sp, s0, a0 ; CHECK-NEXT: sub sp, s0, a0
; CHECK-NEXT: lui a0, 2 ; CHECK-NEXT: lui a0, 2
; CHECK-NEXT: addiw a0, a0, -2032 ; CHECK-NEXT: addiw a0, a0, -2032
; CHECK-NEXT: add sp, sp, a0 ; CHECK-NEXT: add sp, sp, a0
; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 2032 ; CHECK-NEXT: addi sp, sp, 2032
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
ret void ret void
} }
... ...
Show All 25 Lines

llvm/test/CodeGen/RISCV/remat.ll

Show First 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lw a2, %lo(f)(s7) ; RV32I-NEXT: lw a2, %lo(f)(s7)
; RV32I-NEXT: lw a3, %lo(g)(s8) ; RV32I-NEXT: lw a3, %lo(g)(s8)
; RV32I-NEXT: lw a4, %lo(h)(s9) ; RV32I-NEXT: lw a4, %lo(h)(s9)
; RV32I-NEXT: li a5, 32 ; RV32I-NEXT: li a5, 32
; RV32I-NEXT: call foo@plt ; RV32I-NEXT: call foo@plt
; RV32I-NEXT: j .LBB0_2 ; RV32I-NEXT: j .LBB0_2
; RV32I-NEXT: .LBB0_11: # %for.end ; RV32I-NEXT: .LBB0_11: # %for.end
; RV32I-NEXT: li a0, 1 ; RV32I-NEXT: li a0, 1
; RV32I-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s10, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 48(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s10, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 64 ; RV32I-NEXT: addi sp, sp, 64
; RV32I-NEXT: ret ; RV32I-NEXT: ret
entry: entry:
%.pr = load i32, i32* @a, align 4 %.pr = load i32, i32* @a, align 4
%tobool14 = icmp eq i32 %.pr, 0 %tobool14 = icmp eq i32 %.pr, 0
br i1 %tobool14, label %for.end, label %for.body br i1 %tobool14, label %for.end, label %for.body
for.body: ; preds = %entry, %for.inc for.body: ; preds = %entry, %for.inc
▲ Show 20 Lines • Show All 67 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll

Show All 15 Lines
; RV32IF: # %bb.0: ; RV32IF: # %bb.0:
; RV32IF-NEXT: addi sp, sp, -16 ; RV32IF-NEXT: addi sp, sp, -16
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32IF-NEXT: mv s0, a1 ; RV32IF-NEXT: mv s0, a1
; RV32IF-NEXT: call __addsf3@plt ; RV32IF-NEXT: call __addsf3@plt
; RV32IF-NEXT: mv a1, s0 ; RV32IF-NEXT: mv a1, s0
; RV32IF-NEXT: call __divsf3@plt ; RV32IF-NEXT: call __divsf3@plt
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; ;
; RV64IF-LABEL: float_test: ; RV64IF-LABEL: float_test:
; RV64IF: # %bb.0: ; RV64IF: # %bb.0:
; RV64IF-NEXT: addi sp, sp, -16 ; RV64IF-NEXT: addi sp, sp, -16
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64IF-NEXT: mv s0, a1 ; RV64IF-NEXT: mv s0, a1
; RV64IF-NEXT: call __addsf3@plt ; RV64IF-NEXT: call __addsf3@plt
; RV64IF-NEXT: mv a1, s0 ; RV64IF-NEXT: mv a1, s0
; RV64IF-NEXT: call __divsf3@plt ; RV64IF-NEXT: call __divsf3@plt
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: addi sp, sp, 16 ; RV64IF-NEXT: addi sp, sp, 16
; RV64IF-NEXT: ret ; RV64IF-NEXT: ret
%1 = fadd float %a, %b %1 = fadd float %a, %b
%2 = fdiv float %1, %b %2 = fdiv float %1, %b
ret float %2 ret float %2
} }
define double @double_test(double %a, double %b) nounwind { define double @double_test(double %a, double %b) nounwind {
; RV32IF-LABEL: double_test: ; RV32IF-LABEL: double_test:
; RV32IF: # %bb.0: ; RV32IF: # %bb.0:
; RV32IF-NEXT: addi sp, sp, -16 ; RV32IF-NEXT: addi sp, sp, -16
; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32IF-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32IF-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32IF-NEXT: mv s0, a3 ; RV32IF-NEXT: mv s0, a3
; RV32IF-NEXT: mv s1, a2 ; RV32IF-NEXT: mv s1, a2
; RV32IF-NEXT: call __adddf3@plt ; RV32IF-NEXT: call __adddf3@plt
; RV32IF-NEXT: mv a2, s1 ; RV32IF-NEXT: mv a2, s1
; RV32IF-NEXT: mv a3, s0 ; RV32IF-NEXT: mv a3, s0
; RV32IF-NEXT: call __divdf3@plt ; RV32IF-NEXT: call __divdf3@plt
; RV32IF-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IF-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32IF-NEXT: addi sp, sp, 16 ; RV32IF-NEXT: addi sp, sp, 16
; RV32IF-NEXT: ret ; RV32IF-NEXT: ret
; ;
; RV64IF-LABEL: double_test: ; RV64IF-LABEL: double_test:
; RV64IF: # %bb.0: ; RV64IF: # %bb.0:
; RV64IF-NEXT: addi sp, sp, -16 ; RV64IF-NEXT: addi sp, sp, -16
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; RV64IF-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; RV64IF-NEXT: mv s0, a1 ; RV64IF-NEXT: mv s0, a1
; RV64IF-NEXT: call __adddf3@plt ; RV64IF-NEXT: call __adddf3@plt
; RV64IF-NEXT: mv a1, s0 ; RV64IF-NEXT: mv a1, s0
; RV64IF-NEXT: call __divdf3@plt ; RV64IF-NEXT: call __divdf3@plt
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64IF-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64IF-NEXT: addi sp, sp, 16 ; RV64IF-NEXT: addi sp, sp, 16
; RV64IF-NEXT: ret ; RV64IF-NEXT: ret
%1 = fadd double %a, %b %1 = fadd double %a, %b
%2 = fdiv double %1, %b %2 = fdiv double %1, %b
ret double %2 ret double %2
} }

llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll

Show All 29 Lines
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __addsf3@plt ; RV32I-NEXT: call __addsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: and a0, a0, s1 ; RV32I-NEXT: and a0, a0, s1
; RV32I-NEXT: call __gnu_h2f_ieee@plt ; RV32I-NEXT: call __gnu_h2f_ieee@plt
; RV32I-NEXT: mv a1, s0 ; RV32I-NEXT: mv a1, s0
; RV32I-NEXT: call __divsf3@plt ; RV32I-NEXT: call __divsf3@plt
; RV32I-NEXT: call __gnu_f2h_ieee@plt ; RV32I-NEXT: call __gnu_f2h_ieee@plt
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: half_test: ; RV64I-LABEL: half_test:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
Show All 12 Lines
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __addsf3@plt ; RV64I-NEXT: call __addsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: and a0, a0, s1 ; RV64I-NEXT: and a0, a0, s1
; RV64I-NEXT: call __gnu_h2f_ieee@plt ; RV64I-NEXT: call __gnu_h2f_ieee@plt
; RV64I-NEXT: mv a1, s0 ; RV64I-NEXT: mv a1, s0
; RV64I-NEXT: call __divsf3@plt ; RV64I-NEXT: call __divsf3@plt
; RV64I-NEXT: call __gnu_f2h_ieee@plt ; RV64I-NEXT: call __gnu_f2h_ieee@plt
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = fadd half %a, %b %1 = fadd half %a, %b
%2 = fdiv half %1, %b %2 = fdiv half %1, %b
ret half %2 ret half %2
} }

llvm/test/CodeGen/RISCV/rv32zbb.ll

Show First 20 Lines • Show All 133 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.1: ; RV32I-NEXT: # %bb.1:
; RV32I-NEXT: srli a0, a0, 24 ; RV32I-NEXT: srli a0, a0, 24
; RV32I-NEXT: addi a0, a0, 32 ; RV32I-NEXT: addi a0, a0, 32
; RV32I-NEXT: j .LBB1_3 ; RV32I-NEXT: j .LBB1_3
; RV32I-NEXT: .LBB1_2: ; RV32I-NEXT: .LBB1_2:
; RV32I-NEXT: srli a0, s2, 24 ; RV32I-NEXT: srli a0, s2, 24
; RV32I-NEXT: .LBB1_3: ; RV32I-NEXT: .LBB1_3:
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32ZBB-LABEL: ctlz_i64: ; RV32ZBB-LABEL: ctlz_i64:
; RV32ZBB: # %bb.0: ; RV32ZBB: # %bb.0:
; RV32ZBB-NEXT: bnez a1, .LBB1_2 ; RV32ZBB-NEXT: bnez a1, .LBB1_2
; RV32ZBB-NEXT: # %bb.1: ; RV32ZBB-NEXT: # %bb.1:
; RV32ZBB-NEXT: clz a0, a0 ; RV32ZBB-NEXT: clz a0, a0
▲ Show 20 Lines • Show All 114 Lines • ▼ Show 20 Lines
; RV32I-NEXT: # %bb.1: ; RV32I-NEXT: # %bb.1:
; RV32I-NEXT: srli a0, a0, 24 ; RV32I-NEXT: srli a0, a0, 24
; RV32I-NEXT: addi a0, a0, 32 ; RV32I-NEXT: addi a0, a0, 32
; RV32I-NEXT: j .LBB3_3 ; RV32I-NEXT: j .LBB3_3
; RV32I-NEXT: .LBB3_2: ; RV32I-NEXT: .LBB3_2:
; RV32I-NEXT: srli a0, s2, 24 ; RV32I-NEXT: srli a0, s2, 24
; RV32I-NEXT: .LBB3_3: ; RV32I-NEXT: .LBB3_3:
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32ZBB-LABEL: cttz_i64: ; RV32ZBB-LABEL: cttz_i64:
; RV32ZBB: # %bb.0: ; RV32ZBB: # %bb.0:
; RV32ZBB-NEXT: bnez a0, .LBB3_2 ; RV32ZBB-NEXT: bnez a0, .LBB3_2
; RV32ZBB-NEXT: # %bb.1: ; RV32ZBB-NEXT: # %bb.1:
; RV32ZBB-NEXT: ctz a0, a1 ; RV32ZBB-NEXT: ctz a0, a1
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; RV32I-NEXT: srli a1, a0, 4 ; RV32I-NEXT: srli a1, a0, 4
; RV32I-NEXT: add a0, a0, a1 ; RV32I-NEXT: add a0, a0, a1
; RV32I-NEXT: and a0, a0, s4 ; RV32I-NEXT: and a0, a0, s4
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call __mulsi3@plt ; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: srli a0, a0, 24 ; RV32I-NEXT: srli a0, a0, 24
; RV32I-NEXT: add a0, a0, s5 ; RV32I-NEXT: add a0, a0, s5
; RV32I-NEXT: li a1, 0 ; RV32I-NEXT: li a1, 0
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32ZBB-LABEL: ctpop_i64: ; RV32ZBB-LABEL: ctpop_i64:
; RV32ZBB: # %bb.0: ; RV32ZBB: # %bb.0:
; RV32ZBB-NEXT: cpop a1, a1 ; RV32ZBB-NEXT: cpop a1, a1
; RV32ZBB-NEXT: cpop a0, a0 ; RV32ZBB-NEXT: cpop a0, a0
; RV32ZBB-NEXT: add a0, a0, a1 ; RV32ZBB-NEXT: add a0, a0, a1
▲ Show 20 Lines • Show All 464 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/rv64i-complex-float.ll

Show All 18 Lines
; CHECK-NEXT: mv s0, a0 ; CHECK-NEXT: mv s0, a0
; CHECK-NEXT: mv a0, s2 ; CHECK-NEXT: mv a0, s2
; CHECK-NEXT: mv a1, s1 ; CHECK-NEXT: mv a1, s1
; CHECK-NEXT: call __addsf3@plt ; CHECK-NEXT: call __addsf3@plt
; CHECK-NEXT: slli a0, a0, 32 ; CHECK-NEXT: slli a0, a0, 32
; CHECK-NEXT: slli a1, s0, 32 ; CHECK-NEXT: slli a1, s0, 32
; CHECK-NEXT: srli a1, a1, 32 ; CHECK-NEXT: srli a1, a1, 32
; CHECK-NEXT: or a0, a0, a1 ; CHECK-NEXT: or a0, a0, a1
; CHECK-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%a.sroa.0.0.extract.trunc = trunc i64 %a.coerce to i32 %a.sroa.0.0.extract.trunc = trunc i64 %a.coerce to i32
%0 = bitcast i32 %a.sroa.0.0.extract.trunc to float %0 = bitcast i32 %a.sroa.0.0.extract.trunc to float
%a.sroa.2.0.extract.shift = lshr i64 %a.coerce, 32 %a.sroa.2.0.extract.shift = lshr i64 %a.coerce, 32
%a.sroa.2.0.extract.trunc = trunc i64 %a.sroa.2.0.extract.shift to i32 %a.sroa.2.0.extract.trunc = trunc i64 %a.sroa.2.0.extract.shift to i32
%1 = bitcast i32 %a.sroa.2.0.extract.trunc to float %1 = bitcast i32 %a.sroa.2.0.extract.trunc to float
Show All 15 Lines

llvm/test/CodeGen/RISCV/rv64zbb.ll

Show First 20 Lines • Show All 156 Lines • ▼ Show 20 Lines
; RV64I-NEXT: addiw a1, a1, -241 ; RV64I-NEXT: addiw a1, a1, -241
; RV64I-NEXT: and a0, a0, a1 ; RV64I-NEXT: and a0, a0, a1
; RV64I-NEXT: lui a1, 4112 ; RV64I-NEXT: lui a1, 4112
; RV64I-NEXT: addiw a1, a1, 257 ; RV64I-NEXT: addiw a1, a1, 257
; RV64I-NEXT: call __muldi3@plt ; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: srliw a1, a0, 24 ; RV64I-NEXT: srliw a1, a0, 24
; RV64I-NEXT: .LBB2_2: # %cond.end ; RV64I-NEXT: .LBB2_2: # %cond.end
; RV64I-NEXT: sub a0, s0, a1 ; RV64I-NEXT: sub a0, s0, a1
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64ZBB-LABEL: log2_ceil_i32: ; RV64ZBB-LABEL: log2_ceil_i32:
; RV64ZBB: # %bb.0: ; RV64ZBB: # %bb.0:
; RV64ZBB-NEXT: addiw a0, a0, -1 ; RV64ZBB-NEXT: addiw a0, a0, -1
; RV64ZBB-NEXT: clzw a0, a0 ; RV64ZBB-NEXT: clzw a0, a0
; RV64ZBB-NEXT: li a1, 32 ; RV64ZBB-NEXT: li a1, 32
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV64I-NEXT: call __muldi3@plt ; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: beqz s0, .LBB3_2 ; RV64I-NEXT: beqz s0, .LBB3_2
; RV64I-NEXT: # %bb.1: ; RV64I-NEXT: # %bb.1:
; RV64I-NEXT: srliw a0, a1, 24 ; RV64I-NEXT: srliw a0, a1, 24
; RV64I-NEXT: xori a0, a0, 31 ; RV64I-NEXT: xori a0, a0, 31
; RV64I-NEXT: .LBB3_2: ; RV64I-NEXT: .LBB3_2:
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64ZBB-LABEL: findLastSet_i32: ; RV64ZBB-LABEL: findLastSet_i32:
; RV64ZBB: # %bb.0: ; RV64ZBB: # %bb.0:
; RV64ZBB-NEXT: mv a1, a0 ; RV64ZBB-NEXT: mv a1, a0
; RV64ZBB-NEXT: li a0, -1 ; RV64ZBB-NEXT: li a0, -1
; RV64ZBB-NEXT: beqz a1, .LBB3_2 ; RV64ZBB-NEXT: beqz a1, .LBB3_2
▲ Show 20 Lines • Show All 265 Lines • ▼ Show 20 Lines
; RV64I-NEXT: addiw a1, a1, 257 ; RV64I-NEXT: addiw a1, a1, 257
; RV64I-NEXT: call __muldi3@plt ; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: li a0, -1 ; RV64I-NEXT: li a0, -1
; RV64I-NEXT: beqz s0, .LBB8_2 ; RV64I-NEXT: beqz s0, .LBB8_2
; RV64I-NEXT: # %bb.1: ; RV64I-NEXT: # %bb.1:
; RV64I-NEXT: srliw a0, a1, 24 ; RV64I-NEXT: srliw a0, a1, 24
; RV64I-NEXT: .LBB8_2: ; RV64I-NEXT: .LBB8_2:
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64ZBB-LABEL: findFirstSet_i32: ; RV64ZBB-LABEL: findFirstSet_i32:
; RV64ZBB: # %bb.0: ; RV64ZBB: # %bb.0:
; RV64ZBB-NEXT: mv a1, a0 ; RV64ZBB-NEXT: mv a1, a0
; RV64ZBB-NEXT: li a0, -1 ; RV64ZBB-NEXT: li a0, -1
; RV64ZBB-NEXT: beqz a1, .LBB8_2 ; RV64ZBB-NEXT: beqz a1, .LBB8_2
Show All 38 Lines
; RV64I-NEXT: call __muldi3@plt ; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: mv a1, a0 ; RV64I-NEXT: mv a1, a0
; RV64I-NEXT: li a0, 0 ; RV64I-NEXT: li a0, 0
; RV64I-NEXT: beqz s0, .LBB9_2 ; RV64I-NEXT: beqz s0, .LBB9_2
; RV64I-NEXT: # %bb.1: ; RV64I-NEXT: # %bb.1:
; RV64I-NEXT: srliw a0, a1, 24 ; RV64I-NEXT: srliw a0, a1, 24
; RV64I-NEXT: addi a0, a0, 1 ; RV64I-NEXT: addi a0, a0, 1
; RV64I-NEXT: .LBB9_2: ; RV64I-NEXT: .LBB9_2:
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64ZBB-LABEL: ffs_i32: ; RV64ZBB-LABEL: ffs_i32:
; RV64ZBB: # %bb.0: ; RV64ZBB: # %bb.0:
; RV64ZBB-NEXT: mv a1, a0 ; RV64ZBB-NEXT: mv a1, a0
; RV64ZBB-NEXT: li a0, 0 ; RV64ZBB-NEXT: li a0, 0
; RV64ZBB-NEXT: beqz a1, .LBB9_2 ; RV64ZBB-NEXT: beqz a1, .LBB9_2
▲ Show 20 Lines • Show All 601 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir

Show First 20 Lines • Show All 44 Lines • ▼ Show 20 Lines bb.0:
; CHECK-NEXT: $x10 = LUI 1048575 ; CHECK-NEXT: $x10 = LUI 1048575
; CHECK-NEXT: $x10 = ADDIW killed $x10, 1824 ; CHECK-NEXT: $x10 = ADDIW killed $x10, 1824
; CHECK-NEXT: $x10 = ADD $x8, killed $x10 ; CHECK-NEXT: $x10 = ADD $x8, killed $x10
; CHECK-NEXT: $x10 = SUB killed $x10, killed $x11 ; CHECK-NEXT: $x10 = SUB killed $x10, killed $x11
; CHECK-NEXT: VS1R_V killed renamable $v8, killed renamable $x10 ; CHECK-NEXT: VS1R_V killed renamable $v8, killed renamable $x10
; CHECK-NEXT: $x10 = frame-destroy PseudoReadVLENB ; CHECK-NEXT: $x10 = frame-destroy PseudoReadVLENB
; CHECK-NEXT: $x2 = frame-destroy ADD $x2, killed $x10 ; CHECK-NEXT: $x2 = frame-destroy ADD $x2, killed $x10
; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 240 ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 240
; CHECK-NEXT: $x8 = LD $x2, 2016 :: (load (s64) from %stack.4)
; CHECK-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.3) ; CHECK-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.3)
; CHECK-NEXT: $x8 = LD $x2, 2016 :: (load (s64) from %stack.4)
; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 2032 ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 2032
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
%1:gprnox0 = COPY $x11 %1:gprnox0 = COPY $x11
%0:gpr = COPY $x10 %0:gpr = COPY $x10
%2:vr = PseudoVLE64_V_M1 %0, %1, 6 :: (load unknown-size from %ir.pa, align 8) %2:vr = PseudoVLE64_V_M1 %0, %1, 6 :: (load unknown-size from %ir.pa, align 8)
%3:gpr = ADDI %stack.2, 0 %3:gpr = ADDI %stack.2, 0
VS1R_V killed %2:vr, %3:gpr VS1R_V killed %2:vr, %3:gpr
PseudoRET PseudoRET
... ...

llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll

Show All 34 Lines
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 2 ; CHECK-NEXT: slli a0, a0, 2
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v = alloca <vscale x 4 x i64> %v = alloca <vscale x 4 x i64>
ret void ret void
} }
define void @lmul8() nounwind { define void @lmul8() nounwind {
; CHECK-LABEL: lmul8: ; CHECK-LABEL: lmul8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -64 ; CHECK-NEXT: addi sp, sp, -64
; CHECK-NEXT: sd ra, 56(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 64 ; CHECK-NEXT: addi s0, sp, 64
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 3 ; CHECK-NEXT: slli a0, a0, 3
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -64 ; CHECK-NEXT: andi sp, sp, -64
; CHECK-NEXT: addi sp, s0, -64 ; CHECK-NEXT: addi sp, s0, -64
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 64 ; CHECK-NEXT: addi sp, sp, 64
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v = alloca <vscale x 8 x i64> %v = alloca <vscale x 8 x i64>
ret void ret void
} }
define void @lmul1_and_2() nounwind { define void @lmul1_and_2() nounwind {
; CHECK-LABEL: lmul1_and_2: ; CHECK-LABEL: lmul1_and_2:
Show All 20 Lines
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: li a1, 6 ; CHECK-NEXT: li a1, 6
; CHECK-NEXT: mul a0, a0, a1 ; CHECK-NEXT: mul a0, a0, a1
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 2 x i64> %v1 = alloca <vscale x 2 x i64>
%v2 = alloca <vscale x 4 x i64> %v2 = alloca <vscale x 4 x i64>
ret void ret void
} }
define void @lmul1_and_4() nounwind { define void @lmul1_and_4() nounwind {
; CHECK-LABEL: lmul1_and_4: ; CHECK-LABEL: lmul1_and_4:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -32 ; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a1, a0, 2 ; CHECK-NEXT: slli a1, a0, 2
; CHECK-NEXT: add a0, a1, a0 ; CHECK-NEXT: add a0, a1, a0
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 1 x i64> %v1 = alloca <vscale x 1 x i64>
%v2 = alloca <vscale x 4 x i64> %v2 = alloca <vscale x 4 x i64>
ret void ret void
} }
define void @lmul2_and_1() nounwind { define void @lmul2_and_1() nounwind {
Show All 21 Lines
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a1, a0, 2 ; CHECK-NEXT: slli a1, a0, 2
; CHECK-NEXT: add a0, a1, a0 ; CHECK-NEXT: add a0, a1, a0
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 4 x i64> %v1 = alloca <vscale x 4 x i64>
%v2 = alloca <vscale x 1 x i64> %v2 = alloca <vscale x 1 x i64>
ret void ret void
} }
define void @lmul4_and_2() nounwind { define void @lmul4_and_2() nounwind {
; CHECK-LABEL: lmul4_and_2: ; CHECK-LABEL: lmul4_and_2:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -32 ; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: li a1, 6 ; CHECK-NEXT: li a1, 6
; CHECK-NEXT: mul a0, a0, a1 ; CHECK-NEXT: mul a0, a0, a1
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 4 x i64> %v1 = alloca <vscale x 4 x i64>
%v2 = alloca <vscale x 2 x i64> %v2 = alloca <vscale x 2 x i64>
ret void ret void
} }
define void @lmul4_and_2_x2_0() nounwind { define void @lmul4_and_2_x2_0() nounwind {
; CHECK-LABEL: lmul4_and_2_x2_0: ; CHECK-LABEL: lmul4_and_2_x2_0:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -32 ; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: li a1, 12 ; CHECK-NEXT: li a1, 12
; CHECK-NEXT: mul a0, a0, a1 ; CHECK-NEXT: mul a0, a0, a1
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 4 x i64> %v1 = alloca <vscale x 4 x i64>
%v2 = alloca <vscale x 2 x i64> %v2 = alloca <vscale x 2 x i64>
%v3 = alloca <vscale x 4 x i64> %v3 = alloca <vscale x 4 x i64>
%v4 = alloca <vscale x 2 x i64> %v4 = alloca <vscale x 2 x i64>
ret void ret void
} }
define void @lmul4_and_2_x2_1() nounwind { define void @lmul4_and_2_x2_1() nounwind {
; CHECK-LABEL: lmul4_and_2_x2_1: ; CHECK-LABEL: lmul4_and_2_x2_1:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -32 ; CHECK-NEXT: addi sp, sp, -32
; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 32 ; CHECK-NEXT: addi s0, sp, 32
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: li a1, 12 ; CHECK-NEXT: li a1, 12
; CHECK-NEXT: mul a0, a0, a1 ; CHECK-NEXT: mul a0, a0, a1
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 4 x i64> %v1 = alloca <vscale x 4 x i64>
%v3 = alloca <vscale x 4 x i64> %v3 = alloca <vscale x 4 x i64>
%v2 = alloca <vscale x 2 x i64> %v2 = alloca <vscale x 2 x i64>
%v4 = alloca <vscale x 2 x i64> %v4 = alloca <vscale x 2 x i64>
ret void ret void
} }
Show All 32 Lines
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a1, a0, 2 ; CHECK-NEXT: slli a1, a0, 2
; CHECK-NEXT: add a0, a1, a0 ; CHECK-NEXT: add a0, a1, a0
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -32 ; CHECK-NEXT: andi sp, sp, -32
; CHECK-NEXT: li a0, 3 ; CHECK-NEXT: li a0, 3
; CHECK-NEXT: sd a0, 8(sp) ; CHECK-NEXT: sd a0, 8(sp)
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%x1 = alloca i64 %x1 = alloca i64
%v1 = alloca <vscale x 1 x i64> %v1 = alloca <vscale x 1 x i64>
%v2 = alloca <vscale x 4 x i64> %v2 = alloca <vscale x 4 x i64>
store volatile i64 3, i64* %x1 store volatile i64 3, i64* %x1
ret void ret void
} }
define void @lmul_1_2_4_8() nounwind { define void @lmul_1_2_4_8() nounwind {
; CHECK-LABEL: lmul_1_2_4_8: ; CHECK-LABEL: lmul_1_2_4_8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -64 ; CHECK-NEXT: addi sp, sp, -64
; CHECK-NEXT: sd ra, 56(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 64 ; CHECK-NEXT: addi s0, sp, 64
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a1, a0, 4 ; CHECK-NEXT: slli a1, a0, 4
; CHECK-NEXT: sub a0, a1, a0 ; CHECK-NEXT: sub a0, a1, a0
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -64 ; CHECK-NEXT: andi sp, sp, -64
; CHECK-NEXT: addi sp, s0, -64 ; CHECK-NEXT: addi sp, s0, -64
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 64 ; CHECK-NEXT: addi sp, sp, 64
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 1 x i64> %v1 = alloca <vscale x 1 x i64>
%v2 = alloca <vscale x 2 x i64> %v2 = alloca <vscale x 2 x i64>
%v4 = alloca <vscale x 4 x i64> %v4 = alloca <vscale x 4 x i64>
%v8 = alloca <vscale x 8 x i64> %v8 = alloca <vscale x 8 x i64>
ret void ret void
} }
define void @lmul_1_2_4_8_x2_0() nounwind { define void @lmul_1_2_4_8_x2_0() nounwind {
; CHECK-LABEL: lmul_1_2_4_8_x2_0: ; CHECK-LABEL: lmul_1_2_4_8_x2_0:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: addi sp, sp, -64 ; CHECK-NEXT: addi sp, sp, -64
; CHECK-NEXT: sd ra, 56(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 64 ; CHECK-NEXT: addi s0, sp, 64
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: li a1, 30 ; CHECK-NEXT: li a1, 30
; CHECK-NEXT: mul a0, a0, a1 ; CHECK-NEXT: mul a0, a0, a1
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -64 ; CHECK-NEXT: andi sp, sp, -64
; CHECK-NEXT: addi sp, s0, -64 ; CHECK-NEXT: addi sp, s0, -64
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 64 ; CHECK-NEXT: addi sp, sp, 64
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v1 = alloca <vscale x 1 x i64> %v1 = alloca <vscale x 1 x i64>
%v2 = alloca <vscale x 1 x i64> %v2 = alloca <vscale x 1 x i64>
%v3 = alloca <vscale x 2 x i64> %v3 = alloca <vscale x 2 x i64>
%v4 = alloca <vscale x 2 x i64> %v4 = alloca <vscale x 2 x i64>
%v5 = alloca <vscale x 4 x i64> %v5 = alloca <vscale x 4 x i64>
%v6 = alloca <vscale x 4 x i64> %v6 = alloca <vscale x 4 x i64>
Show All 10 Lines
; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill ; CHECK-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
; CHECK-NEXT: addi s0, sp, 64 ; CHECK-NEXT: addi s0, sp, 64
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: li a1, 30 ; CHECK-NEXT: li a1, 30
; CHECK-NEXT: mul a0, a0, a1 ; CHECK-NEXT: mul a0, a0, a1
; CHECK-NEXT: sub sp, sp, a0 ; CHECK-NEXT: sub sp, sp, a0
; CHECK-NEXT: andi sp, sp, -64 ; CHECK-NEXT: andi sp, sp, -64
; CHECK-NEXT: addi sp, s0, -64 ; CHECK-NEXT: addi sp, s0, -64
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 64 ; CHECK-NEXT: addi sp, sp, 64
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%v8 = alloca <vscale x 8 x i64> %v8 = alloca <vscale x 8 x i64>
%v7 = alloca <vscale x 8 x i64> %v7 = alloca <vscale x 8 x i64>
%v6 = alloca <vscale x 4 x i64> %v6 = alloca <vscale x 4 x i64>
%v5 = alloca <vscale x 4 x i64> %v5 = alloca <vscale x 4 x i64>
%v4 = alloca <vscale x 2 x i64> %v4 = alloca <vscale x 2 x i64>
%v3 = alloca <vscale x 2 x i64> %v3 = alloca <vscale x 2 x i64>
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llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir

Show First 20 Lines • Show All 157 Lines • ▼ Show 20 Linesbody: |
; CHECK-NEXT: renamable $x9 = COPY killed renamable $x13 ; CHECK-NEXT: renamable $x9 = COPY killed renamable $x13
; CHECK-NEXT: PseudoBR %bb.2 ; CHECK-NEXT: PseudoBR %bb.2
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2: ; CHECK-NEXT: bb.2:
; CHECK-NEXT: $x10 = frame-destroy LUI 1 ; CHECK-NEXT: $x10 = frame-destroy LUI 1
; CHECK-NEXT: $x10 = frame-destroy ADDIW killed $x10, -1792 ; CHECK-NEXT: $x10 = frame-destroy ADDIW killed $x10, -1792
; CHECK-NEXT: $x2 = frame-destroy SUB $x8, killed $x10 ; CHECK-NEXT: $x2 = frame-destroy SUB $x8, killed $x10
; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 272 ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 272
; CHECK-NEXT: $x27 = LD $x2, 1928 :: (load (s64) from %stack.15)
; CHECK-NEXT: $x26 = LD $x2, 1936 :: (load (s64) from %stack.14)
; CHECK-NEXT: $x25 = LD $x2, 1944 :: (load (s64) from %stack.13)
; CHECK-NEXT: $x24 = LD $x2, 1952 :: (load (s64) from %stack.12)
; CHECK-NEXT: $x23 = LD $x2, 1960 :: (load (s64) from %stack.11)
; CHECK-NEXT: $x22 = LD $x2, 1968 :: (load (s64) from %stack.10)
; CHECK-NEXT: $x21 = LD $x2, 1976 :: (load (s64) from %stack.9)
; CHECK-NEXT: $x20 = LD $x2, 1984 :: (load (s64) from %stack.8)
; CHECK-NEXT: $x19 = LD $x2, 1992 :: (load (s64) from %stack.7)
; CHECK-NEXT: $x18 = LD $x2, 2000 :: (load (s64) from %stack.6)
; CHECK-NEXT: $x9 = LD $x2, 2008 :: (load (s64) from %stack.5)
; CHECK-NEXT: $x8 = LD $x2, 2016 :: (load (s64) from %stack.4)
; CHECK-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.3) ; CHECK-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.3)
; CHECK-NEXT: $x8 = LD $x2, 2016 :: (load (s64) from %stack.4)
; CHECK-NEXT: $x9 = LD $x2, 2008 :: (load (s64) from %stack.5)
; CHECK-NEXT: $x18 = LD $x2, 2000 :: (load (s64) from %stack.6)
; CHECK-NEXT: $x19 = LD $x2, 1992 :: (load (s64) from %stack.7)
; CHECK-NEXT: $x20 = LD $x2, 1984 :: (load (s64) from %stack.8)
; CHECK-NEXT: $x21 = LD $x2, 1976 :: (load (s64) from %stack.9)
; CHECK-NEXT: $x22 = LD $x2, 1968 :: (load (s64) from %stack.10)
; CHECK-NEXT: $x23 = LD $x2, 1960 :: (load (s64) from %stack.11)
; CHECK-NEXT: $x24 = LD $x2, 1952 :: (load (s64) from %stack.12)
; CHECK-NEXT: $x25 = LD $x2, 1944 :: (load (s64) from %stack.13)
; CHECK-NEXT: $x26 = LD $x2, 1936 :: (load (s64) from %stack.14)
; CHECK-NEXT: $x27 = LD $x2, 1928 :: (load (s64) from %stack.15)
; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 2032 ; CHECK-NEXT: $x2 = frame-destroy ADDI $x2, 2032
; CHECK-NEXT: PseudoRET ; CHECK-NEXT: PseudoRET
bb.0: bb.0:
successors: %bb.1, %bb.2 successors: %bb.1, %bb.2
liveins: $x12 liveins: $x12
dead renamable $x15 = PseudoVSETIVLI 1, 72, implicit-def $vl, implicit-def $vtype dead renamable $x15 = PseudoVSETIVLI 1, 72, implicit-def $vl, implicit-def $vtype
renamable $v25 = PseudoVMV_V_X_M1 killed renamable $x12, $noreg, 16, implicit $vl, implicit $vtype renamable $v25 = PseudoVMV_V_X_M1 killed renamable $x12, $noreg, 16, implicit $vl, implicit $vtype
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll

Show First 20 Lines • Show All 296 Lines • ▼ Show 20 Lines
; LMULMAX8-NEXT: vle32.v v24, (a0) ; LMULMAX8-NEXT: vle32.v v24, (a0)
; LMULMAX8-NEXT: addi a0, sp, 128 ; LMULMAX8-NEXT: addi a0, sp, 128
; LMULMAX8-NEXT: li a2, 42 ; LMULMAX8-NEXT: li a2, 42
; LMULMAX8-NEXT: addi a3, sp, 128 ; LMULMAX8-NEXT: addi a3, sp, 128
; LMULMAX8-NEXT: vse32.v v8, (a3) ; LMULMAX8-NEXT: vse32.v v8, (a3)
; LMULMAX8-NEXT: vmv.v.v v8, v24 ; LMULMAX8-NEXT: vmv.v.v v8, v24
; LMULMAX8-NEXT: call ext3@plt ; LMULMAX8-NEXT: call ext3@plt
; LMULMAX8-NEXT: addi sp, s0, -384 ; LMULMAX8-NEXT: addi sp, s0, -384
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: addi sp, sp, 384 ; LMULMAX8-NEXT: addi sp, sp, 384
; LMULMAX8-NEXT: ret ; LMULMAX8-NEXT: ret
; ;
; LMULMAX4-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32: ; LMULMAX4-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32:
; LMULMAX4: # %bb.0: ; LMULMAX4: # %bb.0:
; LMULMAX4-NEXT: addi sp, sp, -384 ; LMULMAX4-NEXT: addi sp, sp, -384
; LMULMAX4-NEXT: .cfi_def_cfa_offset 384 ; LMULMAX4-NEXT: .cfi_def_cfa_offset 384
; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
Show All 12 Lines
; LMULMAX4-NEXT: addi a0, sp, 128 ; LMULMAX4-NEXT: addi a0, sp, 128
; LMULMAX4-NEXT: li a3, 42 ; LMULMAX4-NEXT: li a3, 42
; LMULMAX4-NEXT: addi a1, sp, 128 ; LMULMAX4-NEXT: addi a1, sp, 128
; LMULMAX4-NEXT: vse32.v v8, (a1) ; LMULMAX4-NEXT: vse32.v v8, (a1)
; LMULMAX4-NEXT: vmv.v.v v8, v24 ; LMULMAX4-NEXT: vmv.v.v v8, v24
; LMULMAX4-NEXT: vmv.v.v v12, v28 ; LMULMAX4-NEXT: vmv.v.v v12, v28
; LMULMAX4-NEXT: call ext3@plt ; LMULMAX4-NEXT: call ext3@plt
; LMULMAX4-NEXT: addi sp, s0, -384 ; LMULMAX4-NEXT: addi sp, s0, -384
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: addi sp, sp, 384 ; LMULMAX4-NEXT: addi sp, sp, 384
; LMULMAX4-NEXT: ret ; LMULMAX4-NEXT: ret
%t = call fastcc <32 x i32> @ext3(<32 x i32> %z, <32 x i32> %y, <32 x i32> %x, i32 %w, i32 42) %t = call fastcc <32 x i32> @ext3(<32 x i32> %z, <32 x i32> %y, <32 x i32> %x, i32 %w, i32 42)
ret <32 x i32> %t ret <32 x i32> %t
} }
; A test case where the normal calling convention would pass directly via the ; A test case where the normal calling convention would pass directly via the
; stack, but with fastcc can pass indirectly with the extra GPR registers ; stack, but with fastcc can pass indirectly with the extra GPR registers
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; LMULMAX8-NEXT: addi t2, sp, 128 ; LMULMAX8-NEXT: addi t2, sp, 128
; LMULMAX8-NEXT: li t3, 8 ; LMULMAX8-NEXT: li t3, 8
; LMULMAX8-NEXT: addi a0, sp, 128 ; LMULMAX8-NEXT: addi a0, sp, 128
; LMULMAX8-NEXT: vse32.v v8, (a0) ; LMULMAX8-NEXT: vse32.v v8, (a0)
; LMULMAX8-NEXT: li a0, 0 ; LMULMAX8-NEXT: li a0, 0
; LMULMAX8-NEXT: vmv.v.i v16, 0 ; LMULMAX8-NEXT: vmv.v.i v16, 0
; LMULMAX8-NEXT: call vector_arg_indirect_stack@plt ; LMULMAX8-NEXT: call vector_arg_indirect_stack@plt
; LMULMAX8-NEXT: addi sp, s0, -384 ; LMULMAX8-NEXT: addi sp, s0, -384
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: addi sp, sp, 384 ; LMULMAX8-NEXT: addi sp, sp, 384
; LMULMAX8-NEXT: ret ; LMULMAX8-NEXT: ret
; ;
; LMULMAX4-LABEL: pass_vector_arg_indirect_stack: ; LMULMAX4-LABEL: pass_vector_arg_indirect_stack:
; LMULMAX4: # %bb.0: ; LMULMAX4: # %bb.0:
; LMULMAX4-NEXT: addi sp, sp, -384 ; LMULMAX4-NEXT: addi sp, sp, -384
; LMULMAX4-NEXT: .cfi_def_cfa_offset 384 ; LMULMAX4-NEXT: .cfi_def_cfa_offset 384
; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
Show All 19 Lines
; LMULMAX4-NEXT: addi a0, sp, 128 ; LMULMAX4-NEXT: addi a0, sp, 128
; LMULMAX4-NEXT: vse32.v v8, (a0) ; LMULMAX4-NEXT: vse32.v v8, (a0)
; LMULMAX4-NEXT: li a0, 0 ; LMULMAX4-NEXT: li a0, 0
; LMULMAX4-NEXT: vmv.v.i v12, 0 ; LMULMAX4-NEXT: vmv.v.i v12, 0
; LMULMAX4-NEXT: vmv.v.i v16, 0 ; LMULMAX4-NEXT: vmv.v.i v16, 0
; LMULMAX4-NEXT: vmv.v.i v20, 0 ; LMULMAX4-NEXT: vmv.v.i v20, 0
; LMULMAX4-NEXT: call vector_arg_indirect_stack@plt ; LMULMAX4-NEXT: call vector_arg_indirect_stack@plt
; LMULMAX4-NEXT: addi sp, s0, -384 ; LMULMAX4-NEXT: addi sp, s0, -384
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: addi sp, sp, 384 ; LMULMAX4-NEXT: addi sp, sp, 384
; LMULMAX4-NEXT: ret ; LMULMAX4-NEXT: ret
%s = call fastcc <32 x i32> @vector_arg_indirect_stack(i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 8) %s = call fastcc <32 x i32> @vector_arg_indirect_stack(i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 8)
ret <32 x i32> %s ret <32 x i32> %s
} }
; A pathological test case where even with fastcc we must use the stack for arguments %13 and %z ; A pathological test case where even with fastcc we must use the stack for arguments %13 and %z
define fastcc <32 x i32> @vector_arg_direct_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %last) { define fastcc <32 x i32> @vector_arg_direct_stack(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, <32 x i32> %x, <32 x i32> %y, <32 x i32> %z, i32 %last) {
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll

Show First 20 Lines • Show All 795 Lines • ▼ Show 20 Lines
; LMULMAX8-NEXT: vle32.v v24, (a0) ; LMULMAX8-NEXT: vle32.v v24, (a0)
; LMULMAX8-NEXT: addi a0, sp, 128 ; LMULMAX8-NEXT: addi a0, sp, 128
; LMULMAX8-NEXT: li a2, 42 ; LMULMAX8-NEXT: li a2, 42
; LMULMAX8-NEXT: addi a3, sp, 128 ; LMULMAX8-NEXT: addi a3, sp, 128
; LMULMAX8-NEXT: vse32.v v8, (a3) ; LMULMAX8-NEXT: vse32.v v8, (a3)
; LMULMAX8-NEXT: vmv.v.v v8, v24 ; LMULMAX8-NEXT: vmv.v.v v8, v24
; LMULMAX8-NEXT: call ext3@plt ; LMULMAX8-NEXT: call ext3@plt
; LMULMAX8-NEXT: addi sp, s0, -384 ; LMULMAX8-NEXT: addi sp, s0, -384
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: addi sp, sp, 384 ; LMULMAX8-NEXT: addi sp, sp, 384
; LMULMAX8-NEXT: ret ; LMULMAX8-NEXT: ret
; ;
; LMULMAX4-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32: ; LMULMAX4-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32:
; LMULMAX4: # %bb.0: ; LMULMAX4: # %bb.0:
; LMULMAX4-NEXT: addi sp, sp, -384 ; LMULMAX4-NEXT: addi sp, sp, -384
; LMULMAX4-NEXT: .cfi_def_cfa_offset 384 ; LMULMAX4-NEXT: .cfi_def_cfa_offset 384
; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
Show All 12 Lines
; LMULMAX4-NEXT: addi a0, sp, 128 ; LMULMAX4-NEXT: addi a0, sp, 128
; LMULMAX4-NEXT: li a3, 42 ; LMULMAX4-NEXT: li a3, 42
; LMULMAX4-NEXT: addi a1, sp, 128 ; LMULMAX4-NEXT: addi a1, sp, 128
; LMULMAX4-NEXT: vse32.v v8, (a1) ; LMULMAX4-NEXT: vse32.v v8, (a1)
; LMULMAX4-NEXT: vmv.v.v v8, v24 ; LMULMAX4-NEXT: vmv.v.v v8, v24
; LMULMAX4-NEXT: vmv.v.v v12, v28 ; LMULMAX4-NEXT: vmv.v.v v12, v28
; LMULMAX4-NEXT: call ext3@plt ; LMULMAX4-NEXT: call ext3@plt
; LMULMAX4-NEXT: addi sp, s0, -384 ; LMULMAX4-NEXT: addi sp, s0, -384
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: addi sp, sp, 384 ; LMULMAX4-NEXT: addi sp, sp, 384
; LMULMAX4-NEXT: ret ; LMULMAX4-NEXT: ret
; ;
; LMULMAX2-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32: ; LMULMAX2-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32:
; LMULMAX2: # %bb.0: ; LMULMAX2: # %bb.0:
; LMULMAX2-NEXT: addi sp, sp, -384 ; LMULMAX2-NEXT: addi sp, sp, -384
; LMULMAX2-NEXT: .cfi_def_cfa_offset 384 ; LMULMAX2-NEXT: .cfi_def_cfa_offset 384
; LMULMAX2-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; LMULMAX2-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
Show All 22 Lines
; LMULMAX2-NEXT: addi a1, sp, 128 ; LMULMAX2-NEXT: addi a1, sp, 128
; LMULMAX2-NEXT: vse32.v v8, (a1) ; LMULMAX2-NEXT: vse32.v v8, (a1)
; LMULMAX2-NEXT: vmv.v.v v8, v24 ; LMULMAX2-NEXT: vmv.v.v v8, v24
; LMULMAX2-NEXT: vmv.v.v v10, v26 ; LMULMAX2-NEXT: vmv.v.v v10, v26
; LMULMAX2-NEXT: vmv.v.v v12, v28 ; LMULMAX2-NEXT: vmv.v.v v12, v28
; LMULMAX2-NEXT: vmv.v.v v14, v30 ; LMULMAX2-NEXT: vmv.v.v v14, v30
; LMULMAX2-NEXT: call ext3@plt ; LMULMAX2-NEXT: call ext3@plt
; LMULMAX2-NEXT: addi sp, s0, -384 ; LMULMAX2-NEXT: addi sp, s0, -384
; LMULMAX2-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX2-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX2-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX2-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX2-NEXT: addi sp, sp, 384 ; LMULMAX2-NEXT: addi sp, sp, 384
; LMULMAX2-NEXT: ret ; LMULMAX2-NEXT: ret
; ;
; LMULMAX1-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32: ; LMULMAX1-LABEL: ret_v32i32_call_v32i32_v32i32_v32i32_i32:
; LMULMAX1: # %bb.0: ; LMULMAX1: # %bb.0:
; LMULMAX1-NEXT: addi sp, sp, -384 ; LMULMAX1-NEXT: addi sp, sp, -384
; LMULMAX1-NEXT: .cfi_def_cfa_offset 384 ; LMULMAX1-NEXT: .cfi_def_cfa_offset 384
; LMULMAX1-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; LMULMAX1-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
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; LMULMAX1-NEXT: vmv.v.v v10, v26 ; LMULMAX1-NEXT: vmv.v.v v10, v26
; LMULMAX1-NEXT: vmv.v.v v11, v27 ; LMULMAX1-NEXT: vmv.v.v v11, v27
; LMULMAX1-NEXT: vmv.v.v v12, v28 ; LMULMAX1-NEXT: vmv.v.v v12, v28
; LMULMAX1-NEXT: vmv.v.v v13, v29 ; LMULMAX1-NEXT: vmv.v.v v13, v29
; LMULMAX1-NEXT: vmv.v.v v14, v30 ; LMULMAX1-NEXT: vmv.v.v v14, v30
; LMULMAX1-NEXT: vmv.v.v v15, v31 ; LMULMAX1-NEXT: vmv.v.v v15, v31
; LMULMAX1-NEXT: call ext3@plt ; LMULMAX1-NEXT: call ext3@plt
; LMULMAX1-NEXT: addi sp, s0, -384 ; LMULMAX1-NEXT: addi sp, s0, -384
; LMULMAX1-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX1-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX1-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX1-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX1-NEXT: addi sp, sp, 384 ; LMULMAX1-NEXT: addi sp, sp, 384
; LMULMAX1-NEXT: ret ; LMULMAX1-NEXT: ret
%t = call <32 x i32> @ext3(<32 x i32> %z, <32 x i32> %y, <32 x i32> %x, i32 %w, i32 42) %t = call <32 x i32> @ext3(<32 x i32> %z, <32 x i32> %y, <32 x i32> %x, i32 %w, i32 42)
ret <32 x i32> %t ret <32 x i32> %t
} }
; Test various configurations of split vector types where the values are split ; Test various configurations of split vector types where the values are split
; across both registers and the stack. ; across both registers and the stack.
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; LMULMAX8-NEXT: addi a1, sp, 128 ; LMULMAX8-NEXT: addi a1, sp, 128
; LMULMAX8-NEXT: vse32.v v16, (a1) ; LMULMAX8-NEXT: vse32.v v16, (a1)
; LMULMAX8-NEXT: vmv1r.v v9, v8 ; LMULMAX8-NEXT: vmv1r.v v9, v8
; LMULMAX8-NEXT: vmv1r.v v10, v8 ; LMULMAX8-NEXT: vmv1r.v v10, v8
; LMULMAX8-NEXT: vmv1r.v v11, v8 ; LMULMAX8-NEXT: vmv1r.v v11, v8
; LMULMAX8-NEXT: vmv1r.v v12, v8 ; LMULMAX8-NEXT: vmv1r.v v12, v8
; LMULMAX8-NEXT: call split_vector_args@plt ; LMULMAX8-NEXT: call split_vector_args@plt
; LMULMAX8-NEXT: addi sp, s0, -384 ; LMULMAX8-NEXT: addi sp, s0, -384
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX8-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX8-NEXT: addi sp, sp, 384 ; LMULMAX8-NEXT: addi sp, sp, 384
; LMULMAX8-NEXT: ret ; LMULMAX8-NEXT: ret
; ;
; LMULMAX4-LABEL: call_split_vector_args: ; LMULMAX4-LABEL: call_split_vector_args:
; LMULMAX4: # %bb.0: ; LMULMAX4: # %bb.0:
; LMULMAX4-NEXT: addi sp, sp, -384 ; LMULMAX4-NEXT: addi sp, sp, -384
; LMULMAX4-NEXT: .cfi_def_cfa_offset 384 ; LMULMAX4-NEXT: .cfi_def_cfa_offset 384
; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill ; LMULMAX4-NEXT: sd ra, 376(sp) # 8-byte Folded Spill
Show All 15 Lines
; LMULMAX4-NEXT: addi a1, sp, 128 ; LMULMAX4-NEXT: addi a1, sp, 128
; LMULMAX4-NEXT: vse32.v v16, (a1) ; LMULMAX4-NEXT: vse32.v v16, (a1)
; LMULMAX4-NEXT: vmv1r.v v9, v8 ; LMULMAX4-NEXT: vmv1r.v v9, v8
; LMULMAX4-NEXT: vmv1r.v v10, v8 ; LMULMAX4-NEXT: vmv1r.v v10, v8
; LMULMAX4-NEXT: vmv1r.v v11, v8 ; LMULMAX4-NEXT: vmv1r.v v11, v8
; LMULMAX4-NEXT: vmv1r.v v12, v8 ; LMULMAX4-NEXT: vmv1r.v v12, v8
; LMULMAX4-NEXT: call split_vector_args@plt ; LMULMAX4-NEXT: call split_vector_args@plt
; LMULMAX4-NEXT: addi sp, s0, -384 ; LMULMAX4-NEXT: addi sp, s0, -384
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload ; LMULMAX4-NEXT: ld ra, 376(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: ld s0, 368(sp) # 8-byte Folded Reload
; LMULMAX4-NEXT: addi sp, sp, 384 ; LMULMAX4-NEXT: addi sp, sp, 384
; LMULMAX4-NEXT: ret ; LMULMAX4-NEXT: ret
; ;
; LMULMAX2-LABEL: call_split_vector_args: ; LMULMAX2-LABEL: call_split_vector_args:
; LMULMAX2: # %bb.0: ; LMULMAX2: # %bb.0:
; LMULMAX2-NEXT: addi sp, sp, -256 ; LMULMAX2-NEXT: addi sp, sp, -256
; LMULMAX2-NEXT: .cfi_def_cfa_offset 256 ; LMULMAX2-NEXT: .cfi_def_cfa_offset 256
; LMULMAX2-NEXT: sd ra, 248(sp) # 8-byte Folded Spill ; LMULMAX2-NEXT: sd ra, 248(sp) # 8-byte Folded Spill
Show All 22 Lines
; LMULMAX2-NEXT: vse32.v v16, (a1) ; LMULMAX2-NEXT: vse32.v v16, (a1)
; LMULMAX2-NEXT: vmv1r.v v9, v8 ; LMULMAX2-NEXT: vmv1r.v v9, v8
; LMULMAX2-NEXT: vmv1r.v v10, v8 ; LMULMAX2-NEXT: vmv1r.v v10, v8
; LMULMAX2-NEXT: vmv1r.v v11, v8 ; LMULMAX2-NEXT: vmv1r.v v11, v8
; LMULMAX2-NEXT: vmv1r.v v12, v8 ; LMULMAX2-NEXT: vmv1r.v v12, v8
; LMULMAX2-NEXT: vmv.v.v v22, v14 ; LMULMAX2-NEXT: vmv.v.v v22, v14
; LMULMAX2-NEXT: call split_vector_args@plt ; LMULMAX2-NEXT: call split_vector_args@plt
; LMULMAX2-NEXT: addi sp, s0, -256 ; LMULMAX2-NEXT: addi sp, s0, -256
; LMULMAX2-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; LMULMAX2-NEXT: ld ra, 248(sp) # 8-byte Folded Reload ; LMULMAX2-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
; LMULMAX2-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; LMULMAX2-NEXT: addi sp, sp, 256 ; LMULMAX2-NEXT: addi sp, sp, 256
; LMULMAX2-NEXT: ret ; LMULMAX2-NEXT: ret
; ;
; LMULMAX1-LABEL: call_split_vector_args: ; LMULMAX1-LABEL: call_split_vector_args:
; LMULMAX1: # %bb.0: ; LMULMAX1: # %bb.0:
; LMULMAX1-NEXT: addi sp, sp, -256 ; LMULMAX1-NEXT: addi sp, sp, -256
; LMULMAX1-NEXT: .cfi_def_cfa_offset 256 ; LMULMAX1-NEXT: .cfi_def_cfa_offset 256
; LMULMAX1-NEXT: sd ra, 248(sp) # 8-byte Folded Spill ; LMULMAX1-NEXT: sd ra, 248(sp) # 8-byte Folded Spill
Show All 36 Lines
; LMULMAX1-NEXT: vmv1r.v v10, v8 ; LMULMAX1-NEXT: vmv1r.v v10, v8
; LMULMAX1-NEXT: vmv1r.v v11, v8 ; LMULMAX1-NEXT: vmv1r.v v11, v8
; LMULMAX1-NEXT: vmv1r.v v12, v8 ; LMULMAX1-NEXT: vmv1r.v v12, v8
; LMULMAX1-NEXT: vmv.v.v v21, v13 ; LMULMAX1-NEXT: vmv.v.v v21, v13
; LMULMAX1-NEXT: vmv.v.v v22, v14 ; LMULMAX1-NEXT: vmv.v.v v22, v14
; LMULMAX1-NEXT: vmv.v.v v23, v15 ; LMULMAX1-NEXT: vmv.v.v v23, v15
; LMULMAX1-NEXT: call split_vector_args@plt ; LMULMAX1-NEXT: call split_vector_args@plt
; LMULMAX1-NEXT: addi sp, s0, -256 ; LMULMAX1-NEXT: addi sp, s0, -256
; LMULMAX1-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; LMULMAX1-NEXT: ld ra, 248(sp) # 8-byte Folded Reload ; LMULMAX1-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
; LMULMAX1-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; LMULMAX1-NEXT: addi sp, sp, 256 ; LMULMAX1-NEXT: addi sp, sp, 256
; LMULMAX1-NEXT: ret ; LMULMAX1-NEXT: ret
%a = load <2 x i32>, <2 x i32>* %pa %a = load <2 x i32>, <2 x i32>* %pa
%b = load <32 x i32>, <32 x i32>* %pb %b = load <32 x i32>, <32 x i32>* %pb
%r = call <32 x i32> @split_vector_args(<2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <32 x i32> %b, <32 x i32> %b) %r = call <32 x i32> @split_vector_args(<2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <2 x i32> %a, <32 x i32> %b, <32 x i32> %b)
ret <32 x i32> %r ret <32 x i32> %r
} }
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll

Show First 20 Lines • Show All 170 Lines • ▼ Show 20 Lines
; RV32-NEXT: addi a1, sp, 256 ; RV32-NEXT: addi a1, sp, 256
; RV32-NEXT: vse8.v v24, (a1) ; RV32-NEXT: vse8.v v24, (a1)
; RV32-NEXT: vmv1r.v v0, v8 ; RV32-NEXT: vmv1r.v v0, v8
; RV32-NEXT: vmerge.vim v8, v16, 1, v0 ; RV32-NEXT: vmerge.vim v8, v16, 1, v0
; RV32-NEXT: addi a1, sp, 128 ; RV32-NEXT: addi a1, sp, 128
; RV32-NEXT: vse8.v v8, (a1) ; RV32-NEXT: vse8.v v8, (a1)
; RV32-NEXT: lb a0, 0(a0) ; RV32-NEXT: lb a0, 0(a0)
; RV32-NEXT: addi sp, s0, -512 ; RV32-NEXT: addi sp, s0, -512
; RV32-NEXT: lw s0, 504(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 508(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 508(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 504(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 512 ; RV32-NEXT: addi sp, sp, 512
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: extractelt_v256i1: ; RV64-LABEL: extractelt_v256i1:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -512 ; RV64-NEXT: addi sp, sp, -512
; RV64-NEXT: sd ra, 504(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 504(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 496(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 496(sp) # 8-byte Folded Spill
Show All 14 Lines
; RV64-NEXT: addi a1, sp, 256 ; RV64-NEXT: addi a1, sp, 256
; RV64-NEXT: vse8.v v24, (a1) ; RV64-NEXT: vse8.v v24, (a1)
; RV64-NEXT: vmv1r.v v0, v8 ; RV64-NEXT: vmv1r.v v0, v8
; RV64-NEXT: vmerge.vim v8, v16, 1, v0 ; RV64-NEXT: vmerge.vim v8, v16, 1, v0
; RV64-NEXT: addi a1, sp, 128 ; RV64-NEXT: addi a1, sp, 128
; RV64-NEXT: vse8.v v8, (a1) ; RV64-NEXT: vse8.v v8, (a1)
; RV64-NEXT: lb a0, 0(a0) ; RV64-NEXT: lb a0, 0(a0)
; RV64-NEXT: addi sp, s0, -512 ; RV64-NEXT: addi sp, s0, -512
; RV64-NEXT: ld s0, 496(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 504(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 504(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 496(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 512 ; RV64-NEXT: addi sp, sp, 512
; RV64-NEXT: ret ; RV64-NEXT: ret
%a = load <256 x i8>, <256 x i8>* %x %a = load <256 x i8>, <256 x i8>* %x
%b = icmp eq <256 x i8> %a, zeroinitializer %b = icmp eq <256 x i8> %a, zeroinitializer
%c = extractelement <256 x i1> %b, i64 %idx %c = extractelement <256 x i1> %b, i64 %idx
ret i1 %c ret i1 %c
} }

llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir

Show All 30 Lines--- |
; CHECK-NEXT: add a0, sp, a0 ; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: vs1r.v v25, (a0) # Unknown-size Folded Spill ; CHECK-NEXT: vs1r.v v25, (a0) # Unknown-size Folded Spill
; CHECK-NEXT: ld a0, 8(sp) ; CHECK-NEXT: ld a0, 8(sp)
; CHECK-NEXT: call spillslot@plt ; CHECK-NEXT: call spillslot@plt
; CHECK-NEXT: lui a0, 1 ; CHECK-NEXT: lui a0, 1
; CHECK-NEXT: addiw a0, a0, -1792 ; CHECK-NEXT: addiw a0, a0, -1792
; CHECK-NEXT: sub sp, s0, a0 ; CHECK-NEXT: sub sp, s0, a0
; CHECK-NEXT: addi sp, sp, 272 ; CHECK-NEXT: addi sp, sp, 272
; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 2032 ; CHECK-NEXT: addi sp, sp, 2032
; CHECK-NEXT: ret ; CHECK-NEXT: ret
ret void ret void
} }
... ...
--- ---
name: spillslot name: spillslot
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llvm/test/CodeGen/RISCV/rvv/localvar.ll

Show First 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; RV64IV-NEXT: csrr a0, vlenb ; RV64IV-NEXT: csrr a0, vlenb
; RV64IV-NEXT: slli a0, a0, 2 ; RV64IV-NEXT: slli a0, a0, 2
; RV64IV-NEXT: add a0, sp, a0 ; RV64IV-NEXT: add a0, sp, a0
; RV64IV-NEXT: addi a0, a0, 16 ; RV64IV-NEXT: addi a0, a0, 16
; RV64IV-NEXT: vl4r.v v8, (a0) ; RV64IV-NEXT: vl4r.v v8, (a0)
; RV64IV-NEXT: addi a0, sp, 16 ; RV64IV-NEXT: addi a0, sp, 16
; RV64IV-NEXT: vl4r.v v8, (a0) ; RV64IV-NEXT: vl4r.v v8, (a0)
; RV64IV-NEXT: addi sp, s0, -32 ; RV64IV-NEXT: addi sp, s0, -32
; RV64IV-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64IV-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IV-NEXT: addi sp, sp, 32 ; RV64IV-NEXT: addi sp, sp, 32
; RV64IV-NEXT: ret ; RV64IV-NEXT: ret
%local0 = alloca <vscale x 32 x i8> %local0 = alloca <vscale x 32 x i8>
%local1 = alloca <vscale x 32 x i8> %local1 = alloca <vscale x 32 x i8>
load volatile <vscale x 32 x i8>, <vscale x 32 x i8>* %local0 load volatile <vscale x 32 x i8>, <vscale x 32 x i8>* %local0
load volatile <vscale x 32 x i8>, <vscale x 32 x i8>* %local1 load volatile <vscale x 32 x i8>, <vscale x 32 x i8>* %local1
ret void ret void
} }
Show All 16 Lines
; RV64IV-NEXT: csrr a0, vlenb ; RV64IV-NEXT: csrr a0, vlenb
; RV64IV-NEXT: slli a0, a0, 3 ; RV64IV-NEXT: slli a0, a0, 3
; RV64IV-NEXT: add a0, sp, a0 ; RV64IV-NEXT: add a0, sp, a0
; RV64IV-NEXT: addi a0, a0, 48 ; RV64IV-NEXT: addi a0, a0, 48
; RV64IV-NEXT: vl8r.v v8, (a0) ; RV64IV-NEXT: vl8r.v v8, (a0)
; RV64IV-NEXT: addi a0, sp, 48 ; RV64IV-NEXT: addi a0, sp, 48
; RV64IV-NEXT: vl8r.v v8, (a0) ; RV64IV-NEXT: vl8r.v v8, (a0)
; RV64IV-NEXT: addi sp, s0, -64 ; RV64IV-NEXT: addi sp, s0, -64
; RV64IV-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64IV-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64IV-NEXT: addi sp, sp, 64 ; RV64IV-NEXT: addi sp, sp, 64
; RV64IV-NEXT: ret ; RV64IV-NEXT: ret
%local0 = alloca <vscale x 64 x i8> %local0 = alloca <vscale x 64 x i8>
%local1 = alloca <vscale x 64 x i8> %local1 = alloca <vscale x 64 x i8>
load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local0 load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local0
load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local1 load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local1
ret void ret void
} }
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV64IV-NEXT: addi a0, a0, -32 ; RV64IV-NEXT: addi a0, a0, -32
; RV64IV-NEXT: vl2r.v v8, (a0) ; RV64IV-NEXT: vl2r.v v8, (a0)
; RV64IV-NEXT: csrr a0, vlenb ; RV64IV-NEXT: csrr a0, vlenb
; RV64IV-NEXT: slli a0, a0, 2 ; RV64IV-NEXT: slli a0, a0, 2
; RV64IV-NEXT: sub a0, s0, a0 ; RV64IV-NEXT: sub a0, s0, a0
; RV64IV-NEXT: addi a0, a0, -32 ; RV64IV-NEXT: addi a0, a0, -32
; RV64IV-NEXT: vl2r.v v8, (a0) ; RV64IV-NEXT: vl2r.v v8, (a0)
; RV64IV-NEXT: addi sp, s0, -32 ; RV64IV-NEXT: addi sp, s0, -32
; RV64IV-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64IV-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64IV-NEXT: addi sp, sp, 32 ; RV64IV-NEXT: addi sp, sp, 32
; RV64IV-NEXT: ret ; RV64IV-NEXT: ret
%1 = alloca i8, i64 %n %1 = alloca i8, i64 %n
%2 = alloca <vscale x 16 x i8> %2 = alloca <vscale x 16 x i8>
%3 = alloca <vscale x 16 x i8> %3 = alloca <vscale x 16 x i8>
call void @notdead(i8* %1, <vscale x 16 x i8>* %2) call void @notdead(i8* %1, <vscale x 16 x i8>* %2)
load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %2 load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %2
load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %3 load volatile <vscale x 16 x i8>, <vscale x 16 x i8>* %3
Show All 33 Lines
; RV64IV-NEXT: slli a0, a0, 1 ; RV64IV-NEXT: slli a0, a0, 1
; RV64IV-NEXT: add a0, s1, a0 ; RV64IV-NEXT: add a0, s1, a0
; RV64IV-NEXT: addi a0, a0, 232 ; RV64IV-NEXT: addi a0, a0, 232
; RV64IV-NEXT: vl2r.v v8, (a0) ; RV64IV-NEXT: vl2r.v v8, (a0)
; RV64IV-NEXT: addi a0, s1, 232 ; RV64IV-NEXT: addi a0, s1, 232
; RV64IV-NEXT: vl2r.v v8, (a0) ; RV64IV-NEXT: vl2r.v v8, (a0)
; RV64IV-NEXT: lw a0, 120(s1) ; RV64IV-NEXT: lw a0, 120(s1)
; RV64IV-NEXT: addi sp, s0, -256 ; RV64IV-NEXT: addi sp, s0, -256
; RV64IV-NEXT: ld s1, 232(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld ra, 248(sp) # 8-byte Folded Reload ; RV64IV-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s1, 232(sp) # 8-byte Folded Reload
; RV64IV-NEXT: addi sp, sp, 256 ; RV64IV-NEXT: addi sp, sp, 256
; RV64IV-NEXT: ret ; RV64IV-NEXT: ret
%1 = alloca i8, i64 %n %1 = alloca i8, i64 %n
%2 = alloca i32, align 128 %2 = alloca i32, align 128
%local_scalar0 = alloca i32 %local_scalar0 = alloca i32
%local0 = alloca <vscale x 16 x i8> %local0 = alloca <vscale x 16 x i8>
%local1 = alloca <vscale x 16 x i8> %local1 = alloca <vscale x 16 x i8>
%local_scalar1 = alloca i32 %local_scalar1 = alloca i32
Show All 31 Lines

llvm/test/CodeGen/RISCV/rvv/memory-args.ll

Show First 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; RV64IV-NEXT: add a0, sp, a0 ; RV64IV-NEXT: add a0, sp, a0
; RV64IV-NEXT: addi a0, a0, 48 ; RV64IV-NEXT: addi a0, a0, 48
; RV64IV-NEXT: vl8r.v v24, (a0) ; RV64IV-NEXT: vl8r.v v24, (a0)
; RV64IV-NEXT: addi a0, sp, 48 ; RV64IV-NEXT: addi a0, sp, 48
; RV64IV-NEXT: addi a1, sp, 48 ; RV64IV-NEXT: addi a1, sp, 48
; RV64IV-NEXT: vs8r.v v24, (a1) ; RV64IV-NEXT: vs8r.v v24, (a1)
; RV64IV-NEXT: call callee@plt ; RV64IV-NEXT: call callee@plt
; RV64IV-NEXT: addi sp, s0, -64 ; RV64IV-NEXT: addi sp, s0, -64
; RV64IV-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64IV-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64IV-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64IV-NEXT: addi sp, sp, 64 ; RV64IV-NEXT: addi sp, sp, 64
; RV64IV-NEXT: ret ; RV64IV-NEXT: ret
%local0 = alloca <vscale x 64 x i8> %local0 = alloca <vscale x 64 x i8>
%local1 = alloca <vscale x 64 x i8> %local1 = alloca <vscale x 64 x i8>
%local2 = alloca <vscale x 64 x i8> %local2 = alloca <vscale x 64 x i8>
%arg0 = load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local0 %arg0 = load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local0
%arg1 = load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local1 %arg1 = load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local1
%arg2 = load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local2 %arg2 = load volatile <vscale x 64 x i8>, <vscale x 64 x i8>* %local2
%ret = call <vscale x 64 x i8> @callee(<vscale x 64 x i8> %arg0, %ret = call <vscale x 64 x i8> @callee(<vscale x 64 x i8> %arg0,
<vscale x 64 x i8> %arg1, <vscale x 64 x i8> %arg1,
<vscale x 64 x i8> %arg2) <vscale x 64 x i8> %arg2)
ret <vscale x 64 x i8> %ret ret <vscale x 64 x i8> %ret
} }

llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll

Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; SPILL-O2-NEXT: addi a0, a0, 8 ; SPILL-O2-NEXT: addi a0, a0, 8
; SPILL-O2-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload ; SPILL-O2-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
; SPILL-O2-NEXT: addi a0, sp, 8 ; SPILL-O2-NEXT: addi a0, sp, 8
; SPILL-O2-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload ; SPILL-O2-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload
; SPILL-O2-NEXT: vfadd.vv v8, v9, v8 ; SPILL-O2-NEXT: vfadd.vv v8, v9, v8
; SPILL-O2-NEXT: csrr a0, vlenb ; SPILL-O2-NEXT: csrr a0, vlenb
; SPILL-O2-NEXT: slli a0, a0, 1 ; SPILL-O2-NEXT: slli a0, a0, 1
; SPILL-O2-NEXT: add sp, sp, a0 ; SPILL-O2-NEXT: add sp, sp, a0
; SPILL-O2-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; SPILL-O2-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; SPILL-O2-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; SPILL-O2-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; SPILL-O2-NEXT: addi sp, sp, 16 ; SPILL-O2-NEXT: addi sp, sp, 16
; SPILL-O2-NEXT: ret ; SPILL-O2-NEXT: ret
{ {
%x = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 %gvl) %x = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 %gvl)
%call = call signext i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)) %call = call signext i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%z = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %x, i32 %gvl) %z = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %x, i32 %gvl)
ret <vscale x 1 x double> %z ret <vscale x 1 x double> %z
} }
declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 %gvl) declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i32 %gvl)
declare i32 @puts(i8*); declare i32 @puts(i8*);

llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll

Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; SPILL-O2-NEXT: addi a0, a0, 16 ; SPILL-O2-NEXT: addi a0, a0, 16
; SPILL-O2-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload ; SPILL-O2-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
; SPILL-O2-NEXT: addi a0, sp, 16 ; SPILL-O2-NEXT: addi a0, sp, 16
; SPILL-O2-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload ; SPILL-O2-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload
; SPILL-O2-NEXT: vfadd.vv v8, v9, v8 ; SPILL-O2-NEXT: vfadd.vv v8, v9, v8
; SPILL-O2-NEXT: csrr a0, vlenb ; SPILL-O2-NEXT: csrr a0, vlenb
; SPILL-O2-NEXT: slli a0, a0, 1 ; SPILL-O2-NEXT: slli a0, a0, 1
; SPILL-O2-NEXT: add sp, sp, a0 ; SPILL-O2-NEXT: add sp, sp, a0
; SPILL-O2-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; SPILL-O2-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; SPILL-O2-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; SPILL-O2-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; SPILL-O2-NEXT: addi sp, sp, 32 ; SPILL-O2-NEXT: addi sp, sp, 32
; SPILL-O2-NEXT: ret ; SPILL-O2-NEXT: ret
{ {
%x = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i64 %gvl) %x = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i64 %gvl)
%call = call signext i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)) %call = call signext i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%z = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %x, i64 %gvl) %z = call <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %x, i64 %gvl)
ret <vscale x 1 x double> %z ret <vscale x 1 x double> %z
} }
declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i64 %gvl) declare <vscale x 1 x double> @llvm.riscv.vfadd.nxv1f64.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, i64 %gvl)
declare i32 @puts(i8*); declare i32 @puts(i8*);

llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll

Show All 25 Lines
; CHECK-NEXT: add a2, a3, a2 ; CHECK-NEXT: add a2, a3, a2
; CHECK-NEXT: sub a2, s0, a2 ; CHECK-NEXT: sub a2, s0, a2
; CHECK-NEXT: addi a2, a2, -32 ; CHECK-NEXT: addi a2, a2, -32
; CHECK-NEXT: vl2re64.v v8, (a2) ; CHECK-NEXT: vl2re64.v v8, (a2)
; CHECK-NEXT: slli a1, a1, 2 ; CHECK-NEXT: slli a1, a1, 2
; CHECK-NEXT: add a0, a0, a1 ; CHECK-NEXT: add a0, a0, a1
; CHECK-NEXT: lw a0, 0(a0) ; CHECK-NEXT: lw a0, 0(a0)
; CHECK-NEXT: addi sp, s0, -32 ; CHECK-NEXT: addi sp, s0, -32
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%vla.addr = alloca i32, i64 %n %vla.addr = alloca i32, i64 %n
%v1.addr = alloca <vscale x 1 x i64> %v1.addr = alloca <vscale x 1 x i64>
%v1 = load volatile <vscale x 1 x i64>, <vscale x 1 x i64>* %v1.addr %v1 = load volatile <vscale x 1 x i64>, <vscale x 1 x i64>* %v1.addr
%v2.addr = alloca <vscale x 2 x i64> %v2.addr = alloca <vscale x 2 x i64>
Show All 20 Lines
; CHECK-NEXT: slli a0, a0, 1 ; CHECK-NEXT: slli a0, a0, 1
; CHECK-NEXT: add a0, sp, a0 ; CHECK-NEXT: add a0, sp, a0
; CHECK-NEXT: addi a0, a0, 112 ; CHECK-NEXT: addi a0, a0, 112
; CHECK-NEXT: vl1re64.v v8, (a0) ; CHECK-NEXT: vl1re64.v v8, (a0)
; CHECK-NEXT: addi a0, sp, 112 ; CHECK-NEXT: addi a0, sp, 112
; CHECK-NEXT: vl2re64.v v8, (a0) ; CHECK-NEXT: vl2re64.v v8, (a0)
; CHECK-NEXT: lw a0, 64(sp) ; CHECK-NEXT: lw a0, 64(sp)
; CHECK-NEXT: addi sp, s0, -128 ; CHECK-NEXT: addi sp, s0, -128
; CHECK-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 120(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 128 ; CHECK-NEXT: addi sp, sp, 128
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%overaligned = alloca i32, align 64 %overaligned = alloca i32, align 64
%v1.addr = alloca <vscale x 1 x i64> %v1.addr = alloca <vscale x 1 x i64>
%v1 = load volatile <vscale x 1 x i64>, <vscale x 1 x i64>* %v1.addr %v1 = load volatile <vscale x 1 x i64>, <vscale x 1 x i64>* %v1.addr
%v2.addr = alloca <vscale x 2 x i64> %v2.addr = alloca <vscale x 2 x i64>
Show All 29 Lines
; CHECK-NEXT: vl1re64.v v8, (a2) ; CHECK-NEXT: vl1re64.v v8, (a2)
; CHECK-NEXT: addi a2, s1, 104 ; CHECK-NEXT: addi a2, s1, 104
; CHECK-NEXT: vl2re64.v v8, (a2) ; CHECK-NEXT: vl2re64.v v8, (a2)
; CHECK-NEXT: lw a2, 64(s1) ; CHECK-NEXT: lw a2, 64(s1)
; CHECK-NEXT: slli a1, a1, 2 ; CHECK-NEXT: slli a1, a1, 2
; CHECK-NEXT: add a0, a0, a1 ; CHECK-NEXT: add a0, a0, a1
; CHECK-NEXT: lw a0, 0(a0) ; CHECK-NEXT: lw a0, 0(a0)
; CHECK-NEXT: addi sp, s0, -128 ; CHECK-NEXT: addi sp, s0, -128
; CHECK-NEXT: ld s1, 104(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 120(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s1, 104(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 128 ; CHECK-NEXT: addi sp, sp, 128
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%overaligned = alloca i32, align 64 %overaligned = alloca i32, align 64
%vla.addr = alloca i32, i64 %n %vla.addr = alloca i32, i64 %n
%v1.addr = alloca <vscale x 1 x i64> %v1.addr = alloca <vscale x 1 x i64>
%v1 = load volatile <vscale x 1 x i64>, <vscale x 1 x i64>* %v1.addr %v1 = load volatile <vscale x 1 x i64>, <vscale x 1 x i64>* %v1.addr
Show All 9 Lines

llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll

Show All 26 Lines
; CHECK-NEXT: sw a5, -56(s0) ; CHECK-NEXT: sw a5, -56(s0)
; CHECK-NEXT: sw a6, -60(s0) ; CHECK-NEXT: sw a6, -60(s0)
; CHECK-NEXT: sw a7, -64(s0) ; CHECK-NEXT: sw a7, -64(s0)
; CHECK-NEXT: sw t1, -68(s0) ; CHECK-NEXT: sw t1, -68(s0)
; CHECK-NEXT: sw t0, -72(s0) ; CHECK-NEXT: sw t0, -72(s0)
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 3 ; CHECK-NEXT: slli a0, a0, 3
; CHECK-NEXT: add sp, sp, a0 ; CHECK-NEXT: add sp, sp, a0
; CHECK-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 72(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 72(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 64(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 80 ; CHECK-NEXT: addi sp, sp, 80
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%x0.addr = alloca i32, align 4 %x0.addr = alloca i32, align 4
%x1.addr = alloca i32, align 4 %x1.addr = alloca i32, align 4
%v0.addr = alloca <vscale x 16 x i32>, align 4 %v0.addr = alloca <vscale x 16 x i32>, align 4
%x2.addr = alloca i32, align 4 %x2.addr = alloca i32, align 4
%x3.addr = alloca i32, align 4 %x3.addr = alloca i32, align 4
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; CHECK-NEXT: sd t1, 8(sp) ; CHECK-NEXT: sd t1, 8(sp)
; CHECK-NEXT: sd t0, 0(sp) ; CHECK-NEXT: sd t0, 0(sp)
; CHECK-NEXT: call lots_args ; CHECK-NEXT: call lots_args
; CHECK-NEXT: addi sp, sp, 16 ; CHECK-NEXT: addi sp, sp, 16
; CHECK-NEXT: li a0, 0 ; CHECK-NEXT: li a0, 0
; CHECK-NEXT: csrr a1, vlenb ; CHECK-NEXT: csrr a1, vlenb
; CHECK-NEXT: slli a1, a1, 3 ; CHECK-NEXT: slli a1, a1, 3
; CHECK-NEXT: add sp, sp, a1 ; CHECK-NEXT: add sp, sp, a1
; CHECK-NEXT: ld s0, 96(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 104(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 104(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 96(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 112 ; CHECK-NEXT: addi sp, sp, 112
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%retval = alloca i32, align 4 %retval = alloca i32, align 4
%input = alloca [4 x i32], align 4 %input = alloca [4 x i32], align 4
%vl = alloca i64, align 8 %vl = alloca i64, align 8
%v0 = alloca <vscale x 16 x i32>, align 4 %v0 = alloca <vscale x 16 x i32>, align 4
%x0 = alloca i32, align 4 %x0 = alloca i32, align 4
▲ Show 20 Lines • Show All 63 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

Show First 20 Lines • Show All 352 Lines • ▼ Show 20 Lines
; CHECK-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload ; CHECK-NEXT: vl1r.v v8, (a0) # Unknown-size Folded Reload
; CHECK-NEXT: addi a0, sp, 16 ; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload ; CHECK-NEXT: vl1r.v v9, (a0) # Unknown-size Folded Reload
; CHECK-NEXT: vfsub.vv v8, v9, v8 ; CHECK-NEXT: vfsub.vv v8, v9, v8
; CHECK-NEXT: .LBB6_3: # %if.then ; CHECK-NEXT: .LBB6_3: # %if.then
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 1 ; CHECK-NEXT: slli a0, a0, 1
; CHECK-NEXT: add sp, sp, a0 ; CHECK-NEXT: add sp, sp, a0
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 3, i64 0) %0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 3, i64 0)
%tobool = icmp eq i8 %cond, 0 %tobool = icmp eq i8 %cond, 0
br i1 %tobool, label %if.else, label %if.then br i1 %tobool, label %if.else, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
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; CHECK-NEXT: .LBB7_2: # %if.else ; CHECK-NEXT: .LBB7_2: # %if.else
; CHECK-NEXT: vfsub.vv v9, v8, v9 ; CHECK-NEXT: vfsub.vv v9, v8, v9
; CHECK-NEXT: .LBB7_3: # %if.end ; CHECK-NEXT: .LBB7_3: # %if.end
; CHECK-NEXT: vsetvli zero, s0, e64, m1, ta, mu ; CHECK-NEXT: vsetvli zero, s0, e64, m1, ta, mu
; CHECK-NEXT: vfmul.vv v8, v9, v8 ; CHECK-NEXT: vfmul.vv v8, v9, v8
; CHECK-NEXT: csrr a0, vlenb ; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 1 ; CHECK-NEXT: slli a0, a0, 1
; CHECK-NEXT: add sp, sp, a0 ; CHECK-NEXT: add sp, sp, a0
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; CHECK-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; CHECK-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 32 ; CHECK-NEXT: addi sp, sp, 32
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 3, i64 0) %0 = tail call i64 @llvm.riscv.vsetvli(i64 %avl, i64 3, i64 0)
%tobool = icmp eq i8 %cond, 0 %tobool = icmp eq i8 %cond, 0
br i1 %tobool, label %if.else, label %if.then br i1 %tobool, label %if.else, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
▲ Show 20 Lines • Show All 156 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/select-cc.ll

Show First 20 Lines • Show All 173 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a2 ; RV32I-NEXT: mv s0, a2
; RV32I-NEXT: .LBB1_2: ; RV32I-NEXT: .LBB1_2:
; RV32I-NEXT: beqz a1, .LBB1_4 ; RV32I-NEXT: beqz a1, .LBB1_4
; RV32I-NEXT: # %bb.3: ; RV32I-NEXT: # %bb.3:
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call bar@plt ; RV32I-NEXT: call bar@plt
; RV32I-NEXT: .LBB1_4: ; RV32I-NEXT: .LBB1_4:
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IBT-LABEL: numsignbits: ; RV32IBT-LABEL: numsignbits:
; RV32IBT: # %bb.0: ; RV32IBT: # %bb.0:
; RV32IBT-NEXT: addi sp, sp, -16 ; RV32IBT-NEXT: addi sp, sp, -16
; RV32IBT-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32IBT-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32IBT-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32IBT-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32IBT-NEXT: cmov s0, a0, a2, a3 ; RV32IBT-NEXT: cmov s0, a0, a2, a3
; RV32IBT-NEXT: beqz a1, .LBB1_2 ; RV32IBT-NEXT: beqz a1, .LBB1_2
; RV32IBT-NEXT: # %bb.1: ; RV32IBT-NEXT: # %bb.1:
; RV32IBT-NEXT: mv a0, s0 ; RV32IBT-NEXT: mv a0, s0
; RV32IBT-NEXT: call bar@plt ; RV32IBT-NEXT: call bar@plt
; RV32IBT-NEXT: .LBB1_2: ; RV32IBT-NEXT: .LBB1_2:
; RV32IBT-NEXT: mv a0, s0 ; RV32IBT-NEXT: mv a0, s0
; RV32IBT-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IBT-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32IBT-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32IBT-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32IBT-NEXT: addi sp, sp, 16 ; RV32IBT-NEXT: addi sp, sp, 16
; RV32IBT-NEXT: ret ; RV32IBT-NEXT: ret
%5 = icmp eq i16 %0, 0 %5 = icmp eq i16 %0, 0
%6 = select i1 %5, i16 %3, i16 %2 %6 = select i1 %5, i16 %3, i16 %2
%7 = icmp eq i16 %1, 0 %7 = icmp eq i16 %1, 0
br i1 %7, label %9, label %8 br i1 %7, label %9, label %8
8: ; preds = %4 8: ; preds = %4
tail call void @bar(i16 signext %6) tail call void @bar(i16 signext %6)
br label %9 br label %9
9: ; preds = %8, %4 9: ; preds = %8, %4
ret i16 %6 ret i16 %6
} }
declare void @bar(i16 signext) declare void @bar(i16 signext)

llvm/test/CodeGen/RISCV/shadowcallstack.ll

Show First 20 Lines • Show All 85 Lines • ▼ Show 20 Lines
; RV32-NEXT: call bar@plt ; RV32-NEXT: call bar@plt
; RV32-NEXT: mv s1, a0 ; RV32-NEXT: mv s1, a0
; RV32-NEXT: call bar@plt ; RV32-NEXT: call bar@plt
; RV32-NEXT: mv s0, a0 ; RV32-NEXT: mv s0, a0
; RV32-NEXT: call bar@plt ; RV32-NEXT: call bar@plt
; RV32-NEXT: add a1, s3, s1 ; RV32-NEXT: add a1, s3, s1
; RV32-NEXT: add a0, s0, a0 ; RV32-NEXT: add a0, s0, a0
; RV32-NEXT: add a0, a1, a0 ; RV32-NEXT: add a0, a1, a0
; RV32-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: lw ra, -4(s2) ; RV32-NEXT: lw ra, -4(s2)
; RV32-NEXT: addi s2, s2, -4 ; RV32-NEXT: addi s2, s2, -4
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: f4: ; RV64-LABEL: f4:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: sd ra, 0(s2) ; RV64-NEXT: sd ra, 0(s2)
Show All 13 Lines
; RV64-NEXT: call bar@plt ; RV64-NEXT: call bar@plt
; RV64-NEXT: mv s1, a0 ; RV64-NEXT: mv s1, a0
; RV64-NEXT: call bar@plt ; RV64-NEXT: call bar@plt
; RV64-NEXT: mv s0, a0 ; RV64-NEXT: mv s0, a0
; RV64-NEXT: call bar@plt ; RV64-NEXT: call bar@plt
; RV64-NEXT: addw a1, s3, s1 ; RV64-NEXT: addw a1, s3, s1
; RV64-NEXT: addw a0, s0, a0 ; RV64-NEXT: addw a0, s0, a0
; RV64-NEXT: addw a0, a1, a0 ; RV64-NEXT: addw a0, a1, a0
; RV64-NEXT: ld s3, 0(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s3, 0(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 32 ; RV64-NEXT: addi sp, sp, 32
; RV64-NEXT: ld ra, -8(s2) ; RV64-NEXT: ld ra, -8(s2)
; RV64-NEXT: addi s2, s2, -8 ; RV64-NEXT: addi s2, s2, -8
; RV64-NEXT: ret ; RV64-NEXT: ret
%res1 = call i32 @bar() %res1 = call i32 @bar()
%res2 = call i32 @bar() %res2 = call i32 @bar()
%res3 = call i32 @bar() %res3 = call i32 @bar()
%res4 = call i32 @bar() %res4 = call i32 @bar()
Show All 36 Lines

llvm/test/CodeGen/RISCV/shifts.ll

Show First 20 Lines • Show All 396 Lines • ▼ Show 20 Lines
; RV32I-NEXT: bltu a2, a6, .LBB7_29 ; RV32I-NEXT: bltu a2, a6, .LBB7_29
; RV32I-NEXT: .LBB7_28: ; RV32I-NEXT: .LBB7_28:
; RV32I-NEXT: mv a3, a7 ; RV32I-NEXT: mv a3, a7
; RV32I-NEXT: .LBB7_29: ; RV32I-NEXT: .LBB7_29:
; RV32I-NEXT: sw a3, 12(a0) ; RV32I-NEXT: sw a3, 12(a0)
; RV32I-NEXT: sw a4, 8(a0) ; RV32I-NEXT: sw a4, 8(a0)
; RV32I-NEXT: sw s1, 0(a0) ; RV32I-NEXT: sw s1, 0(a0)
; RV32I-NEXT: sw t0, 4(a0) ; RV32I-NEXT: sw t0, 4(a0)
; RV32I-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: ashr128: ; RV64I-LABEL: ashr128:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi a3, a2, -64 ; RV64I-NEXT: addi a3, a2, -64
; RV64I-NEXT: bltz a3, .LBB7_2 ; RV64I-NEXT: bltz a3, .LBB7_2
; RV64I-NEXT: # %bb.1: ; RV64I-NEXT: # %bb.1:
▲ Show 20 Lines • Show All 284 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/shrinkwrap.ll

Show First 20 Lines • Show All 80 Lines • ▼ Show 20 Lines
; RV32I-SW-NO-NEXT: # %bb.1: # %if.then ; RV32I-SW-NO-NEXT: # %bb.1: # %if.then
; RV32I-SW-NO-NEXT: addi a0, a0, 15 ; RV32I-SW-NO-NEXT: addi a0, a0, 15
; RV32I-SW-NO-NEXT: andi a0, a0, -16 ; RV32I-SW-NO-NEXT: andi a0, a0, -16
; RV32I-SW-NO-NEXT: sub a0, sp, a0 ; RV32I-SW-NO-NEXT: sub a0, sp, a0
; RV32I-SW-NO-NEXT: mv sp, a0 ; RV32I-SW-NO-NEXT: mv sp, a0
; RV32I-SW-NO-NEXT: call notdead@plt ; RV32I-SW-NO-NEXT: call notdead@plt
; RV32I-SW-NO-NEXT: .LBB1_2: # %if.end ; RV32I-SW-NO-NEXT: .LBB1_2: # %if.end
; RV32I-SW-NO-NEXT: addi sp, s0, -16 ; RV32I-SW-NO-NEXT: addi sp, s0, -16
; RV32I-SW-NO-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-SW-NO-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-SW-NO-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-SW-NO-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-SW-NO-NEXT: addi sp, sp, 16 ; RV32I-SW-NO-NEXT: addi sp, sp, 16
; RV32I-SW-NO-NEXT: ret ; RV32I-SW-NO-NEXT: ret
; ;
; RV32I-SW-LABEL: conditional_alloca: ; RV32I-SW-LABEL: conditional_alloca:
; RV32I-SW: # %bb.0: ; RV32I-SW: # %bb.0:
; RV32I-SW-NEXT: li a1, 32 ; RV32I-SW-NEXT: li a1, 32
; RV32I-SW-NEXT: bltu a1, a0, .LBB1_2 ; RV32I-SW-NEXT: bltu a1, a0, .LBB1_2
; RV32I-SW-NEXT: # %bb.1: # %if.then ; RV32I-SW-NEXT: # %bb.1: # %if.then
; RV32I-SW-NEXT: addi sp, sp, -16 ; RV32I-SW-NEXT: addi sp, sp, -16
; RV32I-SW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32I-SW-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-SW-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32I-SW-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32I-SW-NEXT: addi s0, sp, 16 ; RV32I-SW-NEXT: addi s0, sp, 16
; RV32I-SW-NEXT: addi a0, a0, 15 ; RV32I-SW-NEXT: addi a0, a0, 15
; RV32I-SW-NEXT: andi a0, a0, -16 ; RV32I-SW-NEXT: andi a0, a0, -16
; RV32I-SW-NEXT: sub a0, sp, a0 ; RV32I-SW-NEXT: sub a0, sp, a0
; RV32I-SW-NEXT: mv sp, a0 ; RV32I-SW-NEXT: mv sp, a0
; RV32I-SW-NEXT: call notdead@plt ; RV32I-SW-NEXT: call notdead@plt
; RV32I-SW-NEXT: addi sp, s0, -16 ; RV32I-SW-NEXT: addi sp, s0, -16
; RV32I-SW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-SW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-SW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-SW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-SW-NEXT: addi sp, sp, 16 ; RV32I-SW-NEXT: addi sp, sp, 16
; RV32I-SW-NEXT: .LBB1_2: # %if.end ; RV32I-SW-NEXT: .LBB1_2: # %if.end
; RV32I-SW-NEXT: ret ; RV32I-SW-NEXT: ret
; ;
; RV32I-SW-SR-LABEL: conditional_alloca: ; RV32I-SW-SR-LABEL: conditional_alloca:
; RV32I-SW-SR: # %bb.0: ; RV32I-SW-SR: # %bb.0:
; RV32I-SW-SR-NEXT: li a1, 32 ; RV32I-SW-SR-NEXT: li a1, 32
; RV32I-SW-SR-NEXT: bltu a1, a0, .LBB1_2 ; RV32I-SW-SR-NEXT: bltu a1, a0, .LBB1_2
Show All 23 Lines
; RV64I-SW-NEXT: slli a0, a0, 32 ; RV64I-SW-NEXT: slli a0, a0, 32
; RV64I-SW-NEXT: srli a0, a0, 32 ; RV64I-SW-NEXT: srli a0, a0, 32
; RV64I-SW-NEXT: addi a0, a0, 15 ; RV64I-SW-NEXT: addi a0, a0, 15
; RV64I-SW-NEXT: andi a0, a0, -16 ; RV64I-SW-NEXT: andi a0, a0, -16
; RV64I-SW-NEXT: sub a0, sp, a0 ; RV64I-SW-NEXT: sub a0, sp, a0
; RV64I-SW-NEXT: mv sp, a0 ; RV64I-SW-NEXT: mv sp, a0
; RV64I-SW-NEXT: call notdead@plt ; RV64I-SW-NEXT: call notdead@plt
; RV64I-SW-NEXT: addi sp, s0, -16 ; RV64I-SW-NEXT: addi sp, s0, -16
; RV64I-SW-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-SW-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; RV64I-SW-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-SW-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64I-SW-NEXT: addi sp, sp, 16 ; RV64I-SW-NEXT: addi sp, sp, 16
; RV64I-SW-NEXT: .LBB1_2: # %if.end ; RV64I-SW-NEXT: .LBB1_2: # %if.end
; RV64I-SW-NEXT: ret ; RV64I-SW-NEXT: ret
%cmp = icmp ule i32 %n, 32 %cmp = icmp ule i32 %n, 32
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: if.then:
%addr = alloca i8, i32 %n %addr = alloca i8, i32 %n
call void @notdead(i8* %addr) call void @notdead(i8* %addr)
br label %if.end br label %if.end
if.end: if.end:
ret void ret void
} }

llvm/test/CodeGen/RISCV/srem-lkk.ll

Show First 20 Lines • Show All 237 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: call __modsi3@plt ; RV32I-NEXT: call __modsi3@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call __divsi3@plt ; RV32I-NEXT: call __divsi3@plt
; RV32I-NEXT: add a0, s1, a0 ; RV32I-NEXT: add a0, s1, a0
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: combine_srem_sdiv: ; RV32IM-LABEL: combine_srem_sdiv:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 706409 ; RV32IM-NEXT: lui a1, 706409
; RV32IM-NEXT: addi a1, a1, 389 ; RV32IM-NEXT: addi a1, a1, 389
; RV32IM-NEXT: mulh a1, a0, a1 ; RV32IM-NEXT: mulh a1, a0, a1
Show All 17 Lines
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __divdi3@plt ; RV64I-NEXT: call __divdi3@plt
; RV64I-NEXT: addw a0, s1, a0 ; RV64I-NEXT: addw a0, s1, a0
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: combine_srem_sdiv: ; RV64IM-LABEL: combine_srem_sdiv:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: sext.w a1, a0 ; RV64IM-NEXT: sext.w a1, a0
; RV64IM-NEXT: lui a2, 706409 ; RV64IM-NEXT: lui a2, 706409
; RV64IM-NEXT: addiw a2, a2, 389 ; RV64IM-NEXT: addiw a2, a2, 389
▲ Show 20 Lines • Show All 168 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll

Show First 20 Lines • Show All 373 Lines • ▼ Show 20 Lines
; RV32-NEXT: sw a0, 4(s0) ; RV32-NEXT: sw a0, 4(s0)
; RV32-NEXT: srli a0, a1, 31 ; RV32-NEXT: srli a0, a1, 31
; RV32-NEXT: andi a1, a1, 1 ; RV32-NEXT: andi a1, a1, 1
; RV32-NEXT: slli a1, a1, 1 ; RV32-NEXT: slli a1, a1, 1
; RV32-NEXT: or a0, a0, a1 ; RV32-NEXT: or a0, a0, a1
; RV32-NEXT: slli a1, a2, 2 ; RV32-NEXT: slli a1, a2, 2
; RV32-NEXT: sub a0, a0, a1 ; RV32-NEXT: sub a0, a0, a1
; RV32-NEXT: sw a0, 8(s0) ; RV32-NEXT: sw a0, 8(s0)
; RV32-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 32 ; RV32-NEXT: addi sp, sp, 32
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: test_srem_vec: ; RV64-LABEL: test_srem_vec:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -64 ; RV64-NEXT: addi sp, sp, -64
; RV64-NEXT: sd ra, 56(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 48(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; RV64-NEXT: and a2, a2, a3 ; RV64-NEXT: and a2, a2, a3
; RV64-NEXT: srli a4, a2, 31 ; RV64-NEXT: srli a4, a2, 31
; RV64-NEXT: subw a1, a4, a1 ; RV64-NEXT: subw a1, a4, a1
; RV64-NEXT: sw a1, 8(s0) ; RV64-NEXT: sw a1, 8(s0)
; RV64-NEXT: and a0, a0, a3 ; RV64-NEXT: and a0, a0, a3
; RV64-NEXT: slli a1, a2, 33 ; RV64-NEXT: slli a1, a2, 33
; RV64-NEXT: or a0, a0, a1 ; RV64-NEXT: or a0, a0, a1
; RV64-NEXT: sd a0, 0(s0) ; RV64-NEXT: sd a0, 0(s0)
; RV64-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 64 ; RV64-NEXT: addi sp, sp, 64
; RV64-NEXT: ret ; RV64-NEXT: ret
; ;
; RV32M-LABEL: test_srem_vec: ; RV32M-LABEL: test_srem_vec:
; RV32M: # %bb.0: ; RV32M: # %bb.0:
; RV32M-NEXT: addi sp, sp, -32 ; RV32M-NEXT: addi sp, sp, -32
; RV32M-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; RV32M-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; RV32M-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; RV32M-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
; RV32M-NEXT: sw a0, 4(s0) ; RV32M-NEXT: sw a0, 4(s0)
; RV32M-NEXT: srli a0, a1, 31 ; RV32M-NEXT: srli a0, a1, 31
; RV32M-NEXT: andi a1, a1, 1 ; RV32M-NEXT: andi a1, a1, 1
; RV32M-NEXT: slli a1, a1, 1 ; RV32M-NEXT: slli a1, a1, 1
; RV32M-NEXT: or a0, a0, a1 ; RV32M-NEXT: or a0, a0, a1
; RV32M-NEXT: slli a1, a2, 2 ; RV32M-NEXT: slli a1, a2, 2
; RV32M-NEXT: sub a0, a0, a1 ; RV32M-NEXT: sub a0, a0, a1
; RV32M-NEXT: sw a0, 8(s0) ; RV32M-NEXT: sw a0, 8(s0)
; RV32M-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32M-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32M-NEXT: lw s6, 0(sp) # 4-byte Folded Reload
; RV32M-NEXT: addi sp, sp, 32 ; RV32M-NEXT: addi sp, sp, 32
; RV32M-NEXT: ret ; RV32M-NEXT: ret
; ;
; RV64M-LABEL: test_srem_vec: ; RV64M-LABEL: test_srem_vec:
; RV64M: # %bb.0: ; RV64M: # %bb.0:
; RV64M-NEXT: lb a1, 12(a0) ; RV64M-NEXT: lb a1, 12(a0)
; RV64M-NEXT: lwu a2, 8(a0) ; RV64M-NEXT: lwu a2, 8(a0)
; RV64M-NEXT: slli a1, a1, 32 ; RV64M-NEXT: slli a1, a1, 32
▲ Show 20 Lines • Show All 176 Lines • ▼ Show 20 Lines
; RV32MV-NEXT: vmv.x.s a2, v8 ; RV32MV-NEXT: vmv.x.s a2, v8
; RV32MV-NEXT: andi a2, a2, 1 ; RV32MV-NEXT: andi a2, a2, 1
; RV32MV-NEXT: slli a2, a2, 1 ; RV32MV-NEXT: slli a2, a2, 1
; RV32MV-NEXT: or a1, a1, a2 ; RV32MV-NEXT: or a1, a1, a2
; RV32MV-NEXT: slli a0, a0, 2 ; RV32MV-NEXT: slli a0, a0, 2
; RV32MV-NEXT: or a0, a1, a0 ; RV32MV-NEXT: or a0, a1, a0
; RV32MV-NEXT: sw a0, 8(s1) ; RV32MV-NEXT: sw a0, 8(s1)
; RV32MV-NEXT: addi sp, s0, -96 ; RV32MV-NEXT: addi sp, s0, -96
; RV32MV-NEXT: lw s5, 68(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s4, 72(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s3, 76(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s2, 80(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s1, 84(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s0, 88(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw ra, 92(sp) # 4-byte Folded Reload ; RV32MV-NEXT: lw ra, 92(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s0, 88(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s1, 84(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s2, 80(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s3, 76(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s4, 72(sp) # 4-byte Folded Reload
; RV32MV-NEXT: lw s5, 68(sp) # 4-byte Folded Reload
; RV32MV-NEXT: addi sp, sp, 96 ; RV32MV-NEXT: addi sp, sp, 96
; RV32MV-NEXT: ret ; RV32MV-NEXT: ret
; ;
; RV64MV-LABEL: test_srem_vec: ; RV64MV-LABEL: test_srem_vec:
; RV64MV: # %bb.0: ; RV64MV: # %bb.0:
; RV64MV-NEXT: addi sp, sp, -96 ; RV64MV-NEXT: addi sp, sp, -96
; RV64MV-NEXT: sd ra, 88(sp) # 8-byte Folded Spill ; RV64MV-NEXT: sd ra, 88(sp) # 8-byte Folded Spill
; RV64MV-NEXT: sd s0, 80(sp) # 8-byte Folded Spill ; RV64MV-NEXT: sd s0, 80(sp) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
; RV64MV-NEXT: or a2, a4, a2 ; RV64MV-NEXT: or a2, a4, a2
; RV64MV-NEXT: sw a2, 8(a0) ; RV64MV-NEXT: sw a2, 8(a0)
; RV64MV-NEXT: vmv.x.s a2, v8 ; RV64MV-NEXT: vmv.x.s a2, v8
; RV64MV-NEXT: and a1, a2, a1 ; RV64MV-NEXT: and a1, a2, a1
; RV64MV-NEXT: slli a2, a3, 33 ; RV64MV-NEXT: slli a2, a3, 33
; RV64MV-NEXT: or a1, a1, a2 ; RV64MV-NEXT: or a1, a1, a2
; RV64MV-NEXT: sd a1, 0(a0) ; RV64MV-NEXT: sd a1, 0(a0)
; RV64MV-NEXT: addi sp, s0, -96 ; RV64MV-NEXT: addi sp, s0, -96
; RV64MV-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
; RV64MV-NEXT: ld ra, 88(sp) # 8-byte Folded Reload ; RV64MV-NEXT: ld ra, 88(sp) # 8-byte Folded Reload
; RV64MV-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
; RV64MV-NEXT: addi sp, sp, 96 ; RV64MV-NEXT: addi sp, sp, 96
; RV64MV-NEXT: ret ; RV64MV-NEXT: ret
%ld = load <3 x i33>, <3 x i33>* %X %ld = load <3 x i33>, <3 x i33>* %X
%srem = srem <3 x i33> %ld, <i33 6, i33 7, i33 -5> %srem = srem <3 x i33> %ld, <i33 6, i33 7, i33 -5>
%cmp = icmp ne <3 x i33> %srem, <i33 0, i33 1, i33 2> %cmp = icmp ne <3 x i33> %srem, <i33 0, i33 1, i33 2>
%ext = sext <3 x i1> %cmp to <3 x i33> %ext = sext <3 x i1> %cmp to <3 x i33>
store <3 x i33> %ext, <3 x i33>* %X store <3 x i33> %ext, <3 x i33>* %X
ret void ret void
} }

llvm/test/CodeGen/RISCV/srem-vector-lkk.ll

Show All 37 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li a1, -1003 ; RV32I-NEXT: li a1, -1003
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __modsi3@plt ; RV32I-NEXT: call __modsi3@plt
; RV32I-NEXT: sh a0, 6(s1) ; RV32I-NEXT: sh a0, 6(s1)
; RV32I-NEXT: sh s0, 4(s1) ; RV32I-NEXT: sh s0, 4(s1)
; RV32I-NEXT: sh s5, 2(s1) ; RV32I-NEXT: sh s5, 2(s1)
; RV32I-NEXT: sh s4, 0(s1) ; RV32I-NEXT: sh s4, 0(s1)
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: fold_srem_vec_1: ; RV32IM-LABEL: fold_srem_vec_1:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lh a6, 12(a1) ; RV32IM-NEXT: lh a6, 12(a1)
; RV32IM-NEXT: lh a3, 8(a1) ; RV32IM-NEXT: lh a3, 8(a1)
; RV32IM-NEXT: lh a4, 0(a1) ; RV32IM-NEXT: lh a4, 0(a1)
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: li a1, -1003 ; RV64I-NEXT: li a1, -1003
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: sh a0, 6(s1) ; RV64I-NEXT: sh a0, 6(s1)
; RV64I-NEXT: sh s0, 4(s1) ; RV64I-NEXT: sh s0, 4(s1)
; RV64I-NEXT: sh s5, 2(s1) ; RV64I-NEXT: sh s5, 2(s1)
; RV64I-NEXT: sh s4, 0(s1) ; RV64I-NEXT: sh s4, 0(s1)
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: addi sp, sp, 64
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: fold_srem_vec_1: ; RV64IM-LABEL: fold_srem_vec_1:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lh a6, 24(a1) ; RV64IM-NEXT: lh a6, 24(a1)
; RV64IM-NEXT: lh a3, 16(a1) ; RV64IM-NEXT: lh a3, 16(a1)
; RV64IM-NEXT: lh a4, 8(a1) ; RV64IM-NEXT: lh a4, 8(a1)
▲ Show 20 Lines • Show All 98 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __modsi3@plt ; RV32I-NEXT: call __modsi3@plt
; RV32I-NEXT: sh a0, 6(s1) ; RV32I-NEXT: sh a0, 6(s1)
; RV32I-NEXT: sh s0, 4(s1) ; RV32I-NEXT: sh s0, 4(s1)
; RV32I-NEXT: sh s5, 2(s1) ; RV32I-NEXT: sh s5, 2(s1)
; RV32I-NEXT: sh s4, 0(s1) ; RV32I-NEXT: sh s4, 0(s1)
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: fold_srem_vec_2: ; RV32IM-LABEL: fold_srem_vec_2:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lh a6, 12(a1) ; RV32IM-NEXT: lh a6, 12(a1)
; RV32IM-NEXT: lh a3, 8(a1) ; RV32IM-NEXT: lh a3, 8(a1)
; RV32IM-NEXT: lh a4, 0(a1) ; RV32IM-NEXT: lh a4, 0(a1)
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: sh a0, 6(s1) ; RV64I-NEXT: sh a0, 6(s1)
; RV64I-NEXT: sh s0, 4(s1) ; RV64I-NEXT: sh s0, 4(s1)
; RV64I-NEXT: sh s5, 2(s1) ; RV64I-NEXT: sh s5, 2(s1)
; RV64I-NEXT: sh s4, 0(s1) ; RV64I-NEXT: sh s4, 0(s1)
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: addi sp, sp, 64
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: fold_srem_vec_2: ; RV64IM-LABEL: fold_srem_vec_2:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lh a6, 24(a1) ; RV64IM-NEXT: lh a6, 24(a1)
; RV64IM-NEXT: lh a7, 16(a1) ; RV64IM-NEXT: lh a7, 16(a1)
; RV64IM-NEXT: lh a4, 8(a1) ; RV64IM-NEXT: lh a4, 8(a1)
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Lines
; RV32I-NEXT: add a0, s8, a0 ; RV32I-NEXT: add a0, s8, a0
; RV32I-NEXT: add a1, s7, s1 ; RV32I-NEXT: add a1, s7, s1
; RV32I-NEXT: add a2, s6, s4 ; RV32I-NEXT: add a2, s6, s4
; RV32I-NEXT: add a3, s5, s9 ; RV32I-NEXT: add a3, s5, s9
; RV32I-NEXT: sh a3, 6(s0) ; RV32I-NEXT: sh a3, 6(s0)
; RV32I-NEXT: sh a2, 4(s0) ; RV32I-NEXT: sh a2, 4(s0)
; RV32I-NEXT: sh a1, 2(s0) ; RV32I-NEXT: sh a1, 2(s0)
; RV32I-NEXT: sh a0, 0(s0) ; RV32I-NEXT: sh a0, 0(s0)
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 48 ; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: combine_srem_sdiv: ; RV32IM-LABEL: combine_srem_sdiv:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lh a6, 0(a1) ; RV32IM-NEXT: lh a6, 0(a1)
; RV32IM-NEXT: lh a3, 4(a1) ; RV32IM-NEXT: lh a3, 4(a1)
; RV32IM-NEXT: lh a4, 12(a1) ; RV32IM-NEXT: lh a4, 12(a1)
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; RV64I-NEXT: addw a0, s8, a0 ; RV64I-NEXT: addw a0, s8, a0
; RV64I-NEXT: addw a1, s7, s1 ; RV64I-NEXT: addw a1, s7, s1
; RV64I-NEXT: addw a2, s6, s4 ; RV64I-NEXT: addw a2, s6, s4
; RV64I-NEXT: addw a3, s5, s9 ; RV64I-NEXT: addw a3, s5, s9
; RV64I-NEXT: sh a3, 6(s0) ; RV64I-NEXT: sh a3, 6(s0)
; RV64I-NEXT: sh a2, 4(s0) ; RV64I-NEXT: sh a2, 4(s0)
; RV64I-NEXT: sh a1, 2(s0) ; RV64I-NEXT: sh a1, 2(s0)
; RV64I-NEXT: sh a0, 0(s0) ; RV64I-NEXT: sh a0, 0(s0)
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 96 ; RV64I-NEXT: addi sp, sp, 96
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: combine_srem_sdiv: ; RV64IM-LABEL: combine_srem_sdiv:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lh a6, 0(a1) ; RV64IM-NEXT: lh a6, 0(a1)
; RV64IM-NEXT: lh a7, 8(a1) ; RV64IM-NEXT: lh a7, 8(a1)
; RV64IM-NEXT: lh a4, 16(a1) ; RV64IM-NEXT: lh a4, 16(a1)
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
; RV32I-NEXT: andi a1, a1, -8 ; RV32I-NEXT: andi a1, a1, -8
; RV32I-NEXT: sub s1, a3, a1 ; RV32I-NEXT: sub s1, a3, a1
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: call __modsi3@plt ; RV32I-NEXT: call __modsi3@plt
; RV32I-NEXT: sh a0, 6(s0) ; RV32I-NEXT: sh a0, 6(s0)
; RV32I-NEXT: sh s1, 4(s0) ; RV32I-NEXT: sh s1, 4(s0)
; RV32I-NEXT: sh s3, 2(s0) ; RV32I-NEXT: sh s3, 2(s0)
; RV32I-NEXT: sh s2, 0(s0) ; RV32I-NEXT: sh s2, 0(s0)
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_srem_power_of_two: ; RV32IM-LABEL: dont_fold_srem_power_of_two:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lh a2, 8(a1) ; RV32IM-NEXT: lh a2, 8(a1)
; RV32IM-NEXT: lh a3, 4(a1) ; RV32IM-NEXT: lh a3, 4(a1)
; RV32IM-NEXT: lh a4, 12(a1) ; RV32IM-NEXT: lh a4, 12(a1)
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; RV64I-NEXT: andi a1, a1, -8 ; RV64I-NEXT: andi a1, a1, -8
; RV64I-NEXT: subw s1, a3, a1 ; RV64I-NEXT: subw s1, a3, a1
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: sh a0, 6(s0) ; RV64I-NEXT: sh a0, 6(s0)
; RV64I-NEXT: sh s1, 4(s0) ; RV64I-NEXT: sh s1, 4(s0)
; RV64I-NEXT: sh s3, 2(s0) ; RV64I-NEXT: sh s3, 2(s0)
; RV64I-NEXT: sh s2, 0(s0) ; RV64I-NEXT: sh s2, 0(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_srem_power_of_two: ; RV64IM-LABEL: dont_fold_srem_power_of_two:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lh a6, 16(a1) ; RV64IM-NEXT: lh a6, 16(a1)
; RV64IM-NEXT: lh a3, 8(a1) ; RV64IM-NEXT: lh a3, 8(a1)
; RV64IM-NEXT: lh a4, 0(a1) ; RV64IM-NEXT: lh a4, 0(a1)
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: lui a0, 1
; RV32I-NEXT: addi a1, a0, 1327 ; RV32I-NEXT: addi a1, a0, 1327
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __modsi3@plt ; RV32I-NEXT: call __modsi3@plt
; RV32I-NEXT: sh zero, 0(s0) ; RV32I-NEXT: sh zero, 0(s0)
; RV32I-NEXT: sh a0, 6(s0) ; RV32I-NEXT: sh a0, 6(s0)
; RV32I-NEXT: sh s1, 4(s0) ; RV32I-NEXT: sh s1, 4(s0)
; RV32I-NEXT: sh s3, 2(s0) ; RV32I-NEXT: sh s3, 2(s0)
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_srem_one: ; RV32IM-LABEL: dont_fold_srem_one:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lh a2, 12(a1) ; RV32IM-NEXT: lh a2, 12(a1)
; RV32IM-NEXT: lh a3, 4(a1) ; RV32IM-NEXT: lh a3, 4(a1)
; RV32IM-NEXT: lh a1, 8(a1) ; RV32IM-NEXT: lh a1, 8(a1)
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: addiw a1, a0, 1327 ; RV64I-NEXT: addiw a1, a0, 1327
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: sh zero, 0(s0) ; RV64I-NEXT: sh zero, 0(s0)
; RV64I-NEXT: sh a0, 6(s0) ; RV64I-NEXT: sh a0, 6(s0)
; RV64I-NEXT: sh s1, 4(s0) ; RV64I-NEXT: sh s1, 4(s0)
; RV64I-NEXT: sh s3, 2(s0) ; RV64I-NEXT: sh s3, 2(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_srem_one: ; RV64IM-LABEL: dont_fold_srem_one:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lh a2, 24(a1) ; RV64IM-NEXT: lh a2, 24(a1)
; RV64IM-NEXT: lh a3, 8(a1) ; RV64IM-NEXT: lh a3, 8(a1)
; RV64IM-NEXT: lh a1, 16(a1) ; RV64IM-NEXT: lh a1, 16(a1)
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: lui a0, 1
; RV32I-NEXT: addi a1, a0, 1327 ; RV32I-NEXT: addi a1, a0, 1327
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __modsi3@plt ; RV32I-NEXT: call __modsi3@plt
; RV32I-NEXT: sh zero, 0(s0) ; RV32I-NEXT: sh zero, 0(s0)
; RV32I-NEXT: sh a0, 6(s0) ; RV32I-NEXT: sh a0, 6(s0)
; RV32I-NEXT: sh s1, 4(s0) ; RV32I-NEXT: sh s1, 4(s0)
; RV32I-NEXT: sh s3, 2(s0) ; RV32I-NEXT: sh s3, 2(s0)
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_urem_i16_smax: ; RV32IM-LABEL: dont_fold_urem_i16_smax:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lh a2, 4(a1) ; RV32IM-NEXT: lh a2, 4(a1)
; RV32IM-NEXT: lh a3, 8(a1) ; RV32IM-NEXT: lh a3, 8(a1)
; RV32IM-NEXT: lh a1, 12(a1) ; RV32IM-NEXT: lh a1, 12(a1)
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: addiw a1, a0, 1327 ; RV64I-NEXT: addiw a1, a0, 1327
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: sh zero, 0(s0) ; RV64I-NEXT: sh zero, 0(s0)
; RV64I-NEXT: sh a0, 6(s0) ; RV64I-NEXT: sh a0, 6(s0)
; RV64I-NEXT: sh s1, 4(s0) ; RV64I-NEXT: sh s1, 4(s0)
; RV64I-NEXT: sh s3, 2(s0) ; RV64I-NEXT: sh s3, 2(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_urem_i16_smax: ; RV64IM-LABEL: dont_fold_urem_i16_smax:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lh a2, 8(a1) ; RV64IM-NEXT: lh a2, 8(a1)
; RV64IM-NEXT: lh a3, 24(a1) ; RV64IM-NEXT: lh a3, 24(a1)
; RV64IM-NEXT: lh a1, 16(a1) ; RV64IM-NEXT: lh a1, 16(a1)
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
; RV32I-NEXT: sw a1, 28(s0) ; RV32I-NEXT: sw a1, 28(s0)
; RV32I-NEXT: sw a0, 24(s0) ; RV32I-NEXT: sw a0, 24(s0)
; RV32I-NEXT: sw s1, 20(s0) ; RV32I-NEXT: sw s1, 20(s0)
; RV32I-NEXT: sw s4, 16(s0) ; RV32I-NEXT: sw s4, 16(s0)
; RV32I-NEXT: sw s9, 12(s0) ; RV32I-NEXT: sw s9, 12(s0)
; RV32I-NEXT: sw s6, 8(s0) ; RV32I-NEXT: sw s6, 8(s0)
; RV32I-NEXT: sw s8, 4(s0) ; RV32I-NEXT: sw s8, 4(s0)
; RV32I-NEXT: sw s7, 0(s0) ; RV32I-NEXT: sw s7, 0(s0)
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 48 ; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_srem_i64: ; RV32IM-LABEL: dont_fold_srem_i64:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: addi sp, sp, -48 ; RV32IM-NEXT: addi sp, sp, -48
; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill ; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
; RV32IM-NEXT: sw s0, 40(sp) # 4-byte Folded Spill ; RV32IM-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32IM-NEXT: sw a1, 28(s0) ; RV32IM-NEXT: sw a1, 28(s0)
; RV32IM-NEXT: sw a0, 24(s0) ; RV32IM-NEXT: sw a0, 24(s0)
; RV32IM-NEXT: sw s1, 20(s0) ; RV32IM-NEXT: sw s1, 20(s0)
; RV32IM-NEXT: sw s4, 16(s0) ; RV32IM-NEXT: sw s4, 16(s0)
; RV32IM-NEXT: sw s9, 12(s0) ; RV32IM-NEXT: sw s9, 12(s0)
; RV32IM-NEXT: sw s6, 8(s0) ; RV32IM-NEXT: sw s6, 8(s0)
; RV32IM-NEXT: sw s8, 4(s0) ; RV32IM-NEXT: sw s8, 4(s0)
; RV32IM-NEXT: sw s7, 0(s0) ; RV32IM-NEXT: sw s7, 0(s0)
; RV32IM-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32IM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT: addi sp, sp, 48 ; RV32IM-NEXT: addi sp, sp, 48
; RV32IM-NEXT: ret ; RV32IM-NEXT: ret
; ;
; RV64I-LABEL: dont_fold_srem_i64: ; RV64I-LABEL: dont_fold_srem_i64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 15 Lines
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: addiw a1, a0, 1327 ; RV64I-NEXT: addiw a1, a0, 1327
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __moddi3@plt ; RV64I-NEXT: call __moddi3@plt
; RV64I-NEXT: sd zero, 0(s0) ; RV64I-NEXT: sd zero, 0(s0)
; RV64I-NEXT: sd a0, 24(s0) ; RV64I-NEXT: sd a0, 24(s0)
; RV64I-NEXT: sd s1, 16(s0) ; RV64I-NEXT: sd s1, 16(s0)
; RV64I-NEXT: sd s3, 8(s0) ; RV64I-NEXT: sd s3, 8(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_srem_i64: ; RV64IM-LABEL: dont_fold_srem_i64:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: ld a2, 24(a1) ; RV64IM-NEXT: ld a2, 24(a1)
; RV64IM-NEXT: ld a3, 8(a1) ; RV64IM-NEXT: ld a3, 8(a1)
; RV64IM-NEXT: ld a1, 16(a1) ; RV64IM-NEXT: ld a1, 16(a1)
▲ Show 20 Lines • Show All 55 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll

Show All 22 Lines
; RV32I-NEXT: mv s1, sp ; RV32I-NEXT: mv s1, sp
; RV32I-NEXT: addi a0, a0, 15 ; RV32I-NEXT: addi a0, a0, 15
; RV32I-NEXT: andi a0, a0, -16 ; RV32I-NEXT: andi a0, a0, -16
; RV32I-NEXT: sub a0, sp, a0 ; RV32I-NEXT: sub a0, sp, a0
; RV32I-NEXT: mv sp, a0 ; RV32I-NEXT: mv sp, a0
; RV32I-NEXT: mv a1, s1 ; RV32I-NEXT: mv a1, s1
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -64 ; RV32I-NEXT: addi sp, s0, -64
; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 64 ; RV32I-NEXT: addi sp, sp, 64
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller: ; RV64I-LABEL: caller:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -64 ; RV64I-NEXT: addi sp, sp, -64
; RV64I-NEXT: .cfi_def_cfa_offset 64 ; RV64I-NEXT: .cfi_def_cfa_offset 64
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
Show All 10 Lines
; RV64I-NEXT: srli a0, a0, 32 ; RV64I-NEXT: srli a0, a0, 32
; RV64I-NEXT: addi a0, a0, 15 ; RV64I-NEXT: addi a0, a0, 15
; RV64I-NEXT: andi a0, a0, -16 ; RV64I-NEXT: andi a0, a0, -16
; RV64I-NEXT: sub a0, sp, a0 ; RV64I-NEXT: sub a0, sp, a0
; RV64I-NEXT: mv sp, a0 ; RV64I-NEXT: mv sp, a0
; RV64I-NEXT: mv a1, s1 ; RV64I-NEXT: mv a1, s1
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -64 ; RV64I-NEXT: addi sp, s0, -64
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: addi sp, sp, 64
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, i32 %n %1 = alloca i8, i32 %n
%2 = alloca i32, align 64 %2 = alloca i32, align 64
call void @callee(i8* %1, i32 *%2) call void @callee(i8* %1, i32 *%2)
ret void ret void
} }

llvm/test/CodeGen/RISCV/stack-realignment.ll

Show All 15 Lines
; RV32I-NEXT: .cfi_offset ra, -4 ; RV32I-NEXT: .cfi_offset ra, -4
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: addi s0, sp, 32 ; RV32I-NEXT: addi s0, sp, 32
; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: andi sp, sp, -32 ; RV32I-NEXT: andi sp, sp, -32
; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: mv a0, sp
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -32 ; RV32I-NEXT: addi sp, s0, -32
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller32: ; RV64I-LABEL: caller32:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -32 ; RV64I-NEXT: addi sp, sp, -32
; RV64I-NEXT: .cfi_def_cfa_offset 32 ; RV64I-NEXT: .cfi_def_cfa_offset 32
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: addi s0, sp, 32 ; RV64I-NEXT: addi s0, sp, 32
; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: andi sp, sp, -32 ; RV64I-NEXT: andi sp, sp, -32
; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: mv a0, sp
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -32 ; RV64I-NEXT: addi sp, s0, -32
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 32 %1 = alloca i8, align 32
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign32() "no-realign-stack" { define void @caller_no_realign32() "no-realign-stack" {
Show All 35 Lines
; RV32I-NEXT: .cfi_offset ra, -4 ; RV32I-NEXT: .cfi_offset ra, -4
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: addi s0, sp, 64 ; RV32I-NEXT: addi s0, sp, 64
; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: andi sp, sp, -64 ; RV32I-NEXT: andi sp, sp, -64
; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: mv a0, sp
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -64 ; RV32I-NEXT: addi sp, s0, -64
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 64 ; RV32I-NEXT: addi sp, sp, 64
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller64: ; RV64I-LABEL: caller64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -64 ; RV64I-NEXT: addi sp, sp, -64
; RV64I-NEXT: .cfi_def_cfa_offset 64 ; RV64I-NEXT: .cfi_def_cfa_offset 64
; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: addi s0, sp, 64 ; RV64I-NEXT: addi s0, sp, 64
; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: andi sp, sp, -64 ; RV64I-NEXT: andi sp, sp, -64
; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: mv a0, sp
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -64 ; RV64I-NEXT: addi sp, s0, -64
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: addi sp, sp, 64
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 64 %1 = alloca i8, align 64
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign64() "no-realign-stack" { define void @caller_no_realign64() "no-realign-stack" {
Show All 35 Lines
; RV32I-NEXT: .cfi_offset ra, -4 ; RV32I-NEXT: .cfi_offset ra, -4
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: addi s0, sp, 128 ; RV32I-NEXT: addi s0, sp, 128
; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: andi sp, sp, -128 ; RV32I-NEXT: andi sp, sp, -128
; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: mv a0, sp
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -128 ; RV32I-NEXT: addi sp, s0, -128
; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 124(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 120(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 128 ; RV32I-NEXT: addi sp, sp, 128
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller128: ; RV64I-LABEL: caller128:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -128 ; RV64I-NEXT: addi sp, sp, -128
; RV64I-NEXT: .cfi_def_cfa_offset 128 ; RV64I-NEXT: .cfi_def_cfa_offset 128
; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 120(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 112(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: addi s0, sp, 128 ; RV64I-NEXT: addi s0, sp, 128
; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: andi sp, sp, -128 ; RV64I-NEXT: andi sp, sp, -128
; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: mv a0, sp
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -128 ; RV64I-NEXT: addi sp, s0, -128
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 120(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 112(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 128 ; RV64I-NEXT: addi sp, sp, 128
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 128 %1 = alloca i8, align 128
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign128() "no-realign-stack" { define void @caller_no_realign128() "no-realign-stack" {
Show All 35 Lines
; RV32I-NEXT: .cfi_offset ra, -4 ; RV32I-NEXT: .cfi_offset ra, -4
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: addi s0, sp, 256 ; RV32I-NEXT: addi s0, sp, 256
; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: andi sp, sp, -256 ; RV32I-NEXT: andi sp, sp, -256
; RV32I-NEXT: mv a0, sp ; RV32I-NEXT: mv a0, sp
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -256 ; RV32I-NEXT: addi sp, s0, -256
; RV32I-NEXT: lw s0, 248(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 252(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 252(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 248(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 256 ; RV32I-NEXT: addi sp, sp, 256
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller256: ; RV64I-LABEL: caller256:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -256 ; RV64I-NEXT: addi sp, sp, -256
; RV64I-NEXT: .cfi_def_cfa_offset 256 ; RV64I-NEXT: .cfi_def_cfa_offset 256
; RV64I-NEXT: sd ra, 248(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 248(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 240(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 240(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: addi s0, sp, 256 ; RV64I-NEXT: addi s0, sp, 256
; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: andi sp, sp, -256 ; RV64I-NEXT: andi sp, sp, -256
; RV64I-NEXT: mv a0, sp ; RV64I-NEXT: mv a0, sp
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -256 ; RV64I-NEXT: addi sp, s0, -256
; RV64I-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 248(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 248(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 240(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 256 ; RV64I-NEXT: addi sp, sp, 256
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 256 %1 = alloca i8, align 256
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign256() "no-realign-stack" { define void @caller_no_realign256() "no-realign-stack" {
Show All 35 Lines
; RV32I-NEXT: .cfi_offset ra, -4 ; RV32I-NEXT: .cfi_offset ra, -4
; RV32I-NEXT: .cfi_offset s0, -8 ; RV32I-NEXT: .cfi_offset s0, -8
; RV32I-NEXT: addi s0, sp, 1024 ; RV32I-NEXT: addi s0, sp, 1024
; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: andi sp, sp, -512 ; RV32I-NEXT: andi sp, sp, -512
; RV32I-NEXT: addi a0, sp, 512 ; RV32I-NEXT: addi a0, sp, 512
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -1024 ; RV32I-NEXT: addi sp, s0, -1024
; RV32I-NEXT: lw s0, 1016(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 1020(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 1020(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 1016(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 1024 ; RV32I-NEXT: addi sp, sp, 1024
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller512: ; RV64I-LABEL: caller512:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -1024 ; RV64I-NEXT: addi sp, sp, -1024
; RV64I-NEXT: .cfi_def_cfa_offset 1024 ; RV64I-NEXT: .cfi_def_cfa_offset 1024
; RV64I-NEXT: sd ra, 1016(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 1016(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 1008(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 1008(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: addi s0, sp, 1024 ; RV64I-NEXT: addi s0, sp, 1024
; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: andi sp, sp, -512 ; RV64I-NEXT: andi sp, sp, -512
; RV64I-NEXT: addi a0, sp, 512 ; RV64I-NEXT: addi a0, sp, 512
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -1024 ; RV64I-NEXT: addi sp, s0, -1024
; RV64I-NEXT: ld s0, 1008(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 1016(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 1016(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 1008(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 1024 ; RV64I-NEXT: addi sp, sp, 1024
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 512 %1 = alloca i8, align 512
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign512() "no-realign-stack" { define void @caller_no_realign512() "no-realign-stack" {
Show All 37 Lines
; RV32I-NEXT: addi s0, sp, 2032 ; RV32I-NEXT: addi s0, sp, 2032
; RV32I-NEXT: .cfi_def_cfa s0, 0 ; RV32I-NEXT: .cfi_def_cfa s0, 0
; RV32I-NEXT: addi sp, sp, -16 ; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: andi sp, sp, -1024 ; RV32I-NEXT: andi sp, sp, -1024
; RV32I-NEXT: addi a0, sp, 1024 ; RV32I-NEXT: addi a0, sp, 1024
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: addi sp, s0, -2048 ; RV32I-NEXT: addi sp, s0, -2048
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 2032 ; RV32I-NEXT: addi sp, sp, 2032
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller1024: ; RV64I-LABEL: caller1024:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -2032 ; RV64I-NEXT: addi sp, sp, -2032
; RV64I-NEXT: .cfi_def_cfa_offset 2032 ; RV64I-NEXT: .cfi_def_cfa_offset 2032
; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
; RV64I-NEXT: .cfi_offset ra, -8 ; RV64I-NEXT: .cfi_offset ra, -8
; RV64I-NEXT: .cfi_offset s0, -16 ; RV64I-NEXT: .cfi_offset s0, -16
; RV64I-NEXT: addi s0, sp, 2032 ; RV64I-NEXT: addi s0, sp, 2032
; RV64I-NEXT: .cfi_def_cfa s0, 0 ; RV64I-NEXT: .cfi_def_cfa s0, 0
; RV64I-NEXT: addi sp, sp, -16 ; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: andi sp, sp, -1024 ; RV64I-NEXT: andi sp, sp, -1024
; RV64I-NEXT: addi a0, sp, 1024 ; RV64I-NEXT: addi a0, sp, 1024
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: addi sp, s0, -2048 ; RV64I-NEXT: addi sp, s0, -2048
; RV64I-NEXT: addi sp, sp, 16 ; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 2032 ; RV64I-NEXT: addi sp, sp, 2032
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 1024 %1 = alloca i8, align 1024
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign1024() "no-realign-stack" { define void @caller_no_realign1024() "no-realign-stack" {
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: addi a0, a0, -2048 ; RV32I-NEXT: addi a0, a0, -2048
; RV32I-NEXT: add a0, sp, a0 ; RV32I-NEXT: add a0, sp, a0
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: lui a0, 1
; RV32I-NEXT: sub sp, s0, a0 ; RV32I-NEXT: sub sp, s0, a0
; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: lui a0, 1
; RV32I-NEXT: addi a0, a0, -2032 ; RV32I-NEXT: addi a0, a0, -2032
; RV32I-NEXT: add sp, sp, a0 ; RV32I-NEXT: add sp, sp, a0
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 2032 ; RV32I-NEXT: addi sp, sp, 2032
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller2048: ; RV64I-LABEL: caller2048:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -2032 ; RV64I-NEXT: addi sp, sp, -2032
; RV64I-NEXT: .cfi_def_cfa_offset 2032 ; RV64I-NEXT: .cfi_def_cfa_offset 2032
; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
Show All 10 Lines
; RV64I-NEXT: addiw a0, a0, -2048 ; RV64I-NEXT: addiw a0, a0, -2048
; RV64I-NEXT: add a0, sp, a0 ; RV64I-NEXT: add a0, sp, a0
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: sub sp, s0, a0 ; RV64I-NEXT: sub sp, s0, a0
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: addiw a0, a0, -2032 ; RV64I-NEXT: addiw a0, a0, -2032
; RV64I-NEXT: add sp, sp, a0 ; RV64I-NEXT: add sp, sp, a0
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 2032 ; RV64I-NEXT: addi sp, sp, 2032
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 2048 %1 = alloca i8, align 2048
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign2048() "no-realign-stack" { define void @caller_no_realign2048() "no-realign-stack" {
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: lui a0, 1
; RV32I-NEXT: add a0, sp, a0 ; RV32I-NEXT: add a0, sp, a0
; RV32I-NEXT: call callee@plt ; RV32I-NEXT: call callee@plt
; RV32I-NEXT: lui a0, 2 ; RV32I-NEXT: lui a0, 2
; RV32I-NEXT: sub sp, s0, a0 ; RV32I-NEXT: sub sp, s0, a0
; RV32I-NEXT: lui a0, 2 ; RV32I-NEXT: lui a0, 2
; RV32I-NEXT: addi a0, a0, -2032 ; RV32I-NEXT: addi a0, a0, -2032
; RV32I-NEXT: add sp, sp, a0 ; RV32I-NEXT: add sp, sp, a0
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 2032 ; RV32I-NEXT: addi sp, sp, 2032
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV64I-LABEL: caller4096: ; RV64I-LABEL: caller4096:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -2032 ; RV64I-NEXT: addi sp, sp, -2032
; RV64I-NEXT: .cfi_def_cfa_offset 2032 ; RV64I-NEXT: .cfi_def_cfa_offset 2032
; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
Show All 10 Lines
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: add a0, sp, a0 ; RV64I-NEXT: add a0, sp, a0
; RV64I-NEXT: call callee@plt ; RV64I-NEXT: call callee@plt
; RV64I-NEXT: lui a0, 2 ; RV64I-NEXT: lui a0, 2
; RV64I-NEXT: sub sp, s0, a0 ; RV64I-NEXT: sub sp, s0, a0
; RV64I-NEXT: lui a0, 2 ; RV64I-NEXT: lui a0, 2
; RV64I-NEXT: addiw a0, a0, -2032 ; RV64I-NEXT: addiw a0, a0, -2032
; RV64I-NEXT: add sp, sp, a0 ; RV64I-NEXT: add sp, sp, a0
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 2032 ; RV64I-NEXT: addi sp, sp, 2032
; RV64I-NEXT: ret ; RV64I-NEXT: ret
%1 = alloca i8, align 4096 %1 = alloca i8, align 4096
call void @callee(i8* %1) call void @callee(i8* %1)
ret void ret void
} }
define void @caller_no_realign4096() "no-realign-stack" { define void @caller_no_realign4096() "no-realign-stack" {
Show All 27 Lines

llvm/test/CodeGen/RISCV/stack-store-check.ll

Show First 20 Lines • Show All 280 Lines • ▼ Show 20 Lines
; CHECK-NEXT: lw a1, 100(sp) ; CHECK-NEXT: lw a1, 100(sp)
; CHECK-NEXT: lw a2, 88(sp) ; CHECK-NEXT: lw a2, 88(sp)
; CHECK-NEXT: lw a3, 92(sp) ; CHECK-NEXT: lw a3, 92(sp)
; CHECK-NEXT: lui a4, %hi(Y1) ; CHECK-NEXT: lui a4, %hi(Y1)
; CHECK-NEXT: sw a0, %lo(Y1+8)(a4) ; CHECK-NEXT: sw a0, %lo(Y1+8)(a4)
; CHECK-NEXT: sw a1, %lo(Y1+12)(a4) ; CHECK-NEXT: sw a1, %lo(Y1+12)(a4)
; CHECK-NEXT: sw a2, %lo(Y1)(a4) ; CHECK-NEXT: sw a2, %lo(Y1)(a4)
; CHECK-NEXT: sw a3, %lo(Y1+4)(a4) ; CHECK-NEXT: sw a3, %lo(Y1+4)(a4)
; CHECK-NEXT: lw s11, 636(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s10, 640(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s9, 644(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s8, 648(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s7, 652(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s6, 656(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s5, 660(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s4, 664(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s3, 668(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s2, 672(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s1, 676(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 680(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw ra, 684(sp) # 4-byte Folded Reload ; CHECK-NEXT: lw ra, 684(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s0, 680(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s1, 676(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s2, 672(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s3, 668(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s4, 664(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s5, 660(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s6, 656(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s7, 652(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s8, 648(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s9, 644(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s10, 640(sp) # 4-byte Folded Reload
; CHECK-NEXT: lw s11, 636(sp) # 4-byte Folded Reload
; CHECK-NEXT: addi sp, sp, 688 ; CHECK-NEXT: addi sp, sp, 688
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%1 = load fp128, fp128* @U, align 16 %1 = load fp128, fp128* @U, align 16
%2 = fsub fp128 0xL00000000000000000000000000000000, %1 %2 = fsub fp128 0xL00000000000000000000000000000000, %1
%3 = fsub fp128 %2, %1 %3 = fsub fp128 %2, %1
%4 = fadd fp128 %1, 0xL00000000000000000000000000000000 %4 = fadd fp128 %1, 0xL00000000000000000000000000000000
%5 = load fp128, fp128* @Y1, align 16 %5 = load fp128, fp128* @Y1, align 16
%6 = fmul fp128 %2, %5 %6 = fmul fp128 %2, %5
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llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll

Show First 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; RISCV32-NEXT: or a1, a1, t2 ; RISCV32-NEXT: or a1, a1, t2
; RISCV32-NEXT: mul a2, a5, a4 ; RISCV32-NEXT: mul a2, a5, a4
; RISCV32-NEXT: andi a1, a1, 1 ; RISCV32-NEXT: andi a1, a1, 1
; RISCV32-NEXT: sw a2, 0(a0) ; RISCV32-NEXT: sw a2, 0(a0)
; RISCV32-NEXT: sw t0, 4(a0) ; RISCV32-NEXT: sw t0, 4(a0)
; RISCV32-NEXT: sw t1, 8(a0) ; RISCV32-NEXT: sw t1, 8(a0)
; RISCV32-NEXT: sw t4, 12(a0) ; RISCV32-NEXT: sw t4, 12(a0)
; RISCV32-NEXT: sb a1, 16(a0) ; RISCV32-NEXT: sb a1, 16(a0)
; RISCV32-NEXT: lw s6, 4(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s5, 8(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s4, 12(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s3, 16(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s2, 20(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s1, 24(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s0, 28(sp) # 4-byte Folded Reload ; RISCV32-NEXT: lw s0, 28(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s1, 24(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s2, 20(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s3, 16(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s4, 12(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s5, 8(sp) # 4-byte Folded Reload
; RISCV32-NEXT: lw s6, 4(sp) # 4-byte Folded Reload
; RISCV32-NEXT: addi sp, sp, 32 ; RISCV32-NEXT: addi sp, sp, 32
; RISCV32-NEXT: ret ; RISCV32-NEXT: ret
start: start:
%0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2 %0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2
%1 = extractvalue { i128, i1 } %0, 0 %1 = extractvalue { i128, i1 } %0, 0
%2 = extractvalue { i128, i1 } %0, 1 %2 = extractvalue { i128, i1 } %0, 1
%3 = zext i1 %2 to i8 %3 = zext i1 %2 to i8
%4 = insertvalue { i128, i8 } undef, i128 %1, 0 %4 = insertvalue { i128, i8 } undef, i128 %1, 0
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llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll

Show First 20 Lines • Show All 1,446 Lines • ▼ Show 20 Lines
; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32-NEXT: mv s0, a1 ; RV32-NEXT: mv s0, a1
; RV32-NEXT: xor a0, a0, a1 ; RV32-NEXT: xor a0, a0, a1
; RV32-NEXT: and s1, a0, a3 ; RV32-NEXT: and s1, a0, a3
; RV32-NEXT: mv a0, s1 ; RV32-NEXT: mv a0, s1
; RV32-NEXT: call use32@plt ; RV32-NEXT: call use32@plt
; RV32-NEXT: xor a0, s1, s0 ; RV32-NEXT: xor a0, s1, s0
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: in_multiuse_A: ; RV64-LABEL: in_multiuse_A:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -32 ; RV64-NEXT: addi sp, sp, -32
; RV64-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64-NEXT: mv s0, a1 ; RV64-NEXT: mv s0, a1
; RV64-NEXT: xor a0, a0, a1 ; RV64-NEXT: xor a0, a0, a1
; RV64-NEXT: and s1, a0, a3 ; RV64-NEXT: and s1, a0, a3
; RV64-NEXT: mv a0, s1 ; RV64-NEXT: mv a0, s1
; RV64-NEXT: call use32@plt ; RV64-NEXT: call use32@plt
; RV64-NEXT: xor a0, s1, s0 ; RV64-NEXT: xor a0, s1, s0
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 32 ; RV64-NEXT: addi sp, sp, 32
; RV64-NEXT: ret ; RV64-NEXT: ret
%n0 = xor i32 %x, %y %n0 = xor i32 %x, %y
%n1 = and i32 %n0, %mask %n1 = and i32 %n0, %mask
call void @use32(i32 %n1) call void @use32(i32 %n1)
%r = xor i32 %n1, %y %r = xor i32 %n1, %y
ret i32 %r ret i32 %r
} }
define i32 @in_multiuse_B(i32 %x, i32 %y, i32 %z, i32 %mask) nounwind { define i32 @in_multiuse_B(i32 %x, i32 %y, i32 %z, i32 %mask) nounwind {
; RV32-LABEL: in_multiuse_B: ; RV32-LABEL: in_multiuse_B:
; RV32: # %bb.0: ; RV32: # %bb.0:
; RV32-NEXT: addi sp, sp, -16 ; RV32-NEXT: addi sp, sp, -16
; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; RV32-NEXT: sw s1, 4(sp) # 4-byte Folded Spill ; RV32-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
; RV32-NEXT: mv s0, a1 ; RV32-NEXT: mv s0, a1
; RV32-NEXT: xor a0, a0, a1 ; RV32-NEXT: xor a0, a0, a1
; RV32-NEXT: and s1, a0, a3 ; RV32-NEXT: and s1, a0, a3
; RV32-NEXT: call use32@plt ; RV32-NEXT: call use32@plt
; RV32-NEXT: xor a0, s1, s0 ; RV32-NEXT: xor a0, s1, s0
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: in_multiuse_B: ; RV64-LABEL: in_multiuse_B:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -32 ; RV64-NEXT: addi sp, sp, -32
; RV64-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s1, 8(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
; RV64-NEXT: mv s0, a1 ; RV64-NEXT: mv s0, a1
; RV64-NEXT: xor a0, a0, a1 ; RV64-NEXT: xor a0, a0, a1
; RV64-NEXT: and s1, a0, a3 ; RV64-NEXT: and s1, a0, a3
; RV64-NEXT: call use32@plt ; RV64-NEXT: call use32@plt
; RV64-NEXT: xor a0, s1, s0 ; RV64-NEXT: xor a0, s1, s0
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 32 ; RV64-NEXT: addi sp, sp, 32
; RV64-NEXT: ret ; RV64-NEXT: ret
%n0 = xor i32 %x, %y %n0 = xor i32 %x, %y
%n1 = and i32 %n0, %mask %n1 = and i32 %n0, %mask
call void @use32(i32 %n0) call void @use32(i32 %n0)
%r = xor i32 %n1, %y %r = xor i32 %n1, %y
ret i32 %r ret i32 %r
} }
▲ Show 20 Lines • Show All 66 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/urem-lkk.ll

Show First 20 Lines • Show All 127 Lines • ▼ Show 20 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: call __umodsi3@plt ; RV32I-NEXT: call __umodsi3@plt
; RV32I-NEXT: mv s1, a0 ; RV32I-NEXT: mv s1, a0
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: mv a0, s0 ; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call __udivsi3@plt ; RV32I-NEXT: call __udivsi3@plt
; RV32I-NEXT: add a0, s1, a0 ; RV32I-NEXT: add a0, s1, a0
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16 ; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: combine_urem_udiv: ; RV32IM-LABEL: combine_urem_udiv:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 364242 ; RV32IM-NEXT: lui a1, 364242
; RV32IM-NEXT: addi a1, a1, 777 ; RV32IM-NEXT: addi a1, a1, 777
; RV32IM-NEXT: mulhu a1, a0, a1 ; RV32IM-NEXT: mulhu a1, a0, a1
Show All 18 Lines
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __umoddi3@plt ; RV64I-NEXT: call __umoddi3@plt
; RV64I-NEXT: mv s1, a0 ; RV64I-NEXT: mv s1, a0
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: mv a0, s0 ; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call __udivdi3@plt ; RV64I-NEXT: call __udivdi3@plt
; RV64I-NEXT: add a0, s1, a0 ; RV64I-NEXT: add a0, s1, a0
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 32 ; RV64I-NEXT: addi sp, sp, 32
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: combine_urem_udiv: ; RV64IM-LABEL: combine_urem_udiv:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: slli a1, a0, 32 ; RV64IM-NEXT: slli a1, a0, 32
; RV64IM-NEXT: srli a1, a1, 32 ; RV64IM-NEXT: srli a1, a1, 32
; RV64IM-NEXT: lui a2, 364242 ; RV64IM-NEXT: lui a2, 364242
▲ Show 20 Lines • Show All 101 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll

Show First 20 Lines • Show All 385 Lines • ▼ Show 20 Lines
; RV32-NEXT: sb a2, 4(s0) ; RV32-NEXT: sb a2, 4(s0)
; RV32-NEXT: andi a1, a1, 2047 ; RV32-NEXT: andi a1, a1, 2047
; RV32-NEXT: andi a0, a0, 2047 ; RV32-NEXT: andi a0, a0, 2047
; RV32-NEXT: slli a0, a0, 11 ; RV32-NEXT: slli a0, a0, 11
; RV32-NEXT: or a0, a1, a0 ; RV32-NEXT: or a0, a1, a0
; RV32-NEXT: slli a1, s1, 22 ; RV32-NEXT: slli a1, s1, 22
; RV32-NEXT: sub a0, a0, a1 ; RV32-NEXT: sub a0, a0, a1
; RV32-NEXT: sw a0, 0(s0) ; RV32-NEXT: sw a0, 0(s0)
; RV32-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 32 ; RV32-NEXT: addi sp, sp, 32
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: test_urem_vec: ; RV64-LABEL: test_urem_vec:
; RV64: # %bb.0: ; RV64: # %bb.0:
; RV64-NEXT: addi sp, sp, -48 ; RV64-NEXT: addi sp, sp, -48
; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 40 Lines
; RV64-NEXT: slli a1, s1, 22 ; RV64-NEXT: slli a1, s1, 22
; RV64-NEXT: sub a0, a0, a1 ; RV64-NEXT: sub a0, a0, a1
; RV64-NEXT: sw a0, 0(s0) ; RV64-NEXT: sw a0, 0(s0)
; RV64-NEXT: li a1, -1 ; RV64-NEXT: li a1, -1
; RV64-NEXT: srli a1, a1, 31 ; RV64-NEXT: srli a1, a1, 31
; RV64-NEXT: and a0, a0, a1 ; RV64-NEXT: and a0, a0, a1
; RV64-NEXT: srli a0, a0, 32 ; RV64-NEXT: srli a0, a0, 32
; RV64-NEXT: sb a0, 4(s0) ; RV64-NEXT: sb a0, 4(s0)
; RV64-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64-NEXT: addi sp, sp, 48 ; RV64-NEXT: addi sp, sp, 48
; RV64-NEXT: ret ; RV64-NEXT: ret
; ;
; RV32M-LABEL: test_urem_vec: ; RV32M-LABEL: test_urem_vec:
; RV32M: # %bb.0: ; RV32M: # %bb.0:
; RV32M-NEXT: lb a1, 4(a0) ; RV32M-NEXT: lb a1, 4(a0)
; RV32M-NEXT: lw a2, 0(a0) ; RV32M-NEXT: lw a2, 0(a0)
; RV32M-NEXT: slli a1, a1, 10 ; RV32M-NEXT: slli a1, a1, 10
▲ Show 20 Lines • Show All 225 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/urem-vector-lkk.ll

Show All 38 Lines
; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li a1, 1003 ; RV32I-NEXT: li a1, 1003
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __umodsi3@plt ; RV32I-NEXT: call __umodsi3@plt
; RV32I-NEXT: sh a0, 6(s1) ; RV32I-NEXT: sh a0, 6(s1)
; RV32I-NEXT: sh s0, 4(s1) ; RV32I-NEXT: sh s0, 4(s1)
; RV32I-NEXT: sh s5, 2(s1) ; RV32I-NEXT: sh s5, 2(s1)
; RV32I-NEXT: sh s4, 0(s1) ; RV32I-NEXT: sh s4, 0(s1)
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: fold_urem_vec_1: ; RV32IM-LABEL: fold_urem_vec_1:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lhu a6, 12(a1) ; RV32IM-NEXT: lhu a6, 12(a1)
; RV32IM-NEXT: lhu a3, 8(a1) ; RV32IM-NEXT: lhu a3, 8(a1)
; RV32IM-NEXT: lhu a4, 0(a1) ; RV32IM-NEXT: lhu a4, 0(a1)
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: li a1, 1003 ; RV64I-NEXT: li a1, 1003
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __umoddi3@plt ; RV64I-NEXT: call __umoddi3@plt
; RV64I-NEXT: sh a0, 6(s1) ; RV64I-NEXT: sh a0, 6(s1)
; RV64I-NEXT: sh s0, 4(s1) ; RV64I-NEXT: sh s0, 4(s1)
; RV64I-NEXT: sh s5, 2(s1) ; RV64I-NEXT: sh s5, 2(s1)
; RV64I-NEXT: sh s4, 0(s1) ; RV64I-NEXT: sh s4, 0(s1)
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: addi sp, sp, 64
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: fold_urem_vec_1: ; RV64IM-LABEL: fold_urem_vec_1:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lhu a6, 24(a1) ; RV64IM-NEXT: lhu a6, 24(a1)
; RV64IM-NEXT: lhu a3, 16(a1) ; RV64IM-NEXT: lhu a3, 16(a1)
; RV64IM-NEXT: lhu a4, 8(a1) ; RV64IM-NEXT: lhu a4, 8(a1)
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; RV32I-NEXT: mv s0, a0 ; RV32I-NEXT: mv s0, a0
; RV32I-NEXT: li a1, 95 ; RV32I-NEXT: li a1, 95
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __umodsi3@plt ; RV32I-NEXT: call __umodsi3@plt
; RV32I-NEXT: sh a0, 6(s1) ; RV32I-NEXT: sh a0, 6(s1)
; RV32I-NEXT: sh s0, 4(s1) ; RV32I-NEXT: sh s0, 4(s1)
; RV32I-NEXT: sh s5, 2(s1) ; RV32I-NEXT: sh s5, 2(s1)
; RV32I-NEXT: sh s4, 0(s1) ; RV32I-NEXT: sh s4, 0(s1)
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: fold_urem_vec_2: ; RV32IM-LABEL: fold_urem_vec_2:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lhu a6, 12(a1) ; RV32IM-NEXT: lhu a6, 12(a1)
; RV32IM-NEXT: lhu a7, 8(a1) ; RV32IM-NEXT: lhu a7, 8(a1)
; RV32IM-NEXT: lhu a4, 0(a1) ; RV32IM-NEXT: lhu a4, 0(a1)
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; RV64I-NEXT: mv s0, a0 ; RV64I-NEXT: mv s0, a0
; RV64I-NEXT: li a1, 95 ; RV64I-NEXT: li a1, 95
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __umoddi3@plt ; RV64I-NEXT: call __umoddi3@plt
; RV64I-NEXT: sh a0, 6(s1) ; RV64I-NEXT: sh a0, 6(s1)
; RV64I-NEXT: sh s0, 4(s1) ; RV64I-NEXT: sh s0, 4(s1)
; RV64I-NEXT: sh s5, 2(s1) ; RV64I-NEXT: sh s5, 2(s1)
; RV64I-NEXT: sh s4, 0(s1) ; RV64I-NEXT: sh s4, 0(s1)
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 64 ; RV64I-NEXT: addi sp, sp, 64
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: fold_urem_vec_2: ; RV64IM-LABEL: fold_urem_vec_2:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lhu a6, 24(a1) ; RV64IM-NEXT: lhu a6, 24(a1)
; RV64IM-NEXT: lhu a7, 16(a1) ; RV64IM-NEXT: lhu a7, 16(a1)
; RV64IM-NEXT: lhu a4, 8(a1) ; RV64IM-NEXT: lhu a4, 8(a1)
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; RV32I-NEXT: add a0, s8, a0 ; RV32I-NEXT: add a0, s8, a0
; RV32I-NEXT: add a1, s7, s1 ; RV32I-NEXT: add a1, s7, s1
; RV32I-NEXT: add a2, s6, s4 ; RV32I-NEXT: add a2, s6, s4
; RV32I-NEXT: add a3, s5, s9 ; RV32I-NEXT: add a3, s5, s9
; RV32I-NEXT: sh a3, 6(s0) ; RV32I-NEXT: sh a3, 6(s0)
; RV32I-NEXT: sh a2, 4(s0) ; RV32I-NEXT: sh a2, 4(s0)
; RV32I-NEXT: sh a1, 2(s0) ; RV32I-NEXT: sh a1, 2(s0)
; RV32I-NEXT: sh a0, 0(s0) ; RV32I-NEXT: sh a0, 0(s0)
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 48 ; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: combine_urem_udiv: ; RV32IM-LABEL: combine_urem_udiv:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lhu a6, 0(a1) ; RV32IM-NEXT: lhu a6, 0(a1)
; RV32IM-NEXT: lhu a7, 4(a1) ; RV32IM-NEXT: lhu a7, 4(a1)
; RV32IM-NEXT: lhu a4, 12(a1) ; RV32IM-NEXT: lhu a4, 12(a1)
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; RV64I-NEXT: addw a0, s8, a0 ; RV64I-NEXT: addw a0, s8, a0
; RV64I-NEXT: addw a1, s7, s1 ; RV64I-NEXT: addw a1, s7, s1
; RV64I-NEXT: addw a2, s6, s4 ; RV64I-NEXT: addw a2, s6, s4
; RV64I-NEXT: addw a3, s5, s9 ; RV64I-NEXT: addw a3, s5, s9
; RV64I-NEXT: sh a3, 6(s0) ; RV64I-NEXT: sh a3, 6(s0)
; RV64I-NEXT: sh a2, 4(s0) ; RV64I-NEXT: sh a2, 4(s0)
; RV64I-NEXT: sh a1, 2(s0) ; RV64I-NEXT: sh a1, 2(s0)
; RV64I-NEXT: sh a0, 0(s0) ; RV64I-NEXT: sh a0, 0(s0)
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 88(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 80(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 72(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 64(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 56(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s4, 48(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s5, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s6, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s7, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s8, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s9, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 96 ; RV64I-NEXT: addi sp, sp, 96
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: combine_urem_udiv: ; RV64IM-LABEL: combine_urem_udiv:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lhu a6, 0(a1) ; RV64IM-NEXT: lhu a6, 0(a1)
; RV64IM-NEXT: lhu a7, 8(a1) ; RV64IM-NEXT: lhu a7, 8(a1)
; RV64IM-NEXT: lhu a4, 16(a1) ; RV64IM-NEXT: lhu a4, 16(a1)
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; RV32I-NEXT: call __umodsi3@plt ; RV32I-NEXT: call __umodsi3@plt
; RV32I-NEXT: andi a1, s1, 63 ; RV32I-NEXT: andi a1, s1, 63
; RV32I-NEXT: andi a2, s3, 31 ; RV32I-NEXT: andi a2, s3, 31
; RV32I-NEXT: andi a3, s2, 7 ; RV32I-NEXT: andi a3, s2, 7
; RV32I-NEXT: sh a0, 6(s0) ; RV32I-NEXT: sh a0, 6(s0)
; RV32I-NEXT: sh a3, 4(s0) ; RV32I-NEXT: sh a3, 4(s0)
; RV32I-NEXT: sh a2, 2(s0) ; RV32I-NEXT: sh a2, 2(s0)
; RV32I-NEXT: sh a1, 0(s0) ; RV32I-NEXT: sh a1, 0(s0)
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_urem_power_of_two: ; RV32IM-LABEL: dont_fold_urem_power_of_two:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lhu a6, 8(a1) ; RV32IM-NEXT: lhu a6, 8(a1)
; RV32IM-NEXT: lhu a3, 4(a1) ; RV32IM-NEXT: lhu a3, 4(a1)
; RV32IM-NEXT: lhu a4, 12(a1) ; RV32IM-NEXT: lhu a4, 12(a1)
Show All 35 Lines
; RV64I-NEXT: call __umoddi3@plt ; RV64I-NEXT: call __umoddi3@plt
; RV64I-NEXT: andi a1, s1, 63 ; RV64I-NEXT: andi a1, s1, 63
; RV64I-NEXT: andi a2, s3, 31 ; RV64I-NEXT: andi a2, s3, 31
; RV64I-NEXT: andi a3, s2, 7 ; RV64I-NEXT: andi a3, s2, 7
; RV64I-NEXT: sh a0, 6(s0) ; RV64I-NEXT: sh a0, 6(s0)
; RV64I-NEXT: sh a3, 4(s0) ; RV64I-NEXT: sh a3, 4(s0)
; RV64I-NEXT: sh a2, 2(s0) ; RV64I-NEXT: sh a2, 2(s0)
; RV64I-NEXT: sh a1, 0(s0) ; RV64I-NEXT: sh a1, 0(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_urem_power_of_two: ; RV64IM-LABEL: dont_fold_urem_power_of_two:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lhu a6, 16(a1) ; RV64IM-NEXT: lhu a6, 16(a1)
; RV64IM-NEXT: lhu a3, 8(a1) ; RV64IM-NEXT: lhu a3, 8(a1)
; RV64IM-NEXT: lhu a4, 0(a1) ; RV64IM-NEXT: lhu a4, 0(a1)
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; RV32I-NEXT: lui a0, 1 ; RV32I-NEXT: lui a0, 1
; RV32I-NEXT: addi a1, a0, 1327 ; RV32I-NEXT: addi a1, a0, 1327
; RV32I-NEXT: mv a0, s2 ; RV32I-NEXT: mv a0, s2
; RV32I-NEXT: call __umodsi3@plt ; RV32I-NEXT: call __umodsi3@plt
; RV32I-NEXT: sh zero, 0(s0) ; RV32I-NEXT: sh zero, 0(s0)
; RV32I-NEXT: sh a0, 6(s0) ; RV32I-NEXT: sh a0, 6(s0)
; RV32I-NEXT: sh s1, 4(s0) ; RV32I-NEXT: sh s1, 4(s0)
; RV32I-NEXT: sh s3, 2(s0) ; RV32I-NEXT: sh s3, 2(s0)
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 32 ; RV32I-NEXT: addi sp, sp, 32
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_urem_one: ; RV32IM-LABEL: dont_fold_urem_one:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: lhu a2, 4(a1) ; RV32IM-NEXT: lhu a2, 4(a1)
; RV32IM-NEXT: lhu a3, 12(a1) ; RV32IM-NEXT: lhu a3, 12(a1)
; RV32IM-NEXT: lhu a1, 8(a1) ; RV32IM-NEXT: lhu a1, 8(a1)
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; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: addiw a1, a0, 1327 ; RV64I-NEXT: addiw a1, a0, 1327
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __umoddi3@plt ; RV64I-NEXT: call __umoddi3@plt
; RV64I-NEXT: sh zero, 0(s0) ; RV64I-NEXT: sh zero, 0(s0)
; RV64I-NEXT: sh a0, 6(s0) ; RV64I-NEXT: sh a0, 6(s0)
; RV64I-NEXT: sh s1, 4(s0) ; RV64I-NEXT: sh s1, 4(s0)
; RV64I-NEXT: sh s3, 2(s0) ; RV64I-NEXT: sh s3, 2(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_urem_one: ; RV64IM-LABEL: dont_fold_urem_one:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: lhu a2, 24(a1) ; RV64IM-NEXT: lhu a2, 24(a1)
; RV64IM-NEXT: lhu a3, 8(a1) ; RV64IM-NEXT: lhu a3, 8(a1)
; RV64IM-NEXT: lhu a1, 16(a1) ; RV64IM-NEXT: lhu a1, 16(a1)
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; RV32I-NEXT: sw a1, 28(s0) ; RV32I-NEXT: sw a1, 28(s0)
; RV32I-NEXT: sw a0, 24(s0) ; RV32I-NEXT: sw a0, 24(s0)
; RV32I-NEXT: sw s1, 20(s0) ; RV32I-NEXT: sw s1, 20(s0)
; RV32I-NEXT: sw s4, 16(s0) ; RV32I-NEXT: sw s4, 16(s0)
; RV32I-NEXT: sw s9, 12(s0) ; RV32I-NEXT: sw s9, 12(s0)
; RV32I-NEXT: sw s6, 8(s0) ; RV32I-NEXT: sw s6, 8(s0)
; RV32I-NEXT: sw s8, 4(s0) ; RV32I-NEXT: sw s8, 4(s0)
; RV32I-NEXT: sw s7, 0(s0) ; RV32I-NEXT: sw s7, 0(s0)
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 48 ; RV32I-NEXT: addi sp, sp, 48
; RV32I-NEXT: ret ; RV32I-NEXT: ret
; ;
; RV32IM-LABEL: dont_fold_urem_i64: ; RV32IM-LABEL: dont_fold_urem_i64:
; RV32IM: # %bb.0: ; RV32IM: # %bb.0:
; RV32IM-NEXT: addi sp, sp, -48 ; RV32IM-NEXT: addi sp, sp, -48
; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill ; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
; RV32IM-NEXT: sw s0, 40(sp) # 4-byte Folded Spill ; RV32IM-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
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; RV32IM-NEXT: sw a1, 28(s0) ; RV32IM-NEXT: sw a1, 28(s0)
; RV32IM-NEXT: sw a0, 24(s0) ; RV32IM-NEXT: sw a0, 24(s0)
; RV32IM-NEXT: sw s1, 20(s0) ; RV32IM-NEXT: sw s1, 20(s0)
; RV32IM-NEXT: sw s4, 16(s0) ; RV32IM-NEXT: sw s4, 16(s0)
; RV32IM-NEXT: sw s9, 12(s0) ; RV32IM-NEXT: sw s9, 12(s0)
; RV32IM-NEXT: sw s6, 8(s0) ; RV32IM-NEXT: sw s6, 8(s0)
; RV32IM-NEXT: sw s8, 4(s0) ; RV32IM-NEXT: sw s8, 4(s0)
; RV32IM-NEXT: sw s7, 0(s0) ; RV32IM-NEXT: sw s7, 0(s0)
; RV32IM-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload ; RV32IM-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s5, 20(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s7, 12(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s8, 8(sp) # 4-byte Folded Reload
; RV32IM-NEXT: lw s9, 4(sp) # 4-byte Folded Reload
; RV32IM-NEXT: addi sp, sp, 48 ; RV32IM-NEXT: addi sp, sp, 48
; RV32IM-NEXT: ret ; RV32IM-NEXT: ret
; ;
; RV64I-LABEL: dont_fold_urem_i64: ; RV64I-LABEL: dont_fold_urem_i64:
; RV64I: # %bb.0: ; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -48 ; RV64I-NEXT: addi sp, sp, -48
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
Show All 15 Lines
; RV64I-NEXT: lui a0, 1 ; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: addiw a1, a0, 1327 ; RV64I-NEXT: addiw a1, a0, 1327
; RV64I-NEXT: mv a0, s2 ; RV64I-NEXT: mv a0, s2
; RV64I-NEXT: call __umoddi3@plt ; RV64I-NEXT: call __umoddi3@plt
; RV64I-NEXT: sd zero, 0(s0) ; RV64I-NEXT: sd zero, 0(s0)
; RV64I-NEXT: sd a0, 24(s0) ; RV64I-NEXT: sd a0, 24(s0)
; RV64I-NEXT: sd s1, 16(s0) ; RV64I-NEXT: sd s1, 16(s0)
; RV64I-NEXT: sd s3, 8(s0) ; RV64I-NEXT: sd s3, 8(s0)
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 48 ; RV64I-NEXT: addi sp, sp, 48
; RV64I-NEXT: ret ; RV64I-NEXT: ret
; ;
; RV64IM-LABEL: dont_fold_urem_i64: ; RV64IM-LABEL: dont_fold_urem_i64:
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: ld a2, 24(a1) ; RV64IM-NEXT: ld a2, 24(a1)
; RV64IM-NEXT: ld a3, 8(a1) ; RV64IM-NEXT: ld a3, 8(a1)
; RV64IM-NEXT: ld a1, 16(a1) ; RV64IM-NEXT: ld a1, 16(a1)
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llvm/test/CodeGen/RISCV/vararg.ll

Show First 20 Lines • Show All 69 Lines • ▼ Show 20 Lines
; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%argp.cur = load i8*, i8** %va, align 4 %argp.cur = load i8*, i8** %va, align 4
%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
store i8* %argp.next, i8** %va, align 4 store i8* %argp.next, i8** %va, align 4
Show All 31 Lines
; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
Show All 35 Lines
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = va_arg i8** %va, i32 %2 = va_arg i8** %va, i32
call void @llvm.va_end(i8* %1) call void @llvm.va_end(i8* %1)
ret i32 %2 ret i32 %2
Show All 21 Lines
; ILP32-ILP32F-FPELIM-NEXT: sw a0, -16(s0) ; ILP32-ILP32F-FPELIM-NEXT: sw a0, -16(s0)
; ILP32-ILP32F-FPELIM-NEXT: addi a0, a1, 15 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a1, 15
; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16
; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0 ; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0
; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0 ; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0
; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt ; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1
; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16
; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
; ILP32-ILP32F-FPELIM-NEXT: ret ; ILP32-ILP32F-FPELIM-NEXT: ret
; ;
; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca: ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca:
; ILP32-ILP32F-WITHFP: # %bb.0: ; ILP32-ILP32F-WITHFP: # %bb.0:
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
; ILP32-ILP32F-WITHFP-NEXT: addi a0, a1, 15 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a1, 15
; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16
; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0 ; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0
; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0 ; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0
; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt ; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1
; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, -16(s0) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, -16(s0)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a1, 15 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a1, 15
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
; ;
; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca: ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca:
; LP64-LP64F-LP64D-FPELIM: # %bb.0: ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; LP64-LP64F-LP64D-FPELIM-NEXT: srli a0, a0, 32 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a0, a0, 32
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 15 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 15
; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -16 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -16
; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0 ; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0
; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0
; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-FPELIM-NEXT: ret ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
; ;
; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca: ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca:
; LP64-LP64F-LP64D-WITHFP: # %bb.0: ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; LP64-LP64F-LP64D-WITHFP-NEXT: srli a0, a0, 32 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a0, a0, 32
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 15 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 15
; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -16 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -16
; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0
; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0
; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = va_arg i8** %va, i32 %2 = va_arg i8** %va, i32
%3 = alloca i8, i32 %2 %3 = alloca i8, i32 %2
call void @notdead(i8* %3) call void @notdead(i8* %3)
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; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
; ILP32-ILP32F-WITHFP-NEXT: li a4, 2 ; ILP32-ILP32F-WITHFP-NEXT: li a4, 2
; ILP32-ILP32F-WITHFP-NEXT: li a2, 0 ; ILP32-ILP32F-WITHFP-NEXT: li a2, 0
; ILP32-ILP32F-WITHFP-NEXT: call va1@plt ; ILP32-ILP32F-WITHFP-NEXT: call va1@plt
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
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; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1023 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1023
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
; LP64-LP64F-LP64D-WITHFP-NEXT: li a2, 2 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a2, 2
; LP64-LP64F-LP64D-WITHFP-NEXT: call va1@plt ; LP64-LP64F-LP64D-WITHFP-NEXT: call va1@plt
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2) %1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2)
ret void ret void
} }
; Ensure that 2x xlen size+alignment varargs are accessed via an "aligned" ; Ensure that 2x xlen size+alignment varargs are accessed via an "aligned"
; register pair (where the first register is even-numbered). ; register pair (where the first register is even-numbered).
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; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8 ; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8
; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 19 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 19
; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1) ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
; ILP32-ILP32F-WITHFP-NEXT: ori a1, a1, 4 ; ILP32-ILP32F-WITHFP-NEXT: ori a1, a1, 4
; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1) ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1)
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
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; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 1 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 1
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 32 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 32
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8
; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0) ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = bitcast i8** %va to i32* %2 = bitcast i8** %va to i32*
%argp.cur = load i32, i32* %2, align 4 %argp.cur = load i32, i32* %2, align 4
%3 = add i32 %argp.cur, 7 %3 = add i32 %argp.cur, 7
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; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8 ; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8
; ILP32-ILP32F-WITHFP-NEXT: ori a2, a1, 4 ; ILP32-ILP32F-WITHFP-NEXT: ori a2, a1, 4
; ILP32-ILP32F-WITHFP-NEXT: sw a2, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1) ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, 8 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, 8
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a2) ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a2)
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_va_arg: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_va_arg:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = va_arg i8** %va, double %2 = va_arg i8** %va, double
call void @llvm.va_end(i8* %1) call void @llvm.va_end(i8* %1)
%3 = bitcast double %2 to i64 %3 = bitcast double %2 to i64
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; ILP32-ILP32F-WITHFP: # %bb.0: ; ILP32-ILP32F-WITHFP: # %bb.0:
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
; ILP32-ILP32F-WITHFP-NEXT: li a2, 0 ; ILP32-ILP32F-WITHFP-NEXT: li a2, 0
; ILP32-ILP32F-WITHFP-NEXT: call va2@plt ; ILP32-ILP32F-WITHFP-NEXT: call va2@plt
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
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; LP64-LP64F-LP64D-WITHFP: # %bb.0: ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1023 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1023
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
; LP64-LP64F-LP64D-WITHFP-NEXT: call va2@plt ; LP64-LP64F-LP64D-WITHFP-NEXT: call va2@plt
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00) %1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00)
ret void ret void
} }
; On RV32, Ensure a named 2*xlen argument is passed in a1 and a2, while the ; On RV32, Ensure a named 2*xlen argument is passed in a1 and a2, while the
; vararg double is passed in a4 and a5 (rather than a3 and a4) ; vararg double is passed in a4 and a5 (rather than a3 and a4)
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; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a0) ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a0)
; ILP32-ILP32F-WITHFP-NEXT: ori a0, a0, 4 ; ILP32-ILP32F-WITHFP-NEXT: ori a0, a0, 4
; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0) ; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0)
; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a3 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a3
; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4
; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -32 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -32
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(sp)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(sp)
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; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, 8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, 8
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: li a2, 1 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a2, 1
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a2, 32 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a2, 32
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, -8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, -8
; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0) ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = bitcast i8** %va to i32* %2 = bitcast i8** %va to i32*
%argp.cur = load i32, i32* %2, align 4 %argp.cur = load i32, i32* %2, align 4
%3 = add i32 %argp.cur, 7 %3 = add i32 %argp.cur, 7
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; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0) ; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0)
; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 8 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 8
; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a3) ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a3)
; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a4 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a4
; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3
; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_va_arg: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_va_arg:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, s0, 8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, s0, 8
; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = va_arg i8** %va, double %2 = va_arg i8** %va, double
call void @llvm.va_end(i8* %1) call void @llvm.va_end(i8* %1)
%3 = bitcast double %2 to i64 %3 = bitcast double %2 to i64
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; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
; ILP32-ILP32F-WITHFP-NEXT: li a0, 2 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 2
; ILP32-ILP32F-WITHFP-NEXT: li a1, 1111 ; ILP32-ILP32F-WITHFP-NEXT: li a1, 1111
; ILP32-ILP32F-WITHFP-NEXT: lui a5, 262144 ; ILP32-ILP32F-WITHFP-NEXT: lui a5, 262144
; ILP32-ILP32F-WITHFP-NEXT: li a2, 0 ; ILP32-ILP32F-WITHFP-NEXT: li a2, 0
; ILP32-ILP32F-WITHFP-NEXT: li a4, 0 ; ILP32-ILP32F-WITHFP-NEXT: li a4, 0
; ILP32-ILP32F-WITHFP-NEXT: call va3@plt ; ILP32-ILP32F-WITHFP-NEXT: call va3@plt
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 2 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 2
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62
; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 2 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 2
; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 1111 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 1111
; LP64-LP64F-LP64D-WITHFP-NEXT: call va3@plt ; LP64-LP64F-LP64D-WITHFP-NEXT: call va3@plt
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00) %1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00)
ret void ret void
} }
declare void @llvm.va_copy(i8*, i8*) declare void @llvm.va_copy(i8*, i8*)
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; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
; ILP32-ILP32F-FPELIM-NEXT: addi a3, a0, 4 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, a0, 4
; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp) ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0) ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0
; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2
; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
; ILP32-ILP32F-FPELIM-NEXT: ret ; ILP32-ILP32F-FPELIM-NEXT: ret
; ;
; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy: ; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy:
; ILP32-ILP32F-WITHFP: # %bb.0: ; ILP32-ILP32F-WITHFP: # %bb.0:
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
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; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
; ILP32-ILP32F-WITHFP-NEXT: addi a3, a0, 4 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, a0, 4
; ILP32-ILP32F-WITHFP-NEXT: sw a3, -16(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -16(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0) ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1
; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2
; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 4 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 4
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
; ;
; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy: ; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy:
; LP64-LP64F-LP64D-FPELIM: # %bb.0: ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, 8 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, 8
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp) ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0) ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, s0 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, s0
; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, a2 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, a2
; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-FPELIM-NEXT: ret ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
; ;
; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy: ; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy:
; LP64-LP64F-LP64D-WITHFP: # %bb.0: ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
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; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, 8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, 8
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -32(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0) ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, s1 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, s1
; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, a2 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, a2
; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%vargs = alloca i8*, align 4 %vargs = alloca i8*, align 4
%wargs = alloca i8*, align 4 %wargs = alloca i8*, align 4
%1 = bitcast i8** %vargs to i8* %1 = bitcast i8** %vargs to i8*
%2 = bitcast i8** %wargs to i8* %2 = bitcast i8** %wargs to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%3 = va_arg i8** %vargs, i32 %3 = va_arg i8** %vargs, i32
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; ILP32-ILP32F-WITHFP-NEXT: li a0, 1 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 1
; ILP32-ILP32F-WITHFP-NEXT: li a1, 11 ; ILP32-ILP32F-WITHFP-NEXT: li a1, 11
; ILP32-ILP32F-WITHFP-NEXT: addi a2, s0, -32 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, s0, -32
; ILP32-ILP32F-WITHFP-NEXT: li a3, 12 ; ILP32-ILP32F-WITHFP-NEXT: li a3, 12
; ILP32-ILP32F-WITHFP-NEXT: li a4, 13 ; ILP32-ILP32F-WITHFP-NEXT: li a4, 13
; ILP32-ILP32F-WITHFP-NEXT: li a7, 4 ; ILP32-ILP32F-WITHFP-NEXT: li a7, 4
; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0)
; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee@plt ; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee@plt
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236
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; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, -1967 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, -1967
; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1
; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 11 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 11
; LP64-LP64F-LP64D-WITHFP-NEXT: li a4, 12 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a4, 12
; LP64-LP64F-LP64D-WITHFP-NEXT: li a5, 13 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a5, 13
; LP64-LP64F-LP64D-WITHFP-NEXT: li a7, 14 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a7, 14
; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp)
; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee@plt ; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee@plt
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11, %1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11,
fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, i64 20000000000, fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, i64 20000000000,
i32 14, double 2.720000e+00, i32 15, [2 x i32] [i32 16, i32 17]) i32 14, double 2.720000e+00, i32 15, [2 x i32] [i32 16, i32 17])
ret void ret void
} }
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; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0)
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va6_no_fixed_args: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va6_no_fixed_args:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp) ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
Show All 35 Lines
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%2 = va_arg i8** %va, i32 %2 = va_arg i8** %va, i32
call void @llvm.va_end(i8* %1) call void @llvm.va_end(i8* %1)
ret i32 %2 ret i32 %2
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; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
; ILP32-ILP32F-WITHFP-NEXT: lui a2, 1024162 ; ILP32-ILP32F-WITHFP-NEXT: lui a2, 1024162
; ILP32-ILP32F-WITHFP-NEXT: addi a2, a2, -272 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a2, -272
; ILP32-ILP32F-WITHFP-NEXT: add a2, s0, a2 ; ILP32-ILP32F-WITHFP-NEXT: add a2, s0, a2
; ILP32-ILP32F-WITHFP-NEXT: sw a1, 0(a2) ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 0(a2)
; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414 ; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414
; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728
; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1 ; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) # 4-byte Folded Reload ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 2032 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 2032
; ILP32-ILP32F-WITHFP-NEXT: ret ; ILP32-ILP32F-WITHFP-NEXT: ret
; ;
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va_large_stack: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va_large_stack:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0: ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 24414 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 24414
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 304 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 304
; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub sp, sp, a0 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub sp, sp, a0
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 1024162 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 1024162
; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -288 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -288
; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, s0, a1 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, s0, a1
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(a1) ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(a1)
; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0) ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414
; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680
; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1 ; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) # 8-byte Folded Reload ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 2032 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 2032
; LP64-LP64F-LP64D-WITHFP-NEXT: ret ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
%large = alloca [ 100000000 x i8 ] %large = alloca [ 100000000 x i8 ]
%va = alloca i8*, align 4 %va = alloca i8*, align 4
%1 = bitcast i8** %va to i8* %1 = bitcast i8** %va to i8*
call void @llvm.va_start(i8* %1) call void @llvm.va_start(i8* %1)
%argp.cur = load i8*, i8** %va, align 4 %argp.cur = load i8*, i8** %va, align 4
%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
store i8* %argp.next, i8** %va, align 4 store i8* %argp.next, i8** %va, align 4
%2 = bitcast i8* %argp.cur to i32* %2 = bitcast i8* %argp.cur to i32*
%3 = load i32, i32* %2, align 4 %3 = load i32, i32* %2, align 4
call void @llvm.va_end(i8* %1) call void @llvm.va_end(i8* %1)
ret i32 %3 ret i32 %3
} }

llvm/test/CodeGen/RISCV/xaluo.ll

Show First 20 Lines • Show All 953 Lines • ▼ Show 20 Lines
; RV32-NEXT: xor a1, a1, a3 ; RV32-NEXT: xor a1, a1, a3
; RV32-NEXT: xor a3, s3, a3 ; RV32-NEXT: xor a3, s3, a3
; RV32-NEXT: or a1, a3, a1 ; RV32-NEXT: or a1, a3, a1
; RV32-NEXT: snez a1, a1 ; RV32-NEXT: snez a1, a1
; RV32-NEXT: mul a0, a0, a2 ; RV32-NEXT: mul a0, a0, a2
; RV32-NEXT: sw a0, 0(a4) ; RV32-NEXT: sw a0, 0(a4)
; RV32-NEXT: sw a6, 4(a4) ; RV32-NEXT: sw a6, 4(a4)
; RV32-NEXT: mv a0, a1 ; RV32-NEXT: mv a0, a1
; RV32-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: smulo.i64: ; RV64-LABEL: smulo.i64:
; RV64: # %bb.0: # %entry ; RV64: # %bb.0: # %entry
; RV64-NEXT: mulh a3, a0, a1 ; RV64-NEXT: mulh a3, a0, a1
; RV64-NEXT: mul a1, a0, a1 ; RV64-NEXT: mul a1, a0, a1
; RV64-NEXT: srai a0, a1, 63 ; RV64-NEXT: srai a0, a1, 63
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; RV32ZBA-NEXT: xor a1, a1, a3 ; RV32ZBA-NEXT: xor a1, a1, a3
; RV32ZBA-NEXT: xor a3, s3, a3 ; RV32ZBA-NEXT: xor a3, s3, a3
; RV32ZBA-NEXT: or a1, a3, a1 ; RV32ZBA-NEXT: or a1, a3, a1
; RV32ZBA-NEXT: snez a1, a1 ; RV32ZBA-NEXT: snez a1, a1
; RV32ZBA-NEXT: mul a0, a0, a2 ; RV32ZBA-NEXT: mul a0, a0, a2
; RV32ZBA-NEXT: sw a0, 0(a4) ; RV32ZBA-NEXT: sw a0, 0(a4)
; RV32ZBA-NEXT: sw a6, 4(a4) ; RV32ZBA-NEXT: sw a6, 4(a4)
; RV32ZBA-NEXT: mv a0, a1 ; RV32ZBA-NEXT: mv a0, a1
; RV32ZBA-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s3, 0(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: addi sp, sp, 16 ; RV32ZBA-NEXT: addi sp, sp, 16
; RV32ZBA-NEXT: ret ; RV32ZBA-NEXT: ret
; ;
; RV64ZBA-LABEL: smulo.i64: ; RV64ZBA-LABEL: smulo.i64:
; RV64ZBA: # %bb.0: # %entry ; RV64ZBA: # %bb.0: # %entry
; RV64ZBA-NEXT: mulh a3, a0, a1 ; RV64ZBA-NEXT: mulh a3, a0, a1
; RV64ZBA-NEXT: mul a1, a0, a1 ; RV64ZBA-NEXT: mul a1, a0, a1
; RV64ZBA-NEXT: srai a0, a1, 63 ; RV64ZBA-NEXT: srai a0, a1, 63
▲ Show 20 Lines • Show All 1,337 Lines • ▼ Show 20 Lines
; RV32-NEXT: xor a4, a4, a5 ; RV32-NEXT: xor a4, a4, a5
; RV32-NEXT: xor a5, t6, a5 ; RV32-NEXT: xor a5, t6, a5
; RV32-NEXT: or a4, a5, a4 ; RV32-NEXT: or a4, a5, a4
; RV32-NEXT: bnez a4, .LBB44_2 ; RV32-NEXT: bnez a4, .LBB44_2
; RV32-NEXT: # %bb.1: # %entry ; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: mv a0, a2 ; RV32-NEXT: mv a0, a2
; RV32-NEXT: mv a1, a3 ; RV32-NEXT: mv a1, a3
; RV32-NEXT: .LBB44_2: # %entry ; RV32-NEXT: .LBB44_2: # %entry
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: smulo.select.i64: ; RV64-LABEL: smulo.select.i64:
; RV64: # %bb.0: # %entry ; RV64: # %bb.0: # %entry
; RV64-NEXT: mulh a2, a0, a1 ; RV64-NEXT: mulh a2, a0, a1
; RV64-NEXT: mul a3, a0, a1 ; RV64-NEXT: mul a3, a0, a1
; RV64-NEXT: srai a3, a3, 63 ; RV64-NEXT: srai a3, a3, 63
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; RV32ZBA-NEXT: xor a4, a4, a5 ; RV32ZBA-NEXT: xor a4, a4, a5
; RV32ZBA-NEXT: xor a5, t6, a5 ; RV32ZBA-NEXT: xor a5, t6, a5
; RV32ZBA-NEXT: or a4, a5, a4 ; RV32ZBA-NEXT: or a4, a5, a4
; RV32ZBA-NEXT: bnez a4, .LBB44_2 ; RV32ZBA-NEXT: bnez a4, .LBB44_2
; RV32ZBA-NEXT: # %bb.1: # %entry ; RV32ZBA-NEXT: # %bb.1: # %entry
; RV32ZBA-NEXT: mv a0, a2 ; RV32ZBA-NEXT: mv a0, a2
; RV32ZBA-NEXT: mv a1, a3 ; RV32ZBA-NEXT: mv a1, a3
; RV32ZBA-NEXT: .LBB44_2: # %entry ; RV32ZBA-NEXT: .LBB44_2: # %entry
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: addi sp, sp, 16 ; RV32ZBA-NEXT: addi sp, sp, 16
; RV32ZBA-NEXT: ret ; RV32ZBA-NEXT: ret
; ;
; RV64ZBA-LABEL: smulo.select.i64: ; RV64ZBA-LABEL: smulo.select.i64:
; RV64ZBA: # %bb.0: # %entry ; RV64ZBA: # %bb.0: # %entry
; RV64ZBA-NEXT: mulh a2, a0, a1 ; RV64ZBA-NEXT: mulh a2, a0, a1
; RV64ZBA-NEXT: mul a3, a0, a1 ; RV64ZBA-NEXT: mul a3, a0, a1
; RV64ZBA-NEXT: srai a3, a3, 63 ; RV64ZBA-NEXT: srai a3, a3, 63
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; RV32-NEXT: add a0, a0, a1 ; RV32-NEXT: add a0, a0, a1
; RV32-NEXT: add a0, a4, a0 ; RV32-NEXT: add a0, a4, a0
; RV32-NEXT: add a0, a0, s2 ; RV32-NEXT: add a0, a0, s2
; RV32-NEXT: srai a1, a7, 31 ; RV32-NEXT: srai a1, a7, 31
; RV32-NEXT: xor a0, a0, a1 ; RV32-NEXT: xor a0, a0, a1
; RV32-NEXT: xor a1, t6, a1 ; RV32-NEXT: xor a1, t6, a1
; RV32-NEXT: or a0, a1, a0 ; RV32-NEXT: or a0, a1, a0
; RV32-NEXT: seqz a0, a0 ; RV32-NEXT: seqz a0, a0
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: smulo.not.i64: ; RV64-LABEL: smulo.not.i64:
; RV64: # %bb.0: # %entry ; RV64: # %bb.0: # %entry
; RV64-NEXT: mulh a2, a0, a1 ; RV64-NEXT: mulh a2, a0, a1
; RV64-NEXT: mul a0, a0, a1 ; RV64-NEXT: mul a0, a0, a1
; RV64-NEXT: srai a0, a0, 63 ; RV64-NEXT: srai a0, a0, 63
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; RV32ZBA-NEXT: add a0, a0, a1 ; RV32ZBA-NEXT: add a0, a0, a1
; RV32ZBA-NEXT: add a0, a4, a0 ; RV32ZBA-NEXT: add a0, a4, a0
; RV32ZBA-NEXT: add a0, a0, s2 ; RV32ZBA-NEXT: add a0, a0, s2
; RV32ZBA-NEXT: srai a1, a7, 31 ; RV32ZBA-NEXT: srai a1, a7, 31
; RV32ZBA-NEXT: xor a0, a0, a1 ; RV32ZBA-NEXT: xor a0, a0, a1
; RV32ZBA-NEXT: xor a1, t6, a1 ; RV32ZBA-NEXT: xor a1, t6, a1
; RV32ZBA-NEXT: or a0, a1, a0 ; RV32ZBA-NEXT: or a0, a1, a0
; RV32ZBA-NEXT: seqz a0, a0 ; RV32ZBA-NEXT: seqz a0, a0
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: addi sp, sp, 16 ; RV32ZBA-NEXT: addi sp, sp, 16
; RV32ZBA-NEXT: ret ; RV32ZBA-NEXT: ret
; ;
; RV64ZBA-LABEL: smulo.not.i64: ; RV64ZBA-LABEL: smulo.not.i64:
; RV64ZBA: # %bb.0: # %entry ; RV64ZBA: # %bb.0: # %entry
; RV64ZBA-NEXT: mulh a2, a0, a1 ; RV64ZBA-NEXT: mulh a2, a0, a1
; RV64ZBA-NEXT: mul a0, a0, a1 ; RV64ZBA-NEXT: mul a0, a0, a1
; RV64ZBA-NEXT: srai a0, a0, 63 ; RV64ZBA-NEXT: srai a0, a0, 63
▲ Show 20 Lines • Show All 900 Lines • ▼ Show 20 Lines
; RV32-NEXT: or a0, a1, a0 ; RV32-NEXT: or a0, a1, a0
; RV32-NEXT: beqz a0, .LBB59_2 ; RV32-NEXT: beqz a0, .LBB59_2
; RV32-NEXT: # %bb.1: # %overflow ; RV32-NEXT: # %bb.1: # %overflow
; RV32-NEXT: li a0, 0 ; RV32-NEXT: li a0, 0
; RV32-NEXT: j .LBB59_3 ; RV32-NEXT: j .LBB59_3
; RV32-NEXT: .LBB59_2: # %continue ; RV32-NEXT: .LBB59_2: # %continue
; RV32-NEXT: li a0, 1 ; RV32-NEXT: li a0, 1
; RV32-NEXT: .LBB59_3: # %overflow ; RV32-NEXT: .LBB59_3: # %overflow
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32-NEXT: addi sp, sp, 16 ; RV32-NEXT: addi sp, sp, 16
; RV32-NEXT: ret ; RV32-NEXT: ret
; ;
; RV64-LABEL: smulo.br.i64: ; RV64-LABEL: smulo.br.i64:
; RV64: # %bb.0: # %entry ; RV64: # %bb.0: # %entry
; RV64-NEXT: mulh a2, a0, a1 ; RV64-NEXT: mulh a2, a0, a1
; RV64-NEXT: mul a0, a0, a1 ; RV64-NEXT: mul a0, a0, a1
; RV64-NEXT: srai a0, a0, 63 ; RV64-NEXT: srai a0, a0, 63
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; RV32ZBA-NEXT: or a0, a1, a0 ; RV32ZBA-NEXT: or a0, a1, a0
; RV32ZBA-NEXT: beqz a0, .LBB59_2 ; RV32ZBA-NEXT: beqz a0, .LBB59_2
; RV32ZBA-NEXT: # %bb.1: # %overflow ; RV32ZBA-NEXT: # %bb.1: # %overflow
; RV32ZBA-NEXT: li a0, 0 ; RV32ZBA-NEXT: li a0, 0
; RV32ZBA-NEXT: j .LBB59_3 ; RV32ZBA-NEXT: j .LBB59_3
; RV32ZBA-NEXT: .LBB59_2: # %continue ; RV32ZBA-NEXT: .LBB59_2: # %continue
; RV32ZBA-NEXT: li a0, 1 ; RV32ZBA-NEXT: li a0, 1
; RV32ZBA-NEXT: .LBB59_3: # %overflow ; RV32ZBA-NEXT: .LBB59_3: # %overflow
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload ; RV32ZBA-NEXT: lw s0, 12(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s1, 8(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: lw s2, 4(sp) # 4-byte Folded Reload
; RV32ZBA-NEXT: addi sp, sp, 16 ; RV32ZBA-NEXT: addi sp, sp, 16
; RV32ZBA-NEXT: ret ; RV32ZBA-NEXT: ret
; ;
; RV64ZBA-LABEL: smulo.br.i64: ; RV64ZBA-LABEL: smulo.br.i64:
; RV64ZBA: # %bb.0: # %entry ; RV64ZBA: # %bb.0: # %entry
; RV64ZBA-NEXT: mulh a2, a0, a1 ; RV64ZBA-NEXT: mulh a2, a0, a1
; RV64ZBA-NEXT: mul a0, a0, a1 ; RV64ZBA-NEXT: mul a0, a0, a1
; RV64ZBA-NEXT: srai a0, a0, 63 ; RV64ZBA-NEXT: srai a0, a0, 63
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