[RISCV] Fix StackOffset calculation when using sp to access the fixed stack object in the case of rvv vector objects existed

[StephenFan]

Summary

When rvv vector objects existed, using sp to access the fixed stack object will pass the rvv vector objects field. So the StackOffset needs add a scalable offset of the size of rvv vector objects field

[StephenFan]

Ping:)

[frasercrmck]

I think this makes sense to me but I'm not sure I'd give approval alone.

[StephenFan]

In D100286#2694131, @frasercrmck wrote:

I think this makes sense to me but I'm not sure I'd give approval alone.

Thanks, @frasercrmck . Then let me wait for other reviewers.

[HsiangKai]

LGTM. Before landing, you need to rebase and update your test case.

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

if (hasFP(MF)) {
       // |--------------------------| --     |
       // | scalar local variables   | | <----'
       // |--------------------------| -- <-- SP
       //
       // The total amount of padding surrounding RVV objects is described by
       // RVV->getRVVPadding() and it can be zero. It allows us to align the RVV
       // objects to 8 bytes.
       if (MFI.getStackID(FI) == TargetStackID::Default) {
+        if (MFI.isFixedObjectIndex(FI)) {
+          Offset += StackOffset::get(MFI.getStackSize() + RVFI->getRVVPadding() 
+                        + RVFI->getLibCallStackSize(), RVFI->getRVVStackSize());
+        } else {
           Offset += StackOffset::getFixed(MFI.getStackSize());
-        if (FI < 0)
-          Offset += StackOffset::getFixed(RVFI->getLibCallStackSize());
+        }
       } else if (MFI.getStackID(FI) == TargetStackID::ScalableVector) {
         Offset += StackOffset::get(
             alignTo(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(), 8),
             RVFI->getRVVStackSize());
       }
     }
   }
 

llvm/test/CodeGen/RISCV/rvv/localvar.ll

 
 define i64 @fixed_object(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8) nounwind {
 ; RV64IV-LABEL: fixed_object:
 ; RV64IV:       # %bb.0:
 ; RV64IV-NEXT:    addi sp, sp, -32
 ; RV64IV-NEXT:    csrr a0, vlenb
 ; RV64IV-NEXT:    slli a0, a0, 3
 ; RV64IV-NEXT:    sub sp, sp, a0
-; RV64IV-NEXT:    ld a0, 32(sp)
+; RV64IV-NEXT:    csrr a0, vlenb
+; RV64IV-NEXT:    slli a0, a0, 3
+; RV64IV-NEXT:    add a0, sp, a0
+; RV64IV-NEXT:    ld a0, 32(a0)
 ; RV64IV-NEXT:    csrr a1, vlenb
 ; RV64IV-NEXT:    slli a1, a1, 3
 ; RV64IV-NEXT:    add sp, sp, a1
 ; RV64IV-NEXT:    addi sp, sp, 32
 ; RV64IV-NEXT:    ret
   %fixed_size = alloca i32
   %rvv_vector = alloca <vscale x 8 x i64>, align 8
   ret i64 %8
 }
 
 declare void @notdead(i8*, <vscale x 16 x i8>*)
 declare void @notdead2(i8*, i32*, <vscale x 16 x i8>*)