[FPEnv] Allow fneg + strict_fsub -> strict_fadd in DAGCombiner

[ajwock]

Summary

A complimentary change to D85548. This change allows strict_fsub x, (fneg y) to become strict_fadd x, y while preserving chain ordering outside of these operations.

A number of tests were changed significantly because DAGCombiner optimizations cannot be disabled.

[craig.topper]

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

13416

Can we use SelectionDAG::FlagInserter like visitFSUB instead of passing Flags?

llvm/test/CodeGen/X86/fp-intrinsics.ll

70

Why did this get worse?

llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll

680

The checks line are normally generated by a script update_llc_test_checks.py. The next time someone reruns that script on this file, theses lines will disappear.

[RKSimon]

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

13416

+1

llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

1062

Was this added by update_llc_test_checks.py ? I'm worried if someone comes along and regenerates it we'll lose this line - what about moving it above the define (update_llc_test_checks.py shouldn't touch it then).

llvm/test/CodeGen/X86/strict-fsub-combines.ll

1

pre-commit this test file with current codegen and use update_llc_test_checks.py

[nemanjai]

llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

1062

The equivalent of this can be achieved by adding a RUN line with -mcpu=pwr10 (or a respective target feature attribute for these specific functions). On Power10, we have instructions for materializing floating point constants in registers rather than loading from the constant pool.