[RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines

[kprovost]

Summary

The RISCV target did not set the GCC atomic compare and swap defines,
unlike other targets.
This broke builds for things like glib on RISCV.

[jrtc27]

This seems correct. GCC doesn't define the 1 and 2 variants but it implements those with libcalls rather than inline like LLVM so that's to be expected, just something to be aware of.

[kprovost]

Thanks for the review.

I don't have commit access to the LLVM repo, so I'd appreciate it if someone who does can commit this.

clang/lib/Basic/Targets/RISCV.cpp

if (ABIName == "ilp32e")
     Builder.defineMacro("__riscv_abi_rve");
 
   if (HasM) {
     Builder.defineMacro("__riscv_mul");
     Builder.defineMacro("__riscv_div");
     Builder.defineMacro("__riscv_muldiv");
   }
 
-  if (HasA)
+  if (HasA) {
     Builder.defineMacro("__riscv_atomic");
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+    if (Is64Bit)
+      Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+  }
 
   if (HasF || HasD) {
     Builder.defineMacro("__riscv_flen", HasD ? "64" : "32");
     Builder.defineMacro("__riscv_fdiv");
     Builder.defineMacro("__riscv_fsqrt");
   }
 
   if (HasC)