[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges

[MaskRay]

Summary

Ported the D64906 technique to AArch64. It deletes 3 alignments at
PT_LOAD boundaries for the default case: the size of an aarch64 binary
can be decreased by at most 192kb.

If sh_addralign(.tdata) < sh_addralign(.tbss),
we can potentially make p_vaddr(PT_TLS)%p_align(PT_TLS) != 0.

ld.so that are known to have problems if p_vaddr%p_align!=0:

• musl<=1.1.22
• FreeBSD 13.0-CURRENT (and before) rtld-elf arm64

New test aarch64-tls-vaddr-align.s checks p_vaddr%p_align = 0.

[MaskRay]

Update more tests. WIP

[MaskRay]

Update title

[MaskRay]

Updated all aarch64 tests.

[MaskRay]

Add aarch64-tls-vaddr-align.s

[MaskRay]

Fix TP offset computation if p_vaddr%p_align!=0

[peter.smith]

Apologies, missed that this was a separate review from D64906 will check through in detail tomorrow.

[peter.smith]

Will be worth mentioning that this is dependent on D64906 and D64903, I could guess at D64903 but basic-aarch64.s didn't apply cleanly without D64903. I successfully did a 2 stage bootstrap of clang with ninja check-all on a native aarch64 machine and made a quick test to check the TP relative relocation. I struggled a bit to understand the description and the comments though. In particular the use of GAP_ABOVE_TP instead of TCB_SIZE, it also wasn't clear where the alignment calculation had come from. I've made a few suggestions.

ELF/InputSection.cpp

617

The comment below is just an abbreviation of the code. Given that we have a more complex calculation to do than ld.bfd or ld.gold (IIUC they force the alignment of the first TLS section to p_align which means that the p_offset will be 0 mod p_align), I think we need a bit more explanation. Something like:

At run time TP will be aligned to p_align, followed by the TCB which is the size of 2 pointers, followed by alignment padding, then the TLS blocks starting with the local block. In the ELF file the p_vaddr will be congruent to p_offset modulo p_align we therefore add additional padding so that (TP + TCB_SIZE + padding) is congruent to p_vaddr modulo p_align.

I also needed to reach for my operator precedence table more than once when looking at the expression. It may be worth splitting it up a bit, for example:

offsetIntoBlock = s.getVA(0)
tcbSize = config->wordsize * 2 
padSize = (tls->p_vaddr - tcbSize) & (tls->p_align - 1)
return tcbSize + padSize + offsetIntoBlock;

test/ELF/aarch64-tls-vaddr-align.s

15

Personally I find GAP_ABOVE_TP confusing. I think TCB_SIZE would be more useful here for example:

## At run time TP will point to a structure aligned on a p_align boundary:
## | TCB_SIZE | padding | TLS block 0 | ... |
##
## a@tprel = TCB_SIZE + padding + st_value(a)
## TCB_SIZE = 16 (2 pointers)
## padding is (p_vaddr - TCB_SIZE) & (p_align - 1)
## st_value(a) is the offset into TLS block 0
## 0x220200-0x2201cc + 16 + (0x2201cc-16 & 0x100-1) = 0x100

[MaskRay]

Added more comments to D64906 based on peter.smith's suggestion.

[nsz]

In D64930#1597590, @peter.smith wrote:

Will be worth mentioning that this is dependent on D64906 and D64903, I could guess at D64903 but basic-aarch64.s didn't apply cleanly without D64903. I successfully did a 2 stage bootstrap of clang with ninja check-all on a native aarch64 machine and made a quick test to check the TP relative relocation. I struggled a bit to understand the description and the comments though. In particular the use of GAP_ABOVE_TP instead of TCB_SIZE, it also wasn't clear where the alignment calculation had come from. I've made a few suggestions.

it seems the description is based on the code in musl.

i think the "TCB" wording is a mistake in the original IA-64 sysv abi (and Drepper's tls paper based on it) which documents implementation internals (16bytes "thread control block" after the tp), that is not abi and thus inappropriate in an abi document. the tls abi is just 16 bytes gap reserved after tp for implementation internal use (e.g. in musl it is unused).

i think using "TCB_SIZE" is acceptable in a linker given the tls abi documentation, but in musl that would be confusing since the tcb is elsewhere. (i think tcb is confusing in glibc too since tcb refers to the the entire pthread struct as well which is below the tp, so with tls variant 1 there are now two different things called tcb).

[MaskRay]

In D64930#1598672, @nsz wrote:

In D64930#1597590, @peter.smith wrote:

Will be worth mentioning that this is dependent on D64906 and D64903, I could guess at D64903 but basic-aarch64.s didn't apply cleanly without D64903. I successfully did a 2 stage bootstrap of clang with ninja check-all on a native aarch64 machine and made a quick test to check the TP relative relocation. I struggled a bit to understand the description and the comments though. In particular the use of GAP_ABOVE_TP instead of TCB_SIZE, it also wasn't clear where the alignment calculation had come from. I've made a few suggestions.

it seems the description is based on the code in musl.

Yes, and that's why you are on the reviewers' list :) Thanks for clarification.

i think the "TCB" wording is a mistake in the original IA-64 sysv abi (and Drepper's tls paper based on it) which documents implementation internals (16bytes "thread control block" after the tp), that is not abi and thus inappropriate in an abi document. the tls abi is just 16 bytes gap reserved after tp for implementation internal use (e.g. in musl it is unused).
i think using "TCB_SIZE" is acceptable in a linker given the tls abi documentation, but in musl that would be confusing since the tcb is elsewhere. (i think tcb is confusing in glibc too since tcb refers to the the entire pthread struct as well which is below the tp, so with tls variant 1 there are now two different things called tcb).

The "TCB" term made me confused enough so I didn't use it in the comment around ELF/InputSection.cpp:611 in D64906. I just call it "gap".

[peter.smith]

My use of TCB comes from the Arm ABI description of TLS http://infocenter.arm.com/help/topic/com.arm.doc.ihi0045e/IHI0045E_ABI_addenda.pdf (See diagram in 3.3 Linux for ARM TLS addressing). I'm guessing that TCB was derived from the original Drepper documentation. If it isn't universal across all TLS implementations we might be better off with something like "Reserved". For me as someone not familiar with MUSL I interpret GAP_ABOVE_TP as the gap between TP and the first TLS block (including the alignment padding and not distinct from it).

[rprichard]

I'm not sure about breaking the (p_vaddr % p_align == 0) invariant. ld.bfd, gold, and (for the most part) lld currently provide this invariant for TLS segments in output files.

Supporting n-mod-m alignment isn't free for dynamic TLS -- allocators typically have [posix_]memalign and free APIs, but I'm not aware of APIs that provide n-mod-m alignment. Supporting it may add extra overhead in libc (e.g. in the DTV) to accommodate the misalignment so libc can free the memory later. The n-mod-m property could conceivably leak into an API used for sanitizers (e.g. https://sourceware.org/glibc/wiki/ThreadPropertiesAPI, the proposed __libc_create_dynamic_tls API).

I think there's an interoperability/compatibility issue. Like current Bionic, I don't think the BSDs pay attention to the (p_vaddr % p_align) value, for static or dynamic TLS. glibc uses that value for static TLS segments, but not for dynamic TLS[1]. (i.e. With this change, I believe lld can generate DSOs where some .tbss variables are misaligned when dlopen'ed with glibc.)

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=24606

[peter.smith]

In D64930#1605622, @rprichard wrote:

I'm not sure about breaking the (p_vaddr % p_align == 0) invariant. ld.bfd, gold, and (for the most part) lld currently provide this invariant for TLS segments in output files.

Supporting n-mod-m alignment isn't free for dynamic TLS -- allocators typically have [posix_]memalign and free APIs, but I'm not aware of APIs that provide n-mod-m alignment. Supporting it may add extra overhead in libc (e.g. in the DTV) to accommodate the misalignment so libc can free the memory later. The n-mod-m property could conceivably leak into an API used for sanitizers (e.g. https://sourceware.org/glibc/wiki/ThreadPropertiesAPI, the proposed __libc_create_dynamic_tls API).

I think there's an interoperability/compatibility issue. Like current Bionic, I don't think the BSDs pay attention to the (p_vaddr % p_align) value, for static or dynamic TLS. glibc uses that value for static TLS segments, but not for dynamic TLS[1]. (i.e. With this change, I believe lld can generate DSOs where some .tbss variables are misaligned when dlopen'ed with glibc.)

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=24606

I had a quick look at the PR to see if I could make it fail (with D64930 applied) with glibc without hacking the binary with the trim-pt-tls program with this change. I wasn't able to do so although that doesn't mean it is impossible. Having said that I agree that it would be safer to be conservative in our demands on the capabilities of dynamic loaders. As I understand it ld.bfd and ld.gold both set the alignment of the first TLS section to the alignment of PT_TLS (max of any TLS section progbits or nobits).

[rprichard]

In D64930#1606359, @peter.smith wrote:

I had a quick look at the PR to see if I could make it fail (with D64930 applied) with glibc without hacking the binary with the trim-pt-tls program with this change. I wasn't able to do so although that doesn't mean it is impossible. Having said that I agree that it would be safer to be conservative in our demands on the capabilities of dynamic loaders.

Here's an demonstration of the problem on glibc. (I applied D64903, D64906, and D64930.) https://gist.github.com/rprichard/e5ad0cfa10f6b75925ded3709117500f

In the shared object, declare these variables:

__thread char tlsvar1[1] = { 1 };
__thread char tlsvar2[0x100] __attribute__((aligned(0x100)));

$ ./build.sh && readelf -lW libtls.so
...
  Type           Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
...
  TLS            0x000780 0x0000000000020780 0x0000000000020780 0x000001 0x000180 R   0x100

Output on Ubuntu 16.04 AArch64:

&tlsvar1 = 0x1a63c700
&tlsvar2 = 0x1a63c780

As I understand it ld.bfd and ld.gold both set the alignment of the first TLS section to the alignment of PT_TLS (max of any TLS section progbits or nobits).

That appears to be correct. ld.bfd increases the first TLS section alignment to the maximum in _bfd_elf_tls_setup. ld.gold leaves the sh_addralign field itself alone but still aligns the p_vaddr of the output TLS segment in Output_segment::set_section_list_addresses:

// Give the first TLS section the alignment of the
// entire TLS segment.  Otherwise the TLS segment as a
// whole may be misaligned.

https://git.linaro.org/toolchain/binutils-gdb.git/commit/?id=96a2b4e4bf67a7430e7ddd06a1d0730a49e6b07e

[MaskRay]

Update aarch64-tls-vaddr-align.s because the p_vaddr%p_align = 0 hack is used to work around some ld.so bugs

[MaskRay]

I'm not sure about breaking the (p_vaddr % p_align == 0) invariant. ld.bfd, gold, and (for the most part) lld currently provide this invariant for TLS segments in output files.

I think p_vaddr%p_align = p_offset%p_align is the invariant we must satisfy. p_vaddr%p_align=0 is not. However, p_vaddr%p_align!=0 will expose bugs (runtime address not congruent to p_vaddr modulo p_align) in existing ld.so implementations so I added a workaround to D64906.

Below are discussions about bugs in various ld.so implementations. They should not be affected by these patches but ideally they should be fixed.

Supporting n-mod-m alignment isn't free for dynamic TLS -- allocators typically have [posix_]memalign and free APIs, but I'm not aware of APIs that provide n-mod-m alignment.

When allocating TCB+static TLS blocks, ld.so should properly pad the allocated space. See my comment added to InputSection.cpp in D64906:

// Variant 1. TP will be followed by an optional gap (which is the size of 2
// pointers on ARM/AArch64, 0 on other targets), followed by alignment
// padding, then the static TLS blocks. The alignment padding is added so that
// (TP + gap + padding) is congruent to p_vaddr modulo p_align.
//
// Variant 2. Static TLS blocks, followed by alignment padding are placed
// before TP. The alignment padding is added so that (TP - padding -
// p_memsz) is congruent to p_vaddr modulo p_align.

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=24606

This is a great test case! CC @kib who reviewed https://reviews.freebsd.org/D13378 @luporl for powerpc64. CC @emaste who is already subscribed...

FreeBSD rtld-elf (FreeBSD 13.0-CURRENT #89 r350361M) doesn't make runtime address of PT_TLS congruent to p_vaddr modulo p_align on i386/amd64/arm64/powerpc64:

# amd64 case
tp          = 0x8002278d0
&tlsvar     = 0x8002212c8  # this should be 1-mod-4
tlsvar[1]   = 7            # the value is correct

glibc (i386 and x86_64) has the same bug. It gets the static TLS block offsets correct.
Its aarch64 port is correct (https://sourceware.org/bugzilla/show_bug.cgi?id=24606).

musl i386 and x86_64 has been correct for many years:

% ./test1
tp          = 0x7f2697b10cc8
&tlsvar     = 0x7f2697b113b9  # 1-mod-4
tlsvar[1]   = 7

musl aarch64 (and likely arm/powerpc/powerpc64) was incorrect before 1.1.23 .
(Fixed by nsz's "fix tls offsets when p_vaddr%p_align != 0 on TLS_ABOVE_TP targets")

I think there's an interoperability/compatibility issue. Like current Bionic, I don't think the BSDs pay attention to the (p_vaddr % p_align) value, for static or dynamic TLS. glibc uses that value for static TLS segments, but not for dynamic TLS[1]. (i.e. With this change, I believe lld can generate DSOs where some .tbss variables are misaligned when dlopen'ed with glibc.)

It'd be nice if Bionic can fix the problem :) Though it may hardly happen on Bionic arm/aarch64 because .tdata is overaligned to 64.

p_vaddr(PT_TLS) % p_align(PT_TLS) != 0 can only happen if sh_addralign(.tdata) < sh_addralign(.tbss).
So you may have to align .tbss to >=128 to verify.

FreeBSD definitely paid attention to the alignment of PT_TLS:

// lib/libc/gen/tls.c
 * +----------+--------------+--------------+-----------+------------------+
 * | pre gap  | extended TCB |     TCB      | post gap  |    TLS segment   |
 * | pre_size |  extra_size  | TLS_TCB_SIZE | post_size | tls_static_space |
 * +----------+--------------+--------------+-----------+------------------+
 *
 * where:
 *  extra_size is tcbsize - TLS_TCB_SIZE
 *  post_size is used to adjust TCB to TLS aligment for first version of TLS
 *            layout and is always 0 for second version.
 *  pre_size  is used to adjust TCB aligment for first version and to adjust
 *            TLS alignment for second version.

Though amd64 is know to have problems as to dynamic TLS blocks. aarch64 may likely have static TLS offset problems (according to the experiments in D62055).

[rprichard]

Its aarch64 port is correct (https://sourceware.org/bugzilla/show_bug.cgi?id=24606).

I suspect that's only the case when the TLS segment is allocated into surplus static memory. glibc aarch64 still allocates the segment at (&addr % p_align) != (p_vaddr % p_align) either if it's too big (e.g 0x1000 bytes) or if the object file is compiled with gcc -mtls-dialect=trad instead of the default -mtls-dialect=desc.

Though it may hardly happen on Bionic arm/aarch64 because .tdata is overaligned to 64.

Bionic's overalignment only applies to executables, not DSOs.

[MaskRay]

Move the formula update to the previous patch

Update description

[kib]

In D64930#1607709, @MaskRay wrote:

I'm not sure about breaking the (p_vaddr % p_align == 0) invariant. ld.bfd, gold, and (for the most part) lld currently provide this invariant for TLS segments in output files.

I think p_vaddr%p_align = p_offset%p_align is the invariant we must satisfy. p_vaddr%p_align=0 is not. However, p_vaddr%p_align!=0 will expose bugs (runtime address not congruent to p_vaddr modulo p_align) in existing ld.so implementations so I added a workaround to D64906.

Below are discussions about bugs in various ld.so implementations. They should not be affected by these patches but ideally they should be fixed.

Supporting n-mod-m alignment isn't free for dynamic TLS -- allocators typically have [posix_]memalign and free APIs, but I'm not aware of APIs that provide n-mod-m alignment.

When allocating TCB+static TLS blocks, ld.so should properly pad the allocated space. See my comment added to InputSection.cpp in D64906:

// Variant 1. TP will be followed by an optional gap (which is the size of 2
// pointers on ARM/AArch64, 0 on other targets), followed by alignment
// padding, then the static TLS blocks. The alignment padding is added so that
// (TP + gap + padding) is congruent to p_vaddr modulo p_align.
//
// Variant 2. Static TLS blocks, followed by alignment padding are placed
// before TP. The alignment padding is added so that (TP - padding -
// p_memsz) is congruent to p_vaddr modulo p_align.

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=24606

This is a great test case! CC @kib who reviewed https://reviews.freebsd.org/D13378 @luporl for powerpc64. CC @emaste who is already subscribed...

FreeBSD rtld-elf (FreeBSD 13.0-CURRENT #89 r350361M) doesn't make runtime address of PT_TLS congruent to p_vaddr modulo p_align on i386/amd64/arm64/powerpc64:

# amd64 case
tp          = 0x8002278d0
&tlsvar     = 0x8002212c8  # this should be 1-mod-4
tlsvar[1]   = 7            # the value is correct

I put (an experimental at this stage) review https://reviews.freebsd.org/D21163 to change the behavior of the FreeBSD dynamic linker.
With the patch applied, and with the test program from the sourceware bugzilla, I see on amd64:

orion% ~/build/bsd/DEV/obj/usr/home/kostik/work/build/bsd/DEV/src/amd64.amd64/libexec/rtld-elf/ld-elf.so.1 ./test1
tp          = 0x8010448d0
&tlsvar     = 0x80103d4a9
tlsvar[1]   = 7

The address is 1 mod 4, as requested.

glibc (i386 and x86_64) has the same bug. It gets the static TLS block offsets correct.
Its aarch64 port is correct (https://sourceware.org/bugzilla/show_bug.cgi?id=24606).

musl i386 and x86_64 has been correct for many years:

% ./test1
tp          = 0x7f2697b10cc8
&tlsvar     = 0x7f2697b113b9  # 1-mod-4
tlsvar[1]   = 7

musl aarch64 (and likely arm/powerpc/powerpc64) was incorrect before 1.1.23 .
(Fixed by nsz's "fix tls offsets when p_vaddr%p_align != 0 on TLS_ABOVE_TP targets")

I think there's an interoperability/compatibility issue. Like current Bionic, I don't think the BSDs pay attention to the (p_vaddr % p_align) value, for static or dynamic TLS. glibc uses that value for static TLS segments, but not for dynamic TLS[1]. (i.e. With this change, I believe lld can generate DSOs where some .tbss variables are misaligned when dlopen'ed with glibc.)

It'd be nice if Bionic can fix the problem :) Though it may hardly happen on Bionic arm/aarch64 because .tdata is overaligned to 64.

p_vaddr(PT_TLS) % p_align(PT_TLS) != 0 can only happen if sh_addralign(.tdata) < sh_addralign(.tbss).
So you may have to align .tbss to >=128 to verify.

FreeBSD definitely paid attention to the alignment of PT_TLS:

// lib/libc/gen/tls.c
 * +----------+--------------+--------------+-----------+------------------+
 * | pre gap  | extended TCB |     TCB      | post gap  |    TLS segment   |
 * | pre_size |  extra_size  | TLS_TCB_SIZE | post_size | tls_static_space |
 * +----------+--------------+--------------+-----------+------------------+
 *
 * where:
 *  extra_size is tcbsize - TLS_TCB_SIZE
 *  post_size is used to adjust TCB to TLS aligment for first version of TLS
 *            layout and is always 0 for second version.
 *  pre_size  is used to adjust TCB aligment for first version and to adjust
 *            TLS alignment for second version.

Though amd64 is know to have problems as to dynamic TLS blocks. aarch64 may likely have static TLS offset problems (according to the experiments in D62055).

Can you provide the test for static TLS on amd64/i386 ?

[MaskRay]

In D64930#1614131, @kib wrote:

In D64930#1607709, @MaskRay wrote:

I'm not sure about breaking the (p_vaddr % p_align == 0) invariant. ld.bfd, gold, and (for the most part) lld currently provide this invariant for TLS segments in output files.

I think p_vaddr%p_align = p_offset%p_align is the invariant we must satisfy. p_vaddr%p_align=0 is not. However, p_vaddr%p_align!=0 will expose bugs (runtime address not congruent to p_vaddr modulo p_align) in existing ld.so implementations so I added a workaround to D64906.

Below are discussions about bugs in various ld.so implementations. They should not be affected by these patches but ideally they should be fixed.

Supporting n-mod-m alignment isn't free for dynamic TLS -- allocators typically have [posix_]memalign and free APIs, but I'm not aware of APIs that provide n-mod-m alignment.

When allocating TCB+static TLS blocks, ld.so should properly pad the allocated space. See my comment added to InputSection.cpp in D64906:

// Variant 1. TP will be followed by an optional gap (which is the size of 2
// pointers on ARM/AArch64, 0 on other targets), followed by alignment
// padding, then the static TLS blocks. The alignment padding is added so that
// (TP + gap + padding) is congruent to p_vaddr modulo p_align.
//
// Variant 2. Static TLS blocks, followed by alignment padding are placed
// before TP. The alignment padding is added so that (TP - padding -
// p_memsz) is congruent to p_vaddr modulo p_align.

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=24606

This is a great test case! CC @kib who reviewed https://reviews.freebsd.org/D13378 @luporl for powerpc64. CC @emaste who is already subscribed...

FreeBSD rtld-elf (FreeBSD 13.0-CURRENT #89 r350361M) doesn't make runtime address of PT_TLS congruent to p_vaddr modulo p_align on i386/amd64/arm64/powerpc64:

# amd64 case
tp          = 0x8002278d0
&tlsvar     = 0x8002212c8  # this should be 1-mod-4
tlsvar[1]   = 7            # the value is correct

I put (an experimental at this stage) review https://reviews.freebsd.org/D21163 to change the behavior of the FreeBSD dynamic linker.
With the patch applied, and with the test program from the sourceware bugzilla, I see on amd64:

orion% ~/build/bsd/DEV/obj/usr/home/kostik/work/build/bsd/DEV/src/amd64.amd64/libexec/rtld-elf/ld-elf.so.1 ./test1
tp          = 0x8010448d0
&tlsvar     = 0x80103d4a9
tlsvar[1]   = 7

The address is 1 mod 4, as requested.

glibc (i386 and x86_64) has the same bug. It gets the static TLS block offsets correct.
Its aarch64 port is correct (https://sourceware.org/bugzilla/show_bug.cgi?id=24606).

musl i386 and x86_64 has been correct for many years:

% ./test1
tp          = 0x7f2697b10cc8
&tlsvar     = 0x7f2697b113b9  # 1-mod-4
tlsvar[1]   = 7

musl aarch64 (and likely arm/powerpc/powerpc64) was incorrect before 1.1.23 .
(Fixed by nsz's "fix tls offsets when p_vaddr%p_align != 0 on TLS_ABOVE_TP targets")

I think there's an interoperability/compatibility issue. Like current Bionic, I don't think the BSDs pay attention to the (p_vaddr % p_align) value, for static or dynamic TLS. glibc uses that value for static TLS segments, but not for dynamic TLS[1]. (i.e. With this change, I believe lld can generate DSOs where some .tbss variables are misaligned when dlopen'ed with glibc.)

It'd be nice if Bionic can fix the problem :) Though it may hardly happen on Bionic arm/aarch64 because .tdata is overaligned to 64.

p_vaddr(PT_TLS) % p_align(PT_TLS) != 0 can only happen if sh_addralign(.tdata) < sh_addralign(.tbss).
So you may have to align .tbss to >=128 to verify.

FreeBSD definitely paid attention to the alignment of PT_TLS:

// lib/libc/gen/tls.c
 * +----------+--------------+--------------+-----------+------------------+
 * | pre gap  | extended TCB |     TCB      | post gap  |    TLS segment   |
 * | pre_size |  extra_size  | TLS_TCB_SIZE | post_size | tls_static_space |
 * +----------+--------------+--------------+-----------+------------------+
 *
 * where:
 *  extra_size is tcbsize - TLS_TCB_SIZE
 *  post_size is used to adjust TCB to TLS aligment for first version of TLS
 *            layout and is always 0 for second version.
 *  pre_size  is used to adjust TCB aligment for first version and to adjust
 *            TLS alignment for second version.

Though amd64 is know to have problems as to dynamic TLS blocks. aarch64 may likely have static TLS offset problems (according to the experiments in D62055).

Can you provide the test for static TLS on amd64/i386 ?

The new test aarch64-tls-vaddr-align.s checks p_vaddr%p_align = 0. Once D64906 (PPC64) is accepted, I'll create an i386 patch, which involves ~40 test changes.

If you comment out the following part included in D64906:

// ELF/Writer.cpp
      else if (Out::tlsPhdr && Out::tlsPhdr->firstSec == p->firstSec)
        cmd->addrExpr = [] {
          return alignTo(script->getDot(), config->maxPageSize) +
                 alignTo(script->getDot() % config->maxPageSize,
                         Out::tlsPhdr->p_align);
        };

aarch64-tls-vaddr-align.s will create a PT_TLS where p_vaddr%p_align!=0.

[MaskRay]

D64906 and D64930 have been mentioned by an Android NDK issue today https://github.com/android-ndk/ndk/issues/1057 today. It'd be very nice if they can be committed soon...

[peter.smith]

I'm personally in favour of accepting D64930 and D64906 (I think that there is also D65865 on X86) as I think that this is an important size optimization already performed by Gold and BFD. Thinking about how to progress this further, I think it would be good to write a summary of where each of these reviews is at and what the plan is for this feature. For example:

• Have all the comments been addressed, I think the main concern was about TLS?
• Which targets do we want this to apply to, all of them, or just those with a 64k page size?
• What is the dependency tree of the reviews, I think D64906 is a pre-requisite for all of them?
• Does anyone have any objection, or are they happy for individual people active in a backend to approve that part?

[MaskRay]

In D64930#1626651, @peter.smith wrote:

I'm personally in favour of accepting D64930 and D64906 (I think that there is also D65865 on X86) as I think that this is an important size optimization already performed by Gold and BFD. Thinking about how to progress this further, I think it would be good to write a summary of where each of these reviews is at and what the plan is for this feature. For example:

Thanks for pushing forward this patch series!

• Have all the comments been addressed, I think the main concern was about TLS?

All addressed. There was concern about TLS but I aligned p_vaddr/p_offset to p_align of PT_TLS.

• Which targets do we want this to apply to, all of them, or just those with a 64k page size?

All, probably except x86_64 (with max-page-size=4096).

bool enable = config->emachine != EM_X86_64 || config->maxPageSize != 4096;

• What is the dependency tree of the reviews, I think D64906 is a pre-requisite for all of them?

A tree with a single internal node:) Yes, D64906 is a pre-requisite for all of them.

D64906 base, PPC64
  D64930 AArch64 47 tests
  D65865 i386 33 tests
  Dxxxxx ARM (30~50 tests)
  Dxxxxx MIPS
  rLLDxxxxx RISC-V <10 tests
  rLLD PPC32 <10 tests
  Dxxxxx x86_64 with maxpagesize != 4096

Each new target can be enabled independently. The code change is trivial:

-      bool enable = config->emachine == EM_PPC64;
+      bool enable =
+          config->emachine == EM_AARCH64 || config->emachine == EM_PPC64;

The only problem is the number of the affected tests. Due to the layout change nature of the patch series, lots of addresses have to be updated. x86_64 with maxpagesize=4096 is estimated to affect 300+ tests.

• Does anyone have any objection, or are they happy for individual people active in a backend to approve that part?

We haven't heard from MIPS yet. @atanasyan

[MaskRay]

In D64930#1626816, @MaskRay wrote:

In D64930#1626651, @peter.smith wrote:

I'm personally in favour of accepting D64930 and D64906 (I think that there is also D65865 on X86) as I think that this is an important size optimization already performed by Gold and BFD. Thinking about how to progress this further, I think it would be good to write a summary of where each of these reviews is at and what the plan is for this feature. For example:

Thanks for pushing forward this patch series!

• Have all the comments been addressed, I think the main concern was about TLS?

All addressed. There was concern about TLS but I aligned p_vaddr/p_offset to p_align of PT_TLS.

• Which targets do we want this to apply to, all of them, or just those with a 64k page size?

All, probably except x86_64 (with max-page-size=4096).

bool enable = config->emachine != EM_X86_64 || config->maxPageSize != 4096;

• What is the dependency tree of the reviews, I think D64906 is a pre-requisite for all of them?

A tree with a single internal node:) Yes, D64906 is a pre-requisite for all of them.

D64906 base, PPC64
  D64930 AArch64 47 tests
  D65865 i386 33 tests
  Dxxxxx ARM (30~50 tests)
  Dxxxxx MIPS
  rLLDxxxxx RISC-V <10 tests
  rLLD PPC32 <10 tests
  Dxxxxx x86_64 with maxpagesize != 4096

Each new target can be enabled independently. The code change is trivial:

-      bool enable = config->emachine == EM_PPC64;
+      bool enable =
+          config->emachine == EM_AARCH64 || config->emachine == EM_PPC64;

The only problem is the number of the affected tests. Due to the layout change nature of the patch series, lots of addresses have to be updated. x86_64 with maxpagesize=4096 is estimated to affect 300+ tests.

• Does anyone have any objection, or are they happy for individual people active in a backend to approve that part?

We haven't heard from MIPS yet. @atanasyan

@ruiu Let's move D64906, D64930 and D65865 forward?

[ruiu]

In D64930#1636625, @MaskRay wrote:

In D64930#1626816, @MaskRay wrote:

In D64930#1626651, @peter.smith wrote:

I'm personally in favour of accepting D64930 and D64906 (I think that there is also D65865 on X86) as I think that this is an important size optimization already performed by Gold and BFD. Thinking about how to progress this further, I think it would be good to write a summary of where each of these reviews is at and what the plan is for this feature. For example:

Thanks for pushing forward this patch series!

• Have all the comments been addressed, I think the main concern was about TLS?

All addressed. There was concern about TLS but I aligned p_vaddr/p_offset to p_align of PT_TLS.

• Which targets do we want this to apply to, all of them, or just those with a 64k page size?

All, probably except x86_64 (with max-page-size=4096).

bool enable = config->emachine != EM_X86_64 || config->maxPageSize != 4096;

• What is the dependency tree of the reviews, I think D64906 is a pre-requisite for all of them?

A tree with a single internal node:) Yes, D64906 is a pre-requisite for all of them.

D64906 base, PPC64
  D64930 AArch64 47 tests
  D65865 i386 33 tests
  Dxxxxx ARM (30~50 tests)
  Dxxxxx MIPS
  rLLDxxxxx RISC-V <10 tests
  rLLD PPC32 <10 tests
  Dxxxxx x86_64 with maxpagesize != 4096

Each new target can be enabled independently. The code change is trivial:

-      bool enable = config->emachine == EM_PPC64;
+      bool enable =
+          config->emachine == EM_AARCH64 || config->emachine == EM_PPC64;

The only problem is the number of the affected tests. Due to the layout change nature of the patch series, lots of addresses have to be updated. x86_64 with maxpagesize=4096 is estimated to affect 300+ tests.

• Does anyone have any objection, or are they happy for individual people active in a backend to approve that part?

We haven't heard from MIPS yet. @atanasyan

@ruiu Let's move D64906, D64930 and D65865 forward?

Yes, I'm in favor of these patches. Please move forward. Are there any remaining concerns?

[MaskRay]

In D64930#1636634, @ruiu wrote:

In D64930#1636625, @MaskRay wrote:

In D64930#1626816, @MaskRay wrote:

In D64930#1626651, @peter.smith wrote:

I'm personally in favour of accepting D64930 and D64906 (I think that there is also D65865 on X86) as I think that this is an important size optimization already performed by Gold and BFD. Thinking about how to progress this further, I think it would be good to write a summary of where each of these reviews is at and what the plan is for this feature. For example:

Thanks for pushing forward this patch series!

• Have all the comments been addressed, I think the main concern was about TLS?

All addressed. There was concern about TLS but I aligned p_vaddr/p_offset to p_align of PT_TLS.

• Which targets do we want this to apply to, all of them, or just those with a 64k page size?

All, probably except x86_64 (with max-page-size=4096).

bool enable = config->emachine != EM_X86_64 || config->maxPageSize != 4096;

• What is the dependency tree of the reviews, I think D64906 is a pre-requisite for all of them?

A tree with a single internal node:) Yes, D64906 is a pre-requisite for all of them.

D64906 base, PPC64
  D64930 AArch64 47 tests
  D65865 i386 33 tests
  Dxxxxx ARM (30~50 tests)
  Dxxxxx MIPS
  rLLDxxxxx RISC-V <10 tests
  rLLD PPC32 <10 tests
  Dxxxxx x86_64 with maxpagesize != 4096

Each new target can be enabled independently. The code change is trivial:

-      bool enable = config->emachine == EM_PPC64;
+      bool enable =
+          config->emachine == EM_AARCH64 || config->emachine == EM_PPC64;

The only problem is the number of the affected tests. Due to the layout change nature of the patch series, lots of addresses have to be updated. x86_64 with maxpagesize=4096 is estimated to affect 300+ tests.

• Does anyone have any objection, or are they happy for individual people active in a backend to approve that part?

We haven't heard from MIPS yet. @atanasyan

@ruiu Let's move D64906, D64930 and D65865 forward?

Yes, I'm in favor of these patches. Please move forward. Are there any remaining concerns?

Great! No concerns as explained above.

[ruiu]

LGTM

[MaskRay]

Rebase. aarch64-gnu-ifunc-nonpreemptable2.s was recently added.

[pcc]

Hi @MaskRay, it looks like this change has caused some binaries to start segfaulting on Android aarch64 devices. The strange thing is that the segfault happens even before entering the dynamic loader, and furthermore the segfault doesn't happen if I invoke the dynamic loader directly, so I'm guessing that the Linux kernel doesn't like the binary for some reason.

repro.tar2 MBDownload

I've attached a repro.tar that I can use to reproduce this problem reliably like so (the "CANNOT LINK EXECUTABLE" error is expected because the runtime library is not present on the device):

$ ~/l2/ra/bin/ld.lld @response.txt
$ adb -s $pixel2 push bin /data/local/tmp
bin: 1 file pushed. 3.9 MB/s (15608 bytes in 0.004s)
$ adb -s $pixel2 shell
walleye:/ # /data/local/tmp/bin
Segmentation fault 
139|walleye:/ # /system/bin/linker64 /data/local/tmp/bin                                                                                   
CANNOT LINK EXECUTABLE "/data/local/tmp/bin": library "libclang_rt.hwasan-aarch64-android.so" not found

Without this change:

$ ~/l/ra/bin/ld.lld @response.txt
$ adb -s $pixel2 push bin /data/local/tmp
bin: 1 file pushed. 1.2 MB/s (17992 bytes in 0.014s)
$ adb -s $pixel2 shell
walleye:/ # /data/local/tmp/bin
CANNOT LINK EXECUTABLE "/data/local/tmp/bin": library "libclang_rt.hwasan-aarch64-android.so" not found

These instructions use Android adb, but given that the problem appears to be with the Linux kernel you might be able to reproduce on regular Linux as well.

[MaskRay]

In D64930#1642223, @pcc wrote:

Hi @MaskRay, it looks like this change has caused some binaries to start segfaulting on Android aarch64 devices. The strange thing is that the segfault happens even before entering the dynamic loader, and furthermore the segfault doesn't happen if I invoke the dynamic loader directly, so I'm guessing that the Linux kernel doesn't like the binary for some reason.

repro.tar2 MBDownload

I've attached a repro.tar that I can use to reproduce this problem reliably like so (the "CANNOT LINK EXECUTABLE" error is expected because the runtime library is not present on the device):

$ ~/l2/ra/bin/ld.lld @response.txt
$ adb -s $pixel2 push bin /data/local/tmp
bin: 1 file pushed. 3.9 MB/s (15608 bytes in 0.004s)
$ adb -s $pixel2 shell
walleye:/ # /data/local/tmp/bin
Segmentation fault 
139|walleye:/ # /system/bin/linker64 /data/local/tmp/bin                                                                                   
CANNOT LINK EXECUTABLE "/data/local/tmp/bin": library "libclang_rt.hwasan-aarch64-android.so" not found

Without this change:

$ ~/l/ra/bin/ld.lld @response.txt
$ adb -s $pixel2 push bin /data/local/tmp
bin: 1 file pushed. 1.2 MB/s (17992 bytes in 0.014s)
$ adb -s $pixel2 shell
walleye:/ # /data/local/tmp/bin
CANNOT LINK EXECUTABLE "/data/local/tmp/bin": library "libclang_rt.hwasan-aarch64-android.so" not found

These instructions use Android adb, but given that the problem appears to be with the Linux kernel you might be able to reproduce on regular Linux as well.

In D64930#1642223, @pcc wrote:

Hi @MaskRay, it looks like this change has caused some binaries to start segfaulting on Android aarch64 devices. The strange thing is that the segfault happens even before entering the dynamic loader, and furthermore the segfault doesn't happen if I invoke the dynamic loader directly, so I'm guessing that the Linux kernel doesn't like the binary for some reason.

repro.tar2 MBDownload

I've attached a repro.tar that I can use to reproduce this problem reliably like so (the "CANNOT LINK EXECUTABLE" error is expected because the runtime library is not present on the device):

$ ~/l2/ra/bin/ld.lld @response.txt
$ adb -s $pixel2 push bin /data/local/tmp
bin: 1 file pushed. 3.9 MB/s (15608 bytes in 0.004s)
$ adb -s $pixel2 shell
walleye:/ # /data/local/tmp/bin
Segmentation fault 
139|walleye:/ # /system/bin/linker64 /data/local/tmp/bin                                                                                   
CANNOT LINK EXECUTABLE "/data/local/tmp/bin": library "libclang_rt.hwasan-aarch64-android.so" not found

Without this change:

$ ~/l/ra/bin/ld.lld @response.txt
$ adb -s $pixel2 push bin /data/local/tmp
bin: 1 file pushed. 1.2 MB/s (17992 bytes in 0.014s)
$ adb -s $pixel2 shell
walleye:/ # /data/local/tmp/bin
CANNOT LINK EXECUTABLE "/data/local/tmp/bin": library "libclang_rt.hwasan-aarch64-android.so" not found

These instructions use Android adb, but given that the problem appears to be with the Linux kernel you might be able to reproduce on regular Linux as well.

I don't have any aarch64 device for testing, but I tried some simple programs on qemu-user and they work:

aarch64-linux-gnu-gcc -Wl,-rpath,/usr/aarch64-linux-gnu/lib:. -Wl,--dynamic-linker,/usr/aarch64-linux-gnu/lib/ld-2.28.so a.o -o a '-###'
# copy the linker command line and link with ld.lld
./a

@peter.smith tested an earlier revision of D64906+D64930 on AArch64 hardware. On regular Linux AArch64 desktop distribution? That earlier revision doesn't include PT_TLS workarounds for various ld.so implementations but I think it is irrelevant here.

@pcc Can you test if the program runs with -z separate-code? What about -z max-page-size=65536 (a program should work if runtime pagesz <= max-page-size)? Also -z norelro. If strace exists on the system, what does it report?

Delete the --chroot line from response.txt and link with aarch64-linux-gnu-ld, try with (a) -z noseprate-code (b) -z separate-code. Does the program crash as well?

+@rprichard who's already subscribed..

lld (-z noseparate-code):
Program Headers:                                                                                        [16/544]
  Type           Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align                    
  PHDR           0x000040 0x0000000000000040 0x0000000000000040 0x000268 0x000268 R   0x8                      
  INTERP         0x0002a8 0x00000000000002a8 0x00000000000002a8 0x000015 0x000015 R   0x1                      
      [Requesting program interpreter: /system/bin/linker64]                                                   
  LOAD           0x000000 0x0000000000000000 0x0000000000000000 0x000bc4 0x000bc4 R   0x1000                   
  LOAD           0x000bc4 0x0000000000001bc4 0x0000000000001bc4 0x000aec 0x000aec R E 0x1000                   
  LOAD           0x0016b0 0x00000000000036b0 0x00000000000036b0 0x0002e8 0x0002e8 RW  0x1000                   
  LOAD           0x001998 0x00000000000049a0 0x00000000000049a0 0x000000 0x010010 RW  0x1000                   
  DYNAMIC        0x0016e8 0x00000000000036e8 0x00000000000036e8 0x0001e0 0x0001e0 RW  0x8                      
  GNU_RELRO      0x0016b0 0x00000000000036b0 0x00000000000036b0 0x0002e8 0x000950 R   0x1                      
  GNU_EH_FRAME   0x000a80 0x0000000000000a80 0x0000000000000a80 0x000044 0x000044 R   0x4                      
  GNU_STACK      0x000000 0x0000000000000000 0x0000000000000000 0x000000 0x000000 RW  0                        
  NOTE           0x0002c0 0x00000000000002c0 0x00000000000002c0 0x0000b4 0x0000b4 R   0x4

ld.bfd (-z noseparate-code):
Program Headers:                                                                                                
  Type           Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align                     
  PHDR           0x000040 0x0000000000000040 0x0000000000000040 0x0001f8 0x0001f8 R   0x8                       
  INTERP         0x000238 0x0000000000000238 0x0000000000000238 0x000015 0x000015 R   0x1                      
      [Requesting program interpreter: /system/bin/linker64]                                                   
  LOAD           0x000000 0x0000000000000000 0x0000000000000000 0x001644 0x001644 R E 0x1000                   
  LOAD           0x001cd0 0x0000000000002cd0 0x0000000000002cd0 0x000330 0x010340 RW  0x1000                   
  DYNAMIC        0x001d08 0x0000000000002d08 0x0000000000002d08 0x000220 0x000220 RW  0x8                      
  NOTE           0x000250 0x0000000000000250 0x0000000000000250 0x0000b4 0x0000b4 R   0x4                      
  GNU_EH_FRAME   0x001528 0x0000000000001528 0x0000000000001528 0x000044 0x000044 R   0x4                      
  GNU_STACK      0x000000 0x0000000000000000 0x0000000000000000 0x000000 0x000000 RW  0x10                     
  GNU_RELRO      0x001cd0 0x0000000000002cd0 0x0000000000002cd0 0x000330 0x000330 R   0x1

aarch64 gold compiled from binutils-gdb HEAD does not recognize R_AARCH64_MOVW_PREL_G3 used in tmp/decorate-proc-maps-2a883b.o.

% ./ld-new @response.txt
./ld-new: error: tmp/decorate-proc-maps-2a883b.o: unsupported reloc 293 against local symbol
./ld-new: error: tmp/decorate-proc-maps-2a883b.o: unsupported reloc 293 against local symbol
./ld-new: error: tmp/decorate-proc-maps-2a883b.o: unsupported reloc 293 against local symbol
./ld-new: error: tmp/decorate-proc-maps-2a883b.o: unsupported reloc 293 against local symbol
compiler-rt/test/hwasan/TestCases/Linux/decorate-proc-maps.c:34: error: cannot relocate invalid reloc 293 in object file
compiler-rt/test/hwasan/TestCases/Linux/decorate-proc-maps.c:36: error: cannot relocate invalid reloc 293 in object file
compiler-rt/test/hwasan/TestCases/Linux/decorate-proc-maps.c:40: error: cannot relocate invalid reloc 293 in object file
compiler-rt/test/hwasan/TestCases/Linux/decorate-proc-maps.c:48: error: cannot relocate invalid reloc 293 in object file

[peter.smith]

I can reproduce a segfault with this image on an Ubuntu 16.04 linux machine (CPU is a cortex-a72). For reference I needed to alter the response file to change the dynamic linker --dynamic-linker=/lib/ld-linux-aarch64.so.1

At the moment I'm not very far in debugging what the problem is
execve("./bin", ["./bin"], [/* 20 vars */]) = -1 EINVAL (Invalid argument)

• SIGSEGV {si_signo=SIGSEGV, si_code=SI_KERNEL, si_addr=0}

expanding the truncated /* 20 vars */ is not helpful, just the standard arguments passed to execve.

A critical part of the failure seems to be -znow, if I take that out then I get
./bin: error while loading shared libraries: libclang_rt.hwasan-aarch64-android.so: cannot open shared object file: No such file or directory

Will see if I can reproduce in QEMU.

[peter.smith]

A critical part of the failure seems to be -znow, if I take that out then I get
./bin: error while loading shared libraries: libclang_rt.hwasan-aarch64-android.so: cannot open shared object file: No such file or directory

Will see if I can reproduce in QEMU.

Altering the -dynamic-linker in the response file to /lib/ld-linux-aarch64.so.1

qemu-aarch64 -L /work/gcca64/aarch64-linux-gnu/libc ./bin
./bin: Invalid argument

when I remove -znow

qemu-aarch64 -L /work/gcca64/aarch64-linux-gnu/libc ./bin
  ./bin: error while loading shared libraries: libclang_rt.hwasan-aarch64-android.so: cannot open shared object file: No such file or directory

From what I can tell the linux kernel doesn't do anything with the DF_BIND_NOW flag, but that does add 2 dynamic tags (32 bytes) to the image. If I hex edit both the flag values to 0 I still get the same error from the kernel.

[peter.smith]

I think I know what is causing the kernel to fault the ELF file

The specific problem is the PT_LOAD before the PT_DYNAMIC, the p_vaddr is not congruent to the p_offset modulo p_align. It should be 0x19A0. If I hex edit the binary to make this the case I can get the ELF file to run. I think that this misalignment might be caused because p_filesz is 0, which might skip the alignment of the p_offset (not checked). When -znow is removed the ordering of some sections changes and there is no PT_LOAD with 0 p_filesz so everything gets aligned.

ProgramHeader {
  Type: PT_LOAD (0x1)
  Offset: 0x16B0
  VirtualAddress: 0x36B0
  PhysicalAddress: 0x36B0
  FileSize: 744
  MemSize: 744
  Flags [ (0x6)
    PF_R (0x4)
    PF_W (0x2)
  ]
  Alignment: 4096
}
ProgramHeader {
  Type: PT_LOAD (0x1)
  Offset: 0x1998
  VirtualAddress: 0x49A0
  PhysicalAddress: 0x49A0
  FileSize: 0
  MemSize: 65552
  Flags [ (0x6)
    PF_R (0x4)
    PF_W (0x2)
  ]
  Alignment: 4096
}
ProgramHeader {
  Type: PT_DYNAMIC (0x2)
  Offset: 0x16E8
  VirtualAddress: 0x36E8
  PhysicalAddress: 0x36E8
  FileSize: 480
  MemSize: 480
  Flags [ (0x6)
    PF_R (0x4)
    PF_W (0x2)
  ]
  Alignment: 8
}

@MaskRay are you ok to take it from here?

[MaskRay]

In D64930#1642854, @peter.smith wrote:

I think I know what is causing the kernel to fault the ELF file

I think that this misalignment might be caused because p_filesz is 0, which might skip the alignment of the p_offset (not checked).

@MaskRay are you ok to take it from here?

Thanks a lot for narrowing down the issue! I saw a similar issue while playing with lld ppc32. (ppc32 BSS PLT is a nobits RWX section, included in a separate PT_LOAD. Our current computeFileOffset can cause p_vaddr%p_align!=p_offset%p_align) I will work on a patch.

[MaskRay]

In D64930#1642873, @MaskRay wrote:

In D64930#1642854, @peter.smith wrote:

I think I know what is causing the kernel to fault the ELF file

I think that this misalignment might be caused because p_filesz is 0, which might skip the alignment of the p_offset (not checked).

@MaskRay are you ok to take it from here?

Thanks a lot for narrowing down the issue! I saw a similar issue while playing with lld ppc32. (ppc32 BSS PLT is a nobits RWX section, included in a separate PT_LOAD. Our current computeFileOffset can cause p_vaddr%p_align!=p_offset%p_align) I will work on a patch.

@pcc @peter.smith D66658 should fix the issue.

Edit: fixed.

ELF/InputSection.cpp

if (&s == ElfSym::tlsModuleBase)
     return 0;
 
   elf::PhdrEntry *tls = Out::tlsPhdr;
   switch (config->emachine) {
   case EM_ARM:
   case EM_AARCH64:
     // Variant 1. The thread pointer points to a TCB with a fixed 2-word size,
     // followed by a variable amount of alignment padding, followed by the TLS
     // segment.
-    return s.getVA(0) + alignTo(config->wordsize * 2, Out::tlsPhdr->p_align);
+    // The start of PT_TLS (p_vaddr) has TP offset (2*wordize +
+    // (p_vaddr-2*wordsize & p_align-1)).
+    return s.getVA(0) + config->wordsize * 2 +
+           (tls->p_vaddr - config->wordsize * 2 & tls->p_align - 1);
   case EM_386:
   case EM_X86_64:
     // Variant 2. The end of PT_TLS (p_vaddr+p_memsz) rounded up to p_align has
     // TP offset 0.
     return s.getVA(0) - tls->p_memsz -
            (-tls->p_vaddr - tls->p_memsz & tls->p_align - 1);
   case EM_PPC:
   case EM_PPC64:

ELF/Writer.cpp

if (cmd && !cmd->addrExpr) {
       // padding in the file contents.
       //
       // When -z separate-code is used we must not have any overlap in pages
       // between an executable segment and a non-executable segment. We align to
       // the next maximum page size boundary on transitions between executable
       // and non-executable segments.
       //
       // TODO Enable this technique on all targets.
-      bool enable = config->emachine == EM_PPC64;
+      bool enable =
+          config->emachine == EM_AARCH64 || config->emachine == EM_PPC64;
 
       if (!enable || (config->zSeparateCode && prev &&
                       (prev->p_flags & PF_X) != (p->p_flags & PF_X)))
         cmd->addrExpr = [] {
           return alignTo(script->getDot(), config->maxPageSize);
         };
       else
         cmd->addrExpr = [] {

test/ELF/aarch64-abs16.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs255.s -o %t255.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs256.s -o %t256.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs257.s -o %t257.o
 
 .globl _start
 _start:
 .data
   .hword foo + 0xfeff
   .hword foo - 0x8100
 
 // RUN: ld.lld %t.o %t256.o -o %t2
 // RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
 
 // CHECK: Contents of section .data:
-// 210000: S = 0x100, A = 0xfeff
+// 220158: S = 0x100, A = 0xfeff
 //         S + A = 0xffff
-// 210002: S = 0x100, A = -0x8100
+// 22015c: S = 0x100, A = -0x8100
 //         S + A = 0x8000
-// CHECK-NEXT: 210000 ffff0080
+// CHECK-NEXT: 220158 ffff0080
 
 // RUN: not ld.lld %t.o %t255.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
 // OVERFLOW1: relocation R_AARCH64_ABS16 out of range: -32769 is not in [-32768, 65535]
 
 // RUN: not ld.lld %t.o %t257.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
 // OVERFLOW2: relocation R_AARCH64_ABS16 out of range: 65536 is not in [-32768, 65535]

test/ELF/aarch64-abs32.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs255.s -o %t255.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs256.s -o %t256.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs257.s -o %t257.o
 
 .globl _start
 _start:
 .data
   .word foo + 0xfffffeff
   .word foo - 0x80000100
 
 // RUN: ld.lld %t.o %t256.o -o %t2
 // RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
 
 // CHECK: Contents of section .data:
-// 210000: S = 0x100, A = 0xfffffeff
+// 220158: S = 0x100, A = 0xfffffeff
 //         S + A = 0xffffffff
-// 210004: S = 0x100, A = -0x80000100
+// 22015c: S = 0x100, A = -0x80000100
 //         S + A = 0x80000000
-// CHECK-NEXT: 210000 ffffffff 00000080
+// CHECK-NEXT: 220158 ffffffff 00000080
 
 // RUN: not ld.lld %t.o %t255.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
 // OVERFLOW1: relocation R_AARCH64_ABS32 out of range: -2147483649 is not in [-2147483648, 4294967295]
 
 // RUN: not ld.lld %t.o %t257.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
 // OVERFLOW2: relocation R_AARCH64_ABS32 out of range: 4294967296 is not in [-2147483648, 4294967295]

test/ELF/aarch64-call26-thunk.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-freebsd %S/Inputs/abs.s -o %tabs
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-freebsd %s -o %t
 // RUN: ld.lld %t %tabs -o %t2 2>&1
 // RUN: llvm-objdump -d -triple=aarch64-pc-freebsd %t2 | FileCheck %s
 
 .text
 .globl _start
 _start:
     bl big
 
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: _start:
-// CHECK-NEXT:    210000:        02 00 00 94     bl      #8
+// CHECK-NEXT:    210120:        02 00 00 94     bl      #8
 // CHECK: __AArch64AbsLongThunk_big:
-// CHECK-NEXT:    210008:        50 00 00 58     ldr     x16, #8
-// CHECK-NEXT:    21000c:        00 02 1f d6     br      x16
+// CHECK-NEXT:    210128:        50 00 00 58     ldr     x16, #8
+// CHECK-NEXT:    21012c:        00 02 1f d6     br      x16
 // CHECK: $d:
-// CHECK-NEXT:    210010:        00 00 00 00     .word   0x00000000
-// CHECK-NEXT:    210014:        10 00 00 00     .word   0x00000010
+// CHECK-NEXT:    210130:        00 00 00 00     .word   0x00000000
+// CHECK-NEXT:    210134:        10 00 00 00     .word   0x00000010
 

test/ELF/aarch64-condb-reloc.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/aarch64-condb-reloc.s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t2.o
 # RUN: ld.lld %t1.o %t2.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: ld.lld -shared %t1.o %t2.o -o %t.so
 # RUN: llvm-objdump -d --no-show-raw-insn %t.so | FileCheck -check-prefix=DSO %s
 # RUN: llvm-readobj -S -r %t.so | FileCheck -check-prefix=DSOREL %s
 
 # 0x11024 - 36 = 0x11000
 # 0x11028 - 24 = 0x11010
 # 0x1102c - 16 = 0x1101c
 # CHECK:      Disassembly of section .text:
 # CHECK-EMPTY:
 # CHECK-NEXT: _foo:
-# CHECK-NEXT:    210000: nop
-# CHECK-NEXT:    210004: nop
-# CHECK-NEXT:    210008: nop
-# CHECK-NEXT:    21000c: nop
+# CHECK-NEXT:    210120: nop
+# CHECK-NEXT:    210124: nop
+# CHECK-NEXT:    210128: nop
+# CHECK-NEXT:    21012c: nop
 # CHECK:      _bar:
-# CHECK-NEXT:    210010: nop
-# CHECK-NEXT:    210014: nop
-# CHECK-NEXT:    210018: nop
+# CHECK-NEXT:    210130: nop
+# CHECK-NEXT:    210134: nop
+# CHECK-NEXT:    210138: nop
 # CHECK:      _dah:
-# CHECK-NEXT:    21001c: nop
-# CHECK-NEXT:    210020: nop
+# CHECK-NEXT:    21013c: nop
+# CHECK-NEXT:    210140: nop
 # CHECK:      _start:
-# CHECK-NEXT:    210024: b.eq #-36 <_foo>
-# CHECK-NEXT:    210028: b.eq #-24 <_bar>
-# CHECK-NEXT:    21002c: b.eq #-16 <_dah>
+# CHECK-NEXT:    210144: b.eq #-36 <_foo>
+# CHECK-NEXT:    210148: b.eq #-24 <_bar>
+# CHECK-NEXT:    21014c: b.eq #-16 <_dah>
 
 #DSOREL:      Section {
 #DSOREL:        Index:
 #DSOREL:        Name: .got.plt
 #DSOREL-NEXT:   Type: SHT_PROGBITS
 #DSOREL-NEXT:   Flags [
 #DSOREL-NEXT:     SHF_ALLOC
 #DSOREL-NEXT:     SHF_WRITE
 #DSOREL-NEXT:   ]
-#DSOREL-NEXT:   Address: 0x30000
-#DSOREL-NEXT:   Offset: 0x30000
+#DSOREL-NEXT:   Address: 0x30470
+#DSOREL-NEXT:   Offset: 0x470
 #DSOREL-NEXT:   Size: 48
 #DSOREL-NEXT:   Link: 0
 #DSOREL-NEXT:   Info: 0
 #DSOREL-NEXT:   AddressAlignment: 8
 #DSOREL-NEXT:   EntrySize: 0
 #DSOREL-NEXT:  }
 #DSOREL:      Relocations [
 #DSOREL-NEXT:  Section ({{.*}}) .rela.plt {
-#DSOREL-NEXT:    0x30018 R_AARCH64_JUMP_SLOT _foo
-#DSOREL-NEXT:    0x30020 R_AARCH64_JUMP_SLOT _bar
-#DSOREL-NEXT:    0x30028 R_AARCH64_JUMP_SLOT _dah
+#DSOREL-NEXT:    0x30488 R_AARCH64_JUMP_SLOT _foo
+#DSOREL-NEXT:    0x30490 R_AARCH64_JUMP_SLOT _bar
+#DSOREL-NEXT:    0x30498 R_AARCH64_JUMP_SLOT _dah
 #DSOREL-NEXT:  }
 #DSOREL-NEXT:]
 
 #DSO:      Disassembly of section .text:
 #DSO-EMPTY:
 #DSO-NEXT: _foo:
-#DSO-NEXT:     10000: nop
-#DSO-NEXT:     10004: nop
-#DSO-NEXT:     10008: nop
-#DSO-NEXT:     1000c: nop
+#DSO-NEXT:     10338: nop
+#DSO-NEXT:     1033c: nop
+#DSO-NEXT:     10340: nop
+#DSO-NEXT:     10344: nop
 #DSO:      _bar:
-#DSO-NEXT:     10010: nop
-#DSO-NEXT:     10014: nop
-#DSO-NEXT:     10018: nop
+#DSO-NEXT:     10348: nop
+#DSO-NEXT:     1034c: nop
+#DSO-NEXT:     10350: nop
 #DSO:      _dah:
-#DSO-NEXT:     1001c: nop
-#DSO-NEXT:     10020: nop
+#DSO-NEXT:     10354: nop
+#DSO-NEXT:     10358: nop
 #DSO:      _start:
-#DSO-NEXT:     10024: b.eq #44 <_foo@plt>
-#DSO-NEXT:     10028: b.eq #56 <_bar@plt>
-#DSO-NEXT:     1002c: b.eq #68 <_dah@plt>
+#DSO-NEXT:     1035c: b.eq #52 <_foo@plt>
+#DSO-NEXT:     10360: b.eq #64 <_bar@plt>
+#DSO-NEXT:     10364: b.eq #76 <_dah@plt>
 #DSO-EMPTY:
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-EMPTY:
 #DSO-NEXT: .plt:
-#DSO-NEXT:     10030: stp x16, x30, [sp, #-16]!
-#DSO-NEXT:     10034: adrp x16, #131072
-#DSO-NEXT:     10038: ldr x17, [x16, #16]
-#DSO-NEXT:     1003c: add x16, x16, #16
-#DSO-NEXT:     10040: br x17
-#DSO-NEXT:     10044: nop
-#DSO-NEXT:     10048: nop
-#DSO-NEXT:     1004c: nop
+#DSO-NEXT:     10370: stp x16, x30, [sp, #-16]!
+#DSO-NEXT:     10374: adrp x16, #131072
+#DSO-NEXT:     10378: ldr x17, [x16, #1152]
+#DSO-NEXT:     1037c: add x16, x16, #1152
+#DSO-NEXT:     10380: br x17
+#DSO-NEXT:     10384: nop
+#DSO-NEXT:     10388: nop
+#DSO-NEXT:     1038c: nop
 #DSO-EMPTY:
 #DSO-NEXT:   _foo@plt:
-#DSO-NEXT:     10050: adrp x16, #131072
-#DSO-NEXT:     10054: ldr x17, [x16, #24]
-#DSO-NEXT:     10058: add x16, x16, #24
-#DSO-NEXT:     1005c: br x17
+#DSO-NEXT:     10390: adrp x16, #131072
+#DSO-NEXT:     10394: ldr x17, [x16, #1160]
+#DSO-NEXT:     10398: add x16, x16, #1160
+#DSO-NEXT:     1039c: br x17
 #DSO-EMPTY:
 #DSO-NEXT:   _bar@plt:
-#DSO-NEXT:     10060: adrp x16, #131072
-#DSO-NEXT:     10064: ldr x17, [x16, #32]
-#DSO-NEXT:     10068: add x16, x16, #32
-#DSO-NEXT:     1006c: br x17
+#DSO-NEXT:     103a0: adrp x16, #131072
+#DSO-NEXT:     103a4: ldr x17, [x16, #1168]
+#DSO-NEXT:     103a8: add x16, x16, #1168
+#DSO-NEXT:     103ac: br x17
 #DSO-EMPTY:
 #DSO-NEXT:   _dah@plt:
-#DSO-NEXT:     10070: adrp x16, #131072
-#DSO-NEXT:     10074: ldr x17, [x16, #40]
-#DSO-NEXT:     10078: add x16, x16, #40
-#DSO-NEXT:     1007c: br x17
+#DSO-NEXT:     103b0: adrp x16, #131072
+#DSO-NEXT:     103b4: ldr x17, [x16, #1176]
+#DSO-NEXT:     103b8: add x16, x16, #1176
+#DSO-NEXT:     103bc: br x17
 
 .globl _start
 _start:
  b.eq _foo
  b.eq _bar
  b.eq _dah

test/ELF/aarch64-copy.s

.rodata
     .word z
 
 // CHECK:     Name: .bss
 // CHECK-NEXT:     Type: SHT_NOBITS
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:       SHF_ALLOC
 // CHECK-NEXT:       SHF_WRITE
 // CHECK-NEXT:     ]
-// CHECK-NEXT:     Address: 0x230000
+// CHECK-NEXT:     Address: 0x2303F0
 // CHECK-NEXT:     Offset:
 // CHECK-NEXT:     Size: 24
 // CHECK-NEXT:     Link:
 // CHECK-NEXT:     Info:
 // CHECK-NEXT:     AddressAlignment: 16
 
 // CHECK: Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.dyn {
-// CHECK-NEXT:     0x230000 R_AARCH64_COPY x 0x0
-// CHECK-NEXT:     0x230010 R_AARCH64_COPY y 0x0
-// CHECK-NEXT:     0x230014 R_AARCH64_COPY z 0x0
+// CHECK-NEXT:     0x2303F0 R_AARCH64_COPY x 0x0
+// CHECK-NEXT:     0x230400 R_AARCH64_COPY y 0x0
+// CHECK-NEXT:     0x230404 R_AARCH64_COPY z 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // CHECK: Symbols [
 // CHECK:     Name: x
-// CHECK-NEXT:     Value: 0x230000
+// CHECK-NEXT:     Value: 0x2303F0
 // CHECK-NEXT:     Size: 4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other:
 // CHECK-NEXT:     Section: .bss
 // CHECK:     Name: y
-// CHECK-NEXT:     Value: 0x230010
+// CHECK-NEXT:     Value: 0x230400
 // CHECK-NEXT:     Size: 4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other:
 // CHECK-NEXT:     Section: .bss
 // CHECK:     Name: z
-// CHECK-NEXT:     Value: 0x230014
+// CHECK-NEXT:     Value: 0x230404
 // CHECK-NEXT:     Size: 4
 // CHECK-NEXT:     Binding: Global
 // CHECK-NEXT:     Type: Object
 // CHECK-NEXT:     Other:
 // CHECK-NEXT:     Section: .bss
 // CHECK: ]
 
 // CODE: Disassembly of section .text:
 // CODE-EMPTY:
 // CODE-NEXT: _start:
-// S(x) = 0x230000, A = 0, P = 0x210000
-// S + A - P = 0x20000 = 131072
-// CODE-NEXT:  210000: adr  x1, #131072
-// S(y) = 0x230010, A = 0, P = 0x210004
-// Page(S + A) - Page(P) = 0x230000 - 0x210000 = 0x20000 = 131072
-// CODE-NEXT:  210004: adrp x2, #131072
-// S(y) = 0x230010, A = 0
-// (S + A) & 0xFFF = 0x10 = 16
-// CODE-NEXT:  210008: add  x2, x2, #16
+// S + A - P = 0x2303f0 + 0 - 0x21031c = 131284
+// CODE-NEXT:  21031c: adr  x1, #131284
+// Page(S + A) - Page(P) = Page(0x230400) - Page(0x210320) = 131072
+// CODE-NEXT:  210320: adrp x2, #131072
+// (S + A) & 0xFFF = (0x230400 + 0) & 0xFFF = 1024
+// CODE-NEXT:  210324: add  x2, x2, #1024
 
 // RODATA: Contents of section .rodata:
-// S(z) = 0x230014
-// RODATA-NEXT:  200318 14002300
+// S(z) = 0x230404
+// RODATA-NEXT:  200318 04042300

test/ELF/aarch64-cortex-a53-843419-large.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
-// RUN: ld.lld --fix-cortex-a53-843419 %t.o -o %t2
+// RUN: ld.lld --fix-cortex-a53-843419 -z separate-code %t.o -o %t2
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=2162688   -stop-address=2162700   | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=2166784   -stop-address=2166788   | FileCheck --check-prefix=CHECK2 %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=2170872   -stop-address=2170888   | FileCheck --check-prefix=CHECK3 %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=69287928  -stop-address=69287944  | FileCheck --check-prefix=CHECK4 %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=102842376 -stop-address=102842392 | FileCheck --check-prefix=CHECK5 %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=136384524 -stop-address=136384528 | FileCheck --check-prefix=CHECK6 %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=136388604 -stop-address=136388628 | FileCheck --check-prefix=CHECK7 %s
 // Test case for Cortex-A53 Erratum 843419 in an OutputSection exceeding

test/ELF/aarch64-cortex-a53-843419-recognize.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
-// RUN: ld.lld -fix-cortex-a53-843419 -verbose %t.o -o %t2 2>&1 | FileCheck -check-prefix CHECK-PRINT %s
+// RUN: ld.lld -fix-cortex-a53-843419 -z separate-code -verbose %t.o -o %t2 2>&1 | FileCheck -check-prefix CHECK-PRINT %s
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 | FileCheck %s -check-prefixes=CHECK,CHECK-FIX
-// RUN: ld.lld %t.o -o %t3
+// RUN: ld.lld %t.o -z separate-code -o %t3
 // RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t3 | FileCheck %s -check-prefixes=CHECK,CHECK-NOFIX
 // Test cases for Cortex-A53 Erratum 843419
 // See ARM-EPM-048406 Cortex_A53_MPCore_Software_Developers_Errata_Notice.pdf
 // for full erratum details.
 // In Summary
 // 1.)
 // ADRP (0xff8 or 0xffc).
 // 2.)
t3_ffc_ldrpost:
         ldr x3, [x0, :got_lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 217FF8 in unpatched output.
 // CHECK: t3_ff8_strpre:
 // CHECK-NEXT:    217ff8:        40 02 00 b0     adrp    x0, #299008
 // CHECK-NEXT:    217ffc:        21 8c 00 bc     str     s1, [x1, #8]!
 // CHECK-FIX:     218000:        09 b0 00 14     b       #180260
-// CHECK-NOFIX:   218000:        02 00 40 f9     ldr             x2, [x0]
+// CHECK-NOFIX:   218000:        02 0c 40 f9     ldr     x2, [x0, #24]
 // CHECK-NEXT:    218004:        c0 03 5f d6     ret
         .section .text.04, "ax", %progbits
         .balign 4096
         .globl t3_ff8_strpre
         .type t3_ff8_strpre, %function
         .space 4096 - 8
 t3_ff8_strpre:
         adrp x0, dat1
         str s1, [x1, #8]!
         ldr x2, [x0, :lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 219FFC in unpatched output.
 // CHECK: t3_ffc_str:
 // CHECK-NEXT:    219ffc:        3c 02 00 f0     adrp    x28, #290816
 // CHECK-NEXT:    21a000:        42 00 00 f9     str             x2, [x2]
 // CHECK-FIX:     21a004:        0a a8 00 14     b       #172072
-// CHECK-NOFIX:   21a004:        9c 07 00 f9     str     x28, [x28, #8]
+// CHECK-NOFIX:   21a004:        9c 13 00 f9     str     x28, [x28, #32]
 // CHECK-NEXT:    21a008:        c0 03 5f d6     ret
         .section .text.05, "ax", %progbits
         .balign 4096
         .globl t3_ffc_str
         .type t3_ffc_str, %function
         .space 4096 - 4
 t3_ffc_str:
         adrp x28, dat2
         str x2, [x2, #0]
         str x28, [x28, :lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21BFFC in unpatched output.
 // CHECK: t3_ffc_strsimd:
 // CHECK-NEXT:    21bffc:        3c 02 00 b0     adrp    x28, #282624
 // CHECK-NEXT:    21c000:        44 00 00 b9     str             w4, [x2]
 // CHECK-FIX:     21c004:        0c a0 00 14     b       #163888
-// CHECK-NOFIX:   21c004:        84 0b 00 f9     str     x4, [x28, #16]
+// CHECK-NOFIX:   21c004:        84 17 00 f9     str     x4, [x28, #40]
 // CHECK-NEXT:    21c008:        c0 03 5f d6     ret
         .section .text.06, "ax", %progbits
         .balign 4096
         .globl t3_ffc_strsimd
         .type t3_ffc_strsimd, %function
         .space 4096 - 4
 t3_ffc_strsimd:
         adrp x28, dat3
t3_ffc_sturh:
         ldr x1, [x18, :got_lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 223FF8 in unpatched output.
 // CHECK: t3_ff8_literal:
 // CHECK-NEXT:    223ff8:        f2 01 00 b0     adrp    x18, #249856
 // CHECK-NEXT:    223ffc:        e3 ff ff 58     ldr     x3, #-4
 // CHECK-FIX:     224000:        15 80 00 14     b       #131156
-// CHECK-NOFIX:   224000:        52 02 40 f9     ldr             x18, [x18]
+// CHECK-NOFIX:   224000:        52 0e 40 f9     ldr     x18, [x18, #24]
 // CHECK-NEXT:    224004:        c0 03 5f d6     ret
         .section .text.10, "ax", %progbits
         .balign 4096
         .globl t3_ff8_literal
         .type t3_ff8_literal, %function
         .space 4096 - 8
 t3_ff8_literal:
         adrp x18, dat1
         ldr x3, t3_ff8_literal
         ldr x18, [x18, :lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 225FFC in unpatched output.
 // CHECK: t3_ffc_register:
 // CHECK-NEXT:    225ffc:        cf 01 00 f0     adrp    x15, #241664
 // CHECK-NEXT:    226000:        43 68 61 f8     ldr             x3, [x2, x1]
 // CHECK-FIX:     226004:        16 78 00 14     b       #122968
-// CHECK-NOFIX:   226004:        ea 05 40 f9     ldr     x10, [x15, #8]
+// CHECK-NOFIX:   226004:        ea 11 40 f9     ldr     x10, [x15, #32]
 // CHECK-NEXT:    226008:        c0 03 5f d6     ret
         .section .text.11, "ax", %progbits
         .balign 4096
         .globl t3_ffc_register
         .type t3_ffc_register, %function
         .space 4096 - 4
 t3_ffc_register:
         adrp x15, dat2
         ldr x3, [x2, x1]
         ldr x10, [x15, :lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 227FF8 in unpatched output.
 // CHECK: t3_ff8_stp:
 // CHECK-NEXT:    227ff8:        d0 01 00 b0     adrp    x16, #233472
 // CHECK-NEXT:    227ffc:        61 08 00 a9     stp             x1, x2, [x3]
 // CHECK-FIX:     228000:        19 70 00 14     b       #114788
-// CHECK-NOFIX:   228000:        0d 0a 40 f9     ldr     x13, [x16, #16]
+// CHECK-NOFIX:   228000:        0d 16 40 f9     ldr     x13, [x16, #40]
 // CHECK-NEXT:    228004:        c0 03 5f d6     ret
         .section .text.12, "ax", %progbits
         .balign 4096
         .globl t3_ff8_stp
         .type t3_ff8_stp, %function
         .space 4096 - 8
 t3_ff8_stp:
         adrp x16, dat3
         stp x1,x2, [x3, #0]
         ldr x13, [x16, :lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 229FFC in unpatched output.
 // CHECK: t3_ffc_stnp:
 // CHECK-NEXT:    229ffc:        a7 01 00 f0     adrp    x7, #225280
 // CHECK-NEXT:    22a000:        61 08 00 a8     stnp            x1, x2, [x3]
 // CHECK-FIX:     22a004:        1a 68 00 14     b       #106600
-// CHECK-NOFIX:   22a004:        e9 00 40 f9     ldr             x9, [x7]
+// CHECK-NOFIX:   22a004:        e9 0c 40 f9     ldr             x9, [x7, #24]
 // CHECK-NEXT:    22a008:        c0 03 5f d6     ret
         .section .text.13, "ax", %progbits
         .balign 4096
         .globl t3_ffc_stnp
         .type t3_ffc_stnp, %function
         .space 4096 - 4
 t3_ffc_stnp:
         adrp x7, dat1
         stnp x1,x2, [x3, #0]
         ldr x9, [x7, :lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22BFFC in unpatched output.
 // CHECK: t3_ffc_st1singlepost:
 // CHECK-NEXT:    22bffc:        b7 01 00 b0     adrp    x23, #217088
 // CHECK-NEXT:    22c000:        20 04 82 0d     st1 { v0.b }[1], [x1], x2
 // CHECK-FIX:     22c004:        1c 60 00 14     b       #98416
-// CHECK-NOFIX:   22c004:        f6 06 40 f9     ldr     x22, [x23, #8]
+// CHECK-NOFIX:   22c004:        f6 12 40 f9     ldr     x22, [x23, #32]
 // CHECK-NEXT:    22c008:        c0 03 5f d6     ret
         .section .text.14, "ax", %progbits
         .balign 4096
         .globl t3_ffc_st1singlepost
         .type t3_ffc_st1singlepost, %function
         .space 4096 - 4
 t3_ffc_st1singlepost:
         adrp x23, dat2
         st1 { v0.b }[1], [x1], x2
         ldr x22, [x23, :lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22DFF8 in unpatched output.
 // CHECK: t3_ff8_st1multiple:
 // CHECK-NEXT:    22dff8:        97 01 00 f0     adrp    x23, #208896
 // CHECK-NEXT:    22dffc:        20 a0 00 4c     st1     { v0.16b, v1.16b }, [x1]
 // CHECK-FIX:     22e000:        1f 58 00 14     b       #90236
-// CHECK-NOFIX:   22e000:        f8 0a 40 f9     ldr     x24, [x23, #16]
+// CHECK-NOFIX:   22e000:        f8 16 40 f9     ldr     x24, [x23, #40]
 // CHECK-NEXT:    22e004:        c0 03 5f d6     ret
         .section .text.15, "ax", %progbits
         .balign 4096
         .globl t3_ff8_st1multiple
         .type t3_ff8_st1muliple, %function
         .space 4096 - 8
 t3_ff8_st1multiple:
         adrp x23, dat3

 // CHECK-FIX-NEXT:    244010:    fd 37 ff 17     b       #-204812
 // CHECK-FIX: __CortexA53843419_214000:
 // CHECK-FIX-NEXT:    244014:    02 04 40 f9     ldr     x2, [x0, #8]
 // CHECK-FIX-NEXT:    244018:    fb 3f ff 17     b       #-196628
 // CHECK-FIX: __CortexA53843419_216004:
 // CHECK-FIX-NEXT:    24401c:    03 08 40 f9     ldr     x3, [x0, #16]
 // CHECK-FIX-NEXT:    244020:    fa 47 ff 17     b       #-188440
 // CHECK-FIX: __CortexA53843419_218000:
-// CHECK-FIX-NEXT:    244024:    02 00 40 f9     ldr     x2, [x0]
+// CHECK-FIX-NEXT:    244024:    02 0c 40 f9     ldr     x2, [x0, #24]
 // CHECK-FIX-NEXT:    244028:    f7 4f ff 17     b       #-180260
 // CHECK-FIX: __CortexA53843419_21A004:
-// CHECK-FIX-NEXT:    24402c:    9c 07 00 f9     str     x28, [x28, #8]
+// CHECK-FIX-NEXT:    24402c:    9c 13 00 f9     str     x28, [x28, #32]
 // CHECK-FIX-NEXT:    244030:    f6 57 ff 17     b       #-172072
 // CHECK-FIX: __CortexA53843419_21C004:
-// CHECK-FIX-NEXT:    244034:    84 0b 00 f9     str     x4, [x28, #16]
+// CHECK-FIX-NEXT:    244034:    84 17 00 f9     str     x4, [x28, #40]
 // CHECK-FIX-NEXT:    244038:    f4 5f ff 17     b       #-163888
 // CHECK-FIX: __CortexA53843419_21E000:
 // CHECK-FIX-NEXT:    24403c:    bd 03 40 f9     ldr     x29, [x29]
 // CHECK-FIX-NEXT:    244040:    f1 67 ff 17     b       #-155708
 // CHECK-FIX: __CortexA53843419_220004:
 // CHECK-FIX-NEXT:    244044:    bd 07 40 f9     ldr     x29, [x29, #8]
 // CHECK-FIX-NEXT:    244048:    f0 6f ff 17     b       #-147520
 // CHECK-FIX: __CortexA53843419_222004:
 // CHECK-FIX-NEXT:    24404c:    41 0a 40 f9     ldr     x1, [x18, #16]
 // CHECK-FIX-NEXT:    244050:    ee 77 ff 17     b       #-139336
 // CHECK-FIX: __CortexA53843419_224000:
-// CHECK-FIX-NEXT:    244054:    52 02 40 f9     ldr     x18, [x18]
+// CHECK-FIX-NEXT:    244054:    52 0e 40 f9     ldr     x18, [x18, #24]
 // CHECK-FIX-NEXT:    244058:    eb 7f ff 17     b       #-131156
 // CHECK-FIX: __CortexA53843419_226004:
-// CHECK-FIX-NEXT:    24405c:    ea 05 40 f9     ldr     x10, [x15, #8]
+// CHECK-FIX-NEXT:    24405c:    ea 11 40 f9     ldr     x10, [x15, #32]
 // CHECK-FIX-NEXT:    244060:    ea 87 ff 17     b       #-122968
 // CHECK-FIX: __CortexA53843419_228000:
-// CHECK-FIX-NEXT:    244064:    0d 0a 40 f9     ldr     x13, [x16, #16]
+// CHECK-FIX-NEXT:    244064:    0d 16 40 f9     ldr     x13, [x16, #40]
 // CHECK-FIX-NEXT:    244068:    e7 8f ff 17     b       #-114788
 // CHECK-FIX: __CortexA53843419_22A004:
-// CHECK-FIX-NEXT:    24406c:    e9 00 40 f9     ldr     x9, [x7]
+// CHECK-FIX-NEXT:    24406c:    e9 0c 40 f9     ldr     x9, [x7, #24]
 // CHECK-FIX-NEXT:    244070:    e6 97 ff 17     b       #-106600
 // CHECK-FIX: __CortexA53843419_22C004:
-// CHECK-FIX-NEXT:    244074:    f6 06 40 f9     ldr     x22, [x23, #8]
+// CHECK-FIX-NEXT:    244074:    f6 12 40 f9     ldr     x22, [x23, #32]
 // CHECK-FIX-NEXT:    244078:    e4 9f ff 17     b       #-98416
 // CHECK-FIX: __CortexA53843419_22E000:
-// CHECK-FIX-NEXT:    24407c:    f8 0a 40 f9     ldr     x24, [x23, #16]
+// CHECK-FIX-NEXT:    24407c:    f8 16 40 f9     ldr     x24, [x23, #40]
 // CHECK-FIX-NEXT:    244080:    e1 a7 ff 17     b       #-90236
 // CHECK-FIX: __CortexA53843419_230004:
 // CHECK-FIX-NEXT:    244084:    02 00 40 f9     ldr     x2, [x0]
 // CHECK-FIX-NEXT:    244088:    e0 af ff 17     b       #-82048
 // CHECK-FIX: __CortexA53843419_232008:
 // CHECK-FIX-NEXT:    24408c:    9b 07 00 f9     str     x27, [x28, #8]
 // CHECK-FIX-NEXT:    244090:    df b7 ff 17     b       #-73860
 // CHECK-FIX: __CortexA53843419_234004:

test/ELF/aarch64-cortex-a53-843419-tlsrelax.s

  mrs    x1, tpidr_el0
  adrp   x0, :gottprel:v
  ldr    x1, [x0, #:gottprel_lo12:v]
  adrp   x0, :gottprel:v
  ldr    x1, [x0, #:gottprel_lo12:v]
  ret
 
 // CHECK: _start:
-// CHECK-NEXT:   210ff8:        41 d0 3b d5     mrs     x1, TPIDR_EL0
-// CHECK-NEXT:   210ffc:        00 00 a0 d2     movz    x0, #0, lsl #16
-// CHECK-NEXT:   211000:        01 02 80 f2     movk    x1, #16
-// CHECK-NEXT:   211004:        00 00 a0 d2     movz    x0, #0, lsl #16
-// CHECK-NEXT:   211008:        01 02 80 f2     movk    x1, #16
-// CHECK-NEXT:   21100c:        c0 03 5f d6     ret
+// CHECK-NEXT:   211ff8:        41 d0 3b d5     mrs     x1, TPIDR_EL0
+// CHECK-NEXT:   211ffc:        00 00 a0 d2     movz    x0, #0, lsl #16
+// CHECK-NEXT:   212000:        01 02 80 f2     movk    x1, #16
+// CHECK-NEXT:   212004:        00 00 a0 d2     movz    x0, #0, lsl #16
+// CHECK-NEXT:   212008:        01 02 80 f2     movk    x1, #16
+// CHECK-NEXT:   21200c:        c0 03 5f d6     ret
 
  .type  v,@object
  .section       .tbss,"awT",@nobits
  .globl v
 v:
  .word 0

test/ELF/aarch64-data-relocs.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %s -o %t
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs256.s -o %t256.o
 // RUN: ld.lld %t %t256.o -o %t2
 // RUN: llvm-objdump -s %t2 | FileCheck %s
 
 .globl _start
 _start:
 .section .R_AARCH64_ABS64, "ax",@progbits
   .xword foo + 0x24
 
 // S = 0x100, A = 0x24
 // S + A = 0x124
 // CHECK: Contents of section .R_AARCH64_ABS64:
-// CHECK-NEXT: 210000 24010000 00000000
+// CHECK-NEXT: 210120 24010000 00000000
 
 .section .R_AARCH64_PREL64, "ax",@progbits
   .xword foo - . + 0x24
 
-// S = 0x100, A = 0x24, P = 0x20008
-// S + A - P = 0xfffffffffffe011c
+// S + A - P = 0x100 + 0x24 - 0x210128 = 0xffffffffffdefffc
 // CHECK: Contents of section .R_AARCH64_PREL64:
-// CHECK-NEXT: 210008 1c01dfff ffffffff
+// CHECK-NEXT: 210128 fcffdeff ffffffff

test/ELF/aarch64-feature-bti.s

 # RUN: ld.lld %tno.o %t3.o --shared -o %tno.so
 # RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tno.so | FileCheck --check-prefix=NOBTI %s
 # RUN: llvm-readelf -x .got.plt %tno.so | FileCheck --check-prefix SOGOTPLT %s
 # RUN: llvm-readelf --dynamic-table %tno.so | FileCheck --check-prefix NOBTIDYN %s
 
 # NOBTIDYN-NOT:   0x0000000070000001 (AARCH64_BTI_PLT)
 # NOBTIDYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
-# NOBTI: 0000000000010000 func2:
-# NOBTI-NEXT:    10000: bl      #48 <func3@plt>
-# NOBTI-NEXT:    10004: ret
+# NOBTI: 00000000000102b8 func2:
+# NOBTI-NEXT:    102b8: bl      #56 <func3@plt>
+# NOBTI-NEXT:    102bc: ret
 # NOBTI: Disassembly of section .plt:
-# NOBTI: 0000000000010010 .plt:
-# NOBTI-NEXT:    10010: stp     x16, x30, [sp, #-16]!
-# NOBTI-NEXT:    10014: adrp    x16, #131072
-# NOBTI-NEXT:    10018: ldr     x17, [x16, #16]
-# NOBTI-NEXT:    1001c: add     x16, x16, #16
-# NOBTI-NEXT:    10020: br      x17
-# NOBTI-NEXT:    10024: nop
-# NOBTI-NEXT:    10028: nop
-# NOBTI-NEXT:    1002c: nop
-# NOBTI: 0000000000010030 func3@plt:
-# NOBTI-NEXT:    10030: adrp    x16, #131072
-# NOBTI-NEXT:    10034: ldr     x17, [x16, #24]
-# NOBTI-NEXT:    10038: add     x16, x16, #24
-# NOBTI-NEXT:    1003c: br      x17
+# NOBTI: 00000000000102d0 .plt:
+# NOBTI-NEXT:    102d0: stp     x16, x30, [sp, #-16]!
+# NOBTI-NEXT:    102d4: adrp    x16, #131072
+# NOBTI-NEXT:    102d8: ldr     x17, [x16, #960]
+# NOBTI-NEXT:    102dc: add     x16, x16, #960
+# NOBTI-NEXT:    102e0: br      x17
+# NOBTI-NEXT:    102e4: nop
+# NOBTI-NEXT:    102e8: nop
+# NOBTI-NEXT:    102ec: nop
+# NOBTI: 00000000000102f0 func3@plt:
+# NOBTI-NEXT:    102f0: adrp    x16, #131072
+# NOBTI-NEXT:    102f4: ldr     x17, [x16, #968]
+# NOBTI-NEXT:    102f8: add     x16, x16, #968
+# NOBTI-NEXT:    102fc: br      x17
+
+## The .got.plt should be identical between the BTI and no BTI DSO PLT.
+# SOGOTPLT: Hex dump of section '.got.plt'
+# SOGOTPLT-NEXT:  0x000303b0 00000000 00000000 00000000 00000000
+# SOGOTPLT-NEXT:  0x000303c0 00000000 00000000 d0020100 00000000
 
 ## Expect a bti c at the start of plt[0], the plt entries do not need bti c as
 ## their address doesn't escape the shared object, so they can't be indirectly
 ## called. Expect no other difference.
 
-# RUN: ld.lld %t1.o %t3.o --shared -o %t.so
+# RUN: ld.lld %t1.o %t3.o --shared --soname=t.so -o %t.so
 # RUN: llvm-readelf -n %t.so | FileCheck --check-prefix BTIPROP %s
 # RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %t.so | FileCheck --check-prefix BTISO %s
-# RUN: llvm-readelf -x .got.plt %t.so | FileCheck --check-prefix SOGOTPLT %s
+# RUN: llvm-readelf -x .got.plt %t.so | FileCheck --check-prefix SOGOTPLT2 %s
 # RUN: llvm-readelf --dynamic-table %t.so | FileCheck --check-prefix BTIDYN %s
 
 # BTIPROP: Properties:    aarch64 feature: BTI
 
 # BTIDYN:      0x0000000070000001 (AARCH64_BTI_PLT)
 # BTIDYN-NOT:  0x0000000070000003 (AARCH64_PAC_PLT)
 
-# BTISO: 0000000000010000 func2:
-# BTISO-NEXT:    10000: bl      #48 <func3@plt>
-# BTISO-NEXT:    10004: ret
+# BTISO: 0000000000010310 func2:
+# BTISO-NEXT:    10310: bl      #48 <func3@plt>
+# BTISO-NEXT:    10314: ret
 # BTISO: Disassembly of section .plt:
-# BTISO: 0000000000010010 .plt:
-# BTISO-NEXT:    10010: bti     c
-# BTISO-NEXT:    10014: stp     x16, x30, [sp, #-16]!
-# BTISO-NEXT:    10018: adrp    x16, #131072
-# BTISO-NEXT:    1001c: ldr     x17, [x16, #16]
-# BTISO-NEXT:    10020: add     x16, x16, #16
-# BTISO-NEXT:    10024: br      x17
-# BTISO-NEXT:    10028: nop
-# BTISO-NEXT:    1002c: nop
-# BTISO: 0000000000010030 func3@plt:
-# BTISO-NEXT:    10030: adrp    x16, #131072
-# BTISO-NEXT:    10034: ldr     x17, [x16, #24]
-# BTISO-NEXT:    10038: add     x16, x16, #24
-# BTISO-NEXT:    1003c: br      x17
-
-## The .got.plt should be identical between the BTI and no BTI DSO PLT.
-# SOGOTPLT: Hex dump of section '.got.plt'
-# SOGOTPLT-NEXT:  0x00030000 00000000 00000000 00000000 00000000
-# SOGOTPLT-NEXT:  0x00030010 00000000 00000000 10000100 00000000
+# BTISO: 0000000000010320 .plt:
+# BTISO-NEXT:    10320: bti     c
+# BTISO-NEXT:    10324: stp     x16, x30, [sp, #-16]!
+# BTISO-NEXT:    10328: adrp    x16, #131072
+# BTISO-NEXT:    1032c: ldr     x17, [x16, #1072]
+# BTISO-NEXT:    10330: add     x16, x16, #1072
+# BTISO-NEXT:    10334: br      x17
+# BTISO-NEXT:    10338: nop
+# BTISO-NEXT:    1033c: nop
+# BTISO: 0000000000010340 func3@plt:
+# BTISO-NEXT:    10340: adrp    x16, #131072
+# BTISO-NEXT:    10344: ldr     x17, [x16, #1080]
+# BTISO-NEXT:    10348: add     x16, x16, #1080
+# BTISO-NEXT:    1034c: br      x17
+
+# SOGOTPLT2: Hex dump of section '.got.plt'
+# SOGOTPLT2-NEXT:  0x00030420 00000000 00000000 00000000 00000000
+# SOGOTPLT2-NEXT:  0x00030430 00000000 00000000 20030100 00000000
 
 ## Build an executable with all relocatable inputs having the BTI
 ## .note.gnu.property. We expect a bti c in front of all PLT entries as the
 ## address of a PLT entry can escape an executable.
 
-# RUN: ld.lld %t2.o --shared -o %t2.so
+# RUN: ld.lld %t2.o --shared --soname=t2.so -o %t2.so
 
 # RUN: ld.lld %t.o %t.so %t2.so -o %t.exe
 # RUN: llvm-readelf --dynamic-table -n %t.exe | FileCheck --check-prefix=BTIPROP %s
 # RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %t.exe | FileCheck --check-prefix=EXECBTI %s
 
 # EXECBTI: Disassembly of section .text:
-# EXECBTI: 0000000000210000 func1:
-# EXECBTI-NEXT:   210000: bl      #48 <func2@plt>
-# EXECBTI-NEXT:   210004: ret
+# EXECBTI: 0000000000210310 func1:
+# EXECBTI-NEXT:   210310: bl      #48 <func2@plt>
+# EXECBTI-NEXT:   210314: ret
 # EXECBTI: Disassembly of section .plt:
-# EXECBTI: 0000000000210010 .plt:
-# EXECBTI-NEXT:   210010: bti     c
-# EXECBTI-NEXT:   210014: stp     x16, x30, [sp, #-16]!
-# EXECBTI-NEXT:   210018: adrp    x16, #131072
-# EXECBTI-NEXT:   21001c: ldr     x17, [x16, #16]
-# EXECBTI-NEXT:   210020: add     x16, x16, #16
-# EXECBTI-NEXT:   210024: br      x17
-# EXECBTI-NEXT:   210028: nop
-# EXECBTI-NEXT:   21002c: nop
-# EXECBTI: 0000000000210030 func2@plt:
-# EXECBTI-NEXT:   210030: bti     c
-# EXECBTI-NEXT:   210034: adrp    x16, #131072
-# EXECBTI-NEXT:   210038: ldr     x17, [x16, #24]
-# EXECBTI-NEXT:   21003c: add     x16, x16, #24
-# EXECBTI-NEXT:   210040: br      x17
-# EXECBTI-NEXT:   210044: nop
+# EXECBTI: 0000000000210320 .plt:
+# EXECBTI-NEXT:   210320: bti     c
+# EXECBTI-NEXT:   210324: stp     x16, x30, [sp, #-16]!
+# EXECBTI-NEXT:   210328: adrp    x16, #131072
+# EXECBTI-NEXT:   21032c: ldr     x17, [x16, #1112]
+# EXECBTI-NEXT:   210330: add     x16, x16, #1112
+# EXECBTI-NEXT:   210334: br      x17
+# EXECBTI-NEXT:   210338: nop
+# EXECBTI-NEXT:   21033c: nop
+# EXECBTI: 0000000000210340 func2@plt:
+# EXECBTI-NEXT:   210340: bti     c
+# EXECBTI-NEXT:   210344: adrp    x16, #131072
+# EXECBTI-NEXT:   210348: ldr     x17, [x16, #1120]
+# EXECBTI-NEXT:   21034c: add     x16, x16, #1120
+# EXECBTI-NEXT:   210350: br      x17
+# EXECBTI-NEXT:   210354: nop
 
 ## We expect the same for PIE, as the address of an ifunc can escape
 # RUN: ld.lld --pie %t.o %t.so %t2.so -o %tpie.exe
 # RUN: llvm-readelf -n %tpie.exe | FileCheck --check-prefix=BTIPROP %s
 # RUN: llvm-readelf --dynamic-table -n %tpie.exe | FileCheck --check-prefix=BTIPROP %s
 # RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tpie.exe | FileCheck --check-prefix=PIE %s
 
 # PIE: Disassembly of section .text:
-# PIE: 0000000000010000 func1:
-# PIE-NEXT:    10000: bl      #48 <func2@plt>
-# PIE-NEXT:    10004: ret
+# PIE: 0000000000010310 func1:
+# PIE-NEXT:    10310: bl      #48 <func2@plt>
+# PIE-NEXT:    10314: ret
 # PIE: Disassembly of section .plt:
-# PIE: 0000000000010010 .plt:
-# PIE-NEXT:    10010: bti     c
-# PIE-NEXT:    10014: stp     x16, x30, [sp, #-16]!
-# PIE-NEXT:    10018: adrp    x16, #131072
-# PIE-NEXT:    1001c: ldr     x17, [x16, #16]
-# PIE-NEXT:    10020: add     x16, x16, #16
-# PIE-NEXT:    10024: br      x17
-# PIE-NEXT:    10028: nop
-# PIE-NEXT:    1002c: nop
-# PIE: 0000000000010030 func2@plt:
-# PIE-NEXT:    10030: bti     c
-# PIE-NEXT:    10034: adrp    x16, #131072
-# PIE-NEXT:    10038: ldr     x17, [x16, #24]
-# PIE-NEXT:    1003c: add     x16, x16, #24
-# PIE-NEXT:    10040: br      x17
-# PIE-NEXT:    10044: nop
+# PIE: 0000000000010320 .plt:
+# PIE-NEXT:    10320: bti     c
+# PIE-NEXT:    10324: stp     x16, x30, [sp, #-16]!
+# PIE-NEXT:    10328: adrp    x16, #131072
+# PIE-NEXT:    1032c: ldr     x17, [x16, #1112]
+# PIE-NEXT:    10330: add     x16, x16, #1112
+# PIE-NEXT:    10334: br      x17
+# PIE-NEXT:    10338: nop
+# PIE-NEXT:    1033c: nop
+# PIE: 0000000000010340 func2@plt:
+# PIE-NEXT:    10340: bti     c
+# PIE-NEXT:    10344: adrp    x16, #131072
+# PIE-NEXT:    10348: ldr     x17, [x16, #1120]
+# PIE-NEXT:    1034c: add     x16, x16, #1120
+# PIE-NEXT:    10350: br      x17
+# PIE-NEXT:    10354: nop
 
 ## Build and executable with not all relocatable inputs having the BTI
 ## .note.property, expect no bti c and no .note.gnu.property entry
 
 # RUN: ld.lld %t.o %t2.o %t.so -o %tnobti.exe
 # RUN: llvm-readelf --dynamic-table %tnobti.exe | FileCheck --check-prefix NOBTIDYN %s
 # RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tnobti.exe | FileCheck --check-prefix=NOEX %s
 
 # NOEX: Disassembly of section .text:
-# NOEX: 0000000000210000 func1:
-# NOEX-NEXT:   210000: bl      #48 <func2@plt>
-# NOEX-NEXT:   210004: ret
-# NOEX: 0000000000210008 func3:
-# NOEX-NEXT:   210008: ret
+# NOEX: 00000000002102e0 func1:
+# NOEX-NEXT:   2102e0: bl      #48 <func2@plt>
+# NOEX-NEXT:   2102e4: ret
+# NOEX: 00000000002102e8 func3:
+# NOEX-NEXT:   2102e8: ret
 # NOEX: Disassembly of section .plt:
-# NOEX: 0000000000210010 .plt:
-# NOEX-NEXT:   210010: stp     x16, x30, [sp, #-16]!
-# NOEX-NEXT:   210014: adrp    x16, #131072
-# NOEX-NEXT:   210018: ldr     x17, [x16, #16]
-# NOEX-NEXT:   21001c: add     x16, x16, #16
-# NOEX-NEXT:   210020: br      x17
-# NOEX-NEXT:   210024: nop
-# NOEX-NEXT:   210028: nop
-# NOEX-NEXT:   21002c: nop
-# NOEX: 0000000000210030 func2@plt:
-# NOEX-NEXT:   210030: adrp    x16, #131072
-# NOEX-NEXT:   210034: ldr     x17, [x16, #24]
-# NOEX-NEXT:   210038: add     x16, x16, #24
-# NOEX-NEXT:   21003c: br      x17
+# NOEX: 00000000002102f0 .plt:
+# NOEX-NEXT:   2102f0: stp     x16, x30, [sp, #-16]!
+# NOEX-NEXT:   2102f4: adrp    x16, #131072
+# NOEX-NEXT:   2102f8: ldr     x17, [x16, #1024]
+# NOEX-NEXT:   2102fc: add     x16, x16, #1024
+# NOEX-NEXT:   210300: br      x17
+# NOEX-NEXT:   210304: nop
+# NOEX-NEXT:   210308: nop
+# NOEX-NEXT:   21030c: nop
+# NOEX: 0000000000210310 func2@plt:
+# NOEX-NEXT:   210310: adrp    x16, #131072
+# NOEX-NEXT:   210314: ldr     x17, [x16, #1032]
+# NOEX-NEXT:   210318: add     x16, x16, #1032
+# NOEX-NEXT:   21031c: br      x17
 
 ## Force BTI entries with the --force-bti command line option. Expect a warning
 ## from the file without the .note.gnu.property.
 
 # RUN: ld.lld %t.o %t2.o --force-bti %t.so -o %tforcebti.exe 2>&1 | FileCheck --check-prefix=FORCE-WARN %s
 
 # FORCE-WARN: aarch64-feature-bti.s.tmp2.o: --force-bti: file does not have BTI property
 
 
 # RUN: llvm-readelf -n %tforcebti.exe | FileCheck --check-prefix=BTIPROP %s
 # RUN: llvm-readelf --dynamic-table %tforcebti.exe | FileCheck --check-prefix BTIDYN %s
 # RUN: llvm-objdump -d -mattr=+bti --no-show-raw-insn %tforcebti.exe | FileCheck --check-prefix=FORCE %s
 
 # FORCE: Disassembly of section .text:
-# FORCE: 0000000000210000 func1:
-# FORCE-NEXT:   210000: bl      #48 <func2@plt>
-# FORCE-NEXT:   210004: ret
-# FORCE: 0000000000210008 func3:
-# FORCE-NEXT:   210008: ret
+# FORCE: 0000000000210338 func1:
+# FORCE-NEXT:   210338: bl      #56 <func2@plt>
+# FORCE-NEXT:   21033c: ret
+# FORCE: 0000000000210340 func3:
+# FORCE-NEXT:   210340: ret
 # FORCE: Disassembly of section .plt:
-# FORCE: 0000000000210010 .plt:
-# FORCE-NEXT:   210010: bti     c
-# FORCE-NEXT:   210014: stp     x16, x30, [sp, #-16]!
-# FORCE-NEXT:   210018: adrp    x16, #131072
-# FORCE-NEXT:   21001c: ldr     x17, [x16, #16]
-# FORCE-NEXT:   210020: add     x16, x16, #16
-# FORCE-NEXT:   210024: br      x17
-# FORCE-NEXT:   210028: nop
-# FORCE-NEXT:   21002c: nop
-# FORCE: 0000000000210030 func2@plt:
-# FORCE-NEXT:   210030: bti     c
-# FORCE-NEXT:   210034: adrp    x16, #131072
-# FORCE-NEXT:   210038: ldr     x17, [x16, #24]
-# FORCE-NEXT:   21003c: add     x16, x16, #24
-# FORCE-NEXT:   210040: br      x17
-# FORCE-NEXT:   210044: nop
+# FORCE: 0000000000210350 .plt:
+# FORCE-NEXT:   210350: bti     c
+# FORCE-NEXT:   210354: stp     x16, x30, [sp, #-16]!
+# FORCE-NEXT:   210358: adrp    x16, #131072
+# FORCE-NEXT:   21035c: ldr     x17, [x16, #1144]
+# FORCE-NEXT:   210360: add     x16, x16, #1144
+# FORCE-NEXT:   210364: br      x17
+# FORCE-NEXT:   210368: nop
+# FORCE-NEXT:   21036c: nop
+# FORCE: 0000000000210370 func2@plt:
+# FORCE-NEXT:   210370: bti     c
+# FORCE-NEXT:   210374: adrp    x16, #131072
+# FORCE-NEXT:   210378: ldr     x17, [x16, #1152]
+# FORCE-NEXT:   21037c: add     x16, x16, #1152
+# FORCE-NEXT:   210380: br      x17
+# FORCE-NEXT:   210384: nop
 
 .section ".note.gnu.property", "a"
 .long 4
 .long 0x10
 .long 0x5
 .asciz "GNU"
 
 .long 0xc0000000 // GNU_PROPERTY_AARCH64_FEATURE_1_AND

test/ELF/aarch64-feature-btipac.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-btipac1.s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-func3.s -o %t3.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-func3-btipac.s -o %t3btipac.o
 
 ## Build shared library with all inputs having BTI and PAC, expect PLT
 ## entries supporting both PAC and BTI. For a shared library this means:
 ## PLT[0] has bti c at start
 ## PLT[n] has autia1716 before br x17
 
-# RUN: ld.lld %t1.o %t3btipac.o --shared -o %t.so
+# RUN: ld.lld %t1.o %t3btipac.o --shared --soname=t.so -o %t.so
 # RUN: llvm-readelf -n %t.so | FileCheck --check-prefix BTIPACPROP %s
 # RUN: llvm-objdump -d -mattr=+v8.5a --no-show-raw-insn %t.so | FileCheck --check-prefix BTIPACSO %s
 # RUN: llvm-readelf --dynamic-table %t.so | FileCheck --check-prefix BTIPACDYN %s
 
 # BTIPACSO: Disassembly of section .text:
-# BTIPACSO: 0000000000010000 func2:
-# BTIPACSO-NEXT:    10000: bl      #48 <func3@plt>
-# BTIPACSO-NEXT:    10004: ret
-# BTIPACSO: 0000000000010008 func3:
-# BTIPACSO-NEXT:    10008: ret
+# BTIPACSO: 0000000000010310 func2:
+# BTIPACSO-NEXT:    10310: bl      #48 <func3@plt>
+# BTIPACSO-NEXT:    10314: ret
+# BTIPACSO: 0000000000010318 func3:
+# BTIPACSO-NEXT:    10318: ret
 # BTIPACSO: Disassembly of section .plt:
-# BTIPACSO: 0000000000010010 .plt:
-# BTIPACSO-NEXT:    10010: bti     c
-# BTIPACSO-NEXT:    10014: stp     x16, x30, [sp, #-16]!
-# BTIPACSO-NEXT:    10018: adrp    x16, #131072
-# BTIPACSO-NEXT:    1001c: ldr     x17, [x16, #16]
-# BTIPACSO-NEXT:    10020: add     x16, x16, #16
-# BTIPACSO-NEXT:    10024: br      x17
-# BTIPACSO-NEXT:    10028: nop
-# BTIPACSO-NEXT:    1002c: nop
-# BTIPACSO: 0000000000010030 func3@plt:
-# BTIPACSO-NEXT:    10030: adrp    x16, #131072
-# BTIPACSO-NEXT:    10034: ldr     x17, [x16, #24]
-# BTIPACSO-NEXT:    10038: add     x16, x16, #24
-# BTIPACSO-NEXT:    1003c: autia1716
-# BTIPACSO-NEXT:    10040: br      x17
-# BTIPACSO-NEXT:    10044: nop
+# BTIPACSO: 0000000000010320 .plt:
+# BTIPACSO-NEXT:    10320: bti     c
+# BTIPACSO-NEXT:    10324: stp     x16, x30, [sp, #-16]!
+# BTIPACSO-NEXT:    10328: adrp    x16, #131072
+# BTIPACSO-NEXT:    1032c: ldr     x17, [x16, #1096]
+# BTIPACSO-NEXT:    10330: add     x16, x16, #1096
+# BTIPACSO-NEXT:    10334: br      x17
+# BTIPACSO-NEXT:    10338: nop
+# BTIPACSO-NEXT:    1033c: nop
+# BTIPACSO: 0000000000010340 func3@plt:
+# BTIPACSO-NEXT:    10340: adrp    x16, #131072
+# BTIPACSO-NEXT:    10344: ldr     x17, [x16, #1104]
+# BTIPACSO-NEXT:    10348: add     x16, x16, #1104
+# BTIPACSO-NEXT:    1034c: autia1716
+# BTIPACSO-NEXT:    10350: br      x17
+# BTIPACSO-NEXT:    10354: nop
 
 # BTIPACPROP:    Properties:    aarch64 feature: BTI, PAC
 
 # BTIPACDYN:   0x0000000070000001 (AARCH64_BTI_PLT)
 # BTIPACDYN:   0x0000000070000003 (AARCH64_PAC_PLT)
 
 ## Make an executable with both BTI and PAC properties. Expect:
 ## PLT[0] bti c as first instruction
 ## PLT[n] bti n as first instruction, autia1716 before br x17
 
 # RUN: ld.lld %t.o %t3btipac.o %t.so -o %t.exe
 # RUN: llvm-readelf -n %t.exe | FileCheck --check-prefix=BTIPACPROP %s
 # RUN: llvm-objdump -d -mattr=+v8.5a --no-show-raw-insn %t.exe | FileCheck --check-prefix BTIPACEX %s
 # RUN: llvm-readelf --dynamic-table %t.exe | FileCheck --check-prefix BTIPACDYN %s
 
 # BTIPACEX: Disassembly of section .text:
-# BTIPACEX: 0000000000210000 func1:
-# BTIPACEX-NEXT:   210000: bl      #48 <func2@plt>
-# BTIPACEX-NEXT:   210004: ret
-# BTIPACEX-NEXT:   210008: ret
-# BTIPACEX: 000000000021000c func3:
-# BTIPACEX-NEXT:   21000c: ret
+# BTIPACEX: 0000000000210338 func1:
+# BTIPACEX-NEXT:   210338: bl      #56 <func2@plt>
+# BTIPACEX-NEXT:   21033c: ret
+# BTIPACEX-NEXT:   210340: ret
+# BTIPACEX: 0000000000210344 func3:
+# BTIPACEX-NEXT:   210344: ret
 # BTIPACEX: Disassembly of section .plt:
-# BTIPACEX: 0000000000210010 .plt:
-# BTIPACEX-NEXT:   210010: bti     c
-# BTIPACEX-NEXT:   210014: stp     x16, x30, [sp, #-16]!
-# BTIPACEX-NEXT:   210018: adrp    x16, #131072
-# BTIPACEX-NEXT:   21001c: ldr     x17, [x16, #16]
-# BTIPACEX-NEXT:   210020: add     x16, x16, #16
-# BTIPACEX-NEXT:   210024: br      x17
-# BTIPACEX-NEXT:   210028: nop
-# BTIPACEX-NEXT:   21002c: nop
-# BTIPACEX: 0000000000210030 func2@plt:
-# BTIPACEX-NEXT:   210030: bti     c
-# BTIPACEX-NEXT:   210034: adrp    x16, #131072
-# BTIPACEX-NEXT:   210038: ldr     x17, [x16, #24]
-# BTIPACEX-NEXT:   21003c: add     x16, x16, #24
-# BTIPACEX-NEXT:   210040: autia1716
-# BTIPACEX-NEXT:   210044: br      x17
+# BTIPACEX: 0000000000210350 .plt:
+# BTIPACEX-NEXT:   210350: bti     c
+# BTIPACEX-NEXT:   210354: stp     x16, x30, [sp, #-16]!
+# BTIPACEX-NEXT:   210358: adrp    x16, #131072
+# BTIPACEX-NEXT:   21035c: ldr     x17, [x16, #1160]
+# BTIPACEX-NEXT:   210360: add     x16, x16, #1160
+# BTIPACEX-NEXT:   210364: br      x17
+# BTIPACEX-NEXT:   210368: nop
+# BTIPACEX-NEXT:   21036c: nop
+# BTIPACEX: 0000000000210370 func2@plt:
+# BTIPACEX-NEXT:   210370: bti     c
+# BTIPACEX-NEXT:   210374: adrp    x16, #131072
+# BTIPACEX-NEXT:   210378: ldr     x17, [x16, #1168]
+# BTIPACEX-NEXT:   21037c: add     x16, x16, #1168
+# BTIPACEX-NEXT:   210380: autia1716
+# BTIPACEX-NEXT:   210384: br      x17
 
 ## Check that combinations of BTI+PAC with 0 properties results in standard PLT
 
 # RUN: ld.lld %t.o %t3.o %t.so -o %t.exe
 # RUN: llvm-objdump -d -mattr=+v8.5a --no-show-raw-insn %t.exe | FileCheck --check-prefix EX %s
 # RUN: llvm-readelf --dynamic-table %t.exe | FileCheck --check-prefix=NODYN %s
 
 # EX: Disassembly of section .text:
-# EX: 0000000000210000 func1:
-# EX-NEXT:   210000: bl      #48 <func2@plt>
-# EX-NEXT:   210004: ret
-# EX-NEXT:   210008: ret
-# EX: 000000000021000c func3:
-# EX-NEXT:   21000c: ret
+# EX: 00000000002102e0 func1:
+# EX-NEXT:   2102e0: bl      #48 <func2@plt>
+# EX-NEXT:   2102e4: ret
+# EX-NEXT:   2102e8: ret
+# EX: 00000000002102ec func3:
+# EX-NEXT:   2102ec: ret
 # EX: Disassembly of section .plt:
-# EX: 0000000000210010 .plt:
-# EX-NEXT:   210010: stp     x16, x30, [sp, #-16]!
-# EX-NEXT:   210014: adrp    x16, #131072
-# EX-NEXT:   210018: ldr     x17, [x16, #16]
-# EX-NEXT:   21001c: add     x16, x16, #16
-# EX-NEXT:   210020: br      x17
-# EX-NEXT:   210024: nop
-# EX-NEXT:   210028: nop
-# EX-NEXT:   21002c: nop
-# EX: 0000000000210030 func2@plt:
-# EX:        210030: adrp    x16, #131072
-# EX-NEXT:   210034: ldr     x17, [x16, #24]
-# EX-NEXT:   210038: add     x16, x16, #24
-# EX-NEXT:   21003c: br      x17
+# EX: 00000000002102f0 .plt:
+# EX-NEXT:   2102f0: stp     x16, x30, [sp, #-16]!
+# EX-NEXT:   2102f4: adrp    x16, #131072
+# EX-NEXT:   2102f8: ldr     x17, [x16, #1024]
+# EX-NEXT:   2102fc: add     x16, x16, #1024
+# EX-NEXT:   210300: br      x17
+# EX-NEXT:   210304: nop
+# EX-NEXT:   210308: nop
+# EX-NEXT:   21030c: nop
+# EX: 0000000000210310 func2@plt:
+# EX:        210310: adrp    x16, #131072
+# EX-NEXT:   210314: ldr     x17, [x16, #1032]
+# EX-NEXT:   210318: add     x16, x16, #1032
+# EX-NEXT:   21031c: br      x17
 
 # NODYN-NOT:   0x0000000070000001 (AARCH64_BTI_PLT)
 # NODYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
 ## Check that combination of --pac-plt and --force-bti warns for the file that
 ## doesn't contain the BTI property, but generates PAC and BTI PLT sequences.
 ## The --pac-plt doesn't warn as it is not required for correctness.
 

test/ELF/aarch64-feature-pac.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-pac1.s -o %t1.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-func3.s -o %t2.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-func3-pac.s -o %t3.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %p/Inputs/aarch64-func2.s -o %tno.o
 
 ## We do not add PAC support when the inputs don't have the .note.gnu.property
 ## field.
 
 # RUN: ld.lld %tno.o %t3.o --shared -o %tno.so
 # RUN: llvm-objdump -d -mattr=+v8.3a --no-show-raw-insn %tno.so | FileCheck --check-prefix=NOPAC %s
 # RUN: llvm-readelf -x .got.plt %tno.so | FileCheck --check-prefix SOGOTPLT %s
 # RUN: llvm-readelf --dynamic-table %tno.so | FileCheck --check-prefix NOPACDYN %s
 
-# NOPAC: 0000000000010000 func2:
-# NOPAC-NEXT:    10000: bl      #48 <func3@plt>
-# NOPAC-NEXT:    10004: ret
+# NOPAC: 00000000000102b8 func2:
+# NOPAC-NEXT:    102b8: bl      #56 <func3@plt>
+# NOPAC-NEXT:    102bc: ret
 # NOPAC: Disassembly of section .plt:
-# NOPAC: 0000000000010010 .plt:
-# NOPAC-NEXT:    10010: stp     x16, x30, [sp, #-16]!
-# NOPAC-NEXT:    10014: adrp    x16, #131072
-# NOPAC-NEXT:    10018: ldr     x17, [x16, #16]
-# NOPAC-NEXT:    1001c: add     x16, x16, #16
-# NOPAC-NEXT:    10020: br      x17
-# NOPAC-NEXT:    10024: nop
-# NOPAC-NEXT:    10028: nop
-# NOPAC-NEXT:    1002c: nop
-# NOPAC: 0000000000010030 func3@plt:
-# NOPAC-NEXT:    10030: adrp    x16, #131072
-# NOPAC-NEXT:    10034: ldr     x17, [x16, #24]
-# NOPAC-NEXT:    10038: add     x16, x16, #24
-# NOPAC-NEXT:    1003c: br      x17
+# NOPAC: 00000000000102d0 .plt:
+# NOPAC-NEXT:    102d0: stp     x16, x30, [sp, #-16]!
+# NOPAC-NEXT:    102d4: adrp    x16, #131072
+# NOPAC-NEXT:    102d8: ldr     x17, [x16, #960]
+# NOPAC-NEXT:    102dc: add     x16, x16, #960
+# NOPAC-NEXT:    102e0: br      x17
+# NOPAC-NEXT:    102e4: nop
+# NOPAC-NEXT:    102e8: nop
+# NOPAC-NEXT:    102ec: nop
+# NOPAC: 00000000000102f0 func3@plt:
+# NOPAC-NEXT:    102f0: adrp    x16, #131072
+# NOPAC-NEXT:    102f4: ldr     x17, [x16, #968]
+# NOPAC-NEXT:    102f8: add     x16, x16, #968
+# NOPAC-NEXT:    102fc: br      x17
 
 # NOPACDYN-NOT:   0x0000000070000001 (AARCH64_BTI_PLT)
 # NOPACDYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
-# RUN: ld.lld %t1.o %t3.o --shared -o %t.so
+# RUN: ld.lld %t1.o %t3.o --shared --soname=t.so -o %t.so
 # RUN: llvm-readelf -n %t.so | FileCheck --check-prefix PACPROP %s
 # RUN: llvm-objdump -d -mattr=+v8.3a --no-show-raw-insn %t.so | FileCheck --check-prefix PACSO %s
-# RUN: llvm-readelf -x .got.plt %t.so | FileCheck --check-prefix SOGOTPLT %s
+# RUN: llvm-readelf -x .got.plt %t.so | FileCheck --check-prefix SOGOTPLT2 %s
 # RUN: llvm-readelf --dynamic-table %t.so |  FileCheck --check-prefix PACDYN %s
 
 ## PAC has no effect on PLT[0], for PLT[N] autia1716 is used to authenticate
 ## the address in x17 (context in x16) before branching to it. The dynamic
 ## loader is responsible for calling pacia1716 on the entry.
-# PACSO: 0000000000010000 func2:
-# PACSO-NEXT:    10000: bl      #48 <func3@plt>
-# PACSO-NEXT:    10004: ret
+# PACSO: 0000000000010310 func2:
+# PACSO-NEXT:    10310: bl      #48 <func3@plt>
+# PACSO-NEXT:    10314: ret
 # PACSO: Disassembly of section .plt:
-# PACSO: 0000000000010010 .plt:
-# PACSO-NEXT:    10010: stp     x16, x30, [sp, #-16]!
-# PACSO-NEXT:    10014: adrp    x16, #131072
-# PACSO-NEXT:    10018: ldr     x17, [x16, #16]
-# PACSO-NEXT:    1001c: add     x16, x16, #16
-# PACSO-NEXT:    10020: br      x17
-# PACSO-NEXT:    10024: nop
-# PACSO-NEXT:    10028: nop
-# PACSO-NEXT:    1002c: nop
-# PACSO: 0000000000010030 func3@plt:
-# PACSO-NEXT:    10030: adrp    x16, #131072
-# PACSO-NEXT:    10034: ldr     x17, [x16, #24]
-# PACSO-NEXT:    10038: add     x16, x16, #24
-# PACSO-NEXT:    1003c: autia1716
-# PACSO-NEXT:    10040: br      x17
-# PACSO-NEXT:    10044: nop
+# PACSO: 0000000000010320 .plt:
+# PACSO-NEXT:    10320: stp     x16, x30, [sp, #-16]!
+# PACSO-NEXT:    10324: adrp    x16, #131072
+# PACSO-NEXT:    10328: ldr     x17, [x16, #1080]
+# PACSO-NEXT:    1032c: add     x16, x16, #1080
+# PACSO-NEXT:    10330: br      x17
+# PACSO-NEXT:    10334: nop
+# PACSO-NEXT:    10338: nop
+# PACSO-NEXT:    1033c: nop
+# PACSO: 0000000000010340 func3@plt:
+# PACSO-NEXT:    10340: adrp    x16, #131072
+# PACSO-NEXT:    10344: ldr     x17, [x16, #1088]
+# PACSO-NEXT:    10348: add     x16, x16, #1088
+# PACSO-NEXT:    1034c: autia1716
+# PACSO-NEXT:    10350: br      x17
+# PACSO-NEXT:    10354: nop
 
-# The .got.plt should be identical between the PAC and no PAC DSO PLT.
 # SOGOTPLT: Hex dump of section '.got.plt':
-# SOGOTPLT-NEXT: 0x00030000 00000000 00000000 00000000 00000000
-# SOGOTPLT-NEXT: 0x00030010 00000000 00000000 10000100 00000000
+# SOGOTPLT-NEXT: 0x000303b0 00000000 00000000 00000000 00000000
+# SOGOTPLT-NEXT: 0x000303c0 00000000 00000000 d0020100 00000000
+
+# SOGOTPLT2: Hex dump of section '.got.plt':
+# SOGOTPLT2-NEXT: 0x00030428 00000000 00000000 00000000 00000000
+# SOGOTPLT2-NEXT: 0x00030438 00000000 00000000 20030100 00000000
 
 # PACPROP: Properties:    aarch64 feature: PAC
 
 # PACDYN-NOT:      0x0000000070000001 (AARCH64_BTI_PLT)
 # PACDYN:          0x0000000070000003 (AARCH64_PAC_PLT)
 
 ## Turn on PAC entries with the --pac-plt command line option. There are no
 ## warnings in this case as the choice to use PAC in PLT entries is orthogonal
 ## to the choice of using PAC in relocatable objects. The presence of the PAC
 ## .note.gnu.property is an indication of preference by the relocatable object.
 
 # RUN: ld.lld %t.o %t2.o --pac-plt %t.so -o %tpacplt.exe
 # RUN: llvm-readelf -n %tpacplt.exe | FileCheck --check-prefix=PACPROP %s
 # RUN: llvm-readelf --dynamic-table %tpacplt.exe | FileCheck --check-prefix PACDYN %s
 # RUN: llvm-objdump -d -mattr=+v8.3a --no-show-raw-insn %tpacplt.exe | FileCheck --check-prefix PACPLT %s
 
 # PACPLT: Disassembly of section .text:
-# PACPLT: 0000000000210000 func1:
-# PACPLT-NEXT:   210000: bl      #48 <func2@plt>
-# PACPLT-NEXT:   210004: ret
-# PACPLT: 0000000000210008 func3:
-# PACPLT-NEXT:   210008: ret
+# PACPLT: 0000000000210338 func1:
+# PACPLT-NEXT:   210338: bl      #56 <func2@plt>
+# PACPLT-NEXT:   21033c: ret
+# PACPLT: 0000000000210340 func3:
+# PACPLT-NEXT:   210340: ret
 # PACPLT: Disassembly of section .plt:
-# PACPLT: 0000000000210010 .plt:
-# PACPLT-NEXT:   210010: stp     x16, x30, [sp, #-16]!
-# PACPLT-NEXT:   210014: adrp    x16, #131072
-# PACPLT-NEXT:   210018: ldr     x17, [x16, #16]
-# PACPLT-NEXT:   21001c: add     x16, x16, #16
-# PACPLT-NEXT:   210020: br      x17
-# PACPLT-NEXT:   210024: nop
-# PACPLT-NEXT:   210028: nop
-# PACPLT-NEXT:   21002c: nop
-# PACPLT: 0000000000210030 func2@plt:
-# PACPLT-NEXT:   210030: adrp    x16, #131072
-# PACPLT-NEXT:   210034: ldr     x17, [x16, #24]
-# PACPLT-NEXT:   210038: add     x16, x16, #24
-# PACPLT-NEXT:   21003c: autia1716
-# PACPLT-NEXT:   210040: br      x17
-# PACPLT-NEXT:   210044: nop
+# PACPLT: 0000000000210350 .plt:
+# PACPLT-NEXT:   210350: stp     x16, x30, [sp, #-16]!
+# PACPLT-NEXT:   210354: adrp    x16, #131072
+# PACPLT-NEXT:   210358: ldr     x17, [x16, #1144]
+# PACPLT-NEXT:   21035c: add     x16, x16, #1144
+# PACPLT-NEXT:   210360: br      x17
+# PACPLT-NEXT:   210364: nop
+# PACPLT-NEXT:   210368: nop
+# PACPLT-NEXT:   21036c: nop
+# PACPLT: 0000000000210370 func2@plt:
+# PACPLT-NEXT:   210370: adrp    x16, #131072
+# PACPLT-NEXT:   210374: ldr     x17, [x16, #1152]
+# PACPLT-NEXT:   210378: add     x16, x16, #1152
+# PACPLT-NEXT:   21037c: autia1716
+# PACPLT-NEXT:   210380: br      x17
+# PACPLT-NEXT:   210384: nop
 
 
 .section ".note.gnu.property", "a"
 .long 4
 .long 0x10
 .long 0x5
 .asciz "GNU"
 

test/ELF/aarch64-fpic-got.s

 # REQUIRES: aarch64
 
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %p/Inputs/shared.s -o %t-lib.o
-# RUN: ld.lld -shared %t-lib.o -o %t-lib.so
+# RUN: ld.lld -shared %t-lib.o -soname t-lib.so -o %t-lib.so
 
 # RUN: ld.lld %t-lib.so %t.o -o %t.exe
 # RUN: llvm-readobj -r %t.exe | FileCheck --check-prefix=RELOC %s
 # RUN: llvm-objdump -d --no-show-raw-insn %t.exe | FileCheck --check-prefix=DIS %s
 
 ## Checks if got access to dynamic objects is done through a got relative
 ## dynamic relocation and not using plt relative (R_AARCH64_JUMP_SLOT).
 # RELOC:      .rela.dyn {
-# RELOC-NEXT:   0x2200C0 R_AARCH64_GLOB_DAT bar 0x0
+# RELOC-NEXT:   0x220320 R_AARCH64_GLOB_DAT bar 0x0
 # RELOC-NEXT: }
 
-## page(0x2200C0) - page(0x210000) = 65536
-## page(0x2200C0) & 0xff8 = 192
+## page(0x220320) - page(0x210000) = 65536
+## page(0x220320) & 0xff8 = 800
 # DIS:      _start:
-# DIS-NEXT: 210000: adrp x0, #65536
-# DIS-NEXT: 210004: ldr x0, [x0, #192]
+# DIS-NEXT: 210258: adrp x0, #65536
+# DIS-NEXT: 21025c: ldr x0, [x0, #800]
 
 .globl _start
 _start:
   adrp x0, :got:bar
   ldr  x0, [x0, :got_lo12:bar]

test/ELF/aarch64-gnu-ifunc-address.s

 
 .text
 .globl main
 .type main,@function
 main:
  adrp x8, :got:myfunc
  ldr  x8, [x8, :got_lo12:myfunc]
  ret
-# CHECK:   0000000000010004 main:
-# x8 = 0x20000
-# CHECK-NEXT:    10004: adrp    x8, #65536
-# x8 = 0x200a0 = .got entry for myfunc with R_AARCH64_GLOB_DAT
-# CHECK-NEXT:    10008: ldr     x8, [x8, #160]
-# CHECK-NEXT:    1000c: ret
+# CHECK:   0000000000010284 main:
+## myfunc's got entry = page(0x20330)-page(0x10284) + 0x330 = 65536 + 816
+# CHECK-NEXT:    10284: adrp    x8, #65536
+# CHECK-NEXT:    10288: ldr     x8, [x8, #816]
+# CHECK-NEXT:    1028c: ret
 
 # CHECK: Disassembly of section .got:
 # CHECK-EMPTY:
-# CHECK-NEXT: 00000000000200a0 .got:
+# CHECK-NEXT: 0000000000020330 .got:
 
 # CHECK-RELOCS: Relocations [
 # CHECK-RELOCS-NEXT:   Section {{.*}} .rela.dyn {
-# CHECK-RELOCS-NEXT:     0x200A0 R_AARCH64_GLOB_DAT myfunc 0x0
+# CHECK-RELOCS-NEXT:     0x20330 R_AARCH64_GLOB_DAT myfunc 0x0
 # CHECK-RELOCS-NEXT:   }
 # CHECK-RELOCS-NEXT: ]

test/ELF/aarch64-gnu-ifunc-nonpreemptable.s

 .type main,@function
 main:
  adrp x8, myfunc
  add  x8, x8, :lo12: myfunc
  ret
 
 ## The address of myfunc is the address of the PLT entry for myfunc.
 # PDE:      myfunc_resolver:
-# PDE-NEXT:   210000:   ret
+# PDE-NEXT:   210170:   ret
 # PDE:      main:
-# PDE-NEXT:   210004:   adrp    x8, #0
-# PDE-NEXT:   210008:   add     x8, x8, #16
-# PDE-NEXT:   21000c:   ret
+# PDE-NEXT:   210174:   adrp    x8, #0
+# PDE-NEXT:   210178:   add     x8, x8, #384
+# PDE-NEXT:   21017c:   ret
 # PDE-EMPTY:
 # PDE-NEXT: Disassembly of section .plt:
 # PDE-EMPTY:
 # PDE-NEXT: myfunc:
 ## page(.got.plt) - page(0x210010) = 65536
-# PDE-NEXT:   210010: adrp    x16, #65536
-# PDE-NEXT:   210014: ldr     x17, [x16]
-# PDE-NEXT:   210018: add     x16, x16, #0
-# PDE-NEXT:   21001c: br      x17
+# PDE-NEXT:   210180: adrp    x16, #65536
+# PDE-NEXT:   210184: ldr     x17, [x16, #400]
+# PDE-NEXT:   210188: add     x16, x16, #400
+# PDE-NEXT:   21018c: br      x17
 
 ## The adrp to myfunc should generate a PLT entry and a GOT entry with an
 ## irelative relocation.
 # PDE-RELOC:      .rela.plt {
-# PDE-RELOC-NEXT:   0x220000 R_AARCH64_IRELATIVE - 0x210000
+# PDE-RELOC-NEXT:   0x220190 R_AARCH64_IRELATIVE - 0x210170
 # PDE-RELOC-NEXT: }
 
 # PIE:      myfunc_resolver:
-# PIE-NEXT:    10000: ret
+# PIE-NEXT:    10260: ret
 # PIE:      main:
-# PIE-NEXT:    10004: adrp    x8, #0
-# PIE-NEXT:    10008: add     x8, x8, #16
-# PIE-NEXT:    1000c: ret
+# PIE-NEXT:    10264: adrp    x8, #0
+# PIE-NEXT:    10268: add     x8, x8, #624
+# PIE-NEXT:    1026c: ret
 # PIE-EMPTY:
 # PIE-NEXT: Disassembly of section .plt:
 # PIE-EMPTY:
 # PIE-NEXT: myfunc:
-# PIE-NEXT:    10010: adrp    x16, #131072
-# PIE-NEXT:    10014: ldr     x17, [x16]
-# PIE-NEXT:    10018: add     x16, x16, #0
-# PIE-NEXT:    1001c: br      x17
+# PIE-NEXT:    10270: adrp    x16, #131072
+# PIE-NEXT:    10274: ldr     x17, [x16, #832]
+# PIE-NEXT:    10278: add     x16, x16, #832
+# PIE-NEXT:    1027c: br      x17
 
 # PIE-RELOC:      .rela.plt {
-# PIE-RELOC-NEXT:   0x30000 R_AARCH64_IRELATIVE - 0x10000
+# PIE-RELOC-NEXT:   0x30340 R_AARCH64_IRELATIVE - 0x10260
 # PIE-RELOC-NEXT: }

test/ELF/aarch64-gnu-ifunc-plt.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %S/Inputs/shared2.s -o %t1.o
 // RUN: ld.lld %t1.o --shared --soname=t.so -o %t.so
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 // RUN: ld.lld --hash-style=sysv %t.so %t.o -o %tout
 // RUN: llvm-objdump -d --no-show-raw-insn %tout | FileCheck %s --check-prefix=DISASM
 // RUN: llvm-objdump -s %tout | FileCheck %s --check-prefix=GOTPLT
 // RUN: llvm-readobj -r --dynamic-table %tout | FileCheck %s
 
 // Check that the IRELATIVE relocations are after the JUMP_SLOT in the plt
 // CHECK: Relocations [
 // CHECK-NEXT:   Section (4) .rela.plt {
-// CHECK:     0x230018 R_AARCH64_JUMP_SLOT bar2 0x0
-// CHECK-NEXT:     0x230020 R_AARCH64_JUMP_SLOT zed2 0x0
-// CHECK-NEXT:     0x230028 R_AARCH64_IRELATIVE - 0x210000
-// CHECK-NEXT:     0x230030 R_AARCH64_IRELATIVE - 0x210004
+// CHECK:     0x230428 R_AARCH64_JUMP_SLOT bar2 0x0
+// CHECK-NEXT:     0x230430 R_AARCH64_JUMP_SLOT zed2 0x0
+// CHECK-NEXT:     0x230438 R_AARCH64_IRELATIVE - 0x2102D8
+// CHECK-NEXT:     0x230440 R_AARCH64_IRELATIVE - 0x2102DC
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // Check that .got.plt entries point back to PLT header
 // GOTPLT: Contents of section .got.plt:
-// GOTPLT-NEXT:  230000 00000000 00000000 00000000 00000000
-// GOTPLT-NEXT:  230010 00000000 00000000 20002100 00000000
-// GOTPLT-NEXT:  230020 20002100 00000000 20002100 00000000
-// GOTPLT-NEXT:  230030 20002100 00000000
+// GOTPLT-NEXT:  230410 00000000 00000000 00000000 00000000
+// GOTPLT-NEXT:  230420 00000000 00000000 f0022100 00000000
+// GOTPLT-NEXT:  230430 f0022100 00000000 f0022100 00000000
+// GOTPLT-NEXT:  230440 f0022100 00000000
 
 // Check that the PLTRELSZ tag includes the IRELATIVE relocations
 // CHECK: DynamicSection [
 // CHECK:   0x0000000000000002 PLTRELSZ             96 (bytes)
 
 // Check that a PLT header is written and the ifunc entries appear last
 // DISASM: Disassembly of section .text:
 // DISASM-EMPTY:
 // DISASM-NEXT: foo:
-// DISASM-NEXT:    210000: ret
+// DISASM-NEXT:    2102d8: ret
 // DISASM:      bar:
-// DISASM-NEXT:    210004: ret
+// DISASM-NEXT:    2102dc: ret
 // DISASM:      _start:
-// DISASM-NEXT:    210008: bl      #88
-// DISASM-NEXT:    21000c: bl      #100
-// DISASM-NEXT:    210010: bl      #48
-// DISASM-NEXT:    210014: bl      #60
+// DISASM-NEXT:    2102e0: bl      #80 <zed2@plt+0x10>
+// DISASM-NEXT:    2102e4: bl      #92 <zed2@plt+0x20>
+// DISASM-NEXT:    2102e8: bl      #40 <bar2@plt>
+// DISASM-NEXT:    2102ec: bl      #52 <zed2@plt>
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-EMPTY:
 // DISASM-NEXT: .plt:
-// DISASM-NEXT:    210020: stp     x16, x30, [sp, #-16]!
-// DISASM-NEXT:    210024: adrp    x16, #131072
-// DISASM-NEXT:    210028: ldr     x17, [x16, #16]
-// DISASM-NEXT:    21002c: add     x16, x16, #16
-// DISASM-NEXT:    210030: br      x17
-// DISASM-NEXT:    210034: nop
-// DISASM-NEXT:    210038: nop
-// DISASM-NEXT:    21003c: nop
+// DISASM-NEXT:    2102f0: stp     x16, x30, [sp, #-16]!
+// DISASM-NEXT:    2102f4: adrp    x16, #131072
+// DISASM-NEXT:    2102f8: ldr     x17, [x16, #1056]
+// DISASM-NEXT:    2102fc: add     x16, x16, #1056
+// DISASM-NEXT:    210300: br      x17
+// DISASM-NEXT:    210304: nop
+// DISASM-NEXT:    210308: nop
+// DISASM-NEXT:    21030c: nop
 // DISASM-EMPTY:
 // DISASM-NEXT:   bar2@plt:
-// DISASM-NEXT:    210040: adrp    x16, #131072
-// DISASM-NEXT:    210044: ldr     x17, [x16, #24]
-// DISASM-NEXT:    210048: add     x16, x16, #24
-// DISASM-NEXT:    21004c: br      x17
+// DISASM-NEXT:    210310: adrp    x16, #131072
+// DISASM-NEXT:    210314: ldr     x17, [x16, #1064]
+// DISASM-NEXT:    210318: add     x16, x16, #1064
+// DISASM-NEXT:    21031c: br      x17
 // DISASM-EMPTY:
 // DISASM-NEXT:   zed2@plt:
-// DISASM-NEXT:    210050: adrp    x16, #131072
-// DISASM-NEXT:    210054: ldr     x17, [x16, #32]
-// DISASM-NEXT:    210058: add     x16, x16, #32
-// DISASM-NEXT:    21005c: br      x17
-// DISASM-NEXT:    210060: adrp    x16, #131072
-// DISASM-NEXT:    210064: ldr     x17, [x16, #40]
-// DISASM-NEXT:    210068: add     x16, x16, #40
-// DISASM-NEXT:    21006c: br      x17
-// DISASM-NEXT:    210070: adrp    x16, #131072
-// DISASM-NEXT:    210074: ldr     x17, [x16, #48]
-// DISASM-NEXT:    210078: add     x16, x16, #48
-// DISASM-NEXT:    21007c: br      x17
+// DISASM-NEXT:    210320: adrp    x16, #131072
+// DISASM-NEXT:    210324: ldr     x17, [x16, #1072]
+// DISASM-NEXT:    210328: add     x16, x16, #1072
+// DISASM-NEXT:    21032c: br      x17
+// DISASM-NEXT:    210330: adrp    x16, #131072
+// DISASM-NEXT:    210334: ldr     x17, [x16, #1080]
+// DISASM-NEXT:    210338: add     x16, x16, #1080
+// DISASM-NEXT:    21033c: br      x17
+// DISASM-NEXT:    210340: adrp    x16, #131072
+// DISASM-NEXT:    210344: ldr     x17, [x16, #1088]
+// DISASM-NEXT:    210348: add     x16, x16, #1088
+// DISASM-NEXT:    21034c: br      x17
 
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:
  ret
 
 .type bar STT_GNU_IFUNC

test/ELF/aarch64-gnu-ifunc.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 // RUN: ld.lld -static %t.o -o %tout
-// RUN: llvm-objdump -d %tout | FileCheck %s --check-prefix=DISASM
+// RUN: llvm-objdump -d --no-show-raw-insn %tout | FileCheck %s --check-prefix=DISASM
 // RUN: llvm-readobj -r --symbols --sections %tout | FileCheck %s
 
 // CHECK:      Sections [
 // CHECK:       Section {
 // CHECK:       Index: 1
 // CHECK-NEXT:  Name: .rela.plt
 // CHECK-NEXT:  Type: SHT_RELA
 // CHECK-NEXT:  Flags [
 // CHECK-NEXT:    SHF_ALLOC
 // CHECK-NEXT:  ]
 // CHECK-NEXT:  Address: [[RELA:.*]]
 // CHECK-NEXT:  Offset: 0x158
 // CHECK-NEXT:  Size: 48
 // CHECK-NEXT:  Link: 0
 // CHECK-NEXT:  Info: 4
 // CHECK-NEXT:  AddressAlignment: 8
 // CHECK-NEXT:  EntrySize: 24
 // CHECK-NEXT: }
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section ({{.*}}) .rela.plt {
-// CHECK-NEXT:     0x220000 R_AARCH64_IRELATIVE
-// CHECK-NEXT:     0x220008 R_AARCH64_IRELATIVE
+// CHECK-NEXT:     0x2201C0 R_AARCH64_IRELATIVE
+// CHECK-NEXT:     0x2201C8 R_AARCH64_IRELATIVE
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 // CHECK:      Symbols [
 // CHECK-NEXT:  Symbol {
 // CHECK-NEXT:    Name:
 // CHECK-NEXT:    Value: 0x0
 // CHECK-NEXT:    Size: 0
 // CHECK-NEXT:    Binding: Local
 // CHECK-NEXT:    Type: None
 // CHECK-NEXT:    Other: 0
 // CHECK-NEXT:    Section: Undefined
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Symbol {
 // CHECK-NEXT:    Name: $x.0
-// CHECK-NEXT:    Value: 0x210000
+// CHECK-NEXT:    Value: 0x210188
 // CHECK-NEXT:    Size: 0
 // CHECK-NEXT:    Binding: Local
 // CHECK-NEXT:    Type: None
 // CHECK-NEXT:    Other: 0
 // CHECK-NEXT:    Section: .text
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Symbol {
 // CHECK-NEXT:    Name: __rela_iplt_end

 // CHECK-NEXT:    Type: None
 // CHECK-NEXT:    Other [
 // CHECK-NEXT:      STV_HIDDEN
 // CHECK-NEXT:    ]
 // CHECK-NEXT:    Section: .rela.plt
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Symbol {
 // CHECK-NEXT:    Name: _start
-// CHECK-NEXT:    Value: 0x210008
+// CHECK-NEXT:    Value: 0x210190
 // CHECK-NEXT:    Size: 0
 // CHECK-NEXT:    Binding: Global
 // CHECK-NEXT:    Type: None
 // CHECK-NEXT:    Other: 0
 // CHECK-NEXT:    Section: .text
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Symbol {
 // CHECK-NEXT:    Name: bar
-// CHECK-NEXT:    Value: 0x210004
+// CHECK-NEXT:    Value: 0x21018C
 // CHECK-NEXT:    Size: 0
 // CHECK-NEXT:    Binding: Global
 // CHECK-NEXT:    Type: GNU_IFunc
 // CHECK-NEXT:    Other: 0
 // CHECK-NEXT:    Section: .text
 // CHECK-NEXT:  }
 // CHECK-NEXT:  Symbol {
 // CHECK-NEXT:    Name: foo
-// CHECK-NEXT:    Value: 0x210000
+// CHECK-NEXT:    Value: 0x210188
 // CHECK-NEXT:    Size: 0
 // CHECK-NEXT:    Binding: Global
 // CHECK-NEXT:    Type: GNU_IFunc
 // CHECK-NEXT:    Other: 0
 // CHECK-NEXT:    Section: .text
 // CHECK-NEXT:  }
 // CHECK-NEXT: ]
 
 // 344 = 0x158
 // 392 = 0x188
 
 // DISASM: Disassembly of section .text:
 // DISASM-EMPTY:
 // DISASM-NEXT: foo:
-// DISASM-NEXT:  210000: c0 03 5f d6 ret
+// DISASM-NEXT:  210188: ret
 // DISASM: bar:
-// DISASM-NEXT:  210004: c0 03 5f d6 ret
+// DISASM-NEXT:  21018c: ret
 // DISASM:      _start:
-// DISASM-NEXT:  210008: 06 00 00 94 bl #24
-// DISASM-NEXT:  21000c: 09 00 00 94     bl      #36
-// DISASM-NEXT:  210010: 42 60 05 91     add     x2, x2, #344
-// DISASM-NEXT:  210014: 42 20 06 91     add     x2, x2, #392
+// DISASM-NEXT:  210190: bl  #16
+// DISASM-NEXT:  210194: bl  #28
+// DISASM-NEXT:  210198: add x2, x2, #344
+// DISASM-NEXT:  21019c: add x2, x2, #392
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-EMPTY:
 // DISASM-NEXT: .plt:
-// DISASM-NEXT:  210020: 90 00 00 90 adrp x16, #65536
-// DISASM-NEXT:  210024: 11 02 40 f9 ldr x17, [x16]
-// DISASM-NEXT:  210028: 10 02 00 91 add x16, x16, #0
-// DISASM-NEXT:  21002c: 20 02 1f d6 br x17
-// DISASM-NEXT:  210030: 90 00 00 90 adrp x16, #65536
-// DISASM-NEXT:  210034: 11 06 40 f9 ldr x17, [x16, #8]
-// DISASM-NEXT:  210038: 10 22 00 91 add x16, x16, #8
-// DISASM-NEXT:  21003c: 20 02 1f d6 br x17
+// DISASM-NEXT:  2101a0: adrp x16, #65536
+// DISASM-NEXT:  2101a4: ldr x17, [x16, #448]
+// DISASM-NEXT:  2101a8: add x16, x16, #448
+// DISASM-NEXT:  2101ac: br x17
+// DISASM-NEXT:  2101b0: adrp x16, #65536
+// DISASM-NEXT:  2101b4: ldr x17, [x16, #456]
+// DISASM-NEXT:  2101b8: add x16, x16, #456
+// DISASM-NEXT:  2101bc: br x17
 
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:
  ret
 
 .type bar STT_GNU_IFUNC

test/ELF/aarch64-gnu-ifunc2.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 # RUN: ld.lld %t.o -o %t
-# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex %t | FileCheck %s
 # RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SEC
 # RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=RELOC
 
 # CHECK:      Disassembly of section .text:
 # CHECK-EMPTY:
 # CHECK-NEXT: myfunc:
-# CHECK-NEXT:   210000:
+# CHECK-NEXT:   210170:
 
 # CHECK:      main:
-# adrp x8, 0x220000, 0x220000 == address in .got.plt
-# CHECK-NEXT:   210004: adrp    x8, #65536
-# CHECK-NEXT:   210008: ldr     x8, [x8]
-# CHECK-NEXT:   21000c: ret
+# .got.plt - page(0x210174) = 0x220190 - 0x210000 = 0x10190
+# CHECK-NEXT:   210174: adrp    x8, #0x10000
+# CHECK-NEXT:   210178: ldr     x8, [x8, #0x190]
+# CHECK-NEXT:   21017c: ret
 
 # CHECK:      Disassembly of section .plt:
 # CHECK-EMPTY:
 # CHECK-NEXT: .plt:
-# adrp x16, 0x220000, 0x220000 == address in .got.plt
-# CHECK-NEXT:   210010: adrp    x16, #65536
-# CHECK-NEXT:   210014: ldr     x17, [x16]
-# CHECK-NEXT:   210018: add     x16, x16, #0
-# CHECK-NEXT:   21001c: br      x17
+# .got.plt - page(0x210180) = 0x220190 - 0x210000 = 0x10190
+# CHECK-NEXT:   210180: adrp    x16, #0x10000
+# CHECK-NEXT:   210184: ldr     x17, [x16, #0x190]
+# CHECK-NEXT:   210188: add     x16, x16, #0x190
+# CHECK-NEXT:   21018c: br      x17
 
-# SEC: .got.plt PROGBITS 0000000000220000 020000 000008 00 WA 0 0 8
+# SEC: .got.plt PROGBITS 0000000000220190 000190 000008 00 WA 0 0 8
 
 # RELOC:      Relocations [
 # RELOC-NEXT:   Section {{.*}} .rela.plt {
-# RELOC-NEXT:     0x220000 R_AARCH64_IRELATIVE - 0x210000
+# RELOC-NEXT:     0x220190 R_AARCH64_IRELATIVE - 0x210170
 # RELOC-NEXT:   }
 # RELOC-NEXT: ]
 
 .text
 .globl myfunc
 .type myfunc,@gnu_indirect_function
 myfunc:
  ret
 
 .text
 .globl main
 .type main,@function
 main:
  adrp x8, :got:myfunc
  ldr  x8, [x8, :got_lo12:myfunc]
  ret

test/ELF/aarch64-got-weak-undef.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %s -o %t.o
 // RUN: ld.lld %t.o -o %t
 // RUN: llvm-readelf -r %t | FileCheck --check-prefix=RELOC %s
 // RUN: llvm-readelf -x .got %t | FileCheck %s
 
 // RELOC: no relocations
 
-// CHECK: 0x00220000 00000000 00000000
+// CHECK: 0x002201a0 00000000 00000000
 
         .globl  _start
 _start:
         adrp    x8, :got:foo
         ldr     x8, [x8, :got_lo12:foo]
         ldr     w0, [x8]
         ret
 
         .weak   foo

test/ELF/aarch64-ifunc-bti.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %p/Inputs/aarch64-addrifunc.s -o %t1.o
 
-# RUN: ld.lld --shared %t1.o -o %t1.so
+# RUN: ld.lld --shared --soname=t1.so %t1.o -o %t1.so
 # RUN: ld.lld --pie %t1.so %t.o -o %t
 # RUN: llvm-objdump -d -mattr=+bti -triple=aarch64-linux-gnu %t | FileCheck %s
 
 # When the address of an ifunc is taken using a non-got reference which clang
 # can do, LLD exports a canonical PLT entry that may have its address taken so
 # we must use bti c.
 
 # CHECK: Disassembly of section .plt:
-# CHECK: 0000000000010020 .plt:
-# CHECK-NEXT:    10020: 5f 24 03 d5                     bti     c
-# CHECK-NEXT:    10024: f0 7b bf a9                     stp     x16, x30, [sp, #-16]!
-# CHECK-NEXT:    10028: 10 01 00 90                     adrp    x16, #131072
-# CHECK-NEXT:    1002c: 11 0a 40 f9                     ldr     x17, [x16, #16]
-# CHECK-NEXT:    10030: 10 42 00 91                     add     x16, x16, #16
-# CHECK-NEXT:    10034: 20 02 1f d6                     br      x17
-# CHECK-NEXT:    10038: 1f 20 03 d5                     nop
-# CHECK-NEXT:    1003c: 1f 20 03 d5                     nop
-# CHECK: 0000000000010040 func1@plt:
-# CHECK-NEXT:    10040: 5f 24 03 d5                     bti     c
-# CHECK-NEXT:    10044: 10 01 00 90                     adrp    x16, #131072
-# CHECK-NEXT:    10048: 11 0e 40 f9                     ldr     x17, [x16, #24]
-# CHECK-NEXT:    1004c: 10 62 00 91                     add     x16, x16, #24
-# CHECK-NEXT:    10050: 20 02 1f d6                     br      x17
-# CHECK-NEXT:    10054: 1f 20 03 d5                     nop
+# CHECK: 0000000000010340 .plt:
+# CHECK-NEXT:    10340: 5f 24 03 d5                     bti     c
+# CHECK-NEXT:    10344: f0 7b bf a9                     stp     x16, x30, [sp, #-16]!
+# CHECK-NEXT:    10348: 10 01 00 90                     adrp    x16, #131072
+# CHECK-NEXT:    1034c: 11 46 42 f9                     ldr     x17, [x16, #1160]
+# CHECK-NEXT:    10350: 10 22 12 91                     add     x16, x16, #1160
+# CHECK-NEXT:    10354: 20 02 1f d6                     br      x17
+# CHECK-NEXT:    10358: 1f 20 03 d5                     nop
+# CHECK-NEXT:    1035c: 1f 20 03 d5                     nop
+# CHECK: 0000000000010360 func1@plt:
+# CHECK-NEXT:    10360: 5f 24 03 d5                     bti     c
+# CHECK-NEXT:    10364: 10 01 00 90                     adrp    x16, #131072
+# CHECK-NEXT:    10368: 11 4a 42 f9                     ldr     x17, [x16, #1168]
+# CHECK-NEXT:    1036c: 10 42 12 91                     add     x16, x16, #1168
+# CHECK-NEXT:    10370: 20 02 1f d6                     br      x17
+# CHECK-NEXT:    10374: 1f 20 03 d5                     nop
 # CHECK-NEXT:           ...
-# CHECK: 0000000000010060 myfunc:
-# CHECK-NEXT:    10060: 5f 24 03 d5                     bti     c
-# CHECK-NEXT:    10064: 10 01 00 90                     adrp    x16, #131072
-# CHECK-NEXT:    10068: 11 12 40 f9                     ldr     x17, [x16, #32]
-# CHECK-NEXT:    1006c: 10 82 00 91                     add     x16, x16, #32
-# CHECK-NEXT:    10070: 20 02 1f d6                     br      x17
-# CHECK-NEXT:    10074: 1f 20 03 d5                     nop
+# CHECK: 0000000000010380 myfunc:
+# CHECK-NEXT:    10380: 5f 24 03 d5                     bti     c
+# CHECK-NEXT:    10384: 10 01 00 90                     adrp    x16, #131072
+# CHECK-NEXT:    10388: 11 4e 42 f9                     ldr     x17, [x16, #1176]
+# CHECK-NEXT:    1038c: 10 62 12 91                     add     x16, x16, #1176
+# CHECK-NEXT:    10390: 20 02 1f d6                     br      x17
+# CHECK-NEXT:    10394: 1f 20 03 d5                     nop
 
 .section ".note.gnu.property", "a"
 .long 4
 .long 0x10
 .long 0x5
 .asciz "GNU"
 
 .long 0xc0000000 // GNU_PROPERTY_AARCH64_FEATURE_1_AND

test/ELF/aarch64-jump26-thunk.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-freebsd %S/Inputs/abs.s -o %tabs.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-freebsd %s -o %t.o
 // RUN: ld.lld %t.o %tabs.o -o %t
 // RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 
 .text
 .globl _start
 _start:
     b big
 
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: _start:
-// CHECK-NEXT:    210000:       b       #8
+// CHECK-NEXT:    210120:       b       #8
 // CHECK: __AArch64AbsLongThunk_big:
-// CHECK-NEXT:    210008:       ldr     x16, #8
-// CHECK-NEXT:    21000c:       br      x16
+// CHECK-NEXT:    210128:       ldr     x16, #8
+// CHECK-NEXT:    21012c:       br      x16
 // CHECK: $d:
-// CHECK-NEXT:    210010:       00 00 00 00     .word   0x00000000
-// CHECK-NEXT:    210014:       10 00 00 00     .word   0x00000010
+// CHECK-NEXT:    210130:       00 00 00 00     .word   0x00000000
+// CHECK-NEXT:    210134:       10 00 00 00     .word   0x00000010

test/ELF/aarch64-ldprel-lo19-invalid.s

 # REQUIRES: aarch64
 
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
 # RUN: not ld.lld -shared %t.o -o /dev/null 2>&1 | FileCheck %s
 
-# CHECK: relocation R_AARCH64_LD_PREL_LO19 out of range: 2131072 is not in [-1048576, 1048575]
+# CHECK: relocation R_AARCH64_LD_PREL_LO19 out of range: 2131192 is not in [-1048576, 1048575]
 
   ldr x8, patatino
   .data
   .zero 2000000
 patatino:

test/ELF/aarch64-lo12-alignment.s

  .space 1
 foo2:
  .space 2
 foo4:
  .space 4
 foo8:
  .space 8
 
-// CHECK: improper alignment for relocation R_AARCH64_LDST16_ABS_LO12_NC: 0x220001 is not aligned to 2 bytes
-// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST32_ABS_LO12_NC: 0x220002 is not aligned to 4 bytes
-// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST64_ABS_LO12_NC: 0x220004 is not aligned to 8 bytes
-// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST128_ABS_LO12_NC: 0x220008 is not aligned to 16 bytes
+// CHECK: improper alignment for relocation R_AARCH64_LDST16_ABS_LO12_NC: 0x220181 is not aligned to 2 bytes
+// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST32_ABS_LO12_NC: 0x220182 is not aligned to 4 bytes
+// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST64_ABS_LO12_NC: 0x220184 is not aligned to 8 bytes
+// CHECK-NEXT: improper alignment for relocation R_AARCH64_LDST128_ABS_LO12_NC: 0x220188 is not aligned to 16 bytes

test/ELF/aarch64-load-alignment.s

 # REQUIRES: aarch64
 
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
 # RUN: not ld.lld -shared %t.o -o /dev/null 2>&1 | FileCheck %s
 
-# CHECK: improper alignment for relocation R_AARCH64_LD_PREL_LO19: 0x20005 is not aligned to 4 bytes
+# CHECK: improper alignment for relocation R_AARCH64_LD_PREL_LO19: 0x2007D is not aligned to 4 bytes
 
   ldr x8, patatino
   .data
   .zero 5
 patatino:

test/ELF/aarch64-nopic-plt.s

 // CHECK-NEXT: Value: 0x0
 // CHECK-NEXT: Size: 0
 // CHECK-NEXT: Binding: Global
 // CHECK-NEXT: Type: None
 // CHECK-NEXT: Other: 0
 // CHECK-NEXT: Section: Undefined
 
 // CHECK:      Name: foo
-// CHECK-NEXT: Value: 0x210030
+// CHECK-NEXT: Value: 0x2102F0
 // CHECK-NEXT: Size: 0
 // CHECK-NEXT: Binding: Global
 // CHECK-NEXT: Type: Function
 // CHECK-NEXT: Other: 0
 // CHECK-NEXT: Section: Undefined

test/ELF/aarch64-prel16.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs255.s -o %t255.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs256.s -o %t256.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs257.s -o %t257.o
 
 .globl _start
 _start:
 .data
-  .hword foo - . + 0x210eff
-  .hword foo - . + 0x1f8f02
+  .hword foo - . + 0x212057
+  .hword foo - . + 0x1fa05a
 
 // Note: If this test fails, it probably happens because of
 //       the change of the address of the .data section.
 //       You may found the correct address in the aarch64_abs16.s test,
 //       if it is already fixed. Then, update addends accordingly.
 // RUN: ld.lld -z max-page-size=4096 %t.o %t256.o -o %t2
 // RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
 
 // CHECK: Contents of section .data:
-// 201000: S = 0x100, A = 0x210eff, P = 0x201000
+// 202158: S = 0x100, A = 0x212157, P = 0x202158
 //         S + A - P = 0xffff
-// 201002: S = 0x100, A = 0x1f8f02, P = 0x201002
+// 212a5a: S = 0x100, A = 0x1fa05a, P = 0x20215a
 //         S + A - P = 0x8000
-// CHECK-NEXT: 201000 ffff0080
+// CHECK-NEXT: 202158 ffff0080
 
 // RUN: not ld.lld -z max-page-size=4096 %t.o %t255.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
 // OVERFLOW1: relocation R_AARCH64_PREL16 out of range: -32769 is not in [-32768, 65535]
 
 // RUN: not ld.lld -z max-page-size=4096 %t.o %t257.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
 // OVERFLOW2: relocation R_AARCH64_PREL16 out of range: 65536 is not in [-32768, 65535]

test/ELF/aarch64-prel32.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs255.s -o %t255.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs256.s -o %t256.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-freebsd %S/Inputs/abs257.s -o %t257.o
 
 .globl _start
 _start:
 .data
-  .word foo - . + 0x100200eff
-  .word foo - . - 0x7fdff0fc
+  .word foo - . + 0x100202057
+  .word foo - . - 0x7fdfdfa4
 
 // Note: If this test fails, it probably happens because of
 //       the change of the address of the .data section.
 //       You may found the correct address in the aarch64_abs32.s test,
 //       if it is already fixed. Then, update addends accordingly.
 // RUN: ld.lld -z max-page-size=4096 %t.o %t256.o -o %t2
 // RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
 
 // CHECK: Contents of section .data:
-// 201000: S = 0x100, A = 0x100200eff, P = 0x201000
+// 202158: S = 0x100, A = 0x100202057, P = 0x202158
 //         S + A - P = 0xffffffff
-// 201004: S = 0x100, A = -0x7fdff0fc, P = 0x201004
+// 20215c: S = 0x100, A = -0x7fdfdfa4, P = 0x20215c
 //         S + A - P = 0x80000000
-// CHECK-NEXT: 201000 ffffffff 00000080
+// CHECK-NEXT: 202158 ffffffff 00000080
 
 // RUN: not ld.lld -z max-page-size=4096 %t.o %t255.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW1
 // OVERFLOW1: relocation R_AARCH64_PREL32 out of range: -2147483649 is not in [-2147483648, 4294967295]
 
 // RUN: not ld.lld -z max-page-size=4096 %t.o %t257.o -o %t2 2>&1 | FileCheck %s --check-prefix=OVERFLOW2
 // OVERFLOW2: relocation R_AARCH64_PREL32 out of range: 4294967296 is not in [-2147483648, 4294967295]

test/ELF/aarch64-relative.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t.o
 // RUN: ld.lld %t.o -o %t.so -shared
 // RUN: llvm-readobj -r %t.so | FileCheck %s
 
+.p2align 4
   adr     x8, .Lfoo                 // R_AARCH64_ADR_PREL_LO21
   adrp    x8, .Lfoo                 // R_AARCH64_ADR_PREL_PG_HI21
   strb    w9, [x8, :lo12:.Lfoo]     // R_AARCH64_LDST8_ABS_LO12_NC
   ldr     h17, [x19, :lo12:.Lfoo]   // R_AARCH64_LDST16_ABS_LO12_NC
   ldr     w0, [x8, :lo12:.Lfoo]     // R_AARCH64_LDST32_ABS_LO12_NC
   ldr     x0, [x8, :lo12:.Lfoo]     // R_AARCH64_LDST64_ABS_LO12_NC
   ldr     q20, [x19, #:lo12:.Lfoo]  // R_AARCH64_LDST128_ABS_LO12_NC
   add     x0, x0, :lo12:.Lfoo       // R_AARCH64_ADD_ABS_LO12_NC

test/ELF/aarch64-relocs.s

 # #4 is the adr immediate value.
 
 .section .R_AARCH64_ADR_PREL_PG_H121,"ax",@progbits
   adrp x1,mystr
 mystr:
   .asciz "blah"
   .size mystr, 4
 
-# S = 0x210012, A = 0x4, P = 0x210012
-# PAGE(S + A) = 0x210000
-# PAGE(P) = 0x210000
+# PAGE(S + A) - PAGE(P) = PAGE(210136) - PAGE(0x210132) = 0
 #
 # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
 # CHECK-EMPTY:
 # CHECK-NEXT: $x.2:
-# CHECK-NEXT:   210012:       01 00 00 90     adrp    x1, #0
+# CHECK-NEXT:   210132:       01 00 00 90     adrp    x1, #0
 
 .section .R_AARCH64_ADD_ABS_LO12_NC,"ax",@progbits
   add x0, x0, :lo12:.L.str
 .L.str:
   .asciz "blah"
   .size mystr, 4
 
-# S = 0x21001b, A = 0x4
-# R = (S + A) & 0xFFF = 0x1f
-# R << 10 = 0x7c00
+# S = 0x21013b, A = 0x4
+# R = (S + A) & 0xFFF = 319
 #
 # CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
 # CHECK-EMPTY:
 # CHECK-NEXT: $x.4:
-# CHECK-NEXT:   21001b:       00 7c 00 91     add     x0, x0, #31
+# CHECK-NEXT:   21013b:       00 fc 04 91     add     x0, x0, #319
 
 .section .R_AARCH64_LDST64_ABS_LO12_NC,"ax",@progbits
   ldr x28, [x27, :lo12:foo]
 foo:
   .asciz "foo"
   .size mystr, 3
 
-# S = 0x210024, A = 0x4
-# R = ((S + A) & 0xFFF) << 7 = 0x00001400
-# 0x00001400 | 0xf940177c = 0xf940177c
+# S = 0x210144, A = 0x4
+# R = ((S + A) & 0xFFF) << 7 = 0x0000a400
+# 0x0000a400 | 0xf940177c = 0xf940a77c
 # CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC:
 # CHECK-EMPTY:
 # CHECK-NEXT: $x.6:
-# CHECK-NEXT:   210024:       7c 17 40 f9     ldr     x28, [x27, #40]
+# CHECK-NEXT:   210144:       7c a7 40 f9     ldr     x28, [x27, #328]
 
 .section .SUB,"ax",@progbits
   nop
 sub:
   nop
 
 # CHECK: Disassembly of section .SUB:
 # CHECK-EMPTY:
 # CHECK-NEXT: $x.8:
-# CHECK-NEXT:   21002c:       1f 20 03 d5     nop
+# CHECK-NEXT:   21014c:       1f 20 03 d5     nop
 # CHECK: sub:
-# CHECK-NEXT:   210030:       1f 20 03 d5     nop
+# CHECK-NEXT:   210150:       1f 20 03 d5     nop
 
 .section .R_AARCH64_CALL26,"ax",@progbits
 call26:
         bl sub
 
-# S = 0x21002c, A = 0x4, P = 0x210034
+# S = 0x21014c, A = 0x4, P = 0x210154
 # R = S + A - P = -0x4 = 0xfffffffc
 # (R & 0x0ffffffc) >> 2 = 0x03ffffff
 # 0x94000000 | 0x03ffffff = 0x97ffffff
 # CHECK: Disassembly of section .R_AARCH64_CALL26:
 # CHECK-EMPTY:
 # CHECK-NEXT: call26:
-# CHECK-NEXT:   210034:       ff ff ff 97     bl     #-4
+# CHECK-NEXT:   210154:       ff ff ff 97     bl     #-4
 
 .section .R_AARCH64_JUMP26,"ax",@progbits
 jump26:
         b sub
 
-# S = 0x21002c, A = 0x4, P = 0x210038
+# S = 0x21014c, A = 0x4, P = 0x210158
 # R = S + A - P = -0x8 = 0xfffffff8
 # (R & 0x0ffffffc) >> 2 = 0x03fffffe
 # 0x14000000 | 0x03fffffe = 0x17fffffe
 # CHECK: Disassembly of section .R_AARCH64_JUMP26:
 # CHECK-EMPTY:
 # CHECK-NEXT: jump26:
-# CHECK-NEXT:   210038:       fe ff ff 17     b      #-8
+# CHECK-NEXT:   210158:       fe ff ff 17     b      #-8
 
 .section .R_AARCH64_LDST32_ABS_LO12_NC,"ax",@progbits
 ldst32:
   ldr s4, [x5, :lo12:foo32]
 foo32:
   .asciz "foo"
   .size mystr, 3
 
-# S = 0x21003c, A = 0x4
-# R = ((S + A) & 0xFFC) << 8 = 0x00004000
-# 0x00004000 | 0xbd4000a4 = 0xbd4040a4
+# S = 0x21015c, A = 0x4
+# R = ((S + A) & 0xFFC) << 8 = 0x00016000
+# 0x00016000 | 0xbd4000a4 = 0xbd4160a4
 # CHECK: Disassembly of section .R_AARCH64_LDST32_ABS_LO12_NC:
 # CHECK-EMPTY:
 # CHECK-NEXT: ldst32:
-# CHECK-NEXT:   21003c:       a4 40 40 bd     ldr s4, [x5, #64]
+# CHECK-NEXT:   21015c:       a4 60 41 bd     ldr s4, [x5, #352]
 
 .section .R_AARCH64_LDST8_ABS_LO12_NC,"ax",@progbits
 ldst8:
   ldrsb x11, [x13, :lo12:foo8]
 foo8:
   .asciz "foo"
   .size mystr, 3
 
-# S = 0x210044, A = 0x4
-# R = ((S + A) & 0xFFF) << 10 = 0x00012000
-# 0x00012000 | 0x398001ab = 0x398121ab
+# S = 0x210164, A = 0x4
+# R = ((S + A) & 0xFFF) << 10 = 0x0005a000
+# 0x0005a000 | 0x398001ab = 0x3985a1ab
 # CHECK: Disassembly of section .R_AARCH64_LDST8_ABS_LO12_NC:
 # CHECK-EMPTY:
 # CHECK-NEXT: ldst8:
-# CHECK-NEXT:   210044:       ab 21 81 39     ldrsb x11, [x13, #72]
+# CHECK-NEXT:   210164:       ab a1 85 39     ldrsb x11, [x13, #360]
 
 .section .R_AARCH64_LDST128_ABS_LO12_NC,"ax",@progbits
 ldst128:
   ldr q20, [x19, #:lo12:foo128]
 foo128:
   .asciz "foo"
   .size mystr, 3
 
-# S = 0x21004c, A = 0x4
-# R = ((S + A) & 0xFF8) << 6 = 0x00001400
-# 0x00001400 | 0x3dc00274 = 0x3dc01674
+# S = 0x21016c, A = 0x4
+# R = ((S + A) & 0xFF8) << 6 = 0x00005c00
+# 0x00005c00 | 0x3dc00274 = 0x3dc05e74
 # CHECK: Disassembly of section .R_AARCH64_LDST128_ABS_LO12_NC:
 # CHECK-EMPTY:
 # CHECK: ldst128:
-# CHECK:   21004c:       74 16 c0 3d     ldr     q20, [x19, #80]
+# CHECK:   21016c:       74 5e c0 3d     ldr     q20, [x19, #368]
 #foo128:
-#   210050:       66 6f 6f 00     .word
+#   210170:       66 6f 6f 00     .word
 
 .section .R_AARCH64_LDST16_ABS_LO12_NC,"ax",@progbits
 ldst16:
   ldr h17, [x19, :lo12:foo16]
   ldrh w1, [x19, :lo12:foo16]
   ldrh w2, [x19, :lo12:foo16 + 2]
 foo16:
   .asciz "foo"
   .size mystr, 4
 
-# S = 0x210054, A = 0x4
-# R = ((S + A) & 0x0FFC) << 9 = 0xb000
-# 0xb000 | 0x7d400271 = 0x7d40b271
+# S = 0x210174, A = 0x4
+# R = ((S + A) & 0x0FFC) << 9 = 0x2f000
+# 0x2f000 | 0x7d400271 = 0x7d430271
 # CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
 # CHECK-EMPTY:
 # CHECK-NEXT: ldst16:
-# CHECK-NEXT:   210054:       71 c2 40 7d     ldr     h17, [x19, #96]
-# CHECK-NEXT:   210058:       61 c2 40 79     ldrh    w1, [x19, #96]
-# CHECK-NEXT:   21005c:       62 c6 40 79     ldrh    w2, [x19, #98]
+# CHECK-NEXT:   210174:       71 02 43 7d     ldr     h17, [x19, #384]
+# CHECK-NEXT:   210178:       61 02 43 79     ldrh    w1, [x19, #384]
+# CHECK-NEXT:   21017c:       62 06 43 79     ldrh    w2, [x19, #386]
 
 .section .R_AARCH64_MOVW_UABS,"ax",@progbits
 movz1:
    movk x12, #:abs_g0:zero+0xC
    movk x12, #:abs_g0_nc:zero+0xF000E000D000C
    movk x13, #:abs_g1:zero+0xD000C
    movk x13, #:abs_g1_nc:zero+0xF000E000D000C
    movk x14, #:abs_g2:zero+0xE000D000C
.section .R_AARCH64_MOVW_PREL,"ax",@progbits
    movz x4, #:prel_g3:.+0x4000000000000
    movz x4, #:prel_g3:.-0x4000000000000
    movk x4, #:prel_g3:.+0x4000000000000
    movk x4, #:prel_g3:.-0x4000000000000
 
 # CHECK: Disassembly of section .R_AARCH64_MOVW_PREL:
 # CHECK-EMPTY:
 # CHECK-NEXT: :
-# CHECK-NEXT: 21009c: 21 00 80 d2  mov  x1, #1
-# CHECK-NEXT: 2100a0: 01 00 80 92  mov  x1, #-1
-# CHECK-NEXT: 2100a4: 21 00 80 f2  movk x1, #1
-# CHECK-NEXT: 2100a8: e1 ff 9f f2  movk x1, #65535
-# CHECK-NEXT: 2100ac: 42 00 a0 d2  mov  x2, #131072
+# CHECK-NEXT: 2101bc: 21 00 80 d2  mov  x1, #1
+# CHECK-NEXT: 2101c0: 01 00 80 92  mov  x1, #-1
+# CHECK-NEXT: 2101c4: 21 00 80 f2  movk x1, #1
+# CHECK-NEXT: 2101c8: e1 ff 9f f2  movk x1, #65535
+# CHECK-NEXT: 2101cc: 42 00 a0 d2  mov  x2, #131072
 ## -65537 = 0xfffffffffffeffff
-# CHECK-NEXT: 2100b0: 22 00 a0 92  mov  x2, #-65537
-# CHECK-NEXT: 2100b4: 42 00 a0 f2  movk x2, #2, lsl #16
-# CHECK-NEXT: 2100b8: c2 ff bf f2  movk x2, #65534, lsl #16
+# CHECK-NEXT: 2101d0: 22 00 a0 92  mov  x2, #-65537
+# CHECK-NEXT: 2101d4: 42 00 a0 f2  movk x2, #2, lsl #16
+# CHECK-NEXT: 2101d8: c2 ff bf f2  movk x2, #65534, lsl #16
 ## 12884901888 = 0x300000000
-# CHECK-NEXT: 2100bc: 63 00 c0 d2  mov  x3, #12884901888
+# CHECK-NEXT: 2101dc: 63 00 c0 d2  mov  x3, #12884901888
 ## -8589934593 = #0xfffffffdffffffff
-# CHECK-NEXT: 2100c0: 43 00 c0 92  mov  x3, #-8589934593
-# CHECK-NEXT: 2100c4: 63 00 c0 f2  movk x3, #3, lsl #32
-# CHECK-NEXT: 2100c8: a3 ff df f2  movk x3, #65533, lsl #32
-# CHECK-NEXT: 2100cc: 63 00 c0 d2  mov  x3, #12884901888
+# CHECK-NEXT: 2101e0: 43 00 c0 92  mov  x3, #-8589934593
+# CHECK-NEXT: 2101e4: 63 00 c0 f2  movk x3, #3, lsl #32
+# CHECK-NEXT: 2101e8: a3 ff df f2  movk x3, #65533, lsl #32
+# CHECK-NEXT: 2101ec: 63 00 c0 d2  mov  x3, #12884901888
 ## 1125899906842624 = 0x4000000000000
-# CHECK-NEXT: 2100d0: 84 00 e0 d2  mov  x4, #1125899906842624
-# CHECK-NEXT: 2100d4: 84 ff ff d2  mov  x4, #-1125899906842624
-# CHECK-NEXT: 2100d8: 84 00 e0 f2  movk x4, #4, lsl #48
-# CHECK-NEXT: 2100dc: 84 ff ff f2  movk x4, #65532, lsl #48
+# CHECK-NEXT: 2101f0: 84 00 e0 d2  mov  x4, #1125899906842624
+# CHECK-NEXT: 2101f4: 84 ff ff d2  mov  x4, #-1125899906842624
+# CHECK-NEXT: 2101f8: 84 00 e0 f2  movk x4, #4, lsl #48
+# CHECK-NEXT: 2101fc: 84 ff ff f2  movk x4, #65532, lsl #48

test/ELF/aarch64-relro.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t
 # RUN: ld.lld %t -o %t2
 # RUN: llvm-readobj -l %t2 | FileCheck %s
 
 # CHECK:      Type: PT_GNU_RELRO
 # CHECK-NEXT: Offset:
-# CHECK-NEXT: VirtualAddress:
+# CHECK-NEXT: VirtualAddress: 0x220190
 # CHECK-NEXT: PhysicalAddress:
 # CHECK-NEXT: FileSize:
-# CHECK-NEXT: MemSize: 4096
+# CHECK-NEXT: MemSize: 3696
 
 .section .data.rel.ro,"aw",%progbits
 .byte 1

test/ELF/aarch64-thunk-section-location.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %s -o %t
 // RUN: ld.lld %t -o %t2 2>&1
-// RUN: llvm-objdump -d  -start-address=136118280 -stop-address=136118292 -triple=aarch64-linux-gnu %t2 | FileCheck %s
+// RUN: llvm-objdump -d --start-address=0x81d1008 -stop-address=0x81d1014 -triple=aarch64-linux-gnu %t2 | FileCheck %s
 // Check that the range extension thunks are dumped close to the aarch64 branch
 // range of 128 MiB
  .section .text.1, "ax", %progbits
  .balign 0x1000
  .globl _start
 _start:
  bl high_target
  ret

  .balign 0x1000
 
  .globl high_target
  .type high_target, %function
 high_target:
  ret
 
 // CHECK: __AArch64AbsLongThunk_high_target:
-// CHECK-NEXT:  81d0008:        50 00 00 58     ldr     x16, #8
-// CHECK-NEXT:  81d000c:        00 02 1f d6     br      x16
+// CHECK-NEXT:  81d1008:        50 00 00 58     ldr     x16, #8
+// CHECK-NEXT:  81d100c:        00 02 1f d6     br      x16
 // CHECK: $d:
-// CHECK-NEXT:  81d0010:        00 10 21 08     .word   0x08211000
+// CHECK-NEXT:  81d1010:        00 20 21 08     .word   0x08212000

test/ELF/aarch64-tls-gdie.s

_start:
         blr     x1
 
 // SEC:      Name: .got
 // SEC-NEXT: Type: SHT_PROGBITS
 // SEC-NEXT: Flags [
 // SEC-NEXT:   SHF_ALLOC
 // SEC-NEXT:   SHF_WRITE
 // SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2200B0
+// SEC-NEXT: Address: 0x220300
 
-// page(0x2200B0) - page(0x20004) = 65536
-// 0x0B0 = 176
+// page(0x220300) - page(0x21023c) = 65536
+// 0x23c = 768
 
 // CHECK:      _start:
-// CHECK-NEXT: 210000: nop
-// CHECK-NEXT: 210004: adrp    x0, #65536
-// CHECK-NEXT: 210008: ldr     x0, [x0, #176]
-// CHECK-NEXT: 21000c: nop
-// CHECK-NEXT: 210010: nop
+// CHECK-NEXT: 210238: nop
+// CHECK-NEXT: 21023c: adrp    x0, #65536
+// CHECK-NEXT: 210240: ldr     x0, [x0, #768]
+// CHECK-NEXT: 210244: nop
+// CHECK-NEXT: 210248: nop

test/ELF/aarch64-tls-gdle.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %p/Inputs/aarch64-tls-ie.s -o %ttlsie.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %s -o %tmain.o
 # RUN: ld.lld %tmain.o %ttlsie.o -o %tout
 # RUN: llvm-objdump -d --no-show-raw-insn %tout | FileCheck %s
 # RUN: llvm-readobj -r %tout | FileCheck -check-prefix=RELOC %s
 
 ## Local-Dynamic to Local-Exec relax creates no dynamic relocations.
 # RELOC:      Relocations [
 # RELOC-NEXT: ]
 
 # TCB size = 0x16 and foo is first element from TLS register.
 # CHECK-LABEL: _start:
-# CHECK-NEXT:    210000: movz    x0, #0, lsl #16
-# CHECK-NEXT:    210004: movk    x0, #16
-# CHECK-NEXT:    210008: nop
-# CHECK-NEXT:    21000c: nop
+# CHECK-NEXT:    2101c8: movz    x0, #0, lsl #16
+# CHECK-NEXT:    2101cc: movk    x0, #16
+# CHECK-NEXT:    2101d0: nop
+# CHECK-NEXT:    2101d4: nop
 
 .globl _start
 _start:
  adrp    x0, :tlsdesc:foo
  ldr     x1, [x0, :tlsdesc_lo12:foo]
  add     x0, x0, :tlsdesc_lo12:foo
  .tlsdesccall foo
  blr     x1

test/ELF/aarch64-tls-ie.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/aarch64-tls-ie.s -o %tdso.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %tmain.o
 # RUN: ld.lld -shared -soname=tdso.so %tdso.o -o %tdso.so
 # RUN: ld.lld --hash-style=sysv %tmain.o %tdso.so -o %tout
 # RUN: llvm-objdump -d --no-show-raw-insn %tout | FileCheck %s
 # RUN: llvm-readobj -S -r %tout | FileCheck -check-prefix=RELOC %s
 
 # RELOC:      Section {
 # RELOC:        Index:
 # RELOC:        Name: .got
 # RELOC-NEXT:   Type: SHT_PROGBITS
 # RELOC-NEXT:   Flags [
 # RELOC-NEXT:     SHF_ALLOC
 # RELOC-NEXT:     SHF_WRITE
 # RELOC-NEXT:   ]
-# RELOC-NEXT:   Address: 0x2200B0
-# RELOC-NEXT:   Offset: 0x200B0
+# RELOC-NEXT:   Address: 0x220338
+# RELOC-NEXT:   Offset: 0x338
 # RELOC-NEXT:   Size: 16
 # RELOC-NEXT:   Link: 0
 # RELOC-NEXT:   Info: 0
 # RELOC-NEXT:   AddressAlignment: 8
 # RELOC-NEXT:   EntrySize: 0
 # RELOC-NEXT: }
 # RELOC:      Relocations [
 # RELOC-NEXT:  Section ({{.*}}) .rela.dyn {
-# RELOC-NEXT:    0x2200B8 R_AARCH64_TLS_TPREL64 bar 0x0
-# RELOC-NEXT:    0x2200B0 R_AARCH64_TLS_TPREL64 foo 0x0
+# RELOC-NEXT:    0x220340 R_AARCH64_TLS_TPREL64 bar 0x0
+# RELOC-NEXT:    0x220338 R_AARCH64_TLS_TPREL64 foo 0x0
 # RELOC-NEXT:  }
 # RELOC-NEXT:]
 
 ## Page(0x2200B0) - Page(0x210000) = 0x10000 = 65536
 ## 0x2200B0 & 0xff8 = 0xB0 = 176
 ## Page(0x2200B8) - Page(0x210000) = 0x10000 = 65536
 ## 0x2200B8 & 0xff8 = 0xB8 = 184
 # CHECK:     _start:
-# CHECK-NEXT: 210000: adrp x0, #65536
-# CHECK-NEXT: 210004: ldr  x0, [x0, #176]
-# CHECK-NEXT: 210008: adrp x0, #65536
-# CHECK-NEXT: 21000c: ldr  x0, [x0, #184]
+# CHECK-NEXT: 210278: adrp x0, #65536
+# CHECK-NEXT: 21027c: ldr  x0, [x0, #824]
+# CHECK-NEXT: 210280: adrp x0, #65536
+# CHECK-NEXT: 210284: ldr  x0, [x0, #832]
 
 .globl _start
 _start:
  adrp x0, :gottprel:foo
  ldr x0, [x0, #:gottprel_lo12:foo]
 
  adrp x0, :gottprel:bar
  ldr x0, [x0, #:gottprel_lo12:bar]

test/ELF/aarch64-tls-le.s

  add x0, x0, :tprel_lo12_nc:v1
  mrs x0, TPIDR_EL0
  add x0, x0, :tprel_hi12:v2
  add x0, x0, :tprel_lo12_nc:v2
 
 # TCB size = 0x16 and foo is first element from TLS register.
 #CHECK: Disassembly of section .text:
 #CHECK: _start:
-#CHECK:  210000: 40 d0 3b d5     mrs     x0, TPIDR_EL0
-#CHECK:  210004: 00 00 40 91     add     x0, x0, #0, lsl #12
-#CHECK:  210008: 00 40 00 91     add     x0, x0, #16
-#CHECK:  21000c: 40 d0 3b d5     mrs     x0, TPIDR_EL0
-#CHECK:  210010: 00 fc 7f 91     add     x0, x0, #4095, lsl #12
-#CHECK:  210014: 00 e0 3f 91     add     x0, x0, #4088
+#CHECK:  210158: 40 d0 3b d5     mrs     x0, TPIDR_EL0
+#CHECK:  21015c: 00 00 40 91     add     x0, x0, #0, lsl #12
+#CHECK:  210160: 00 40 00 91     add     x0, x0, #16
+#CHECK:  210164: 40 d0 3b d5     mrs     x0, TPIDR_EL0
+#CHECK:  210168: 00 fc 7f 91     add     x0, x0, #4095, lsl #12
+#CHECK:  21016c: 00 e0 3f 91     add     x0, x0, #4088
 
 .section        .tbss,"awT",@nobits
 
 .type   v1,@object
 .globl  v1
 .p2align 2
 v1:
 .word  0

test/ELF/aarch64-tls-vaddr-align.s

+# REQUIRES: aarch64
+
+# RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
+# RUN: ld.lld %t.o -o %t
+# RUN: llvm-readelf -S -l %t | FileCheck --check-prefix=SEC %s
+# RUN: llvm-objdump -d %t | FileCheck --check-prefix=DIS %s
+
+# SEC: Name   Type     Address          Off    Size   ES Flg Lk Inf Al
+# SEC: .tdata PROGBITS 00000000002201cc 0001cc 000001 00 WAT 0    0  1
+# SEC: .tbss  NOBITS   0000000000220200 0001cd 000008 00 WAT 0    0 256
+
+# SEC: Type Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
+# SEC: TLS  0x0001cc 0x00000000002201cc 0x00000000002201cc 0x000001 0x00003c R   0x100
+
+## TP offset computation is a bit tricky if p_vaddr%p_align != 0.
+## GAP_ABOVE_TP = 16
+## The start of PT_TLS (p_vaddr) has TP offset (GAP_ABOVE_TP + (p_vaddr-GAP_ABOVE_TP & p_align-1)).
+
+## a@tprel = st_value(a) + GAP_ABOVE_TP + (p_vaddr-GAP_ABOVE_TP & p_align-1) =
+## 0x220200-0x2201cc + 16 + (0x2201cc-16 & 0x100-1) = 256
+# DIS: add x0, x0, #256
+
+add x0, x0, :tprel_lo12_nc:a
+
+.section .tdata,"awT"
+.byte 0
+
+.section .tbss,"awT"
+.p2align 8
+a:
+.quad 0

test/ELF/aarch64-tlsdesc.s

.text
         add     x0, x0, :tlsdesc_lo12:a
         .tlsdesccall a
         blr     x1
 
 // Create relocation against local TLS symbols where linker should
 // create target specific dynamic TLSDESC relocation where addend is
 // the symbol VMA in tls block.
 
-// CHECK:      10000: adrp    x0, #65536
-// CHECK-NEXT: 10004: ldr     x1, [x0, #144]
-// CHECK-NEXT: 10008: add     x0, x0, #144
-// CHECK-NEXT: 1000c: blr     x1
+// CHECK:      10298: adrp    x0, #65536
+// CHECK-NEXT: 1029c: ldr     x1, [x0, #856]
+// CHECK-NEXT: 102a0: add     x0, x0, #856
+// CHECK-NEXT: 102a4: blr     x1
 
   adrp  x0, :tlsdesc:local1
   ldr  x1, [x0, :tlsdesc_lo12:local1]
   add x0, x0, :tlsdesc_lo12:local1
         .tlsdesccall a
         blr     x1
 
-// CHECK:      10010: adrp    x0, #65536
-// CHECK-NEXT: 10014: ldr     x1, [x0, #160]
-// CHECK-NEXT: 10018: add     x0, x0, #160
-// CHECK-NEXT: 1001c: blr     x1
+// CHECK:      102a8: adrp    x0, #65536
+// CHECK-NEXT: 102ac: ldr     x1, [x0, #872]
+// CHECK-NEXT: 102b0: add     x0, x0, #872
+// CHECK-NEXT: 102b4: blr     x1
 
   adrp  x0, :tlsdesc:local2
   ldr  x1, [x0, :tlsdesc_lo12:local2]
   add x0, x0, :tlsdesc_lo12:local2
         .tlsdesccall a
         blr     x1
 
-// CHECK:      10020: adrp    x0, #65536
-// CHECK-NEXT: 10024: ldr     x1, [x0, #176]
-// CHECK-NEXT: 10028: add     x0, x0, #176
-// CHECK-NEXT: 1002c: blr     x1
+// CHECK:      102b8: adrp    x0, #65536
+// CHECK-NEXT: 102bc: ldr     x1, [x0, #888]
+// CHECK-NEXT: 102c0: add     x0, x0, #888
+// CHECK-NEXT: 102c4: blr     x1
 
         .section .tbss,"awT",@nobits
         .type   local1,@object
         .p2align 2
 local1:
         .word   0
         .size   local1, 4
 
         .type   local2,@object
         .p2align 3
 local2:
         .xword  0
         .size   local2, 8
 
 
 // 0x1000 + 4096 + 160 = 0x20A0
 // 0x1000 + 4096 + 176 = 0x20B0
 // 0x1000 + 4096 + 144 = 0x2090
 
 // R_AARCH64_TLSDESC - 0x0 -> start of tls block
 // R_AARCH64_TLSDESC - 0x8 -> align (sizeof (local1), 8)
 
 // REL:      Relocations [
 // REL-NEXT:   Section (4) .rela.dyn {
-// REL-NEXT:     0x200A0 R_AARCH64_TLSDESC - 0x0
-// REL-NEXT:     0x200B0 R_AARCH64_TLSDESC - 0x8
-// REL-NEXT:     0x20090 R_AARCH64_TLSDESC a 0x0
+// REL-NEXT:     0x20368 R_AARCH64_TLSDESC - 0x0
+// REL-NEXT:     0x20378 R_AARCH64_TLSDESC - 0x8
+// REL-NEXT:     0x20358 R_AARCH64_TLSDESC a 0x0
 // REL-NEXT:   }
 // REL-NEXT: ]

test/ELF/aarch64-tlsld-ldst.s

_start:  mrs x8, TPIDR_EL0
 
         add x8, x8, :tprel_hi12:var3
         ldrh w0, [x8, :tprel_lo12_nc:var3]
 
         add x8, x8, :tprel_hi12:var4
         ldrb w0, [x8, :tprel_lo12_nc:var4]
 
 // CHECK: _start:
-// CHECK-NEXT:    210000:       mrs     x8, TPIDR_EL0
+// CHECK-NEXT:    210158:       mrs     x8, TPIDR_EL0
 // 0x0 + c10 = 0xc10       = tcb (16-bytes) + var0
-// CHECK-NEXT:    210004:       add     x8, x8, #0, lsl #12
-// CHECK-NEXT:    210008:       ldr     q20, [x8, #3088]
+// CHECK-NEXT:    21015c:       add     x8, x8, #0, lsl #12
+// CHECK-NEXT:    210160:       ldr     q20, [x8, #3088]
 // 0x1000 + 0x820 = 0x1820 = tcb + var1
-// CHECK-NEXT:    21000c:       add     x8, x8, #1, lsl #12
-// CHECK-NEXT:    210010:       ldr     x0, [x8, #2080]
+// CHECK-NEXT:    210164:       add     x8, x8, #1, lsl #12
+// CHECK-NEXT:    210168:       ldr     x0, [x8, #2080]
 // 0x2000 + 0x428 = 0x2428 = tcb + var2
-// CHECK-NEXT:    210014:       add     x8, x8, #2, lsl #12
-// CHECK-NEXT:    210018:       ldr     w0, [x8, #1064]
+// CHECK-NEXT:    21016c:       add     x8, x8, #2, lsl #12
+// CHECK-NEXT:    210170:       ldr     w0, [x8, #1064]
 // 0x3000 + 0x2c  = 0x302c = tcb + var3
-// CHECK-NEXT:    21001c:       add     x8, x8, #3, lsl #12
-// CHECK-NEXT:    210020:       ldrh    w0, [x8, #44]
+// CHECK-NEXT:    210174:       add     x8, x8, #3, lsl #12
+// CHECK-NEXT:    210178:       ldrh    w0, [x8, #44]
 // 0x3000 + 0xc2e = 0x32ce = tcb + var4
-// CHECK-NEXT:    210024:       add     x8, x8, #3, lsl #12
-// CHECK-NEXT:    210028:       ldrb    w0, [x8, #3118]
+// CHECK-NEXT:    21017c:       add     x8, x8, #3, lsl #12
+// CHECK-NEXT:    210180:       ldrb    w0, [x8, #3118]
 
 // CHECK-SYMS:      0000000000000c00     0 TLS     GLOBAL DEFAULT    2 var0
 // CHECK-SYMS-NEXT: 0000000000001810     4 TLS     GLOBAL DEFAULT    2 var1
 // CHECK-SYMS-NEXT: 0000000000002418     2 TLS     GLOBAL DEFAULT    2 var2
 // CHECK-SYMS-NEXT: 000000000000301c     1 TLS     GLOBAL DEFAULT    2 var3
 // CHECK-SYMS-NEXT: 0000000000003c1e     0 TLS     GLOBAL DEFAULT    2 var4
 
         .globl var0

test/ELF/aarch64-tstbr14-reloc.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/aarch64-tstbr14-reloc.s -o %t1
 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t2
 # RUN: ld.lld %t1 %t2 -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
 # RUN: ld.lld -shared %t1 %t2 -o %t3
 # RUN: llvm-objdump -d --no-show-raw-insn %t3 | FileCheck -check-prefix=DSO %s
 # RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
 
-# 0x1101c - 28 = 0x20000
-# 0x11020 - 16 = 0x20010
-# 0x11024 - 36 = 0x20000
-# 0x11028 - 24 = 0x20010
-# CHECK:      Disassembly of section .text:
-# CHECK-EMPTY:
-# CHECK-NEXT: _foo:
-# CHECK-NEXT:  210000: nop
-# CHECK-NEXT:  210004: nop
-# CHECK-NEXT:  210008: nop
-# CHECK-NEXT:  21000c: nop
+# CHECK:      _foo:
+# CHECK-NEXT:  210120: nop
+# CHECK-NEXT:  210124: nop
+# CHECK-NEXT:  210128: nop
+# CHECK-NEXT:  21012c: nop
 # CHECK:      _bar:
-# CHECK-NEXT:  210010: nop
-# CHECK-NEXT:  210014: nop
-# CHECK-NEXT:  210018: nop
+# CHECK-NEXT:  210130: nop
+# CHECK-NEXT:  210134: nop
+# CHECK-NEXT:  210138: nop
 # CHECK:      _start:
-# CHECK-NEXT:  21001c: tbnz w3, #15, #-28
-# CHECK-NEXT:  210020: tbnz w3, #15, #-16
-# CHECK-NEXT:  210024: tbz x6, #45, #-36
-# CHECK-NEXT:  210028: tbz x6, #45, #-24
+# CHECK-NEXT:  21013c: tbnz w3, #15, #-28 <_foo>
+# CHECK-NEXT:  210140: tbnz w3, #15, #-16 <_bar>
+# CHECK-NEXT:  210144: tbz x6, #45, #-36 <_foo>
+# CHECK-NEXT:  210148: tbz x6, #45, #-24 <_bar>
 
 #DSOREL:      Section {
 #DSOREL:        Index:
 #DSOREL:        Name: .got.plt
 #DSOREL-NEXT:   Type: SHT_PROGBITS
 #DSOREL-NEXT:   Flags [
 #DSOREL-NEXT:     SHF_ALLOC
 #DSOREL-NEXT:     SHF_WRITE
 #DSOREL-NEXT:   ]
-#DSOREL-NEXT:   Address: 0x30000
-#DSOREL-NEXT:   Offset: 0x30000
+#DSOREL-NEXT:   Address: 0x30420
+#DSOREL-NEXT:   Offset: 0x420
 #DSOREL-NEXT:   Size: 40
 #DSOREL-NEXT:   Link: 0
 #DSOREL-NEXT:   Info: 0
 #DSOREL-NEXT:   AddressAlignment: 8
 #DSOREL-NEXT:   EntrySize: 0
 #DSOREL-NEXT:  }
 #DSOREL:      Relocations [
 #DSOREL-NEXT:  Section ({{.*}}) .rela.plt {
-#DSOREL-NEXT:    0x30018 R_AARCH64_JUMP_SLOT _foo
-#DSOREL-NEXT:    0x30020 R_AARCH64_JUMP_SLOT _bar
+#DSOREL-NEXT:    0x30438 R_AARCH64_JUMP_SLOT _foo
+#DSOREL-NEXT:    0x30440 R_AARCH64_JUMP_SLOT _bar
 #DSOREL-NEXT:  }
 #DSOREL-NEXT:]
 
 #DSO:      Disassembly of section .text:
 #DSO-EMPTY:
 #DSO-NEXT: _foo:
-#DSO-NEXT:  10000: nop
-#DSO-NEXT:  10004: nop
-#DSO-NEXT:  10008: nop
-#DSO-NEXT:  1000c: nop
+#DSO-NEXT:  102f8: nop
+#DSO-NEXT:  102fc: nop
+#DSO-NEXT:  10300: nop
+#DSO-NEXT:  10304: nop
 #DSO:      _bar:
-#DSO-NEXT:  10010: nop
-#DSO-NEXT:  10014: nop
-#DSO-NEXT:  10018: nop
+#DSO-NEXT:  10308: nop
+#DSO-NEXT:  1030c: nop
+#DSO-NEXT:  10310: nop
 #DSO:      _start:
-# 0x1001c + 52 = 0x10050 = PLT[1]
-# 0x10020 + 64 = 0x10060 = PLT[2]
-# 0x10024 + 44 = 0x10050 = PLT[1]
-# 0x10028 + 56 = 0x10060 = PLT[2]
-#DSO-NEXT:  1001c: tbnz w3, #15, #52
-#DSO-NEXT:  10020: tbnz w3, #15, #64
-#DSO-NEXT:  10024: tbz x6, #45, #44
-#DSO-NEXT:  10028: tbz x6, #45, #56
+#DSO-NEXT:  10314: tbnz w3, #15, #60 <_foo@plt>
+#DSO-NEXT:  10318: tbnz w3, #15, #72 <_bar@plt>
+#DSO-NEXT:  1031c: tbz x6, #45, #52 <_foo@plt>
+#DSO-NEXT:  10320: tbz x6, #45, #64 <_bar@plt>
 #DSO-EMPTY:
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-EMPTY:
 #DSO-NEXT: .plt:
-#DSO-NEXT:  10030: stp x16, x30, [sp, #-16]!
-#DSO-NEXT:  10034: adrp x16, #131072
-#DSO-NEXT:  10038: ldr x17, [x16, #16]
-#DSO-NEXT:  1003c: add x16, x16, #16
-#DSO-NEXT:  10040: br x17
-#DSO-NEXT:  10044: nop
-#DSO-NEXT:  10048: nop
-#DSO-NEXT:  1004c: nop
+#DSO-NEXT:  10330: stp x16, x30, [sp, #-16]!
+#DSO-NEXT:  10334: adrp x16, #131072
+#DSO-NEXT:  10338: ldr x17, [x16, #1072]
+#DSO-NEXT:  1033c: add x16, x16, #1072
+#DSO-NEXT:  10340: br x17
+#DSO-NEXT:  10344: nop
+#DSO-NEXT:  10348: nop
+#DSO-NEXT:  1034c: nop
 #DSO-EMPTY:
 #DSO-NEXT:   _foo@plt:
-#DSO-NEXT:  10050: adrp x16, #131072
-#DSO-NEXT:  10054: ldr x17, [x16, #24]
-#DSO-NEXT:  10058: add x16, x16, #24
-#DSO-NEXT:  1005c: br x17
+#DSO-NEXT:  10350: adrp x16, #131072
+#DSO-NEXT:  10354: ldr x17, [x16, #1080]
+#DSO-NEXT:  10358: add x16, x16, #1080
+#DSO-NEXT:  1035c: br x17
 #DSO-EMPTY:
 #DSO-NEXT:   _bar@plt:
-#DSO-NEXT:  10060: adrp x16, #131072
-#DSO-NEXT:  10064: ldr x17, [x16, #32]
-#DSO-NEXT:  10068: add x16, x16, #32
-#DSO-NEXT:  1006c: br x17
+#DSO-NEXT:  10360: adrp x16, #131072
+#DSO-NEXT:  10364: ldr x17, [x16, #1088]
+#DSO-NEXT:  10368: add x16, x16, #1088
+#DSO-NEXT:  1036c: br x17
 
 .globl _start
 _start:
  tbnz w3, #15, _foo
  tbnz w3, #15, _bar
  tbz x6, #45, _foo
  tbz x6, #45, _bar

test/ELF/aarch64-undefined-weak.s

 // R_AARCH64_PREL16
  .hword target - .
 // R_AARCH64_LD_PREL_LO19
  ldr x8, target
 
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // 2162688 = 0x210000
-// CHECK:         210000:       b       #4
-// CHECK-NEXT:    210004:       bl      #4
-// CHECK-NEXT:    210008:       b.eq    #4
-// CHECK-NEXT:    21000c:       cbz     x1, #4
-// CHECK-NEXT:    210010:       adr     x0, #0
-// CHECK-NEXT:    210014:       adrp    x0, #0
-// CHECK:         210018:       00 00 00 00 .word   0x00000000
-// CHECK-NEXT:    21001c:       00 00 00 00 .word   0x00000000
-// CHECK-NEXT:    210020:       00 00 00 00 .word   0x00000000
-// CHECK-NEXT:    210024:       00 00 .short  0x0000
+// CHECK:         210120:       b       #4
+// CHECK-NEXT:    210124:       bl      #4
+// CHECK-NEXT:    210128:       b.eq    #4
+// CHECK-NEXT:    21012c:       cbz     x1, #4
+// CHECK-NEXT:    210130:       adr     x0, #0
+// CHECK-NEXT:    210134:       adrp    x0, #0
+// CHECK:         210138:       00 00 00 00 .word   0x00000000
+// CHECK-NEXT:    21013c:       00 00 00 00 .word   0x00000000
+// CHECK-NEXT:    210140:       00 00 00 00 .word   0x00000000
+// CHECK-NEXT:    210144:       00 00 .short  0x0000
 // CHECK:         $x.2:
-// CHECK-NEXT:    210026:       ldr     x8, #0
+// CHECK-NEXT:    210146:       ldr     x8, #0

test/ELF/basic-aarch64.s

 # CHECK-NEXT:     ABIVersion: 0
 # CHECK-NEXT:     Unused: (00 00 00 00 00 00 00)
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Type: Executable (0x2)
 # CHECK-NEXT:   Machine: EM_AARCH64 (0xB7)
 # CHECK-NEXT:   Version: 1
 # CHECK-NEXT:   Entry: [[ENTRY:0x[0-9A-F]+]]
 # CHECK-NEXT:   ProgramHeaderOffset: 0x40
-# CHECK-NEXT:   SectionHeaderOffset: 0x10098
+# CHECK-NEXT:   SectionHeaderOffset: 0x1B8
 # CHECK-NEXT:   Flags [ (0x0)
 # CHECK-NEXT:   ]
 # CHECK-NEXT:   HeaderSize: 64
 # CHECK-NEXT:   ProgramHeaderEntrySize: 56
 # CHECK-NEXT:   ProgramHeaderCount: 4
 # CHECK-NEXT:   SectionHeaderEntrySize: 64
 # CHECK-NEXT:   SectionHeaderCount: 6
 # CHECK-NEXT:   StringTableSectionIndex: 4

 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 1
 # CHECK-NEXT:     Name: .text
 # CHECK-NEXT:     Type: SHT_PROGBITS (0x1)
 # CHECK-NEXT:     Flags [ (0x6)
 # CHECK-NEXT:       SHF_ALLOC (0x2)
 # CHECK-NEXT:       SHF_EXECINSTR (0x4)
 # CHECK-NEXT:     ]
-# CHECK-NEXT:     Address: 0x210000
-# CHECK-NEXT:     Offset: 0x10000
+# CHECK-NEXT:     Address: 0x210120
+# CHECK-NEXT:     Offset: 0x120
 # CHECK-NEXT:     Size: 12
 # CHECK-NEXT:     Link: 0
 # CHECK-NEXT:     Info: 0
 # CHECK-NEXT:     AddressAlignment: 4
 # CHECK-NEXT:     EntrySize: 0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 2
 # CHECK-NEXT:     Name: .comment
 # CHECK-NEXT:     Type: SHT_PROGBITS (0x1)
 # CHECK-NEXT:     Flags [ (0x30)
 # CHECK-NEXT:       SHF_MERGE (0x10)
 # CHECK-NEXT:       SHF_STRINGS (0x20)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Address: 0x0
-# CHECK-NEXT:     Offset: 0x1000C
+# CHECK-NEXT:     Offset: 0x12C
 # CHECK-NEXT:     Size: 8
 # CHECK-NEXT:     Link: 0
 # CHECK-NEXT:     Info: 0
 # CHECK-NEXT:     AddressAlignment: 1
 # CHECK-NEXT:     EntrySize: 1
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 3
 # CHECK-NEXT:     Name: .symtab
 # CHECK-NEXT:     Type: SHT_SYMTAB (0x2)
 # CHECK-NEXT:     Flags [ (0x0)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Address: 0x0
-# CHECK-NEXT:     Offset: 0x10018
+# CHECK-NEXT:     Offset: 0x138
 # CHECK-NEXT:     Size: 72
 # CHECK-NEXT:     Link: 5
 # CHECK-NEXT:     Info: 2
 # CHECK-NEXT:     AddressAlignment: 8
 # CHECK-NEXT:     EntrySize: 24
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 4
 # CHECK-NEXT:     Name: .shstrtab
 # CHECK-NEXT:     Type: SHT_STRTAB (0x3)
 # CHECK-NEXT:     Flags [ (0x0)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Address: 0x0
-# CHECK-NEXT:     Offset: 0x10060
+# CHECK-NEXT:     Offset: 0x180
 # CHECK-NEXT:     Size: 42
 # CHECK-NEXT:     Link: 0
 # CHECK-NEXT:     Info: 0
 # CHECK-NEXT:     AddressAlignment: 1
 # CHECK-NEXT:     EntrySize: 0
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Section {
 # CHECK-NEXT:     Index: 5
 # CHECK-NEXT:     Name: .strtab
 # CHECK-NEXT:     Type: SHT_STRTAB (0x3)
 # CHECK-NEXT:     Flags [ (0x0)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Address: 0x0
-# CHECK-NEXT:     Offset: 0x1008A
+# CHECK-NEXT:     Offset: 0x1AA
 # CHECK-NEXT:     Size: 13
 # CHECK-NEXT:     Link: 0
 # CHECK-NEXT:     Info: 0
 # CHECK-NEXT:     AddressAlignment: 1
 # CHECK-NEXT:     EntrySize: 0
 # CHECK-NEXT:   }
 # CHECK-NEXT: ]
 # CHECK-NEXT: Symbols [
 # CHECK-NEXT:   Symbol {
 # CHECK-NEXT:     Name:  (0)
 # CHECK-NEXT:     Value: 0x0
 # CHECK-NEXT:     Size: 0
 # CHECK-NEXT:     Binding: Local (0x0)
 # CHECK-NEXT:     Type: None (0x0)
 # CHECK-NEXT:     Other: 0
 # CHECK-NEXT:     Section: Undefined (0x0)
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Symbol {
 # CHECK-NEXT:     Name: $x.0
-# CHECK-NEXT:     Value: 0x210000
+# CHECK-NEXT:     Value: 0x210120
 # CHECK-NEXT:     Size: 0
 # CHECK-NEXT:     Binding: Local (0x0)
 # CHECK-NEXT:     Type: None (0x0)
 # CHECK-NEXT:     Other: 0
 # CHECK-NEXT:     Section: .text
 # CHECK-NEXT:   }
 # CHECK-NEXT:   Symbol {
 # CHECK-NEXT:     Name: _start
 # CHECK-NEXT:     Value: [[ENTRY]]
 # CHECK-NEXT:     Size: 0
 # CHECK-NEXT:     Binding: Global (0x1)
 # CHECK-NEXT:     Type: None (0x0)
 # CHECK-NEXT:     Other: 0
 # CHECK-NEXT:     Section: .text
 # CHECK-NEXT:   }
 # CHECK-NEXT: ]
 # CHECK-NEXT: ProgramHeaders [
 # CHECK-NEXT:   ProgramHeader {
 # CHECK-NEXT:     Type: PT_PHDR (0x6)
 # CHECK-NEXT:     Offset: 0x40
-# CHECK-NEXT:     VirtualAddress: 0x200040
-# CHECK-NEXT:     PhysicalAddress: 0x200040
+# CHECK-NEXT:     VirtualAddress: 0x210040
+# CHECK-NEXT:     PhysicalAddress: 0x210040
 # CHECK-NEXT:     FileSize: 224
 # CHECK-NEXT:     MemSize: 224
 # CHECK-NEXT:     Flags [ (0x4)
 # CHECK-NEXT:       PF_R (0x4)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Alignment: 8
 # CHECK-NEXT:   }
 # CHECK-NEXT:   ProgramHeader {
 # CHECK-NEXT:     Type: PT_LOAD (0x1)
 # CHECK-NEXT:     Offset: 0x0
-# CHECK-NEXT:     VirtualAddress: 0x200000
-# CHECK-NEXT:     PhysicalAddress: 0x200000
+# CHECK-NEXT:     VirtualAddress: 0x210000
+# CHECK-NEXT:     PhysicalAddress: 0x210000
 # CHECK-NEXT:     FileSize: 288
 # CHECK-NEXT:     MemSize: 288
 # CHECK-NEXT:     Flags [
 # CHECK-NEXT:       PF_R
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Alignment: 65536
 # CHECK-NEXT:   }
 # CHECK-NEXT:   ProgramHeader {
 # CHECK-NEXT:     Type: PT_LOAD (0x1)
-# CHECK-NEXT:     Offset: 0x1000
-# CHECK-NEXT:     VirtualAddress: 0x210000
-# CHECK-NEXT:     PhysicalAddress: 0x210000
+# CHECK-NEXT:     Offset: 0x120
+# CHECK-NEXT:     VirtualAddress: 0x210120
+# CHECK-NEXT:     PhysicalAddress: 0x210120
 # CHECK-NEXT:     FileSize: 12
 # CHECK-NEXT:     MemSize: 12
 # CHECK-NEXT:     Flags [ (0x5)
 # CHECK-NEXT:       PF_R (0x4)
 # CHECK-NEXT:       PF_X (0x1)
 # CHECK-NEXT:     ]
 # CHECK-NEXT:     Alignment: 65536
 # CHECK-NEXT:   }

test/ELF/global-offset-table-position-aarch64.s

 .global _start
 .type _start,@function
 _start:
  bl f
 .data
 .long _GLOBAL_OFFSET_TABLE_ - .
 
 // CHECK: Name: _GLOBAL_OFFSET_TABLE_ (11)
-// CHECK-NEXT:     Value: 0x30008
+// CHECK-NEXT:     Value: 0x30360
 // CHECK-NEXT:     Size: 0
 // CHECK-NEXT:     Binding: Local (0x0)
 // CHECK-NEXT:     Type: None (0x0)
 // CHECK-NEXT:     Other [ (0x2)
 // CHECK-NEXT:       STV_HIDDEN (0x2)
 // CHECK-NEXT:     ]
 // CHECK-NEXT:     Section: .got.plt

test/ELF/pack-dyn-relocs-loop.s

 // REQUIRES: arm, aarch64
 
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-android %s -o %t.o
-// RUN: ld.lld -shared %t.o -o %t.so --pack-dyn-relocs=android -z norelro
+// RUN: ld.lld -shared %t.o -o %t.so --pack-dyn-relocs=android -z norelro -z separate-code
 // RUN: llvm-readobj -S %t.so | FileCheck %s
 
 // This test is making sure the Android packed relocation support doesn't
 // cause an infinite loop due to the size of the section oscillating
 // (because the size of the section impacts the layout of the following
 // sections).
 
 // This test is very sensitive to the exact section sizes and offsets,

test/ELF/pack-dyn-relocs.s

 // REQUIRES: arm, aarch64
 
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-shared.s -o %t.a32.so.o
-// RUN: ld.lld -shared %t.a32.so.o -o %t.a32.so
+// RUN: ld.lld -shared %t.a32.so.o -soname=so -o %t.a32.so
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t.a32
 // RUN: ld.lld -pie --pack-dyn-relocs=none %t.a32 %t.a32.so -o %t2.a32
 // RUN: llvm-readobj -r %t2.a32 | FileCheck --check-prefix=UNPACKED32 %s
 
 // Unpacked should have the relative relocations in their natural order.
 // UNPACKED32:          Section ({{.+}}) .rel.dyn {
 // UNPACKED32-NEXT:     0x2000 R_ARM_RELATIVE - 0x0
 // UNPACKED32-NEXT:     0x2004 R_ARM_RELATIVE - 0x0

 // RELR32-NEXT:          0x2054 R_ARM_RELATIVE - 0x0
 // RELR32-NEXT:          0x2058 R_ARM_RELATIVE - 0x0
 // RELR32-NEXT:          0x205C R_ARM_RELATIVE - 0x0
 // RELR32-NEXT:          0x2060 R_ARM_RELATIVE - 0x0
 // RELR32-NEXT:          0x2064 R_ARM_RELATIVE - 0x0
 // RELR32-NEXT:          }
 
 // RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %p/Inputs/shared2.s -o %t.a64.so.o
-// RUN: ld.lld -shared %t.a64.so.o -o %t.a64.so
+// RUN: ld.lld -shared %t.a64.so.o -soname=so -o %t.a64.so
 // RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %s -o %t.a64
 // RUN: ld.lld -pie --pack-dyn-relocs=none %t.a64 %t.a64.so -o %t2.a64
 // RUN: llvm-readobj -r %t2.a64 | FileCheck --check-prefix=UNPACKED64 %s
 
 // UNPACKED64:          Section ({{.+}}) .rela.dyn {
-// UNPACKED64-NEXT:     0x20000 R_AARCH64_RELATIVE - 0x1
-// UNPACKED64-NEXT:     0x20008 R_AARCH64_RELATIVE - 0x2
-// UNPACKED64-NEXT:     0x20010 R_AARCH64_RELATIVE - 0x3
-// UNPACKED64-NEXT:     0x20018 R_AARCH64_RELATIVE - 0x4
-// UNPACKED64-NEXT:     0x20020 R_AARCH64_RELATIVE - 0x5
-// UNPACKED64-NEXT:     0x20028 R_AARCH64_RELATIVE - 0x6
-// UNPACKED64-NEXT:     0x20030 R_AARCH64_RELATIVE - 0x7
-// UNPACKED64-NEXT:     0x20038 R_AARCH64_RELATIVE - 0x8
-
-// UNPACKED64-NEXT:     0x20048 R_AARCH64_RELATIVE - 0x1
-// UNPACKED64-NEXT:     0x20050 R_AARCH64_RELATIVE - 0x2
-// UNPACKED64-NEXT:     0x20058 R_AARCH64_RELATIVE - 0x3
-// UNPACKED64-NEXT:     0x20060 R_AARCH64_RELATIVE - 0x4
-// UNPACKED64-NEXT:     0x20068 R_AARCH64_RELATIVE - 0x5
-// UNPACKED64-NEXT:     0x20070 R_AARCH64_RELATIVE - 0x6
-// UNPACKED64-NEXT:     0x20078 R_AARCH64_RELATIVE - 0x7
-
-// UNPACKED64-NEXT:     0x20088 R_AARCH64_RELATIVE - 0x1
-// UNPACKED64-NEXT:     0x20090 R_AARCH64_RELATIVE - 0x2
-// UNPACKED64-NEXT:     0x20098 R_AARCH64_RELATIVE - 0x3
-// UNPACKED64-NEXT:     0x200A0 R_AARCH64_RELATIVE - 0x4
-// UNPACKED64-NEXT:     0x200A8 R_AARCH64_RELATIVE - 0x5
-// UNPACKED64-NEXT:     0x200B0 R_AARCH64_RELATIVE - 0x6
-// UNPACKED64-NEXT:     0x200B8 R_AARCH64_RELATIVE - 0x7
-// UNPACKED64-NEXT:     0x200C0 R_AARCH64_RELATIVE - 0x8
-// UNPACKED64-NEXT:     0x200C8 R_AARCH64_RELATIVE - 0x9
-
-// UNPACKED64-NEXT:     0x200D1 R_AARCH64_RELATIVE - 0xA
-// UNPACKED64-NEXT:     0x20040 R_AARCH64_ABS64 bar2 0x1
-// UNPACKED64-NEXT:     0x20080 R_AARCH64_ABS64 zed2 0x0
+// UNPACKED64-NEXT:     0x305F0 R_AARCH64_RELATIVE - 0x1
+// UNPACKED64-NEXT:     0x305F8 R_AARCH64_RELATIVE - 0x2
+// UNPACKED64-NEXT:     0x30600 R_AARCH64_RELATIVE - 0x3
+// UNPACKED64-NEXT:     0x30608 R_AARCH64_RELATIVE - 0x4
+// UNPACKED64-NEXT:     0x30610 R_AARCH64_RELATIVE - 0x5
+// UNPACKED64-NEXT:     0x30618 R_AARCH64_RELATIVE - 0x6
+// UNPACKED64-NEXT:     0x30620 R_AARCH64_RELATIVE - 0x7
+// UNPACKED64-NEXT:     0x30628 R_AARCH64_RELATIVE - 0x8
+
+// UNPACKED64-NEXT:     0x30638 R_AARCH64_RELATIVE - 0x1
+// UNPACKED64-NEXT:     0x30640 R_AARCH64_RELATIVE - 0x2
+// UNPACKED64-NEXT:     0x30648 R_AARCH64_RELATIVE - 0x3
+// UNPACKED64-NEXT:     0x30650 R_AARCH64_RELATIVE - 0x4
+// UNPACKED64-NEXT:     0x30658 R_AARCH64_RELATIVE - 0x5
+// UNPACKED64-NEXT:     0x30660 R_AARCH64_RELATIVE - 0x6
+// UNPACKED64-NEXT:     0x30668 R_AARCH64_RELATIVE - 0x7
+
+// UNPACKED64-NEXT:     0x30678 R_AARCH64_RELATIVE - 0x1
+// UNPACKED64-NEXT:     0x30680 R_AARCH64_RELATIVE - 0x2
+// UNPACKED64-NEXT:     0x30688 R_AARCH64_RELATIVE - 0x3
+// UNPACKED64-NEXT:     0x30690 R_AARCH64_RELATIVE - 0x4
+// UNPACKED64-NEXT:     0x30698 R_AARCH64_RELATIVE - 0x5
+// UNPACKED64-NEXT:     0x306A0 R_AARCH64_RELATIVE - 0x6
+// UNPACKED64-NEXT:     0x306A8 R_AARCH64_RELATIVE - 0x7
+// UNPACKED64-NEXT:     0x306B0 R_AARCH64_RELATIVE - 0x8
+// UNPACKED64-NEXT:     0x306B8 R_AARCH64_RELATIVE - 0x9
+
+// UNPACKED64-NEXT:     0x306C1 R_AARCH64_RELATIVE - 0xA
+// UNPACKED64-NEXT:     0x30630 R_AARCH64_ABS64 bar2 0x1
+// UNPACKED64-NEXT:     0x30670 R_AARCH64_ABS64 zed2 0x0
 // UNPACKED64-NEXT:     }
 
 // RUN: ld.lld -pie --pack-dyn-relocs=android %t.a64 %t.a64.so -o %t3.a64
 // RUN: llvm-readobj -S --dynamic-table %t3.a64 | FileCheck --check-prefix=ANDROID64-HEADERS %s
 // RUN: llvm-readobj -r %t3.a64 | FileCheck --check-prefix=ANDROID64 %s
 
 // ANDROID64-HEADERS:       Index: 1
 // ANDROID64-HEADERS-NEXT:  Name: .dynsym

 // ANDROID64-HEADERS-NEXT:  Info: 0
 // ANDROID64-HEADERS-NEXT:  AddressAlignment: 8
 // ANDROID64-HEADERS-NEXT:  EntrySize: 1
 
 // ANDROID64-HEADERS: 0x0000000060000011 ANDROID_RELA          [[ADDR]]
 // ANDROID64-HEADERS: 0x0000000060000012 ANDROID_RELASZ        [[SIZE]]
 
 // ANDROID64:          Section ({{.+}}) .rela.dyn {
-// ANDROID64-NEXT:     0x20000 R_AARCH64_RELATIVE - 0x1
-// ANDROID64-NEXT:     0x20008 R_AARCH64_RELATIVE - 0x2
-// ANDROID64-NEXT:     0x20010 R_AARCH64_RELATIVE - 0x3
-// ANDROID64-NEXT:     0x20018 R_AARCH64_RELATIVE - 0x4
-// ANDROID64-NEXT:     0x20020 R_AARCH64_RELATIVE - 0x5
-// ANDROID64-NEXT:     0x20028 R_AARCH64_RELATIVE - 0x6
-// ANDROID64-NEXT:     0x20030 R_AARCH64_RELATIVE - 0x7
-// ANDROID64-NEXT:     0x20038 R_AARCH64_RELATIVE - 0x8
-
-// ANDROID64-NEXT:     0x20088 R_AARCH64_RELATIVE - 0x1
-// ANDROID64-NEXT:     0x20090 R_AARCH64_RELATIVE - 0x2
-// ANDROID64-NEXT:     0x20098 R_AARCH64_RELATIVE - 0x3
-// ANDROID64-NEXT:     0x200A0 R_AARCH64_RELATIVE - 0x4
-// ANDROID64-NEXT:     0x200A8 R_AARCH64_RELATIVE - 0x5
-// ANDROID64-NEXT:     0x200B0 R_AARCH64_RELATIVE - 0x6
-// ANDROID64-NEXT:     0x200B8 R_AARCH64_RELATIVE - 0x7
-// ANDROID64-NEXT:     0x200C0 R_AARCH64_RELATIVE - 0x8
-// ANDROID64-NEXT:     0x200C8 R_AARCH64_RELATIVE - 0x9
-
-// ANDROID64-NEXT:     0x20048 R_AARCH64_RELATIVE - 0x1
-// ANDROID64-NEXT:     0x20050 R_AARCH64_RELATIVE - 0x2
-// ANDROID64-NEXT:     0x20058 R_AARCH64_RELATIVE - 0x3
-// ANDROID64-NEXT:     0x20060 R_AARCH64_RELATIVE - 0x4
-// ANDROID64-NEXT:     0x20068 R_AARCH64_RELATIVE - 0x5
-// ANDROID64-NEXT:     0x20070 R_AARCH64_RELATIVE - 0x6
-// ANDROID64-NEXT:     0x20078 R_AARCH64_RELATIVE - 0x7
-
-// ANDROID64-NEXT:     0x200D1 R_AARCH64_RELATIVE - 0xA
-// ANDROID64-NEXT:     0x20040 R_AARCH64_ABS64 bar2 0x1
-// ANDROID64-NEXT:     0x20080 R_AARCH64_ABS64 zed2 0x0
+// ANDROID64-NEXT:     0x303C0 R_AARCH64_RELATIVE - 0x1
+// ANDROID64-NEXT:     0x303C8 R_AARCH64_RELATIVE - 0x2
+// ANDROID64-NEXT:     0x303D0 R_AARCH64_RELATIVE - 0x3
+// ANDROID64-NEXT:     0x303D8 R_AARCH64_RELATIVE - 0x4
+// ANDROID64-NEXT:     0x303E0 R_AARCH64_RELATIVE - 0x5
+// ANDROID64-NEXT:     0x303E8 R_AARCH64_RELATIVE - 0x6
+// ANDROID64-NEXT:     0x303F0 R_AARCH64_RELATIVE - 0x7
+// ANDROID64-NEXT:     0x303F8 R_AARCH64_RELATIVE - 0x8
+
+// ANDROID64-NEXT:     0x30448 R_AARCH64_RELATIVE - 0x1
+// ANDROID64-NEXT:     0x30450 R_AARCH64_RELATIVE - 0x2
+// ANDROID64-NEXT:     0x30458 R_AARCH64_RELATIVE - 0x3
+// ANDROID64-NEXT:     0x30460 R_AARCH64_RELATIVE - 0x4
+// ANDROID64-NEXT:     0x30468 R_AARCH64_RELATIVE - 0x5
+// ANDROID64-NEXT:     0x30470 R_AARCH64_RELATIVE - 0x6
+// ANDROID64-NEXT:     0x30478 R_AARCH64_RELATIVE - 0x7
+// ANDROID64-NEXT:     0x30480 R_AARCH64_RELATIVE - 0x8
+// ANDROID64-NEXT:     0x30488 R_AARCH64_RELATIVE - 0x9
+
+// ANDROID64-NEXT:     0x30408 R_AARCH64_RELATIVE - 0x1
+// ANDROID64-NEXT:     0x30410 R_AARCH64_RELATIVE - 0x2
+// ANDROID64-NEXT:     0x30418 R_AARCH64_RELATIVE - 0x3
+// ANDROID64-NEXT:     0x30420 R_AARCH64_RELATIVE - 0x4
+// ANDROID64-NEXT:     0x30428 R_AARCH64_RELATIVE - 0x5
+// ANDROID64-NEXT:     0x30430 R_AARCH64_RELATIVE - 0x6
+// ANDROID64-NEXT:     0x30438 R_AARCH64_RELATIVE - 0x7
+
+// ANDROID64-NEXT:     0x30491 R_AARCH64_RELATIVE - 0xA
+// ANDROID64-NEXT:     0x30400 R_AARCH64_ABS64 bar2 0x1
+// ANDROID64-NEXT:     0x30440 R_AARCH64_ABS64 zed2 0x0
 // ANDROID64-NEXT:     }
 
 // RUN: ld.lld -pie --pack-dyn-relocs=relr %t.a64 %t.a64.so -o %t4.a64
 // RUN: llvm-readobj -S --dynamic-table %t4.a64 | FileCheck --check-prefix=RELR64-HEADERS %s
 // RUN: llvm-readobj -r --raw-relr %t4.a64 | FileCheck --check-prefix=RAW-RELR64 %s
 // RUN: llvm-readobj -r %t4.a64 | FileCheck --check-prefix=RELR64 %s
 
 // RELR64-HEADERS:       Index: 1

 
 // RELR64-HEADERS:       0x0000000000000024 RELR                 [[ADDR]]
 // RELR64-HEADERS:       0x0000000000000023 RELRSZ               0x10
 // RELR64-HEADERS:       0x0000000000000025 RELRENT              0x8
 
 // SHT_RELR section contains address/bitmap entries
 // encoding the offsets for relative relocation.
 // RAW-RELR64:           Section ({{.+}}) .relr.dyn {
-// RAW-RELR64-NEXT:      0x20000
+// RAW-RELR64-NEXT:      0x303F0
 // RAW-RELR64-NEXT:      0x3FEFEFF
 // RAW-RELR64-NEXT:      }
 
 // Decoded SHT_RELR section is same as UNPACKED,
 // but contains only the relative relocations.
 // Any relative relocations with odd offset stay in SHT_RELA.
 // RELR64:               Section ({{.+}}) .rela.dyn {
-// RELR64-NEXT:          0x200D1 R_AARCH64_RELATIVE - 0xA
-// RELR64-NEXT:          0x20040 R_AARCH64_ABS64 bar2 0x1
-// RELR64-NEXT:          0x20080 R_AARCH64_ABS64 zed2 0x0
+// RELR64-NEXT:          0x304C1 R_AARCH64_RELATIVE - 0xA
+// RELR64-NEXT:          0x30430 R_AARCH64_ABS64 bar2 0x1
+// RELR64-NEXT:          0x30470 R_AARCH64_ABS64 zed2 0x0
 // RELR64-NEXT:          }
 // RELR64-NEXT:          Section ({{.+}}) .relr.dyn {
-// RELR64-NEXT:          0x20000 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20008 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20010 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20018 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20020 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20028 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20030 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20038 R_AARCH64_RELATIVE - 0x0
-
-// RELR64-NEXT:          0x20048 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20050 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20058 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20060 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20068 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20070 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20078 R_AARCH64_RELATIVE - 0x0
-
-// RELR64-NEXT:          0x20088 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20090 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x20098 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x200A0 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x200A8 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x200B0 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x200B8 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x200C0 R_AARCH64_RELATIVE - 0x0
-// RELR64-NEXT:          0x200C8 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x303F0 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x303F8 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30400 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30408 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30410 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30418 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30420 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30428 R_AARCH64_RELATIVE - 0x0
+
+// RELR64-NEXT:          0x30438 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30440 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30448 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30450 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30458 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30460 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30468 R_AARCH64_RELATIVE - 0x0
+
+// RELR64-NEXT:          0x30478 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30480 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30488 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30490 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x30498 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x304A0 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x304A8 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x304B0 R_AARCH64_RELATIVE - 0x0
+// RELR64-NEXT:          0x304B8 R_AARCH64_RELATIVE - 0x0
 // RELR64-NEXT:          }
 
 .data
 .align 2
 .dc.a __ehdr_start + 1
 .dc.a __ehdr_start + 2
 .dc.a __ehdr_start + 3
 .dc.a __ehdr_start + 4

test/ELF/plt-aarch64.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-freebsd %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=aarch64-pc-freebsd %p/Inputs/plt-aarch64.s -o %t2.o
-// RUN: ld.lld -shared %t2.o -o %t2.so
+// RUN: ld.lld -shared %t2.o -soname=t2.so -o %t2.so
 // RUN: ld.lld -shared %t.o %t2.so -o %t.so
 // RUN: ld.lld %t.o %t2.so -o %t.exe
 // RUN: llvm-readobj -S -r %t.so | FileCheck --check-prefix=CHECKDSO %s
 // RUN: llvm-objdump -s -section=.got.plt %t.so | FileCheck --check-prefix=DUMPDSO %s
-// RUN: llvm-objdump -d %t.so | FileCheck --check-prefix=DISASMDSO %s
+// RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex %t.so | FileCheck --check-prefix=DISASMDSO %s
 // RUN: llvm-readobj -S -r %t.exe | FileCheck --check-prefix=CHECKEXE %s
 // RUN: llvm-objdump -s -section=.got.plt %t.exe | FileCheck --check-prefix=DUMPEXE %s
-// RUN: llvm-objdump -d %t.exe | FileCheck --check-prefix=DISASMEXE %s
+// RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex %t.exe | FileCheck --check-prefix=DISASMEXE %s
 
 // CHECKDSO:     Name: .plt
 // CHECKDSO-NEXT:     Type: SHT_PROGBITS
 // CHECKDSO-NEXT:     Flags [
 // CHECKDSO-NEXT:       SHF_ALLOC
 // CHECKDSO-NEXT:       SHF_EXECINSTR
 // CHECKDSO-NEXT:     ]
-// CHECKDSO-NEXT:     Address: 0x10010
+// CHECKDSO-NEXT:     Address: 0x10340
 // CHECKDSO-NEXT:     Offset:
 // CHECKDSO-NEXT:     Size: 80
 // CHECKDSO-NEXT:     Link:
 // CHECKDSO-NEXT:     Info:
 // CHECKDSO-NEXT:     AddressAlignment: 16
 
 // CHECKDSO:     Name: .got.plt
 // CHECKDSO-NEXT:     Type: SHT_PROGBITS
 // CHECKDSO-NEXT:     Flags [
 // CHECKDSO-NEXT:       SHF_ALLOC
 // CHECKDSO-NEXT:       SHF_WRITE
 // CHECKDSO-NEXT:     ]
-// CHECKDSO-NEXT:     Address: 0x30000
+// CHECKDSO-NEXT:     Address: 0x30450
 // CHECKDSO-NEXT:     Offset:
 // CHECKDSO-NEXT:     Size: 48
 // CHECKDSO-NEXT:     Link:
 // CHECKDSO-NEXT:     Info:
 // CHECKDSO-NEXT:     AddressAlignment: 8
 
 // CHECKDSO: Relocations [
 // CHECKDSO-NEXT:   Section ({{.*}}) .rela.plt {
 
-// &(.got.plt[3]) = 0x30000 + 3 * 8 = 0x30018
-// CHECKDSO-NEXT:     0x30018 R_AARCH64_JUMP_SLOT foo
+// &(.got.plt[3]) = 0x30450 + 3 * 8 = 0x30468
+// CHECKDSO-NEXT:     0x30468 R_AARCH64_JUMP_SLOT foo
 
-// &(.got.plt[4]) = 0x30000 + 4 * 8 = 0x30020
-// CHECKDSO-NEXT:     0x30020 R_AARCH64_JUMP_SLOT bar
+// &(.got.plt[4]) = 0x30450 + 4 * 8 = 0x30470
+// CHECKDSO-NEXT:     0x30470 R_AARCH64_JUMP_SLOT bar
 
-// &(.got.plt[5]) = 0x30000 + 5 * 8 = 0x30028
-// CHECKDSO-NEXT:     0x30028 R_AARCH64_JUMP_SLOT weak
+// &(.got.plt[5]) = 0x30000 + 5 * 8 = 0x30470
+// CHECKDSO-NEXT:     0x30478 R_AARCH64_JUMP_SLOT weak
 // CHECKDSO-NEXT:   }
 // CHECKDSO-NEXT: ]
 
 // DUMPDSO: Contents of section .got.plt:
 // .got.plt[0..2] = 0 (reserved)
 // .got.plt[3..5] = .plt = 0x10010
-// DUMPDSO-NEXT: 30000 00000000 00000000 00000000 00000000  ................
-// DUMPDSO-NEXT: 30010 00000000 00000000 10000100 00000000  ................
-// DUMPDSO-NEXT: 30020 10000100 00000000 10000100 00000000  ................
+// DUMPDSO-NEXT: 30450 00000000 00000000 00000000 00000000
+// DUMPDSO-NEXT: 30460 00000000 00000000 40030100 00000000
+// DUMPDSO-NEXT: 30470 40030100 00000000 40030100 00000000
 
 // DISASMDSO: _start:
-// 0x10030 - 0x10000 = 0x30 = 48
-// DISASMDSO-NEXT:     10000: 0c 00 00 14   b #48
-// 0x10040 - 0x10004 = 0x3c = 60
-// DISASMDSO-NEXT:     10004: 0f 00 00 14   b #60
-// 0x10050 - 0x10008 = 0x48 = 72
-// DISASMDSO-NEXT:     10008: 12 00 00 14   b #72
+// DISASMDSO-NEXT:     10330: b       #0x30 <foo@plt>
+// DISASMDSO-NEXT:     10334: b       #0x3c <bar@plt>
+// DISASMDSO-NEXT:     10338: b       #0x48 <weak@plt>
 
 // DISASMDSO: foo:
-// DISASMDSO-NEXT:     1000c: 1f 20 03 d5   nop
+// DISASMDSO-NEXT:     1033c: nop
 
 // DISASMDSO: Disassembly of section .plt:
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT: .plt:
-// DISASMDSO-NEXT:     10010: f0 7b bf a9   stp x16, x30, [sp, #-16]!
-// &(.got.plt[2]) = 0x3000 + 2 * 8 = 0x3010
-// Page(0x30010) - Page(0x10014) = 0x30000 - 0x10000 = 0x20000 = 131072
-// DISASMDSO-NEXT:     10014: 10 01 00 90   adrp  x16, #131072
-// 0x3010 & 0xFFF = 0x10 = 16
-// DISASMDSO-NEXT:     10018: 11 0a 40 f9 ldr x17, [x16, #16]
-// DISASMDSO-NEXT:     1001c: 10 42 00 91   add x16, x16, #16
-// DISASMDSO-NEXT:     10020: 20 02 1f d6   br  x17
-// DISASMDSO-NEXT:     10024: 1f 20 03 d5   nop
-// DISASMDSO-NEXT:     10028: 1f 20 03 d5   nop
-// DISASMDSO-NEXT:     1002c: 1f 20 03 d5   nop
+// DISASMDSO-NEXT:     10340: stp     x16, x30, [sp, #-0x10]!
+// &(.got.plt[2]) = 0x30450 + 2 * 8 = 0x30460
+// DISASMDSO-NEXT:     10344: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10348: ldr     x17, [x16, #0x460]
+// DISASMDSO-NEXT:     1034c: add     x16, x16, #0x460
+// DISASMDSO-NEXT:     10350: br      x17
+// DISASMDSO-NEXT:     10354: nop
+// DISASMDSO-NEXT:     10358: nop
+// DISASMDSO-NEXT:     1035c: nop
 
-// foo@plt
-// Page(0x30018) - Page(0x10030) = 0x30000 - 0x10000 = 0x20000 = 131072
+// foo@plt 0x30468
+// &.got.plt[foo] = 0x30468
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT:   foo@plt:
-// DISASMDSO-NEXT:     10030: 10 01 00 90   adrp  x16, #131072
-// 0x3018 & 0xFFF = 0x18 = 24
-// DISASMDSO-NEXT:     10034: 11 0e 40 f9   ldr x17, [x16, #24]
-// DISASMDSO-NEXT:     10038: 10 62 00 91   add x16, x16, #24
-// DISASMDSO-NEXT:     1003c: 20 02 1f d6   br  x17
+// DISASMDSO-NEXT:     10360: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10364: ldr     x17, [x16, #0x468]
+// DISASMDSO-NEXT:     10368: add     x16, x16, #0x468
+// DISASMDSO-NEXT:     1036c: br      x17
 
 // bar@plt
-// Page(0x30020) - Page(0x10040) = 0x30000 - 0x10000 = 0x20000 = 131072
+// &.got.plt[foo] = 0x30470
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT:   bar@plt:
-// DISASMDSO-NEXT:     10040: 10 01 00 90   adrp  x16, #131072
-// 0x3020 & 0xFFF = 0x20 = 32
-// DISASMDSO-NEXT:     10044: 11 12 40 f9   ldr x17, [x16, #32]
-// DISASMDSO-NEXT:     10048: 10 82 00 91   add x16, x16, #32
-// DISASMDSO-NEXT:     1004c: 20 02 1f d6   br  x17
+// DISASMDSO-NEXT:     10370: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10374: ldr     x17, [x16, #0x470]
+// DISASMDSO-NEXT:     10378: add     x16, x16, #0x470
+// DISASMDSO-NEXT:     1037c: br      x17
 
 // weak@plt
-// Page(0x30028) - Page(0x10050) = 0x30000 - 0x10000 = 0x20000 = 131072
+// 0x30468 = 0x10000 + 131072 + 1128
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT:   weak@plt:
-// DISASMDSO-NEXT:     10050: 10 01 00 90   adrp  x16, #131072
-// 0x3028 & 0xFFF = 0x28 = 40
-// DISASMDSO-NEXT:     10054: 11 16 40 f9   ldr x17, [x16, #40]
-// DISASMDSO-NEXT:     10058: 10 a2 00 91   add x16, x16, #40
-// DISASMDSO-NEXT:     1005c: 20 02 1f d6   br  x17
+// DISASMDSO-NEXT:     10380: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10384: ldr     x17, [x16, #0x478]
+// DISASMDSO-NEXT:     10388: add     x16, x16, #0x478
+// DISASMDSO-NEXT:     1038c: br      x17
 
 // CHECKEXE:     Name: .plt
 // CHECKEXE-NEXT:     Type: SHT_PROGBITS
 // CHECKEXE-NEXT:     Flags [
 // CHECKEXE-NEXT:       SHF_ALLOC
 // CHECKEXE-NEXT:       SHF_EXECINSTR
 // CHECKEXE-NEXT:     ]
-// CHECKEXE-NEXT:     Address: 0x210010
+// CHECKEXE-NEXT:     Address: 0x2102E0
 // CHECKEXE-NEXT:     Offset:
 // CHECKEXE-NEXT:     Size: 64
 // CHECKEXE-NEXT:     Link:
 // CHECKEXE-NEXT:     Info:
 // CHECKEXE-NEXT:     AddressAlignment: 16
 
 // CHECKEXE:     Name: .got.plt
 // CHECKEXE-NEXT:     Type: SHT_PROGBITS
 // CHECKEXE-NEXT:     Flags [
 // CHECKEXE-NEXT:       SHF_ALLOC
 // CHECKEXE-NEXT:       SHF_WRITE
 // CHECKEXE-NEXT:     ]
-// CHECKEXE-NEXT:     Address: 0x230000
+// CHECKEXE-NEXT:     Address: 0x2303F0
 // CHECKEXE-NEXT:     Offset:
 // CHECKEXE-NEXT:     Size: 40
 // CHECKEXE-NEXT:     Link:
 // CHECKEXE-NEXT:     Info:
 // CHECKEXE-NEXT:     AddressAlignment: 8
 
 // CHECKEXE: Relocations [
 // CHECKEXE-NEXT:   Section ({{.*}}) .rela.plt {
 
-// &(.got.plt[3]) = 0x230000 + 3 * 8 = 0x230018
-// CHECKEXE-NEXT:     0x230018 R_AARCH64_JUMP_SLOT bar 0x0
+// &(.got.plt[3]) = 0x2303f0 + 3 * 8 = 0x230408
+// CHECKEXE-NEXT:     0x230408 R_AARCH64_JUMP_SLOT bar 0x0
 
-// &(.got.plt[4]) = 0x230000 + 4 * 8 = 0x230020
-// CHECKEXE-NEXT:     0x230020 R_AARCH64_JUMP_SLOT weak 0x0
+// &(.got.plt[4]) = 0x2303f0 + 4 * 8 = 0x230410
+// CHECKEXE-NEXT:     0x230410 R_AARCH64_JUMP_SLOT weak 0x0
 // CHECKEXE-NEXT:   }
 // CHECKEXE-NEXT: ]
 
 // DUMPEXE: Contents of section .got.plt:
 // .got.plt[0..2] = 0 (reserved)
 // .got.plt[3..4] = .plt = 0x40010
-// DUMPEXE-NEXT:  230000 00000000 00000000 00000000 00000000
-// DUMPEXE-NEXT:  230010 00000000 00000000 10002100 00000000
-// DUMPEXE-NEXT:  230020 10002100 00000000
+// DUMPEXE-NEXT:  2303f0 00000000 00000000 00000000 00000000
+// DUMPEXE-NEXT:  230400 00000000 00000000 e0022100 00000000
+// DUMPEXE-NEXT:  230410 e0022100 00000000
 
 // DISASMEXE: _start:
-// 0x21000c - 0x210000 = 0xc = 12
-// DISASMEXE-NEXT:    210000: 03 00 00 14   b #12
-// 0x210030 - 0x210004 = 0x2c = 44
-// DISASMEXE-NEXT:    210004: 0b 00 00 14   b #44
-// 0x210040 - 0x210008 = 0x38 = 56
-// DISASMEXE-NEXT:    210008: 0e 00 00 14   b #56
+// DISASMEXE-NEXT:    2102c8: b #0xc <foo>
+// DISASMEXE-NEXT:    2102cc: b #0x34 <bar@plt>
+// DISASMEXE-NEXT:    2102d0: b #0x40 <weak@plt>
 
 // DISASMEXE: foo:
-// DISASMEXE-NEXT:    21000c: 1f 20 03 d5   nop
+// DISASMEXE-NEXT:    2102d4: nop
 
 // DISASMEXE: Disassembly of section .plt:
 // DISASMEXE-EMPTY:
 // DISASMEXE-NEXT: .plt:
-// DISASMEXE-NEXT:    210010: f0 7b bf a9   stp x16, x30, [sp, #-16]!
-// &(.got.plt[2]) = 0x2200B0 + 2 * 8 = 0x2200C0
-// Page(0x230010) - Page(0x210014) = 0x230000 - 0x210000 = 0x20000 = 131072
-// DISASMEXE-NEXT:    210014: 10 01 00 90   adrp  x16, #131072
-// 0x120c0 & 0xFFF = 0xC0 = 192
-// DISASMEXE-NEXT:    210018: 11 0a 40 f9   ldr x17, [x16, #16]
-// DISASMEXE-NEXT:    21001c: 10 42 00 91   add x16, x16, #16
-// DISASMEXE-NEXT:    210020: 20 02 1f d6   br  x17
-// DISASMEXE-NEXT:    210024: 1f 20 03 d5   nop
-// DISASMEXE-NEXT:    210028: 1f 20 03 d5   nop
-// DISASMEXE-NEXT:    21002c: 1f 20 03 d5   nop
+// DISASMEXE-NEXT:    2102e0: stp     x16, x30, [sp, #-0x10]!
+// &(.got.plt[2]) = 0x2303f0 + 2 * 8 = 0x230400
+// DISASMEXE-NEXT:    2102e4: adrp    x16, #0x20000
+// DISASMEXE-NEXT:    2102e8: ldr     x17, [x16, #0x400]
+// DISASMEXE-NEXT:    2102ec: add     x16, x16, #0x400
+// DISASMEXE-NEXT:    2102f0: br      x17
+// DISASMEXE-NEXT:    2102f4: nop
+// DISASMEXE-NEXT:    2102f8: nop
+// DISASMEXE-NEXT:    2102fc: nop
 
 // bar@plt
-// Page(0x230018) - Page(0x210030) = 0x230000 - 0x210000 = 0x20000 = 131072
 // DISASMEXE-EMPTY:
 // DISASMEXE-NEXT:   bar@plt:
-// DISASMEXE-NEXT:    210030: 10 01 00 90   adrp  x16, #131072
-// DISASMEXE-NEXT:    210034: 11 0e 40 f9   ldr x17, [x16, #24]
-// DISASMEXE-NEXT:    210038: 10 62 00 91   add x16, x16, #24
-// DISASMEXE-NEXT:    21003c: 20 02 1f d6   br  x17
+// DISASMEXE-NEXT:    210300: adrp    x16, #0x20000
+// DISASMEXE-NEXT:    210304: ldr     x17, [x16, #0x408]
+// DISASMEXE-NEXT:    210308: add     x16, x16, #0x408
+// DISASMEXE-NEXT:    21030c: br      x17
 
 // weak@plt
-// Page(0x230020) - Page(0x210040) = 0x230000 - 0x210000 = 0x20000 = 131072
 // DISASMEXE-EMPTY:
 // DISASMEXE-NEXT:   weak@plt:
-// DISASMEXE-NEXT:    210040: 10 01 00 90   adrp  x16, #131072
-// DISASMEXE-NEXT:    210044: 11 12 40 f9   ldr x17, [x16, #32]
-// DISASMEXE-NEXT:    210048: 10 82 00 91   add x16, x16, #32
-// DISASMEXE-NEXT:    21004c: 20 02 1f d6   br  x17
+// DISASMEXE-NEXT:    210310: adrp    x16, #0x20000
+// DISASMEXE-NEXT:    210314: ldr     x17, [x16, #0x410]
+// DISASMEXE-NEXT:    210318: add     x16, x16, #0x410
+// DISASMEXE-NEXT:    21031c: br      x17
 
 .global _start,foo,bar
 .weak weak
 _start:
   b foo
   b bar
   b weak
 
 .section .text2,"ax",@progbits
 foo:
   nop

test/ELF/pr34660.s

 # REQUIRES: aarch64
 
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
 # RUN: ld.lld --hash-style=sysv -shared %t.o -o %t
-# RUN: llvm-objdump %t -d | FileCheck %s --check-prefix=DISASM
+# RUN: llvm-objdump %t -d --no-show-raw-insn | FileCheck %s --check-prefix=DISASM
 # RUN: llvm-readelf %t --symbols | FileCheck %s --check-prefix=SYM
 
 # It would be much easier to understand/read this test if llvm-objdump would print
 # the immediates in hex.
 # IMM = hex(65540) = 0x10004
 # PC = 0x10000
 # As the relocation is PC-relative, IMM + PC = 0x20004 which is the VA of the
 # correct symbol.
 
 # DISASM: Disassembly of section .text:
 # DISASM-EMPTY:
 # DISASM-NEXT: $x.0:
-# DISASM-NEXT:   10000:       28 00 10 58     ldr     x8, #131076
+# DISASM-NEXT:   1022c:       ldr     x8, #131176
 
 # SYM: Symbol table '.symtab'
-# SYM:  0000000000030004     0 NOTYPE  LOCAL  DEFAULT    6 patatino
+# SYM:  0000000000030294     0 NOTYPE  LOCAL  DEFAULT    6 patatino
 
   ldr x8, patatino
   .data
   .zero 4
 patatino:

test/ELF/relocation-b-aarch64.test

 # REQUIRES: aarch64
 
 # RUN: yaml2obj %s -o %t.o
 # RUN: ld.lld %t.o -o %t.out
-# RUN: llvm-objdump -d -triple=aarch64-none-linux %t.out | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t.out | FileCheck %s
 
 # Check that the R_AARCH64_JUMP26 writes the branch opcode as well as the
 # immediate. We use this property to overwrite instructions with a branch.
 
 # CHECK: Disassembly of section .text:
 # CHECK-EMPTY:
 # CHECK-NEXT: foo:
-# CHECK-NEXT:    210000:        01 00 00 14     b       #4
+# CHECK-NEXT:    210120:       b       #4
 # CHECK: bar:
-# CHECK-NEXT:    210004:        ff ff ff 17     b       #-4
+# CHECK-NEXT:    210124:       b       #-4
 
 !ELF
 FileHeader:
   Class:           ELFCLASS64
   Data:            ELFDATA2LSB
   Type:            ET_REL
   Machine:         EM_AARCH64
 Sections: