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Differential D133372

[docs][RISCV] Document status of Zicpo(m,z,p) extensions
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Authored by reames on Sep 6 2022, 12:50 PM.

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Reviewers
asb
kito-cheng
jrtc27
craig.topper
frasercrmck
Commits
rG10a74262cab1: [docs][RISCV] Document status of Zicpo(m,p,z) extensions
Summary

Unless I missed something when checking, we only support these in assembly. Given that, documenting them is a good opportunity to define support levels which will be useful for other extensions as well.

Diff Detail

Event Timeline

reames created this revision.Sep 6 2022, 12:50 PM
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Herald added subscribers: sunshaoce, VincentWu, luke957 and 27 others. · View Herald Transcript
reames requested review of this revision.Sep 6 2022, 12:50 PM
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reames added a parent revision: D133063: [docs] Add a RISC-V Usage page.Sep 6 2022, 12:50 PM
craig.topper added inline comments.Sep 6 2022, 12:52 PM
llvm/docs/RISCVUsage.rst
77

Is this intended to be alphabetized or are new extensions just added to the end?

reames added inline comments.Sep 6 2022, 1:17 PM
llvm/docs/RISCVUsage.rst
77

Alphabetical, fix in flight.

reames updated this revision to Diff 458256.Sep 6 2022, 1:18 PM
craig.topper added inline comments.Sep 6 2022, 1:21 PM
llvm/docs/RISCVUsage.rst
61

Depending on how strict we're trying to be here, z comes after p.

reames updated this revision to Diff 458262.Sep 6 2022, 1:29 PM
craig.topper accepted this revision.Sep 6 2022, 1:34 PM

LGTM

This revision is now accepted and ready to land.Sep 6 2022, 1:34 PM
This revision was landed with ongoing or failed builds.Sep 6 2022, 1:37 PM
Closed by commit rG10a74262cab1: [docs][RISCV] Document status of Zicpo(m,p,z) extensions (authored by reames). · Explain Why
This revision was automatically updated to reflect the committed changes.
reames added a commit: rG10a74262cab1: [docs][RISCV] Document status of Zicpo(m,p,z) extensions.
Harbormaster completed remote builds in B185286: Diff 458262.Sep 6 2022, 3:20 PM

Revision Contents

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llvm/
docs/
12 lines

Diff 458245

llvm/docs/RISCVUsage.rst

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Lines .. table:: Ratified Extensions by Status
``F`` Supported ``F`` Supported
``M`` Supported ``M`` Supported
``V`` Supported ``V`` Supported
``Zba`` Supported ``Zba`` Supported
``Zbb`` Supported ``Zbb`` Supported
``Zbc`` Supported ``Zbc`` Supported
``Zbs`` Supported ``Zbs`` Supported
``Zve32x`` Partially Supported ``Zve32x`` Partially Supported
``Zve32f`` Partially Supported ``Zve32f`` Partially Supported
craig.topperUnsubmitted
Not Done
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Depending on how strict we're trying to be here, z comes after p.

craig.topper: Depending on how strict we're trying to be here, `z` comes after `p`.
``Zve64x`` Supported ``Zve64x`` Supported
``Zve64f`` Supported ``Zve64f`` Supported
``Zve64d`` Supported ``Zve64d`` Supported
``Zvl32b`` Partially Supported ``Zvl32b`` Partially Supported
``Zvl64b`` Supported ``Zvl64b`` Supported
``Zvl128b`` Supported ``Zvl128b`` Supported
``Zvl256b`` Supported ``Zvl256b`` Supported
``Zvl512b`` Supported ``Zvl512b`` Supported
``Zvl1024b`` Supported ``Zvl1024b`` Supported
``Zvl2048b`` Supported ``Zvl2048b`` Supported
``Zvl4096b`` Supported ``Zvl4096b`` Supported
``Zvl8192b`` Supported ``Zvl8192b`` Supported
``Zvl16384b`` Supported ``Zvl16384b`` Supported
``Zvl32768b`` Supported ``Zvl32768b`` Supported
``Zvl65536b`` Supported ``Zvl65536b`` Supported
``Zicbom`` Assembly Support
craig.topperUnsubmitted
Not Done
ReplyInline Actions

Is this intended to be alphabetized or are new extensions just added to the end?

craig.topper: Is this intended to be alphabetized or are new extensions just added to the end?
reamesAuthorUnsubmitted
Done
ReplyInline Actions

Alphabetical, fix in flight.

reames: Alphabetical, fix in flight.
``Zicboz`` Assembly Support
``Zicbop`` Assembly Support
============= ======================== ============= ========================
Assembly Support
LLVM supports the associated instructions in assembly. All assembly related tools (e.g. assembler, disassembler, llvm-objdump, etc..) are supported. Compiler and linker will accept extension names, and linked binaries will contain appropriate ELF flags and attributes to reflect use of named extension.
Supported
Fully supported by the compiler. This includes everything in Assembly Support, along with - if relevant - C language intrinsics for the instructions and pattern matching by the compiler to recognize idiomatic patterns which can be lowered to the associated instructions.
``Zve32x``, ``Zve32f``, ``Zvl32b`` ``Zve32x``, ``Zve32f``, ``Zvl32b``
LLVM currently assumes a minimum VLEN (vector register width) of 64 bits during compilation, and as a result ``Zve32x`` and ``Zve32f`` are supported only for VLEN>=64. Assembly tools (e.g. assembler, disassembler, llvm-objdump, etc..) don't have this restriction. LLVM currently assumes a minimum VLEN (vector register width) of 64 bits during compilation, and as a result ``Zve32x`` and ``Zve32f`` are supported only for VLEN>=64. Assembly support doesn't have this restriction.
Specification Documents Specification Documents
======================= =======================
For ratified specifications, please refer to the `official RISC-V International For ratified specifications, please refer to the `official RISC-V International
page <https://riscv.org/technical/specifications/>`_. Make sure to check the page <https://riscv.org/technical/specifications/>`_. Make sure to check the
`wiki for not yet integrated extensions `wiki for not yet integrated extensions
<https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions>`_. <https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions>`_.