[NFC] Add SmallVector constructor to allow creation of SmallVector<T> from ArrayRef of items convertible to type T

[yurai007]

Summary

Extracted from https://reviews.llvm.org/D129781 and address comment: https://reviews.llvm.org/D129781#3655571

[yurai007]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

That's because of "error: conditional expression is ambiguous; 'llvm::SmallVector<llvm::Constant *, 32>' can be converted to 'ArrayRef<llvm::Constant *>' and vice versa". Need to check if there is easier workaround.

[yurai007]

Instead adding one more constructor another option is tweaking existing SmallVector(const iterator_range<RangeTy> &R) one in following way:

-  template <typename RangeTy>
-  explicit SmallVector(const iterator_range<RangeTy> &R)
-      : SmallVectorImpl<T>(N) {
+  template <typename Range, typename = std::enable_if_t<std::is_convertible<
+                                ValueTypeFromRangeType<Range>, T>::value>>
+  SmallVector(const Range &R) : SmallVectorImpl<T>(N) {
     this->append(R.begin(), R.end());
}

That would unlock possibility of creating SmallVector not only from ArrayRef but from every range as long as types are convertible.
I didn't explore this way further, I'm not sure but I believe it should work. It's more than just "adding ArrayRef constructor" but if you are interested I can check where it leads.

[nikic]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

Would making the ctor explicit help?

[yurai007]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

Nope :( Making constructor explicit disables implicit conversion so we cannot do things like: SmallVector<int, 16> NewMask = Mask; anymore.

[barannikov88]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

And leaving it implicit hides the fact of possible memory allocation, which is not cheap. I think absense of such constructor is by-design.

Making it explicit is making it redundant, because there is already a constructor which accepts begin / end, and one that accepts range (note that it is explicit!). It won't save on typing, either.

I'm not in favor of this patch, but my word does not count much, so I won't block it. I'd suggest you, however, to request review of core maintainers.

[nikic]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

Nope :( Making constructor explicit disables implicit conversion so we cannot do things like: SmallVector<int, 16> NewMask = Mask; anymore.

I think that's fine. Similar to the existing iterator_range constructor, we would require SmallVector<int, 16> NewMask(Mask), which seems like the idiomatic way to write it anyway?

Making it explicit is making it redundant, because there is already a constructor which accepts begin / end, and one that accepts range (note that it is explicit!). It won't save on typing, either.

It is not redundant. It ensures that iterator_range and ArrayRef can be freely substituted. Switching iterator_range to ArrayRef currently requires going through a lot of SmallVector constructors and replacing them with less readable code. The alternative to this change is D129988, which looks like a significant regression in code quality.

[barannikov88]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

Please also consider the fact that this is API breaking change due to this "conditional expression is amiguous" error. Many external projects depend on LLVM/ADT, and all of them will have to adapt this change.

[barannikov88]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

It ensures that iterator_range and ArrayRef can be freely substituted. Switching iterator_range to ArrayRef currently requires going through a lot of SmallVector constructors and replacing them with less readable code.

Ok, makes sense.

[yurai007]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

Nope :( Making constructor explicit disables implicit conversion so we cannot do things like: SmallVector<int, 16> NewMask = Mask; anymore.

I think that's fine. Similar to the existing iterator_range constructor, we would require SmallVector<int, 16> NewMask(Mask), which seems like the idiomatic way to write it anyway?

You are right, explicit works when we use brackets instead assignment. I'm gonna add it to constructor and adjust rest of patch.

[yurai007]

Update constructor definition with explicit to avoid implicit conversions and remove ambiguity workarounds.
Adjust constructor users and add unit tests.

[yurai007]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

@barannikov88: after addressing @nikic comment there is no API breaking change anymore. As far I can tell SmallVector API is only extended and still backward-compatible. Hope it looks better now.

[yurai007]

Drop WIP tag.

[barannikov88]

clang/lib/CodeGen/CGExprConstant.cpp

504 ↗

(On Diff #446472)

Looks good, thank you. Still, I would suggest requesting a review from more experienced developers than me.

[barannikov88]

llvm/include/llvm/ADT/SmallVector.h

35

Should be typename T. class T is archaic.

[nikic]

I think my only concern with this change is that it will also allow some implicit ArrayRef constructors. For example, this will permit creating a SmallVector from std::array, std::vector, or just T -- but only if ArrayRef is in scope. This seems somewhat dangerous.

I'm not sure if C++ provides any good way to avoid that, short of explicitly marking certain constructors as deleted?

I'm wondering if it might not be better to make this a fully generic overload that accepts any range (i.e., anything with begin() and end()). Paradoxically, this will likely be less permissive in practice than having explicit iterator_range and ArrayRef overloads, because it allows less implicit conversions.

[yurai007]

In D130268#3684244, @nikic wrote:

I think my only concern with this change is that it will also allow some implicit ArrayRef constructors. For example, this will permit creating a SmallVector from std::array, std::vector, or just T -- but only if ArrayRef is in scope. This seems somewhat dangerous.

Maybe I'm missing something, but is it right? It appears that only one implicit conversion in constructor is allowed: https://stackoverflow.com/questions/63320366/double-implicit-conversion-in-c
I think going from vector/array to SmallVector is ill-formed unless we explicitly create temporary ArrayRef in-between: https://godbolt.org/z/Geqbajf1x

[nikic]

LGTM

In D130268#3686811, @yurai007 wrote:

In D130268#3684244, @nikic wrote:

I think my only concern with this change is that it will also allow some implicit ArrayRef constructors. For example, this will permit creating a SmallVector from std::array, std::vector, or just T -- but only if ArrayRef is in scope. This seems somewhat dangerous.

Maybe I'm missing something, but is it right? It appears that only one implicit conversion in constructor is allowed: https://stackoverflow.com/questions/63320366/double-implicit-conversion-in-c
I think going from vector/array to SmallVector is ill-formed unless we explicitly create temporary ArrayRef in-between: https://godbolt.org/z/Geqbajf1x

You're right... Everything's good then.

[yurai007]

Rebase and fix last comment. Remove dependency to https://reviews.llvm.org/D129781 by moving relevant part of change here.

[nikic]

Still LGTM

[fhahn]

Looks like a nice improvement, thanks!

llvm/unittests/ADT/SmallVectorTest.cpp

869–870

This seems like an unrelated change unless I am missing something? If so, this could likely be pulled out and just submitted separately as NFC

[yurai007]

llvm/unittests/ADT/SmallVectorTest.cpp

869–870

Addressed here: https://reviews.llvm.org/D131173

[yurai007]

Rebase to last SmallVector NFC.

[yurai007]

Fix std::initializer_list lifetime issue in test case revealed on CI

llvm/include/llvm/ADT/SmallVector.h

 #include <limits>
 #include <memory>
 #include <new>
 #include <type_traits>
 #include <utility>
 
 namespace llvm {
 
+template <typename T> class ArrayRef;
+
 template <typename IteratorT> class iterator_range;
 
 template <class Iterator>
 using EnableIfConvertibleToInputIterator = std::enable_if_t<std::is_convertible<
     typename std::iterator_traits<Iterator>::iterator_category,
     std::input_iterator_tag>::value>;
 
 /// This is all the stuff common to all SmallVectors.
explicit SmallVector(const iterator_range<RangeTy> &R)
       : SmallVectorImpl<T>(N) {
     this->append(R.begin(), R.end());
   }
 
   SmallVector(std::initializer_list<T> IL) : SmallVectorImpl<T>(N) {
     this->append(IL);
   }
 
+  template <typename U,
+            typename = std::enable_if_t<std::is_convertible<U, T>::value>>
+  explicit SmallVector(ArrayRef<U> A) : SmallVectorImpl<T>(N) {
+    this->append(A.begin(), A.end());
+  }
+
   SmallVector(const SmallVector &RHS) : SmallVectorImpl<T>(N) {
     if (!RHS.empty())
       SmallVectorImpl<T>::operator=(RHS);
   }
 
   SmallVector &operator=(const SmallVector &RHS) {
     SmallVectorImpl<T>::operator=(RHS);
     return *this;

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

if (Vec.getOpcode() == ISD::VECTOR_SHUFFLE && Vec.hasOneUse() &&
     // operand.
     if (ElementOffset == -1 && Y.isUndef() &&
         InsertVal0.getValueType() == Y.getValueType()) {
       ElementOffset = Mask.size();
       Y = InsertVal0;
     }
 
     if (ElementOffset != -1) {
-      SmallVector<int, 16> NewMask(Mask.begin(), Mask.end());
+      SmallVector<int, 16> NewMask(Mask);
 
       auto *ExtrIndex = cast<ConstantSDNode>(InsertVal.getOperand(1));
       NewMask[InsIndex] = ElementOffset + ExtrIndex->getZExtValue();
       assert(NewMask[InsIndex] <
                  (int)(2 * Vec.getValueType().getVectorNumElements()) &&
              NewMask[InsIndex] >= 0 && "NewMask[InsIndex] is out of bound");
 
       SDValue LegalShuffle =

 /// If a shuffle inserts exactly one element from a source vector operand into
 /// another vector operand and we can access the specified element as a scalar,
 /// then we can eliminate the shuffle.
 static SDValue replaceShuffleOfInsert(ShuffleVectorSDNode *Shuf,
                                       SelectionDAG &DAG) {
   // First, check if we are taking one element of a vector and shuffling that
   // element into another vector.
   ArrayRef<int> Mask = Shuf->getMask();
-  SmallVector<int, 16> CommutedMask(Mask.begin(), Mask.end());
+  SmallVector<int, 16> CommutedMask(Mask);
   SDValue Op0 = Shuf->getOperand(0);
   SDValue Op1 = Shuf->getOperand(1);
   int ShufOp0Index = getShuffleMaskIndexOfOneElementFromOp0IntoOp1(Mask);
   if (ShufOp0Index == -1) {
     // Commute mask and check again.
     ShuffleVectorSDNode::commuteMask(CommutedMask);
     ShufOp0Index = getShuffleMaskIndexOfOneElementFromOp0IntoOp1(CommutedMask);
     if (ShufOp0Index == -1)
auto ShuffleToInsert = [&](SDValue LHS, SDValue RHS, ArrayRef<int> Mask) {
       }
       return SDValue();
     };
     ArrayRef<int> Mask = SVN->getMask();
     if (N1.getOpcode() == ISD::CONCAT_VECTORS)
       if (SDValue InsertN1 = ShuffleToInsert(N0, N1, Mask))
         return InsertN1;
     if (N0.getOpcode() == ISD::CONCAT_VECTORS) {
-      SmallVector<int> CommuteMask(Mask.begin(), Mask.end());
+      SmallVector<int> CommuteMask(Mask);
       ShuffleVectorSDNode::commuteMask(CommuteMask);
       if (SDValue InsertN0 = ShuffleToInsert(N1, N0, CommuteMask))
         return InsertN0;
     }
   }
 
   // If we're not performing a select/blend shuffle, see if we can convert the
   // shuffle into a AND node, with all the out-of-lane elements are known zero.

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

for (unsigned I = 0; I < NewElts; ++I) {
         Ops[I] = DAG.getNode(ISD::TRUNCATE, DL, EltVT, Ops[I]);
     }
     return DAG.getBuildVector(NewVT, DL, Ops);
   };
 
   // If Lo or Hi uses elements from at most two of the four input vectors, then
   // express it as a vector shuffle of those two inputs.  Otherwise extract the
   // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
-  SmallVector<int> OrigMask(N->getMask().begin(), N->getMask().end());
+  SmallVector<int> OrigMask(N->getMask());
   // Try to pack incoming shuffles/inputs.
   auto &&TryPeekThroughShufflesInputs = [&Inputs, &NewVT, this, NewElts,
                                          &DL](SmallVectorImpl<int> &Mask) {
     // Check if all inputs are shuffles of the same operands or non-shuffles.
     MapVector<std::pair<SDValue, SDValue>, SmallVector<unsigned>> ShufflesIdxs;
     for (unsigned Idx = 0; Idx < array_lengthof(Inputs); ++Idx) {
       SDValue Input = Inputs[Idx];
       auto *Shuffle = dyn_cast<ShuffleVectorSDNode>(Input.getNode());

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
   // Validate that all indices in Mask are within the range of the elements
   // input to the shuffle.
   int NElts = Mask.size();
   assert(llvm::all_of(Mask,
                       [&](int M) { return M < (NElts * 2) && M >= -1; }) &&
          "Index out of range");
 
   // Copy the mask so we can do any needed cleanup.
-  SmallVector<int, 8> MaskVec(Mask.begin(), Mask.end());
+  SmallVector<int, 8> MaskVec(Mask);
 
   // Canonicalize shuffle v, v -> v, undef
   if (N1 == N2) {
     N2 = getUNDEF(VT);
     for (int i = 0; i != NElts; ++i)
       if (MaskVec[i] >= NElts) MaskVec[i] -= NElts;
   }
 
SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
   InsertNode(N);
   SDValue V = SDValue(N, 0);
   NewSDValueDbgMsg(V, "Creating new node: ", this);
   return V;
 }
 
 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
   EVT VT = SV.getValueType(0);
-  SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
+  SmallVector<int, 8> MaskVec(SV.getMask());
   ShuffleVectorSDNode::commuteMask(MaskVec);
 
   SDValue Op0 = SV.getOperand(0);
   SDValue Op1 = SV.getOperand(1);
   return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec);
 }
 
 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

if (CanExtract) {
           Src = DAG.getUNDEF(VT);
         else {
           Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Src,
                             DAG.getVectorIdxConstant(StartIdx[Input], DL));
         }
       }
 
       // Calculate new mask.
-      SmallVector<int, 8> MappedOps(Mask.begin(), Mask.end());
+      SmallVector<int, 8> MappedOps(Mask);
       for (int &Idx : MappedOps) {
         if (Idx >= (int)SrcNumElts)
           Idx -= SrcNumElts + StartIdx[1] - MaskNumElts;
         else if (Idx >= 0)
           Idx -= StartIdx[0];
       }
 
       setValue(&I, DAG.getVectorShuffle(VT, DL, Src1, Src2, MappedOps));

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

if (SimplifyDemandedVectorElts(LHS, DemandedLHS, UndefLHS, ZeroLHS, TLO,
       return true;
     if (SimplifyDemandedVectorElts(RHS, DemandedRHS, UndefRHS, ZeroRHS, TLO,
                                    Depth + 1))
       return true;
 
     // Simplify mask using undef elements from LHS/RHS.
     bool Updated = false;
     bool IdentityLHS = true, IdentityRHS = true;
-    SmallVector<int, 32> NewMask(ShuffleMask.begin(), ShuffleMask.end());
+    SmallVector<int, 32> NewMask(ShuffleMask);
     for (unsigned i = 0; i != NumElts; ++i) {
       int &M = NewMask[i];
       if (M < 0)
         continue;
       if (!DemandedElts[i] || (M < (int)NumElts && UndefLHS[M]) ||
           (M >= (int)NumElts && UndefRHS[M - NumElts])) {
         Updated = true;
         M = -1;

llvm/lib/Target/ARM/ARMISelLowering.cpp

if (N->getNumOperands() == 2 &&
       N->getOperand(0).getOpcode() == ISD::VECTOR_SHUFFLE &&
       N->getOperand(1).getOpcode() == ISD::VECTOR_SHUFFLE) {
     auto *S0 = cast<ShuffleVectorSDNode>(N->getOperand(0).getNode());
     auto *S1 = cast<ShuffleVectorSDNode>(N->getOperand(1).getNode());
 
     if (S0->getOperand(0) == S1->getOperand(0) &&
         S0->getOperand(1) == S1->getOperand(1)) {
       // Construct complete shuffle mask
-      SmallVector<int, 8> Mask(S0->getMask().begin(), S0->getMask().end());
+      SmallVector<int, 8> Mask(S0->getMask());
       Mask.append(S1->getMask().begin(), S1->getMask().end());
 
       if (isVMOVNTruncMask(Mask, VT, false))
         return DAG.getNode(
             ARMISD::VMOVN, DL, VT,
             DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)),
             DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)),
             DAG.getConstant(1, DL, MVT::i32));

llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp

auto valign = [this](OpRef Lo, OpRef Hi, unsigned Amt, MVT Ty,
     return OpRef::res(Results.top());
   };
 
   // Segment is a vector half.
   unsigned SegLen = HwLen / 2;
 
   // Check if we can shuffle vector halves around to get the used elements
   // into a single vector.
-  SmallVector<int,128> MaskH(SM.Mask.begin(), SM.Mask.end());
+  SmallVector<int, 128> MaskH(SM.Mask);
   SmallVector<unsigned, 4> SegList = getInputSegmentList(SM.Mask, SegLen);
   unsigned SegCount = SegList.size();
   SmallVector<unsigned, 4> SegMap = getOutputSegmentMap(SM.Mask, SegLen);
 
   if (SegList.empty())
     return OpRef::undef(Ty);
 
   // NOTE:
if (Seg0 / 2 == Seg1 / 2) {
       }
     }
   }
 
   // Check if the arguments can be packed by valign(Va,Vb) or valign(Vb,Va).
 
   ShuffleMask SMH(MaskH);
   assert(SMH.Mask.size() == VecLen);
-  SmallVector<int,128> MaskA(SMH.Mask.begin(), SMH.Mask.end());
+  SmallVector<int, 128> MaskA(SMH.Mask);
 
   if (SMH.MaxSrc - SMH.MinSrc >= static_cast<int>(HwLen)) {
     // valign(Lo=Va,Hi=Vb) won't work. Try swapping Va/Vb.
-    SmallVector<int,128> Swapped(SMH.Mask.begin(), SMH.Mask.end());
+    SmallVector<int, 128> Swapped(SMH.Mask);
     ShuffleVectorSDNode::commuteMask(Swapped);
     ShuffleMask SW(Swapped);
     if (SW.MaxSrc - SW.MinSrc < static_cast<int>(HwLen)) {
       MaskA.assign(SW.Mask.begin(), SW.Mask.end());
       std::swap(Va, Vb);
     }
   }
   ShuffleMask SMA(MaskA);
OpRef HvxSelector::perfect(ShuffleMask SM, OpRef Va, ResultStack &Results) {
   //  E  1 1 1 0      7  0 1 1 1      7  0 1 1 1      7  0 1 1 1
   //  F  1 1 1 1      F  1 1 1 1      F  1 1 1 1      F  1 1 1 1
 
   // There is one special case that is not a perfect shuffle, but
   // can be turned into one easily: when the shuffle operates on
   // a vector pair, but the two vectors in the pair are swapped.
   // The code below that identifies perfect shuffles will reject
   // it, unless the order is reversed.
-  SmallVector<int,128> MaskStorage(SM.Mask.begin(), SM.Mask.end());
+  SmallVector<int, 128> MaskStorage(SM.Mask);
   bool InvertedPair = false;
   if (HavePairs && SM.Mask[0] >= int(HwLen)) {
     for (int i = 0, e = SM.Mask.size(); i != e; ++i) {
       int M = SM.Mask[i];
       MaskStorage[i] = M >= int(HwLen) ? M-HwLen : M+HwLen;
     }
     InvertedPair = true;
   }

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

if (Mask[0] >= NumElts && LHS.getOpcode() != ISD::VECTOR_SHUFFLE &&
     std::swap(LHS, RHS);
     Res = DAG.getCommutedVectorShuffle(*SVN);
     Mask = cast<ShuffleVectorSDNode>(Res)->getMask();
   }
 
   // Adjust the shuffle mask if either input vector comes from a
   // SCALAR_TO_VECTOR and keep the respective input vector in permuted
   // form (to prevent the need for a swap).
-  SmallVector<int, 16> ShuffV(Mask.begin(), Mask.end());
+  SmallVector<int, 16> ShuffV(Mask);
   SDValue SToVLHS = isScalarToVec(LHS);
   SDValue SToVRHS = isScalarToVec(RHS);
   if (SToVLHS || SToVRHS) {
     // FIXME: If both LHS and RHS are SCALAR_TO_VECTOR, but are not the
     // same type and have differing element sizes, then do not perform
     // the following transformation. The current transformation for
     // SCALAR_TO_VECTOR assumes that both input vectors have the same
     // element size. This will be updated in the future to account for

llvm/lib/Target/X86/X86ISelLowering.cpp

 }
 
 static bool canWidenShuffleElements(ArrayRef<int> Mask,
                                     const APInt &Zeroable,
                                     bool V2IsZero,
                                     SmallVectorImpl<int> &WidenedMask) {
   // Create an alternative mask with info about zeroable elements.
   // Here we do not set undef elements as zeroable.
-  SmallVector<int, 64> ZeroableMask(Mask.begin(), Mask.end());
+  SmallVector<int, 64> ZeroableMask(Mask);
   if (V2IsZero) {
     assert(!Zeroable.isZero() && "V2's non-undef elements are used?!");
     for (int i = 0, Size = Mask.size(); i != Size; ++i)
       if (Mask[i] != SM_SentinelUndef && Zeroable[i])
         ZeroableMask[i] = SM_SentinelZero;
   }
   return canWidenShuffleElements(ZeroableMask, WidenedMask);
 }

 
 static bool is128BitUnpackShuffleMask(ArrayRef<int> Mask,
                                       const SelectionDAG &DAG) {
   // Create 128-bit vector type based on mask size.
   MVT EltVT = MVT::getIntegerVT(128 / Mask.size());
   MVT VT = MVT::getVectorVT(EltVT, Mask.size());
 
   // We can't assume a canonical shuffle mask, so try the commuted version too.
-  SmallVector<int, 4> CommutedMask(Mask.begin(), Mask.end());
+  SmallVector<int, 4> CommutedMask(Mask);
   ShuffleVectorSDNode::commuteMask(CommutedMask);
 
   // Match any of unary/binary or low/high.
   for (unsigned i = 0; i != 4; ++i) {
     SmallVector<int, 16> UnpackMask;
     createUnpackShuffleMask(VT, UnpackMask, (i >> 1) % 2, i % 2);
     if (isTargetShuffleEquivalent(VT, Mask, UnpackMask, DAG) ||
         isTargetShuffleEquivalent(VT, CommutedMask, UnpackMask, DAG))

 /// that the shuffle mask is a blend, or convertible into a blend with zero.
 static SDValue lowerShuffleAsBlend(const SDLoc &DL, MVT VT, SDValue V1,
                                    SDValue V2, ArrayRef<int> Original,
                                    const APInt &Zeroable,
                                    const X86Subtarget &Subtarget,
                                    SelectionDAG &DAG) {
   uint64_t BlendMask = 0;
   bool ForceV1Zero = false, ForceV2Zero = false;
-  SmallVector<int, 64> Mask(Original.begin(), Original.end());
+  SmallVector<int, 64> Mask(Original);
   if (!matchShuffleAsBlend(V1, V2, Mask, Zeroable, ForceV1Zero, ForceV2Zero,
                            BlendMask))
     return SDValue();
 
   // Create a REAL zero vector - ISD::isBuildVectorAllZeros allows UNDEFs.
   if (ForceV1Zero)
     V1 = getZeroVector(VT, Subtarget, DAG, DL);
   if (ForceV2Zero)
static SDValue lowerShuffleAsElementInsertion(
 
   if (!IsV1Zeroable) {
     // If V1 can't be treated as a zero vector we have fewer options to lower
     // this. We can't support integer vectors or non-zero targets cheaply, and
     // the V1 elements can't be permuted in any way.
     assert(VT == ExtVT && "Cannot change extended type when non-zeroable!");
     if (!VT.isFloatingPoint() || V2Index != 0)
       return SDValue();
-    SmallVector<int, 8> V1Mask(Mask.begin(), Mask.end());
+    SmallVector<int, 8> V1Mask(Mask);
     V1Mask[V2Index] = -1;
     if (!isNoopShuffleMask(V1Mask))
       return SDValue();
     if (!VT.is128BitVector())
       return SDValue();
 
     // Otherwise, use MOVSD, MOVSS or MOVSH.
     unsigned MovOpc = 0;
static SDValue lowerShuffleOfExtractsAsVperm(const SDLoc &DL, SDValue N0,
   SDValue WideVec = N0.getOperand(0);
   MVT WideVT = WideVec.getSimpleValueType();
   if (!WideVT.is256BitVector())
     return SDValue();
 
   // Match extracts of each half of the wide source vector. Commute the shuffle
   // if the extract of the low half is N1.
   unsigned NumElts = VT.getVectorNumElements();
-  SmallVector<int, 4> NewMask(Mask.begin(), Mask.end());
+  SmallVector<int, 4> NewMask(Mask);
   const APInt &ExtIndex0 = N0.getConstantOperandAPInt(1);
   const APInt &ExtIndex1 = N1.getConstantOperandAPInt(1);
   if (ExtIndex1 == 0 && ExtIndex0 == NumElts)
     ShuffleVectorSDNode::commuteMask(NewMask);
   else if (ExtIndex0 != 0 || ExtIndex1 != NumElts)
     return SDValue();
 
   // Final bailout: if the mask is simple, we are better off using an extract
auto matchAsInsertPS = [&](SDValue VA, SDValue VB,
     assert((InsertPSMask & ~0xFFu) == 0 && "Invalid mask!");
     return true;
   };
 
   if (matchAsInsertPS(V1, V2, Mask))
     return true;
 
   // Commute and try again.
-  SmallVector<int, 4> CommutedMask(Mask.begin(), Mask.end());
+  SmallVector<int, 4> CommutedMask(Mask);
   ShuffleVectorSDNode::commuteMask(CommutedMask);
   if (matchAsInsertPS(V2, V1, CommutedMask))
     return true;
 
   return false;
 }
 
 static SDValue lowerShuffleAsInsertPS(const SDLoc &DL, SDValue V1, SDValue V2,

 ///
 /// This is a helper routine dedicated to lowering vector shuffles using SHUFPS.
 /// It makes no assumptions about whether this is the *best* lowering, it simply
 /// uses it.
 static SDValue lowerShuffleWithSHUFPS(const SDLoc &DL, MVT VT,
                                       ArrayRef<int> Mask, SDValue V1,
                                       SDValue V2, SelectionDAG &DAG) {
   SDValue LowV = V1, HighV = V2;
-  SmallVector<int, 4> NewMask(Mask.begin(), Mask.end());
+  SmallVector<int, 4> NewMask(Mask);
   int NumV2Elements = count_if(Mask, [](int M) { return M >= 4; });
 
   if (NumV2Elements == 1) {
     int V2Index = find_if(Mask, [](int M) { return M >= 4; }) - Mask.begin();
 
     // Compute the index adjacent to V2Index and in the same half by toggling
     // the low bit.
     int V2AdjIndex = V2Index ^ 1;
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v8i16, Mask, V1, V2, DAG,
       return V;
 
     // Try to use byte rotation instructions.
     if (SDValue Rotate = lowerShuffleAsByteRotate(DL, MVT::v8i16, V1, V1, Mask,
                                                   Subtarget, DAG))
       return Rotate;
 
     // Make a copy of the mask so it can be modified.
-    SmallVector<int, 8> MutableMask(Mask.begin(), Mask.end());
+    SmallVector<int, 8> MutableMask(Mask);
     return lowerV8I16GeneralSingleInputShuffle(DL, MVT::v8i16, V1, MutableMask,
                                                Subtarget, DAG);
   }
 
   assert(llvm::any_of(Mask, [](int M) { return M >= 0 && M < 8; }) &&
          "All single-input shuffles should be canonicalized to be V1-input "
          "shuffles.");
 
static SDValue lowerShuffleWithPERMV(const SDLoc &DL, MVT VT,
   if (!VT.is512BitVector() && !Subtarget.hasVLX()) {
     V1 = widenSubVector(V1, false, Subtarget, DAG, DL, 512);
     V2 = widenSubVector(V2, false, Subtarget, DAG, DL, 512);
     ShuffleVT = V1.getSimpleValueType();
 
     // Adjust mask to correct indices for the second input.
     int NumElts = VT.getVectorNumElements();
     unsigned Scale = 512 / VT.getSizeInBits();
-    SmallVector<int, 32> AdjustedMask(Mask.begin(), Mask.end());
+    SmallVector<int, 32> AdjustedMask(Mask);
     for (int &M : AdjustedMask)
       if (NumElts <= M)
         M += (Scale - 1) * NumElts;
     MaskNode = getConstVector(AdjustedMask, MaskVT, DAG, DL, true);
     MaskNode = widenSubVector(MaskNode, false, Subtarget, DAG, DL, 512);
   } else {
     MaskNode = getConstVector(Mask, MaskVT, DAG, DL, true);
   }
for (int i = 0; i < Size; ++i)
         LaneUsed[(Mask[i] % Size) / LaneSize] = true;
     AllLanes = LaneUsed[0] && LaneUsed[1];
   }
 
   // TODO - we could support shuffling V2 in the Flipped input.
   assert(V2.isUndef() &&
          "This last part of this routine only works on single input shuffles");
 
-  SmallVector<int, 32> InLaneMask(Mask.begin(), Mask.end());
+  SmallVector<int, 32> InLaneMask(Mask);
   for (int i = 0; i < Size; ++i) {
     int &M = InLaneMask[i];
     if (M < 0)
       continue;
     if (((M % Size) / LaneSize) != (i / LaneSize))
       M = (M % LaneSize) + ((i / LaneSize) * LaneSize) + Size;
   }
   assert(!is128BitLaneCrossingShuffleMask(VT, InLaneMask) &&
static SDValue lowerVECTOR_SHUFFLE(SDValue Op, const X86Subtarget &Subtarget,
   if (V1IsUndef)
     return DAG.getCommutedVectorShuffle(*SVOp);
 
   // Check for non-undef masks pointing at an undef vector and make the masks
   // undef as well. This makes it easier to match the shuffle based solely on
   // the mask.
   if (V2IsUndef &&
       any_of(OrigMask, [NumElements](int M) { return M >= NumElements; })) {
-    SmallVector<int, 8> NewMask(OrigMask.begin(), OrigMask.end());
+    SmallVector<int, 8> NewMask(OrigMask);
     for (int &M : NewMask)
       if (M >= NumElements)
         M = -1;
     return DAG.getVectorShuffle(VT, DL, V1, V2, NewMask);
   }
 
   // Check for illegal shuffle mask element index values.
   int MaskUpperLimit = OrigMask.size() * (V2IsUndef ? 1 : 2);
if (DAG.getTargetLoweringInfo().isTypeLegal(NewVT)) {
       V1 = DAG.getBitcast(NewVT, V1);
       V2 = DAG.getBitcast(NewVT, V2);
       return DAG.getBitcast(
           VT, DAG.getVectorShuffle(NewVT, DL, V1, V2, WidenedMask));
     }
   }
 
   SmallVector<SDValue> Ops = {V1, V2};
-  SmallVector<int> Mask(OrigMask.begin(), OrigMask.end());
+  SmallVector<int> Mask(OrigMask);
 
   // Canonicalize the shuffle with any horizontal ops inputs.
   // NOTE: This may update Ops and Mask.
   if (SDValue HOp = canonicalizeShuffleMaskWithHorizOp(
           Ops, Mask, VT.getSizeInBits(), DL, DAG, Subtarget))
     return DAG.getBitcast(VT, HOp);
 
   V1 = DAG.getBitcast(VT, Ops[0]);
static bool matchBinaryPermuteShuffle(
   }
 
   // Attempt to combine to X86ISD::BLENDI.
   if ((NumMaskElts <= 8 && ((Subtarget.hasSSE41() && MaskVT.is128BitVector()) ||
                             (Subtarget.hasAVX() && MaskVT.is256BitVector()))) ||
       (MaskVT == MVT::v16i16 && Subtarget.hasAVX2())) {
     uint64_t BlendMask = 0;
     bool ForceV1Zero = false, ForceV2Zero = false;
-    SmallVector<int, 8> TargetMask(Mask.begin(), Mask.end());
+    SmallVector<int, 8> TargetMask(Mask);
     if (matchShuffleAsBlend(V1, V2, TargetMask, Zeroable, ForceV1Zero,
                             ForceV2Zero, BlendMask)) {
       if (MaskVT == MVT::v16i16) {
         // We can only use v16i16 PBLENDW if the lanes are repeated.
         SmallVector<int, 8> RepeatedMask;
         if (isRepeatedTargetShuffleMask(128, MaskVT, TargetMask,
                                         RepeatedMask)) {
           assert(RepeatedMask.size() == 8 &&
static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
   // repeat across each mask element.
   if (UnaryShuffle && !isAnyZero(BaseMask) &&
       V1.getValueSizeInBits() >= RootSizeInBits &&
       (BaseMaskEltSizeInBits % V1.getScalarValueSizeInBits()) == 0 &&
       DAG.isSplatValue(V1, /*AllowUndefs*/ false)) {
     return CanonicalizeShuffleInput(RootVT, V1);
   }
 
-  SmallVector<int, 64> Mask(BaseMask.begin(), BaseMask.end());
+  SmallVector<int, 64> Mask(BaseMask);
 
   // See if the shuffle is a hidden identity shuffle - repeated args in HOPs
   // etc. can be simplified.
   if (VT1 == VT2 && VT1.getSizeInBits() == RootSizeInBits && VT1.isVector()) {
     SmallVector<int> ScaledMask, IdentityMask;
     unsigned NumElts = VT1.getVectorNumElements();
     if (Mask.size() <= NumElts &&
         scaleShuffleElements(Mask, NumElts, ScaledMask)) {
if (llvm::any_of(WideInputs, [&WideSVT, &DAG](SDValue Op) {
                Op.getValueType().getScalarType() != WideSVT;
       }))
     return SDValue();
 
   // Create new mask for larger type.
   for (unsigned i = 1; i != NumInputs; ++i)
     Offsets[i] += i * Scale * NumMaskElts;
 
-  SmallVector<int, 64> WideMask(BaseMask.begin(), BaseMask.end());
+  SmallVector<int, 64> WideMask(BaseMask);
   for (int &M : WideMask) {
     if (M < 0)
       continue;
     M = (M % NumMaskElts) + Offsets[M / NumMaskElts];
   }
   WideMask.append((Scale - 1) * NumMaskElts, SM_SentinelUndef);
 
   // Remove unused/repeated shuffle source ops.

llvm/lib/Target/X86/X86MCInstLower.cpp

static std::string getShuffleComment(const MachineInstr *MI, unsigned SrcOp1Idx,
 
   StringRef DstName = DstOp.isReg() ? GetRegisterName(DstOp.getReg()) : "mem";
   StringRef Src1Name =
       SrcOp1.isReg() ? GetRegisterName(SrcOp1.getReg()) : "mem";
   StringRef Src2Name =
       SrcOp2.isReg() ? GetRegisterName(SrcOp2.getReg()) : "mem";
 
   // One source operand, fix the mask to print all elements in one span.
-  SmallVector<int, 8> ShuffleMask(Mask.begin(), Mask.end());
+  SmallVector<int, 8> ShuffleMask(Mask);
   if (Src1Name == Src2Name)
     for (int i = 0, e = ShuffleMask.size(); i != e; ++i)
       if (ShuffleMask[i] >= e)
         ShuffleMask[i] -= e;
 
   raw_string_ostream CS(Comment);
   CS << DstName;
 

llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

if (SubMask.empty())
       return;
     SmallVector<int, 4> NewMask;
     inversePermutation(SubMask, NewMask);
     addMask(NewMask);
   }
 
   /// Functions adds masks, merging them into  single one.
   void addMask(ArrayRef<unsigned> SubMask) {
-    SmallVector<int, 4> NewMask(SubMask.begin(), SubMask.end());
+    SmallVector<int, 4> NewMask(SubMask);
     addMask(NewMask);
   }
 
   void addMask(ArrayRef<int> SubMask) { ::addMask(Mask, SubMask); }
 
   Value *finalize(Value *V) {
     IsFinalized = true;
     unsigned ValueVF = cast<FixedVectorType>(V->getType())->getNumElements();
if (V2 && !isUndefVector(V2)) {
         CSEBlocks.insert(I->getParent());
       }
       return Vec;
     }
     if (isa<PoisonValue>(V1))
       return PoisonValue::get(FixedVectorType::get(
           cast<VectorType>(V1->getType())->getElementType(), Mask.size()));
     Value *Op = V1;
-    SmallVector<int> CombinedMask(Mask.begin(), Mask.end());
+    SmallVector<int> CombinedMask(Mask);
     PeekThroughShuffles(Op, CombinedMask);
     if (!isa<FixedVectorType>(Op->getType()) ||
         !IsIdentityMask(CombinedMask, cast<FixedVectorType>(Op->getType()))) {
       Value *Vec = Builder.CreateShuffleVector(Op, CombinedMask);
       if (auto *I = dyn_cast<Instruction>(Vec)) {
         GatherShuffleSeq.insert(I);
         CSEBlocks.insert(I->getParent());
       }

llvm/unittests/ADT/SmallVectorTest.cpp

 TYPED_TEST(SmallVectorTest, ConstructorIterTest) {
   SCOPED_TRACE("ConstructorTest");
   int arr[] = {1, 2, 3};
   auto &V = this->theVector;
   V = SmallVector<Constructable, 4>(std::begin(arr), std::end(arr));
   assertValuesInOrder(V, 3u, 1, 2, 3);
 }
 
+// Constructor test.
+TYPED_TEST(SmallVectorTest, ConstructorFromArrayRefSimpleTest) {
+  SCOPED_TRACE("ConstructorFromArrayRefSimpleTest");
+  ArrayRef<Constructable> Array = {Constructable(1), Constructable(2),
+                                   Constructable(3)};
+  auto &V = this->theVector;
+  V = SmallVector<Constructable, 4>(Array);
+  assertValuesInOrder(V, 3u, 1, 2, 3);
+  ASSERT_EQ(NumBuiltinElts(TypeParam{}), NumBuiltinElts(V));
+}
+
 // New vector test.
 TYPED_TEST(SmallVectorTest, EmptyVectorTest) {
   SCOPED_TRACE("EmptyVectorTest");
   auto &V = this->theVector;
   assertEmpty(V);
   EXPECT_TRUE(V.rbegin() == V.rend());
   EXPECT_EQ(0, Constructable::getNumConstructorCalls());
   EXPECT_EQ(0, Constructable::getNumDestructorCalls());

 }
 
 template <typename InvalidType> class DualSmallVectorsTest;
 
 template <typename VectorT1, typename VectorT2>
 class DualSmallVectorsTest<std::pair<VectorT1, VectorT2>> : public SmallVectorTestBase {
 protected:
   VectorT1 theVector;
   VectorT2 otherVector;
 };
 
 typedef ::testing::Types<
     // Small mode -> Small mode.
     std::pair<SmallVector<Constructable, 4>, SmallVector<Constructable, 4>>,
     // Small mode -> Big mode.
     std::pair<SmallVector<Constructable, 4>, SmallVector<Constructable, 2>>,
     // Big mode -> Small mode.
     std::pair<SmallVector<Constructable, 2>, SmallVector<Constructable, 4>>,
TEST(SmallVectorTest, InitializerList) {
   V2.assign({4});
   EXPECT_TRUE(makeArrayRef(V2).equals({4}));
   V2.append({3, 2});
   EXPECT_TRUE(makeArrayRef(V2).equals({4, 3, 2}));
   V2.insert(V2.begin() + 1, 5);
   EXPECT_TRUE(makeArrayRef(V2).equals({4, 5, 3, 2}));
 }
 
+struct To {
+  int Content;
+  friend bool operator==(const To &LHS, const To &RHS) {
+    return LHS.Content == RHS.Content;
+  }
+};
+
+class From {
+public:
+  From() = default;
+  From(To M) { T = M; }
+  operator To() const { return T; }
+
+private:
+  To T;
+};
+
+TEST(SmallVectorTest, ConstructFromArrayRefOfConvertibleType) {
+  To to1{1}, to2{2}, to3{3};
+  std::vector<From> StdVector = {From(to1), From(to2), From(to3)};
+  ArrayRef<From> Array = StdVector;
+  {
+    llvm::SmallVector<To> Vector(Array);
+
+    ASSERT_EQ(Array.size(), Vector.size());
+    for (size_t I = 0; I < Array.size(); ++I)
+      EXPECT_EQ(Array[I], Vector[I]);
+  }
+  {
+    llvm::SmallVector<To, 4> Vector(Array);
+
+    ASSERT_EQ(Array.size(), Vector.size());
+    ASSERT_EQ(4u, NumBuiltinElts(Vector));
+    for (size_t I = 0; I < Array.size(); ++I)
+      EXPECT_EQ(Array[I], Vector[I]);
+  }
+}
+
 template <class VectorT>
 class SmallVectorReferenceInvalidationTest : public SmallVectorTestBase {
 protected:
   const char *AssertionMessage =
       "Attempting to reference an element of the vector in an operation \" "
       "\"that invalidates it";
 
   VectorT V;