[SVE] Fix cast<FixedVectorType> in truncateToMinimalBitwidths

[CarolineConcatto]

Hi @DylanFleming-arm
I believe something wrong happened when you uploaded this patch.
It is not showing LoopVectorize.cpp file.
I can only see Context not available.
Is that happening for you too?

llvm/test/Transforms/LoopVectorize/AArch64/sve-trunc-min-bitwidth.ll

2 ↗

(On Diff #351904)

Remove that

3 ↗

(On Diff #351904)

Can you make that a more generic test using the flag:
-force-target-supports-scalable-vectors
?

5 ↗

(On Diff #351904)

Remove that too.

106 ↗

(On Diff #351904)

I believe you don't need that.

[sdesmalen]

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

3954–3955

This looks like the same code, just different formatting.

Did you diff with the correct commit? It also says that llvm/test/Transforms/LoopVectorize/AArch64/sve-trunc-min-bitwidth.ll was moved, but this file does not exist upstream.

[kmclaughlin]

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

3

For most of the other scalable tests added to LoopVectorize we've used -scalable-vectorization=on

5

This function doesn't have any attributes, so you can remove the #0

69

I think you can change this to %for.body and then remove the for.body.pre block below.

[sdesmalen]

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

9

This loop is no longer vectorized, so this test is no longer testing your code.

[DylanFleming-arm]

Fixed issue where loop wasn't correctly vectorized with scalable vectors

[sdesmalen]

Just a few more nits on the test.

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

5

%dptr is not a pointer, but rather the number of loop iterations, e.g. %N.

5

sptr is also not a pointer, but rather some store value, e.g. %val.

5

if you make i16* %hptr into i16* noalias %hptr, then you avoid the memory checks because the compiler knows the data pointed to by %hptr doesn't alias with any other memory that's accessed in the function, so it won't have to actively check if there is a dependence between the load/store by adding the compares. See the LangRef.

[DylanFleming-arm]

Updated parameter names to make more sense
Made i16* %hptr into noalias

[sdesmalen]

LGTM

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

if (!State.hasAnyVectorValue(Def))
       continue;
     for (unsigned Part = 0; Part < UF; ++Part) {
       Value *I = State.get(Def, Part);
       if (Erased.count(I) || I->use_empty() || !isa<Instruction>(I))
         continue;
       Type *OriginalTy = I->getType();
       Type *ScalarTruncatedTy =
           IntegerType::get(OriginalTy->getContext(), KV.second);
-      auto *TruncatedTy = FixedVectorType::get(
-          ScalarTruncatedTy,
-          cast<FixedVectorType>(OriginalTy)->getNumElements());
+      auto *TruncatedTy = VectorType::get(
+          ScalarTruncatedTy, cast<VectorType>(OriginalTy)->getElementCount());
       if (TruncatedTy == OriginalTy)
         continue;
 
       IRBuilder<> B(cast<Instruction>(I));
       auto ShrinkOperand = [&](Value *V) -> Value * {
         if (auto *ZI = dyn_cast<ZExtInst>(V))
           if (ZI->getSrcTy() == TruncatedTy)
             return ZI->getOperand(0);

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -loop-vectorize -scalable-vectorization=on -force-target-supports-scalable-vectors -S | FileCheck %s
+
+define void @trunc_minimal_bitwidth(i8* %bptr, i16* %hptr, i32 %sptr, i64 %dptr) {
+; CHECK-LABEL: @trunc_minimal_bitwidth(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
+; CHECK:       for.body:
+; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT:    [[TMP0:%.*]] = load i8, i8* [[BPTR:%.*]], align 1
+; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[TMP0]] to i32
+; CHECK-NEXT:    [[CONV21:%.*]] = trunc i32 [[SPTR:%.*]] to i16
+; CHECK-NEXT:    [[ARRAYIDX23:%.*]] = getelementptr inbounds i16, i16* [[HPTR:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT:    store i16 [[CONV21]], i16* [[ARRAYIDX23]], align 2
+; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[DPTR:%.*]]
+; CHECK-NEXT:    br label [[FOR_BODY]]
+entry:
+  br label %for.body
+
+for.body:                                             ; preds = %for.body.pre, %for.body
+  %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+  %0 = load i8, i8* %bptr, align 1
+  %conv = zext i8 %0 to i32
+  %conv21 = trunc i32 %sptr to i16
+  %arrayidx23 = getelementptr inbounds i16, i16* %hptr, i64 %indvars.iv
+  store i16 %conv21, i16* %arrayidx23, align 2
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+  %exitcond.not = icmp eq i64 %indvars.iv.next, %dptr
+  br label %for.body
+}