[SVE] Fix cast<FixedVectorType> in truncateToMinimalBitwidths

[CarolineConcatto]

Hi @DylanFleming-arm
I believe something wrong happened when you uploaded this patch.
It is not showing LoopVectorize.cpp file.
I can only see Context not available.
Is that happening for you too?

llvm/test/Transforms/LoopVectorize/AArch64/sve-trunc-min-bitwidth.ll

2

Remove that

3

Can you make that a more generic test using the flag:
-force-target-supports-scalable-vectors
?

5

Remove that too.

106

I believe you don't need that.

[sdesmalen]

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

3955

This looks like the same code, just different formatting.

Did you diff with the correct commit? It also says that llvm/test/Transforms/LoopVectorize/AArch64/sve-trunc-min-bitwidth.ll was moved, but this file does not exist upstream.

[kmclaughlin]

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

2 ↗

(On Diff #352460)

For most of the other scalable tests added to LoopVectorize we've used -scalable-vectorization=on

4 ↗

(On Diff #352460)

This function doesn't have any attributes, so you can remove the #0

68 ↗

(On Diff #352460)

I think you can change this to %for.body and then remove the for.body.pre block below.

[sdesmalen]

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

9 ↗

(On Diff #354515)

This loop is no longer vectorized, so this test is no longer testing your code.

[DylanFleming-arm]

Fixed issue where loop wasn't correctly vectorized with scalable vectors

[sdesmalen]

Just a few more nits on the test.

llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll

4 ↗

(On Diff #355831)

%dptr is not a pointer, but rather the number of loop iterations, e.g. %N.

4 ↗

(On Diff #355831)

sptr is also not a pointer, but rather some store value, e.g. %val.

4 ↗

(On Diff #355831)

if you make i16* %hptr into i16* noalias %hptr, then you avoid the memory checks because the compiler knows the data pointed to by %hptr doesn't alias with any other memory that's accessed in the function, so it won't have to actively check if there is a dependence between the load/store by adding the compares. See the LangRef.

[DylanFleming-arm]

Updated parameter names to make more sense
Made i16* %hptr into noalias

[sdesmalen]

LGTM

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

       Type *OriginalTy = I->getType();
       Type *ScalarTruncatedTy =
           IntegerType::get(OriginalTy->getContext(), KV.second);
-      auto *TruncatedTy = FixedVectorType::get(
+      auto *TruncatedTy = VectorType::get(
           ScalarTruncatedTy,
-          cast<FixedVectorType>(OriginalTy)->getNumElements());
+          cast<VectorType>(OriginalTy)->getElementCount());
       if (TruncatedTy == OriginalTy)
         continue;
 

llvm/test/Transforms/LoopVectorize/AArch64/sve-trunc-min-bitwidth.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; ModuleID = 'bla2.ll'
+; RUN: opt < %s -loop-vectorize -scalable-vectorization=preferred -S | FileCheck %s
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux-gnu"
+
+define void @trunc_minimal_bitwidth(i8* %bptr, i16* %hptr, i32 %sptr, i64 %dptr) #0 {
+; CHECK-LABEL: @trunc_minimal_bitwidth(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[HPTR1:%.*]] = bitcast i16* [[HPTR:%.*]] to i8*
+; CHECK-NEXT:    [[SCEVGEP:%.*]] = getelementptr i16, i16* [[HPTR]], i64 [[DPTR:%.*]]
+; CHECK-NEXT:    [[SCEVGEP2:%.*]] = bitcast i16* [[SCEVGEP]] to i8*
+; CHECK-NEXT:    [[SCEVGEP3:%.*]] = getelementptr i8, i8* [[BPTR:%.*]], i64 1
+; CHECK-NEXT:    br label [[FOR_BODY_PRE:%.*]]
+; CHECK:       for.body.pre.loopexit:
+; CHECK-NEXT:    br label [[FOR_BODY_PRE]]
+; CHECK:       for.body.pre:
+; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 16
+; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[DPTR]], [[TMP1]]
+; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
+; CHECK:       vector.memcheck:
+; CHECK-NEXT:    [[BOUND0:%.*]] = icmp ult i8* [[HPTR1]], [[SCEVGEP3]]
+; CHECK-NEXT:    [[BOUND1:%.*]] = icmp ult i8* [[BPTR]], [[SCEVGEP2]]
+; CHECK-NEXT:    [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT:    [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true
+; CHECK-NEXT:    br i1 [[MEMCHECK_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
+; CHECK:       vector.ph:
+; CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 16
+; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[DPTR]], [[TMP3]]
+; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[DPTR]], [[N_MOD_VF]]
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <vscale x 8 x i32> poison, i32 [[SPTR:%.*]], i32 0
+; CHECK-NEXT:    [[BROADCAST_SPLAT7:%.*]] = shufflevector <vscale x 8 x i32> [[BROADCAST_SPLATINSERT6]], <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <vscale x 8 x i32> poison, i32 [[SPTR]], i32 0
+; CHECK-NEXT:    [[BROADCAST_SPLAT9:%.*]] = shufflevector <vscale x 8 x i32> [[BROADCAST_SPLATINSERT8]], <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
+; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
+; CHECK:       vector.body:
+; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 0
+; CHECK-NEXT:    [[TMP5:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT:    [[TMP6:%.*]] = mul i64 [[TMP5]], 8
+; CHECK-NEXT:    [[TMP7:%.*]] = add i64 [[TMP6]], 0
+; CHECK-NEXT:    [[TMP8:%.*]] = mul i64 [[TMP7]], 1
+; CHECK-NEXT:    [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
+; CHECK-NEXT:    [[TMP10:%.*]] = load i8, i8* [[BPTR]], align 1, !alias.scope !0
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 8 x i8> poison, i8 [[TMP10]], i32 0
+; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 8 x i8> [[BROADCAST_SPLATINSERT]], <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
+; CHECK-NEXT:    [[TMP11:%.*]] = load i8, i8* [[BPTR]], align 1, !alias.scope !0
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <vscale x 8 x i8> poison, i8 [[TMP11]], i32 0
+; CHECK-NEXT:    [[BROADCAST_SPLAT5:%.*]] = shufflevector <vscale x 8 x i8> [[BROADCAST_SPLATINSERT4]], <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
+; CHECK-NEXT:    [[TMP12:%.*]] = zext <vscale x 8 x i8> [[BROADCAST_SPLAT]] to <vscale x 8 x i32>
+; CHECK-NEXT:    [[TMP13:%.*]] = zext <vscale x 8 x i8> [[BROADCAST_SPLAT5]] to <vscale x 8 x i32>
+; CHECK-NEXT:    [[TMP14:%.*]] = trunc <vscale x 8 x i32> [[BROADCAST_SPLAT7]] to <vscale x 8 x i16>
+; CHECK-NEXT:    [[TMP15:%.*]] = trunc <vscale x 8 x i32> [[BROADCAST_SPLAT9]] to <vscale x 8 x i16>
+; CHECK-NEXT:    [[TMP16:%.*]] = getelementptr inbounds i16, i16* [[HPTR]], i64 [[TMP4]]
+; CHECK-NEXT:    [[TMP17:%.*]] = getelementptr inbounds i16, i16* [[HPTR]], i64 [[TMP9]]
+; CHECK-NEXT:    [[TMP18:%.*]] = getelementptr inbounds i16, i16* [[TMP16]], i32 0
+; CHECK-NEXT:    [[TMP19:%.*]] = bitcast i16* [[TMP18]] to <vscale x 8 x i16>*
+; CHECK-NEXT:    store <vscale x 8 x i16> [[TMP14]], <vscale x 8 x i16>* [[TMP19]], align 2, !alias.scope !3, !noalias !0
+; CHECK-NEXT:    [[TMP20:%.*]] = call i32 @llvm.vscale.i32()
+; CHECK-NEXT:    [[TMP21:%.*]] = mul i32 [[TMP20]], 8
+; CHECK-NEXT:    [[TMP22:%.*]] = getelementptr inbounds i16, i16* [[TMP16]], i32 [[TMP21]]
+; CHECK-NEXT:    [[TMP23:%.*]] = bitcast i16* [[TMP22]] to <vscale x 8 x i16>*
+; CHECK-NEXT:    store <vscale x 8 x i16> [[TMP15]], <vscale x 8 x i16>* [[TMP23]], align 2, !alias.scope !3, !noalias !0
+; CHECK-NEXT:    [[TMP24:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT:    [[TMP25:%.*]] = mul i64 [[TMP24]], 16
+; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP25]]
+; CHECK-NEXT:    [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT:    br i1 [[TMP26]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK:       middle.block:
+; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[DPTR]], [[N_VEC]]
+; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_BODY_PRE_LOOPEXIT:%.*]], label [[SCALAR_PH]]
+; CHECK:       scalar.ph:
+; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_BODY_PRE]] ], [ 0, [[VECTOR_MEMCHECK]] ]
+; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
+; CHECK:       for.body:
+; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT:    [[TMP27:%.*]] = load i8, i8* [[BPTR]], align 1
+; CHECK-NEXT:    [[CONV:%.*]] = zext i8 [[TMP27]] to i32
+; CHECK-NEXT:    [[CONV21:%.*]] = trunc i32 [[SPTR]] to i16
+; CHECK-NEXT:    [[ARRAYIDX23:%.*]] = getelementptr inbounds i16, i16* [[HPTR]], i64 [[INDVARS_IV]]
+; CHECK-NEXT:    store i16 [[CONV21]], i16* [[ARRAYIDX23]], align 2
+; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[DPTR]]
+; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_BODY_PRE_LOOPEXIT]], label [[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
+;
+entry:
+  br label %for.body.pre
+
+for.body.pre:                                         ; preds = %entry, %for.body.pre
+  br label %for.body
+
+for.body:                                             ; preds = %for.body.pre, %for.body
+  %indvars.iv = phi i64 [ 0, %for.body.pre ], [ %indvars.iv.next, %for.body ]
+  %0 = load i8, i8* %bptr, align 1
+  %conv = zext i8 %0 to i32
+  %conv21 = trunc i32 %sptr to i16
+  %arrayidx23 = getelementptr inbounds i16, i16* %hptr, i64 %indvars.iv
+  store i16 %conv21, i16* %arrayidx23, align 2
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+  %exitcond.not = icmp eq i64 %indvars.iv.next, %dptr
+  br i1 %exitcond.not, label %for.body.pre, label %for.body
+}
+
+attributes #0 = { "target-features"="+neon,+sve" }