[IR][InstCombine] IntToPtr Produces Typeless Pointer To Byte

[lebedev.ri]

Summary

While ptrtoint can and should be treated transparently by the passes,
inttoptr is a black box. SCEV does not, should not, and will not model it.
But that means, given two identical, but separate inttoptr instructions,
SROA won't be able to tell that they have the same pointer value.
Likewise for pointers with the same integer base but different pointee types.

Currently, InstCombine already ensures that inttoptr/ptrtoint don't change
the integer width, but it is performed separately before/after.

Let's do the same for target pointee type for inttoptr.
I.e. if it's not an i8*, reconstruct inttoptr + emit bitcast.
And let's rely on EarlyCSE to be able to CSE them,
thus making them somewhat less of a hurdle for SROA/etc.

Notably, i don't think we should do the same for ptrtoint.

Now, this causes some test regressions.
I've fixed SROA issue (D99051), and one InstCombine issue
(p2i (?bitcast (ins (?bitcast (i2p Vec)), Scalar, Index)) --> ins Vec, (p2i Scalar), Index),
but there may be few more in tests, i'll comment on them.
I'm not sure off-hand about what to do with them.

[lebedev.ri]

llvm/test/Transforms/InstCombine/indexed-gep-compares.ll

35–51

Regression. Not looking through bitcast?

105–122

Regression. Not looking through bitcast?

189–213

Regression. Not looking through bitcast?

llvm/test/Transforms/InstCombine/intptr3.ll

14–16

Regression.

llvm/test/Transforms/InstCombine/intptr7.ll

4–27

Regression. Not looking through bitcast?

52–75

Regression. Not looking through bitcast?

[ruiling]

llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

278–280

If we want to disable int2ptr + bitcast unconditionally, then why not directly make it in CastInst::isEliminableCastPair()?

1949–1953

The idea here sounds good to me, but seems causing some new problems for the regression tests. I am not sure the whether the regressions are easy to fix?

[lebedev.ri]

Also update a few clang tests.

[nlopes]

The pointee type in LLVM doesn't really matter. It's even supposed to disappear one day after the migration is completed.
E.g., i8* and i64* are exactly the same thing: they are pointers to data.
So, I don't understand the motivation for this patch. It doesn't solve the root cause of the problem (which one btw?).

[lebedev.ri]

In D99121#2644223, @nlopes wrote:

The pointee type in LLVM doesn't really matter. It's even supposed to disappear one day after the migration is completed.
E.g., i8* and i64* are exactly the same thing: they are pointers to data.

Yep. That will be indeed a great to see.

So, I don't understand the motivation for this patch. It doesn't solve the root cause of the problem (which one btw?).

It is indeed temporary until Opaque pointers are here.
The problem has been stated last time in D99051 by @ruiling:
https://godbolt.org/z/x7E1EjWvv, i.e. given the same integer,
there can be any number of pointers inttoptr'd from it,
and passes won't be able to tell that they are identical.

@dblaikie @t.p.northover can anyone comment on the Opaque Pointers progress? Is there a checklist somewhere?

llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

278–280

Because technically that is still legal, much like changing integer types of the inttoptr/ptrtoint,
which also aren't prohibited in isEliminableCastPair().

1949–1953

FWIW all the problems are temporary until LLVM IR is migrated to typeless pointer types.

[dblaikie]

In D99121#2644362, @lebedev.ri wrote:

In D99121#2644223, @nlopes wrote:

The pointee type in LLVM doesn't really matter. It's even supposed to disappear one day after the migration is completed.
E.g., i8* and i64* are exactly the same thing: they are pointers to data.

Yep. That will be indeed a great to see.

So, I don't understand the motivation for this patch. It doesn't solve the root cause of the problem (which one btw?).

It is indeed temporary until Opaque pointers are here.
The problem has been stated last time in D99051 by @ruiling:
https://godbolt.org/z/x7E1EjWvv, i.e. given the same integer,
there can be any number of pointers inttoptr'd from it,
and passes won't be able to tell that they are identical.

@dblaikie @t.p.northover can anyone comment on the Opaque Pointers progress? Is there a checklist somewhere?

no checklist, unfortunately - myself, @t.p.northover, @jyknight, and @arsenm have all done bits and pieces of work on it lately.

I think we've got most of the big IR changes (adding explicit types where they'll be needed when they're no longer carried on the type of pointer parameters) - @arsenm's D98146 is another piece in that area, hopefully near the last I think.

After all that's in place, the next step I think would be to introduce the typeless pointer, support it as an operand to these various operations - and then try producing it as a result of instructions too. But I'm probably missing a bunch of important steps we'll find are necessary...

[nlopes]

In D99121#2645593, @dblaikie wrote:

In D99121#2644362, @lebedev.ri wrote:

In D99121#2644223, @nlopes wrote:

The pointee type in LLVM doesn't really matter. It's even supposed to disappear one day after the migration is completed.
E.g., i8* and i64* are exactly the same thing: they are pointers to data.

Yep. That will be indeed a great to see.

So, I don't understand the motivation for this patch. It doesn't solve the root cause of the problem (which one btw?).

It is indeed temporary until Opaque pointers are here.
The problem has been stated last time in D99051 by @ruiling:
https://godbolt.org/z/x7E1EjWvv, i.e. given the same integer,
there can be any number of pointers inttoptr'd from it,
and passes won't be able to tell that they are identical.

@dblaikie @t.p.northover can anyone comment on the Opaque Pointers progress? Is there a checklist somewhere?

no checklist, unfortunately - myself, @t.p.northover, @jyknight, and @arsenm have all done bits and pieces of work on it lately.

I think we've got most of the big IR changes (adding explicit types where they'll be needed when they're no longer carried on the type of pointer parameters) - @arsenm's D98146 is another piece in that area, hopefully near the last I think.

After all that's in place, the next step I think would be to introduce the typeless pointer, support it as an operand to these various operations - and then try producing it as a result of instructions too. But I'm probably missing a bunch of important steps we'll find are necessary...

Do you have an ETA for when the switch will happen? Just to inform us where we should proceed with temp fixes like this one or we should just wait.

[dblaikie]

In D99121#2647187, @nlopes wrote:

In D99121#2645593, @dblaikie wrote:

In D99121#2644362, @lebedev.ri wrote:

In D99121#2644223, @nlopes wrote:

The pointee type in LLVM doesn't really matter. It's even supposed to disappear one day after the migration is completed.
E.g., i8* and i64* are exactly the same thing: they are pointers to data.

Yep. That will be indeed a great to see.

So, I don't understand the motivation for this patch. It doesn't solve the root cause of the problem (which one btw?).

It is indeed temporary until Opaque pointers are here.
The problem has been stated last time in D99051 by @ruiling:
https://godbolt.org/z/x7E1EjWvv, i.e. given the same integer,
there can be any number of pointers inttoptr'd from it,
and passes won't be able to tell that they are identical.

@dblaikie @t.p.northover can anyone comment on the Opaque Pointers progress? Is there a checklist somewhere?

no checklist, unfortunately - myself, @t.p.northover, @jyknight, and @arsenm have all done bits and pieces of work on it lately.

I think we've got most of the big IR changes (adding explicit types where they'll be needed when they're no longer carried on the type of pointer parameters) - @arsenm's D98146 is another piece in that area, hopefully near the last I think.

After all that's in place, the next step I think would be to introduce the typeless pointer, support it as an operand to these various operations - and then try producing it as a result of instructions too. But I'm probably missing a bunch of important steps we'll find are necessary...

Do you have an ETA for when the switch will happen? Just to inform us where we should proceed with temp fixes like this one or we should just wait.

No, sorry I don't - I ran out of steam after the initial work, and haven't been able to get back into it. A few folks have picked up my slack in the last year or two & made some incremental progress.

It'd be good to tag any workarounds somehow (I don't know how, exactly) to be sure they're cleaned up as things are sorted out.

Long and the short of it: If these bugs matter to you, probably not worth waiting for the general fix (but more help would be appreciated if you wanted to work on the long term solution) & workarounds are probably reasonable.

[ruiling]

No, sorry I don't - I ran out of steam after the initial work, and haven't been able to get back into it. A few folks have picked up my slack in the last year or two & made some incremental progress.

It'd be good to tag any workarounds somehow (I don't know how, exactly) to be sure they're cleaned up as things are sorted out.

Long and the short of it: If these bugs matter to you, probably not worth waiting for the general fix (but more help would be appreciated if you wanted to work on the long term solution) & workarounds are probably reasonable.

Sounds we still need a long way to get there? Do we think the patch acceptable as a short-term solution?

[dblaikie]

In D99121#2649546, @ruiling wrote:

No, sorry I don't - I ran out of steam after the initial work, and haven't been able to get back into it. A few folks have picked up my slack in the last year or two & made some incremental progress.

It'd be good to tag any workarounds somehow (I don't know how, exactly) to be sure they're cleaned up as things are sorted out.

Long and the short of it: If these bugs matter to you, probably not worth waiting for the general fix (but more help would be appreciated if you wanted to work on the long term solution) & workarounds are probably reasonable.

Sounds we still need a long way to get there? Do we think the patch acceptable as a short-term solution?

Guess it's a tradeoff. Doesn't look like a load of code/complexity. - but equally, does it provide much value? Or is it enough to know it can eventually be addressed in a more general manner?

[ruiling]

Sounds we still need a long way to get there? Do we think the patch acceptable as a short-term solution?

Guess it's a tradeoff. Doesn't look like a load of code/complexity. - but equally, does it provide much value? Or is it enough to know it can eventually be addressed in a more general manner?

I don't have an answer for the second question, but this change would make later pass like ScalarEvolution can know the two pointers from the same integer by inttoptr are identical. Then we can merge possible consecutive memory access based on such pointers, we observed about 2% overall performance improvement for a critical workload.

[nlopes]

Given that it gives a decent speedup for some important workload, and provided it doesn't regress others, I think this should go in then.
It's easy to revert this once opaque pointers arrive.

[nikic]

In D99121#2650146, @nlopes wrote:

Given that it gives a decent speedup for some important workload, and provided it doesn't regress others [...]

I think that second point is going to need some evidence (at least in the form of transform stats I guess). D96881 is another recent attempt to work around pointer types, and it looks like that one did regress others. This patch already shows regressions inside InstCombine itself, so that's not a great sign.

[ruiling]

Then what do you think of my initial change for the issue (D99051) considering it does not show regression in any existing test? @nikic @nlopes It has a test showing the initial problem I want to solve. @lebedev.ri helped writing this patch to solve the problem more completely. But I guess D99051 is enough for the initial problem, our frontend would less likely generating two pointers pointing to different types through inttoptr from the same integer.

clang/test/CodeGen/X86/ms-x86-intrinsics.c

 // CHECK-I386:   [[VALUE:%[0-9]+]] = load volatile i8, i8 addrspace(257)* [[PTR]], align 1
 // CHECK-I386:   ret i8 [[VALUE:%[0-9]+]]
 
 short test__readfsword(unsigned long Offset) {
   return __readfsword(++Offset);
 }
 // CHECK-I386-LABEL: define dso_local signext i16 @test__readfsword(i32 %Offset)
 // CHECK-I386:   %inc = add i32 %Offset, 1
-// CHECK-I386:   [[PTR:%[0-9]+]] = inttoptr i32 %inc to i16 addrspace(257)*
+// CHECK-I386:   [[BYTEPTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)*
+// CHECK-I386:   [[PTR:%[0-9]+]] = bitcast i8 addrspace(257)* [[BYTEPTR]] to i16 addrspace(257)*
 // CHECK-I386:   [[VALUE:%[0-9]+]] = load volatile i16, i16 addrspace(257)* [[PTR]], align 2
 // CHECK-I386:   ret i16 [[VALUE:%[0-9]+]]
 
 long test__readfsdword(unsigned long Offset) {
   return __readfsdword(++Offset);
 }
 // CHECK-I386-LABEL: define dso_local i32 @test__readfsdword(i32 %Offset)
 // CHECK-I386:   %inc = add i32 %Offset, 1
-// CHECK-I386:   [[PTR:%[0-9]+]] = inttoptr i32 %inc to i32 addrspace(257)*
+// CHECK-I386:   [[BYTEPTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)*
+// CHECK-I386:   [[PTR:%[0-9]+]] = bitcast i8 addrspace(257)* [[BYTEPTR]] to i32 addrspace(257)*
 // CHECK-I386:   [[VALUE:%[0-9]+]] = load volatile i32, i32 addrspace(257)* [[PTR]], align 4
 // CHECK-I386:   ret i32 [[VALUE:%[0-9]+]]
 
 long long test__readfsqword(unsigned long Offset) {
   return __readfsqword(++Offset);
 }
 // CHECK-I386-LABEL: define dso_local i64 @test__readfsqword(i32 %Offset)
 // CHECK-I386:   %inc = add i32 %Offset, 1
-// CHECK-I386:   [[PTR:%[0-9]+]] = inttoptr i32 %inc to i64 addrspace(257)*
+// CHECK-I386:   [[BYTEPTR:%[0-9]+]] = inttoptr i32 %inc to i8 addrspace(257)*
+// CHECK-I386:   [[PTR:%[0-9]+]] = bitcast i8 addrspace(257)* [[BYTEPTR]] to i64 addrspace(257)*
 // CHECK-I386:   [[VALUE:%[0-9]+]] = load volatile i64, i64 addrspace(257)* [[PTR]], align 8
 // CHECK-I386:   ret i64 [[VALUE:%[0-9]+]]
 #endif
 
 __int64 test__emul(int a, int b) {
   return __emul(a, b);
 }
 // CHECK-LABEL: define dso_local i64 @test__emul(i32 %a, i32 %b)

 // CHECK-X64:   ret i8 [[VALUE:%[0-9]+]]
 
 short test__readgsword(unsigned long Offset) {
   return __readgsword(++Offset);
 }
 // CHECK-X64-LABEL: define dso_local i16 @test__readgsword(i32 %Offset)
 // CHECK-X64:   %inc = add i32 %Offset, 1
 // CHECK-X64:   [[ZEXT:%[0-9]+]] = zext i32 %inc to i64
-// CHECK-X64:   [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i16 addrspace(256)*
+// CHECK-X64:   [[BYTEPTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)*
+// CHECK-X64:   [[PTR:%[0-9]+]] = bitcast i8 addrspace(256)* [[BYTEPTR]] to i16 addrspace(256)*
 // CHECK-X64:   [[VALUE:%[0-9]+]] = load volatile i16, i16 addrspace(256)* [[PTR]], align 2
 // CHECK-X64:   ret i16 [[VALUE:%[0-9]+]]
 
 long test__readgsdword(unsigned long Offset) {
   return __readgsdword(++Offset);
 }
 // CHECK-X64-LABEL: define dso_local i32 @test__readgsdword(i32 %Offset)
 // CHECK-X64:   %inc = add i32 %Offset, 1
 // CHECK-X64:   [[ZEXT:%[0-9]+]] = zext i32 %inc to i64
-// CHECK-X64:   [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i32 addrspace(256)*
+// CHECK-X64:   [[BYTEPTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)*
+// CHECK-X64:   [[PTR:%[0-9]+]] = bitcast i8 addrspace(256)* [[BYTEPTR]] to i32 addrspace(256)*
 // CHECK-X64:   [[VALUE:%[0-9]+]] = load volatile i32, i32 addrspace(256)* [[PTR]], align 4
 // CHECK-X64:   ret i32 [[VALUE:%[0-9]+]]
 
 long long test__readgsqword(unsigned long Offset) {
   return __readgsqword(++Offset);
 }
 // CHECK-X64-LABEL: define dso_local i64 @test__readgsqword(i32 %Offset)
 // CHECK-X64:   %inc = add i32 %Offset, 1
 // CHECK-X64:   [[ZEXT:%[0-9]+]] = zext i32 %inc to i64
-// CHECK-X64:   [[PTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i64 addrspace(256)*
+// CHECK-X64:   [[BYTEPTR:%[0-9]+]] = inttoptr i64 [[ZEXT]] to i8 addrspace(256)*
+// CHECK-X64:   [[PTR:%[0-9]+]] = bitcast i8 addrspace(256)* [[BYTEPTR]] to i64 addrspace(256)*
 // CHECK-X64:   [[VALUE:%[0-9]+]] = load volatile i64, i64 addrspace(256)* [[PTR]], align 8
 // CHECK-X64:   ret i64 [[VALUE:%[0-9]+]]
 
 __int64 test__mulh(__int64 a, __int64 b) {
   return __mulh(a, b);
 }
 // CHECK-X64-LABEL: define dso_local i64 @test__mulh(i64 %a, i64 %b)
 // CHECK-X64: = mul nsw i128 %

clang/test/CodeGen/arm64_32-vaarg.c

long long test_longlong(OneLongLong input, va_list *mylist) {
   // CHECK: [[START:%.*]] = ptrtoint i8* [[STARTPTR]] to i32
 
   // CHECK: [[ALIGN_TMP:%.*]] = add i32 [[START]], 7
   // CHECK: [[ALIGNED:%.*]] = and i32 [[ALIGN_TMP]], -8
   // CHECK: [[ALIGNED_ADDR:%.*]] = inttoptr i32 [[ALIGNED]] to i8*
   // CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[ALIGNED_ADDR]], i32 8
   // CHECK: store i8* [[NEXT]], i8** %mylist
 
-  // CHECK: [[ADDR_STRUCT:%.*]] = inttoptr i32 [[ALIGNED]] to %struct.OneLongLong*
-  // CHECK: [[ADDR_I64:%.*]] = getelementptr inbounds %struct.OneLongLong, %struct.OneLongLong* [[ADDR_STRUCT]], i32 0, i32 0
-  // CHECK: [[RES:%.*]] = load i64, i64* [[ADDR_I64]]
+  // CHECK: [[ADDR_STRUCT:%.*]] = bitcast i8* [[ALIGNED_ADDR]] to i64*
+  // CHECK: [[RES:%.*]] = load i64, i64* [[ADDR_STRUCT]]
   // CHECK: ret i64 [[RES]]
 
   return va_arg(*mylist, OneLongLong).a;
 }
 
 
 typedef struct {
   float arr[4];

clang/test/CodeGen/pointer-signext.c

+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple x86_64-pc-win32 -emit-llvm -O2 -o - %s | FileCheck %s
 
 // Under Windows 64, int and long are 32-bits.  Make sure pointer math doesn't
 // cause any sign extensions.
 
-// CHECK:      [[P:%.*]] = add i64 %param, -8
-// CHECK-NEXT: [[Q:%.*]] = inttoptr i64 [[P]] to [[R:%.*]]*
-// CHECK-NEXT: {{%.*}} = getelementptr inbounds [[R]], [[R]]* [[Q]], i64 0, i32 0
-
 #define CR(Record, TYPE, Field) \
   ((TYPE *) ((unsigned char *) (Record) - (unsigned char *) &(((TYPE *) 0)->Field)))
 
 typedef struct _LIST_ENTRY {
   struct _LIST_ENTRY  *ForwardLink;
   struct _LIST_ENTRY  *BackLink;
 } LIST_ENTRY;
 
 typedef struct {
   unsigned long long    Signature;
   LIST_ENTRY            Link;
 } MEMORY_MAP;
 
+// CHECK-LABEL: @test(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[SUB_PTR_SUB:%.*]] = add i64 [[PARAM:%.*]], -8
+// CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[SUB_PTR_SUB]] to i8*
+// CHECK-NEXT:    [[SIGNATURE:%.*]] = bitcast i8* [[TMP0]] to i64*
+// CHECK-NEXT:    [[TMP1:%.*]] = load i64, i64* [[SIGNATURE]], align 8, !tbaa [[TBAA2:![0-9]+]]
+// CHECK-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
+// CHECK-NEXT:    ret i32 [[CONV]]
+//
 int test(unsigned long long param)
 {
   LIST_ENTRY      *Link;
   MEMORY_MAP      *Entry;
 
   Link = (LIST_ENTRY *) param;
 
   Entry = CR (Link, MEMORY_MAP, Link);
   return (int) Entry->Signature;
 }

clang/test/CodeGenCXX/RelativeVTablesABI/member-function-pointer.cpp

+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // Member pointer to virtual function.
 
 // RUN: %clang_cc1 %s -triple=aarch64-unknown-fuchsia -O3 -S -o - -emit-llvm -fexperimental-relative-c++-abi-vtables | FileCheck %s
 
-// CHECK:      define{{.*}} void @_Z4funcP1AMS_FvvE(%class.A* %a, [2 x i64] %fn.coerce) local_unnamed_addr
-// CHECK-NEXT: entry:
-// CHECK-NEXT:   [[fn_ptr:%.+]] = extractvalue [2 x i64] %fn.coerce, 0
-// CHECK-NEXT:   [[adjust:%.+]] = extractvalue [2 x i64] %fn.coerce, 1
-// CHECK-NEXT:   [[this:%.+]] = bitcast %class.A* %a to i8*
-// CHECK-NEXT:   [[this_adj:%.+]] = getelementptr inbounds i8, i8* [[this]], i64 [[adjust]]
-// CHECK-NEXT:   [[virtbit:%.+]] = and i64 [[fn_ptr]], 1
-// CHECK-NEXT:   [[isvirt:%.+]] = icmp eq i64 [[virtbit]], 0
-// CHECK-NEXT:   br i1 [[isvirt]], label %[[nonvirt:.+]], label %[[virt:.+]]
-// CHECK:      [[virt]]:
 
 // The loading of the virtual function here should be replaced with a llvm.load.relative() call.
-// CHECK-NEXT:   [[this:%.+]] = bitcast i8* [[this_adj]] to i8**
-// CHECK-NEXT:   [[vtable:%.+]] = load i8*, i8** [[this]], align 8
-// CHECK-NEXT:   [[offset:%.+]] = add i64 [[fn_ptr]], -1
-// CHECK-NEXT:   [[ptr:%.+]] = tail call i8* @llvm.load.relative.i64(i8* [[vtable]], i64 [[offset]])
-// CHECK-NEXT:   [[method:%.+]] = bitcast i8* [[ptr]] to void (%class.A*)*
-// CHECK-NEXT:   br label %[[memptr_end:.+]]
-// CHECK:      [[nonvirt]]:
-// CHECK-NEXT:   [[method2:%.+]] = inttoptr i64 [[fn_ptr]] to void (%class.A*)*
-// CHECK-NEXT:   br label %[[memptr_end]]
-// CHECK:      [[memptr_end]]:
-// CHECK-NEXT:   [[method3:%.+]] = phi void (%class.A*)* [ [[method]], %[[virt]] ], [ [[method2]], %[[nonvirt]] ]
-// CHECK-NEXT:   [[a:%.+]] = bitcast i8* [[this_adj]] to %class.A*
-// CHECK-NEXT:   tail call void [[method3]](%class.A* {{[^,]*}} [[a]])
-// CHECK-NEXT:   ret void
-// CHECK-NEXT: }
 
 class A {
 public:
   virtual void foo();
 };
 
 class B : public A {
 public:
   void foo() override;
 };
 
 typedef void (A::*A_foo)();
 
+// CHECK-LABEL: @_Z4funcP1AMS_FvvE(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[FN_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x i64] [[FN_COERCE:%.*]], 0
+// CHECK-NEXT:    [[FN_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x i64] [[FN_COERCE]], 1
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast %class.A* [[A:%.*]] to i8*
+// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i64 [[FN_COERCE_FCA_1_EXTRACT]]
+// CHECK-NEXT:    [[TMP2:%.*]] = and i64 [[FN_COERCE_FCA_0_EXTRACT]], 1
+// CHECK-NEXT:    [[MEMPTR_ISVIRTUAL_NOT:%.*]] = icmp eq i64 [[TMP2]], 0
+// CHECK-NEXT:    br i1 [[MEMPTR_ISVIRTUAL_NOT]], label [[MEMPTR_NONVIRTUAL:%.*]], label [[MEMPTR_VIRTUAL:%.*]]
+// CHECK:       memptr.virtual:
+// CHECK-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i8**
+// CHECK-NEXT:    [[VTABLE:%.*]] = load i8*, i8** [[TMP3]], align 8, !tbaa [[TBAA6:![0-9]+]]
+// CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[FN_COERCE_FCA_0_EXTRACT]], -1
+// CHECK-NEXT:    [[TMP5:%.*]] = tail call i8* @llvm.load.relative.i64(i8* [[VTABLE]], i64 [[TMP4]]), !nosanitize !9
+// CHECK-NEXT:    br label [[MEMPTR_END:%.*]]
+// CHECK:       memptr.nonvirtual:
+// CHECK-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[FN_COERCE_FCA_0_EXTRACT]] to i8*
+// CHECK-NEXT:    br label [[MEMPTR_END]]
+// CHECK:       memptr.end:
+// CHECK-NEXT:    [[DOTIN:%.*]] = phi i8* [ [[TMP5]], [[MEMPTR_VIRTUAL]] ], [ [[TMP6]], [[MEMPTR_NONVIRTUAL]] ]
+// CHECK-NEXT:    [[THIS_ADJUSTED:%.*]] = bitcast i8* [[TMP1]] to %class.A*
+// CHECK-NEXT:    [[TMP7:%.*]] = bitcast i8* [[DOTIN]] to void (%class.A*)*
+// CHECK-NEXT:    tail call void [[TMP7]](%class.A* nonnull dereferenceable(8) [[THIS_ADJUSTED]]) #[[ATTR2:[0-9]+]]
+// CHECK-NEXT:    ret void
+//
 void func(A *a, A_foo fn) {
   (a->*fn)();
 }

clang/test/CodeGenOpenCL/as_type.cl

 //CHECK: define{{.*}} spir_func i32 addrspace(1)* @addr_cast(i32* readnone %[[x:.*]])
 //CHECK: %[[cast:.*]] ={{.*}} addrspacecast i32* %[[x]] to i32 addrspace(1)*
 //CHECK: ret i32 addrspace(1)* %[[cast]]
 global int* addr_cast(int *x) {
   return __builtin_astype(x, global int*);
 }
 
 //CHECK: define{{.*}} spir_func i32 addrspace(1)* @int_to_ptr(i32 %[[x:.*]])
-//CHECK: %[[cast:.*]] = inttoptr i32 %[[x]] to i32 addrspace(1)*
+//CHECK: %[[cast_byte:.*]] = inttoptr i32 %[[x]] to i8 addrspace(1)*
+//CHECK: %[[cast:.*]] = bitcast i8 addrspace(1)* %[[cast_byte]] to i32 addrspace(1)*
 //CHECK: ret i32 addrspace(1)* %[[cast]]
 global int* int_to_ptr(int x) {
   return __builtin_astype(x, global int*);
 }
 
 //CHECK: define{{.*}} spir_func i32 @ptr_to_int(i32* %[[x:.*]])
 //CHECK: %[[cast:.*]] = ptrtoint i32* %[[x]] to i32
 //CHECK: ret i32 %[[cast]]
 int ptr_to_int(int *x) {
   return __builtin_astype(x, int);
 }
 
 //CHECK: define{{.*}} spir_func <3 x i8> @ptr_to_char3(i32* %[[x:.*]])
 //CHECK: %[[cast1:.*]] = ptrtoint i32* %[[x]] to i32
 //CHECK: %[[cast2:.*]] = bitcast i32 %[[cast1]] to <4 x i8>
 //CHECK: %[[astype:.*]] = shufflevector <4 x i8> %[[cast2]], <4 x i8> poison, <3 x i32> <i32 0, i32 1, i32 2>
 //CHECK: ret <3 x i8> %[[astype]]
 char3 ptr_to_char3(int *x) {
   return  __builtin_astype(x, char3);
 }
 
 //CHECK: define{{.*}} spir_func i32* @char3_to_ptr(<3 x i8> %[[x:.*]])
 //CHECK: %[[astype:.*]] = shufflevector <3 x i8> %[[x]], <3 x i8> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
 //CHECK: %[[cast1:.*]] = bitcast <4 x i8> %[[astype]] to i32
-//CHECK: %[[cast2:.*]] = inttoptr i32 %[[cast1]] to i32*
+//CHECK: %[[cast_byte2:.*]] = inttoptr i32 %[[cast1]] to i8*
+//CHECK: %[[cast2:.*]] = bitcast i8* %[[cast_byte2]] to i32*
 //CHECK: ret i32* %[[cast2]]
 int* char3_to_ptr(char3 x) {
   return __builtin_astype(x, int*);
 }

llvm/include/llvm/IR/PatternMatch.h

 
 /// Matches Trunc.
 template <typename OpTy>
 inline CastClass_match<OpTy, Instruction::Trunc> m_Trunc(const OpTy &Op) {
   return CastClass_match<OpTy, Instruction::Trunc>(Op);
 }
 
 template <typename OpTy>
+inline match_combine_or<CastClass_match<OpTy, Instruction::BitCast>, OpTy>
+m_BitCastOrSelf(const OpTy &Op) {
+  return m_CombineOr(m_BitCast(Op), Op);
+}
+
+template <typename OpTy>
 inline match_combine_or<CastClass_match<OpTy, Instruction::Trunc>, OpTy>
 m_TruncOrSelf(const OpTy &Op) {
   return m_CombineOr(m_Trunc(Op), Op);
 }
 
 /// Matches SExt.
 template <typename OpTy>
 inline CastClass_match<OpTy, Instruction::SExt> m_SExt(const OpTy &Op) {

llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

 
 Instruction::CastOps
 InstCombinerImpl::isEliminableCastPair(const CastInst *CI1,
                                        const CastInst *CI2) {
   Type *SrcTy = CI1->getSrcTy();
   Type *MidTy = CI1->getDestTy();
   Type *DstTy = CI2->getDestTy();
 
+  assert(SrcTy != MidTy && MidTy != DstTy &&
+         "Neither of the casts should be a no-op on their own.");
+
   Instruction::CastOps firstOp = CI1->getOpcode();
   Instruction::CastOps secondOp = CI2->getOpcode();
   Type *SrcIntPtrTy =
       SrcTy->isPtrOrPtrVectorTy() ? DL.getIntPtrType(SrcTy) : nullptr;
   Type *MidIntPtrTy =
       MidTy->isPtrOrPtrVectorTy() ? DL.getIntPtrType(MidTy) : nullptr;
   Type *DstIntPtrTy =
       DstTy->isPtrOrPtrVectorTy() ? DL.getIntPtrType(DstTy) : nullptr;
   unsigned Res = CastInst::isEliminableCastPair(firstOp, secondOp, SrcTy, MidTy,
                                                 DstTy, SrcIntPtrTy, MidIntPtrTy,
                                                 DstIntPtrTy);
 
   // We don't want to form an inttoptr or ptrtoint that converts to an integer
   // type that differs from the pointer size.
   if ((Res == Instruction::IntToPtr && SrcTy != DstIntPtrTy) ||
       (Res == Instruction::PtrToInt && DstTy != SrcIntPtrTy))
     Res = 0;
 
+  // Don't allow changing inttoptr pointer type.
+  if (firstOp == Instruction::IntToPtr && secondOp == Instruction::BitCast)
+    Res = 0;
+
   return Instruction::CastOps(Res);
 }
 
 /// Implement the transforms common to all CastInst visitors.
 Instruction *InstCombinerImpl::commonCastTransforms(CastInst &CI) {
   Value *Src = CI.getOperand(0);
 
   // Try to eliminate a cast of a cast.
Instruction *InstCombinerImpl::visitIntToPtr(IntToPtrInst &CI) {
   if (CI.getOperand(0)->getType()->getScalarSizeInBits() !=
       DL.getPointerSizeInBits(AS)) {
     Type *Ty = CI.getOperand(0)->getType()->getWithNewType(
         DL.getIntPtrType(CI.getContext(), AS));
     Value *P = Builder.CreateZExtOrTrunc(CI.getOperand(0), Ty);
     return new IntToPtrInst(P, CI.getType());
   }
 
+  // If the target pointer element type isn't i8*, make it so.
+  // This will allow to CSE "pointers" that only differ by the pointee type,
+  // which is generally beneficial since e.g. SCEV can't look past inttoptr.
+  // Note that we must keep the address space!
+  Type *BytePtrTy =
+      CI.getType()->getWithNewType(Type::getInt8PtrTy(CI.getContext(), AS));
+  if (CI.getType() != BytePtrTy) {
+    Value *P = Builder.CreateIntToPtr(CI.getOperand(0), BytePtrTy);
+    return new BitCastInst(P, CI.getType());
+  }
+
   if (Instruction *I = commonCastTransforms(CI))
     return I;
 
   return nullptr;
 }
 
 /// Implement the transforms for cast of pointer (bitcast/ptrtoint)
 Instruction *InstCombinerImpl::commonPointerCastTransforms(CastInst &CI) {
Instruction *InstCombinerImpl::visitPtrToInt(PtrToIntInst &CI) {
   if (TySize != PtrSize) {
     Type *IntPtrTy =
         SrcTy->getWithNewType(DL.getIntPtrType(CI.getContext(), AS));
     Value *P = Builder.CreatePtrToInt(SrcOp, IntPtrTy);
     return CastInst::CreateIntegerCast(P, Ty, /*isSigned=*/false);
   }
 
   Value *Vec, *Scalar, *Index;
-  if (match(SrcOp, m_OneUse(m_InsertElt(m_IntToPtr(m_Value(Vec)),
-                                        m_Value(Scalar), m_Value(Index)))) &&
+  if (match(SrcOp, m_OneUse(m_BitCastOrSelf(
+                       m_InsertElt(m_BitCastOrSelf(m_IntToPtr(m_Value(Vec))),
+                                   m_Value(Scalar), m_Value(Index))))) &&
       Vec->getType() == Ty) {
     assert(Vec->getType()->getScalarSizeInBits() == PtrSize && "Wrong type");
-    // Convert the scalar to int followed by insert to eliminate one cast:
-    // p2i (ins (i2p Vec), Scalar, Index --> ins Vec, (p2i Scalar), Index
+    // Convert the scalar to int optionally followed by a bitcast
+    // followed by insert to eliminate one cast:
+    //   p2i (?bitcast (ins (?bitcast (i2p Vec)), Scalar, Index))
+    //     -->
+    //   ins Vec, (p2i Scalar), Index
     Value *NewCast = Builder.CreatePtrToInt(Scalar, Ty->getScalarType());
     return InsertElementInst::Create(Vec, NewCast, Index);
   }
 
   return commonPointerCastTransforms(CI);
 }
 
 /// This input value (which is known to have vector type) is being zero extended

llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll

 ; IC-NEXT:    [[TMP11:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
 ; IC-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
 ; IC-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP0]], align 4
 ; IC-NEXT:    [[TMP15:%.*]] = icmp eq i32 [[TMP13]], [[TMP14]]
 ; IC-NEXT:    br i1 [[TMP15]], label [[BB1_I_I:%.*]], label [[BB2_I_I:%.*]]
 ; IC:       bb1.i.i:
 ; IC-NEXT:    [[TMP16:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP17:%.*]] = load i32*, i32** [[TMP16]], align 8
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT:%.*]]
 ; IC:       bb2.i.i:
-; IC-NEXT:    [[TMP18:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP19:%.*]] = load i32*, i32** [[TMP18]], align 8
-; IC-NEXT:    [[TMP20:%.*]] = getelementptr i32, i32* [[TMP19]], i32 1
-; IC-NEXT:    [[TMP21:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP20]], i32** [[TMP21]], align 8
-; IC-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP20]], align 4
-; IC-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP0]], align 4
-; IC-NEXT:    [[TMP24:%.*]] = icmp eq i32 [[TMP22]], [[TMP23]]
-; IC-NEXT:    br i1 [[TMP24]], label [[BB4_I_I:%.*]], label [[BB5_I_I:%.*]]
+; IC-NEXT:    [[TMP17:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[TMP17]], align 8
+; IC-NEXT:    [[TMP19:%.*]] = getelementptr i32, i32* [[TMP18]], i32 1
+; IC-NEXT:    [[TMP20:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    store i32* [[TMP19]], i32** [[TMP20]], align 8
+; IC-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP19]], align 4
+; IC-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT:    [[TMP23:%.*]] = icmp eq i32 [[TMP21]], [[TMP22]]
+; IC-NEXT:    br i1 [[TMP23]], label [[BB4_I_I:%.*]], label [[BB5_I_I:%.*]]
 ; IC:       bb4.i.i:
-; IC-NEXT:    [[TMP25:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
+; IC-NEXT:    [[TMP24:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       bb5.i.i:
-; IC-NEXT:    [[TMP27:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP28:%.*]] = load i32*, i32** [[TMP27]], align 8
-; IC-NEXT:    [[TMP29:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1
-; IC-NEXT:    [[TMP30:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP29]], i32** [[TMP30]], align 8
-; IC-NEXT:    [[TMP31:%.*]] = load i32, i32* [[TMP29]], align 4
-; IC-NEXT:    [[TMP32:%.*]] = load i32, i32* [[TMP0]], align 4
-; IC-NEXT:    [[TMP33:%.*]] = icmp eq i32 [[TMP31]], [[TMP32]]
-; IC-NEXT:    br i1 [[TMP33]], label [[BB7_I_I:%.*]], label [[BB8_I_I:%.*]]
+; IC-NEXT:    [[TMP25:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP26:%.*]] = load i32*, i32** [[TMP25]], align 8
+; IC-NEXT:    [[TMP27:%.*]] = getelementptr i32, i32* [[TMP26]], i32 1
+; IC-NEXT:    [[TMP28:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    store i32* [[TMP27]], i32** [[TMP28]], align 8
+; IC-NEXT:    [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
+; IC-NEXT:    [[TMP30:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT:    [[TMP31:%.*]] = icmp eq i32 [[TMP29]], [[TMP30]]
+; IC-NEXT:    br i1 [[TMP31]], label [[BB7_I_I:%.*]], label [[BB8_I_I:%.*]]
 ; IC:       bb7.i.i:
-; IC-NEXT:    [[TMP34:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP35:%.*]] = load i32*, i32** [[TMP34]], align 8
+; IC-NEXT:    [[TMP32:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       bb8.i.i:
+; IC-NEXT:    [[TMP33:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[TMP33]], align 8
+; IC-NEXT:    [[TMP35:%.*]] = getelementptr i32, i32* [[TMP34]], i32 1
 ; IC-NEXT:    [[TMP36:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP37:%.*]] = load i32*, i32** [[TMP36]], align 8
-; IC-NEXT:    [[TMP38:%.*]] = getelementptr i32, i32* [[TMP37]], i32 1
-; IC-NEXT:    [[TMP39:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP38]], i32** [[TMP39]], align 8
-; IC-NEXT:    [[TMP40:%.*]] = load i32, i32* [[TMP38]], align 4
-; IC-NEXT:    [[TMP41:%.*]] = load i32, i32* [[TMP0]], align 4
-; IC-NEXT:    [[TMP42:%.*]] = icmp eq i32 [[TMP40]], [[TMP41]]
-; IC-NEXT:    br i1 [[TMP42]], label [[BB10_I_I:%.*]], label [[BB11_I_I:%.*]]
+; IC-NEXT:    store i32* [[TMP35]], i32** [[TMP36]], align 8
+; IC-NEXT:    [[TMP37:%.*]] = load i32, i32* [[TMP35]], align 4
+; IC-NEXT:    [[TMP38:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT:    [[TMP39:%.*]] = icmp eq i32 [[TMP37]], [[TMP38]]
+; IC-NEXT:    br i1 [[TMP39]], label [[BB10_I_I:%.*]], label [[BB11_I_I:%.*]]
 ; IC:       bb10.i.i:
-; IC-NEXT:    [[TMP43:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP44:%.*]] = load i32*, i32** [[TMP43]], align 8
+; IC-NEXT:    [[TMP40:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       bb11.i.i:
-; IC-NEXT:    [[TMP45:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP46:%.*]] = load i32*, i32** [[TMP45]], align 8
-; IC-NEXT:    [[TMP47:%.*]] = getelementptr i32, i32* [[TMP46]], i32 1
-; IC-NEXT:    [[TMP48:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP47]], i32** [[TMP48]], align 8
-; IC-NEXT:    [[TMP49:%.*]] = add i32 [[__TRIP_COUNT_0_I_I:%.*]], -1
+; IC-NEXT:    [[TMP41:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP42:%.*]] = load i32*, i32** [[TMP41]], align 8
+; IC-NEXT:    [[TMP43:%.*]] = getelementptr i32, i32* [[TMP42]], i32 1
+; IC-NEXT:    [[TMP44:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    store i32* [[TMP43]], i32** [[TMP44]], align 8
+; IC-NEXT:    [[TMP45:%.*]] = add i32 [[__TRIP_COUNT_0_I_I:%.*]], -1
 ; IC-NEXT:    br label [[BB12_I_I]]
 ; IC:       bb12.i.i:
-; IC-NEXT:    [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP10]], [[ENTRY:%.*]] ], [ [[TMP49]], [[BB11_I_I]] ]
-; IC-NEXT:    [[TMP50:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0
-; IC-NEXT:    br i1 [[TMP50]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]]
+; IC-NEXT:    [[__TRIP_COUNT_0_I_I]] = phi i32 [ [[TMP10]], [[ENTRY:%.*]] ], [ [[TMP45]], [[BB11_I_I]] ]
+; IC-NEXT:    [[TMP46:%.*]] = icmp sgt i32 [[__TRIP_COUNT_0_I_I]], 0
+; IC-NEXT:    br i1 [[TMP46]], label [[BB_I_I:%.*]], label [[BB13_I_I:%.*]]
 ; IC:       bb13.i.i:
-; IC-NEXT:    [[TMP51:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP52:%.*]] = load i32*, i32** [[TMP51]], align 8
-; IC-NEXT:    [[TMP53:%.*]] = ptrtoint i32* [[TMP52]] to i32
-; IC-NEXT:    [[TMP54:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8
-; IC-NEXT:    [[TMP56:%.*]] = ptrtoint i32* [[TMP55]] to i32
-; IC-NEXT:    [[TMP57:%.*]] = sub i32 [[TMP53]], [[TMP56]]
-; IC-NEXT:    [[TMP58:%.*]] = ashr i32 [[TMP57]], 2
-; IC-NEXT:    switch i32 [[TMP58]], label [[BB26_I_I:%.*]] [
+; IC-NEXT:    [[TMP47:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP48:%.*]] = load i32*, i32** [[TMP47]], align 8
+; IC-NEXT:    [[TMP49:%.*]] = ptrtoint i32* [[TMP48]] to i32
+; IC-NEXT:    [[TMP50:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP51:%.*]] = load i32*, i32** [[TMP50]], align 8
+; IC-NEXT:    [[TMP52:%.*]] = ptrtoint i32* [[TMP51]] to i32
+; IC-NEXT:    [[TMP53:%.*]] = sub i32 [[TMP49]], [[TMP52]]
+; IC-NEXT:    [[TMP54:%.*]] = ashr i32 [[TMP53]], 2
+; IC-NEXT:    switch i32 [[TMP54]], label [[BB26_I_I:%.*]] [
 ; IC-NEXT:    i32 1, label [[BB22_I_I:%.*]]
 ; IC-NEXT:    i32 2, label [[BB18_I_I:%.*]]
 ; IC-NEXT:    i32 3, label [[BB14_I_I:%.*]]
 ; IC-NEXT:    ]
 ; IC:       bb14.i.i:
-; IC-NEXT:    [[TMP59:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP60:%.*]] = load i32*, i32** [[TMP59]], align 8
-; IC-NEXT:    [[TMP61:%.*]] = load i32, i32* [[TMP60]], align 4
-; IC-NEXT:    [[TMP62:%.*]] = load i32, i32* [[TMP0]], align 4
-; IC-NEXT:    [[TMP63:%.*]] = icmp eq i32 [[TMP61]], [[TMP62]]
-; IC-NEXT:    br i1 [[TMP63]], label [[BB16_I_I:%.*]], label [[BB17_I_I:%.*]]
+; IC-NEXT:    [[TMP55:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP56:%.*]] = load i32*, i32** [[TMP55]], align 8
+; IC-NEXT:    [[TMP57:%.*]] = load i32, i32* [[TMP56]], align 4
+; IC-NEXT:    [[TMP58:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT:    [[TMP59:%.*]] = icmp eq i32 [[TMP57]], [[TMP58]]
+; IC-NEXT:    br i1 [[TMP59]], label [[BB16_I_I:%.*]], label [[BB17_I_I:%.*]]
 ; IC:       bb16.i.i:
-; IC-NEXT:    [[TMP64:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP65:%.*]] = load i32*, i32** [[TMP64]], align 8
+; IC-NEXT:    [[TMP60:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       bb17.i.i:
-; IC-NEXT:    [[TMP66:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP67:%.*]] = load i32*, i32** [[TMP66]], align 8
-; IC-NEXT:    [[TMP68:%.*]] = getelementptr i32, i32* [[TMP67]], i32 1
-; IC-NEXT:    [[TMP69:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP68]], i32** [[TMP69]], align 8
+; IC-NEXT:    [[TMP61:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP62:%.*]] = load i32*, i32** [[TMP61]], align 8
+; IC-NEXT:    [[TMP63:%.*]] = getelementptr i32, i32* [[TMP62]], i32 1
+; IC-NEXT:    [[TMP64:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    store i32* [[TMP63]], i32** [[TMP64]], align 8
 ; IC-NEXT:    br label [[BB18_I_I]]
 ; IC:       bb18.i.i:
-; IC-NEXT:    [[TMP70:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP71:%.*]] = load i32*, i32** [[TMP70]], align 8
-; IC-NEXT:    [[TMP72:%.*]] = load i32, i32* [[TMP71]], align 4
-; IC-NEXT:    [[TMP73:%.*]] = load i32, i32* [[TMP0]], align 4
-; IC-NEXT:    [[TMP74:%.*]] = icmp eq i32 [[TMP72]], [[TMP73]]
-; IC-NEXT:    br i1 [[TMP74]], label [[BB20_I_I:%.*]], label [[BB21_I_I:%.*]]
+; IC-NEXT:    [[TMP65:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP66:%.*]] = load i32*, i32** [[TMP65]], align 8
+; IC-NEXT:    [[TMP67:%.*]] = load i32, i32* [[TMP66]], align 4
+; IC-NEXT:    [[TMP68:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT:    [[TMP69:%.*]] = icmp eq i32 [[TMP67]], [[TMP68]]
+; IC-NEXT:    br i1 [[TMP69]], label [[BB20_I_I:%.*]], label [[BB21_I_I:%.*]]
 ; IC:       bb20.i.i:
-; IC-NEXT:    [[TMP75:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP76:%.*]] = load i32*, i32** [[TMP75]], align 8
+; IC-NEXT:    [[TMP70:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       bb21.i.i:
-; IC-NEXT:    [[TMP77:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP78:%.*]] = load i32*, i32** [[TMP77]], align 8
-; IC-NEXT:    [[TMP79:%.*]] = getelementptr i32, i32* [[TMP78]], i32 1
-; IC-NEXT:    [[TMP80:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP79]], i32** [[TMP80]], align 8
+; IC-NEXT:    [[TMP71:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP72:%.*]] = load i32*, i32** [[TMP71]], align 8
+; IC-NEXT:    [[TMP73:%.*]] = getelementptr i32, i32* [[TMP72]], i32 1
+; IC-NEXT:    [[TMP74:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    store i32* [[TMP73]], i32** [[TMP74]], align 8
 ; IC-NEXT:    br label [[BB22_I_I]]
 ; IC:       bb22.i.i:
-; IC-NEXT:    [[TMP81:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP82:%.*]] = load i32*, i32** [[TMP81]], align 8
-; IC-NEXT:    [[TMP83:%.*]] = load i32, i32* [[TMP82]], align 4
-; IC-NEXT:    [[TMP84:%.*]] = load i32, i32* [[TMP0]], align 4
-; IC-NEXT:    [[TMP85:%.*]] = icmp eq i32 [[TMP83]], [[TMP84]]
-; IC-NEXT:    br i1 [[TMP85]], label [[BB24_I_I:%.*]], label [[BB25_I_I:%.*]]
+; IC-NEXT:    [[TMP75:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP76:%.*]] = load i32*, i32** [[TMP75]], align 8
+; IC-NEXT:    [[TMP77:%.*]] = load i32, i32* [[TMP76]], align 4
+; IC-NEXT:    [[TMP78:%.*]] = load i32, i32* [[TMP0]], align 4
+; IC-NEXT:    [[TMP79:%.*]] = icmp eq i32 [[TMP77]], [[TMP78]]
+; IC-NEXT:    br i1 [[TMP79]], label [[BB24_I_I:%.*]], label [[BB25_I_I:%.*]]
 ; IC:       bb24.i.i:
-; IC-NEXT:    [[TMP86:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP87:%.*]] = load i32*, i32** [[TMP86]], align 8
+; IC-NEXT:    [[TMP80:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       bb25.i.i:
-; IC-NEXT:    [[TMP88:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP89:%.*]] = load i32*, i32** [[TMP88]], align 8
-; IC-NEXT:    [[TMP90:%.*]] = getelementptr i32, i32* [[TMP89]], i32 1
-; IC-NEXT:    [[TMP91:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    store i32* [[TMP90]], i32** [[TMP91]], align 8
+; IC-NEXT:    [[TMP81:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    [[TMP82:%.*]] = load i32*, i32** [[TMP81]], align 8
+; IC-NEXT:    [[TMP83:%.*]] = getelementptr i32, i32* [[TMP82]], i32 1
+; IC-NEXT:    [[TMP84:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__FIRST_ADDR_I_I]], i32 0, i32 0
+; IC-NEXT:    store i32* [[TMP83]], i32** [[TMP84]], align 8
 ; IC-NEXT:    br label [[BB26_I_I]]
 ; IC:       bb26.i.i:
-; IC-NEXT:    [[TMP92:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
-; IC-NEXT:    [[TMP93:%.*]] = load i32*, i32** [[TMP92]], align 8
+; IC-NEXT:    [[TMP85:%.*]] = getelementptr inbounds %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >", %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"* [[__LAST_ADDR_I_I]], i32 0, i32 0
 ; IC-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC:       _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit:
-; IC-NEXT:    [[DOT0_0_I_I:%.*]] = phi i32* [ [[TMP93]], [[BB26_I_I]] ], [ [[TMP87]], [[BB24_I_I]] ], [ [[TMP76]], [[BB20_I_I]] ], [ [[TMP65]], [[BB16_I_I]] ], [ [[TMP44]], [[BB10_I_I]] ], [ [[TMP35]], [[BB7_I_I]] ], [ [[TMP26]], [[BB4_I_I]] ], [ [[TMP17]], [[BB1_I_I]] ]
+; IC-NEXT:    [[DOTIN_IN:%.*]] = phi i32** [ [[TMP85]], [[BB26_I_I]] ], [ [[TMP80]], [[BB24_I_I]] ], [ [[TMP70]], [[BB20_I_I]] ], [ [[TMP60]], [[BB16_I_I]] ], [ [[TMP40]], [[BB10_I_I]] ], [ [[TMP32]], [[BB7_I_I]] ], [ [[TMP24]], [[BB4_I_I]] ], [ [[TMP16]], [[BB1_I_I]] ]
 ; IC-NEXT:    br label [[RETURN:%.*]]
 ; IC:       return:
-; IC-NEXT:    ret i32* [[DOT0_0_I_I]]
+; IC-NEXT:    [[TMP86:%.*]] = load i32*, i32** [[DOTIN_IN]], align 4
+; IC-NEXT:    ret i32* [[TMP86]]
 ;
 ; IC_SROA-LABEL: @_Z3fooRSt6vectorIiSaIiEE(
 ; IC_SROA-NEXT:  entry:
 ; IC_SROA-NEXT:    [[TMP0:%.*]] = getelementptr %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >"* [[X:%.*]], i32 0, i32 0, i32 0, i32 1
 ; IC_SROA-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[TMP0]], align 4
 ; IC_SROA-NEXT:    [[TMP2:%.*]] = getelementptr %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >"* [[X]], i32 0, i32 0, i32 0, i32 0
 ; IC_SROA-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4
 ; IC_SROA-NEXT:    [[TMP4:%.*]] = ptrtoint i32* [[TMP1]] to i32

 ; IC_SROA:       bb24.i.i:
 ; IC_SROA-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC_SROA:       bb25.i.i:
 ; IC_SROA-NEXT:    [[TMP34:%.*]] = getelementptr i32, i32* [[__FIRST_ADDR_I_I_SROA_0_2]], i32 1
 ; IC_SROA-NEXT:    br label [[BB26_I_I]]
 ; IC_SROA:       bb26.i.i:
 ; IC_SROA-NEXT:    br label [[_ZST4FINDIN9__GNU_CXX17__NORMAL_ITERATORIPIST6VECTORIISAIIEEEEIET_S7_S7_RKT0__EXIT]]
 ; IC_SROA:       _ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit:
-; IC_SROA-NEXT:    [[DOT0_0_I_I:%.*]] = phi i32* [ [[TMP1]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP16]], [[BB10_I_I]] ], [ [[TMP13]], [[BB7_I_I]] ], [ [[TMP10]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ]
+; IC_SROA-NEXT:    [[DOTIN_IN_SROA_SPECULATED:%.*]] = phi i32* [ [[TMP1]], [[BB26_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_2]], [[BB24_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_1]], [[BB20_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB16_I_I]] ], [ [[TMP16]], [[BB10_I_I]] ], [ [[TMP13]], [[BB7_I_I]] ], [ [[TMP10]], [[BB4_I_I]] ], [ [[__FIRST_ADDR_I_I_SROA_0_0]], [[BB1_I_I]] ]
 ; IC_SROA-NEXT:    br label [[RETURN:%.*]]
 ; IC_SROA:       return:
-; IC_SROA-NEXT:    ret i32* [[DOT0_0_I_I]]
+; IC_SROA-NEXT:    ret i32* [[DOTIN_IN_SROA_SPECULATED]]
 ;
 entry:
   %0 = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"
   %__first_addr.i.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"
   %__last_addr.i.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"
   %unnamed_arg.i = alloca %"struct.std::bidirectional_iterator_tag", align 8
   %1 = alloca %"struct.std::bidirectional_iterator_tag"
   %__first_addr.i = alloca %"struct.__gnu_cxx::__normal_iterator<int*,std::vector<int, std::allocator<int> > >"

llvm/test/Transforms/InstCombine/PR30597.ll

 
 }
 
 ; Function Attrs: readonly uwtable
 define i64* @function(i64* noalias nocapture readonly dereferenceable(8)) {
 ; CHECK-LABEL: @function(
 ; CHECK-NEXT:  entry-block:
 ; CHECK-NEXT:    [[LOADED:%.*]] = load i64, i64* [[TMP0:%.*]], align 8, !range [[RNG0:![0-9]+]]
-; CHECK-NEXT:    [[INTTOPTR:%.*]] = inttoptr i64 [[LOADED]] to i64*
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[LOADED]] to i8*
+; CHECK-NEXT:    [[INTTOPTR:%.*]] = bitcast i8* [[TMP1]] to i64*
 ; CHECK-NEXT:    ret i64* [[INTTOPTR]]
 ;
 entry-block:
   %loaded = load i64, i64* %0, align 8, !range !1
   %inttoptr = inttoptr i64 %loaded to i64*
   ret i64* %inttoptr
 }
 
 
 !0 = !{}
 !1 = !{i64 1, i64 140737488355327}

llvm/test/Transforms/InstCombine/align-addr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 target datalayout = "E-p:64:64:64-p1:32:32:32-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 ; Instcombine should be able to prove vector alignment in the
 ; presence of a few mild address computation tricks.
 
 define void @test0(i8* %b, i64 %n, i64 %u, i64 %y) nounwind  {
 ; CHECK-LABEL: @test0(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[C:%.*]] = ptrtoint i8* [[B:%.*]] to i64
 ; CHECK-NEXT:    [[D:%.*]] = and i64 [[C]], -16
-; CHECK-NEXT:    [[E:%.*]] = inttoptr i64 [[D]] to double*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[D]] to i8*
+; CHECK-NEXT:    [[E:%.*]] = bitcast i8* [[TMP0]] to double*
 ; CHECK-NEXT:    [[V:%.*]] = shl i64 [[U:%.*]], 1
 ; CHECK-NEXT:    [[Z:%.*]] = and i64 [[Y:%.*]], -2
 ; CHECK-NEXT:    [[T1421:%.*]] = icmp eq i64 [[N:%.*]], 0
 ; CHECK-NEXT:    br i1 [[T1421]], label [[RETURN:%.*]], label [[BB:%.*]]
 ; CHECK:       bb:
 ; CHECK-NEXT:    [[I:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[BB]] ], [ 20, [[ENTRY:%.*]] ]
 ; CHECK-NEXT:    [[J:%.*]] = mul i64 [[I]], [[V]]
 ; CHECK-NEXT:    [[H:%.*]] = add i64 [[J]], [[Z]]

llvm/test/Transforms/InstCombine/apint-call-cast-target.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 target datalayout = "e-p:32:32"
 target triple = "i686-pc-linux-gnu"
 
 declare i32 @main2()
 declare i7* @ctime2(i999*)
 
 define i7* @ctime(i999*) {
 ; CHECK-LABEL: @ctime(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[I0:%.*]] = call i32 @main2()
-; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[I0]] to i7*
-; CHECK-NEXT:    ret i7* [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[I0]] to i8*
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i7*
+; CHECK-NEXT:    ret i7* [[TMP2]]
 ;
 entry:
   %i0 = call i7* bitcast (i32 ()* @main2 to i7* ()*)( )
   ret i7* %i0
 }
 
 define i32 @main() {
 ; CHECK-LABEL: @main(

llvm/test/Transforms/InstCombine/cast_ptr.ll

;
   %r = ptrtoint <2 x i32*> %i to <2 x i64>
   ret <2 x i64> %r
 }
 
 declare void @use(<2 x i32*>)
 
 define <2 x i32> @insertelt_extra_use1(<2 x i32> %x, i32* %p) {
 ; CHECK-LABEL: @insertelt_extra_use1(
-; CHECK-NEXT:    [[V:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i32*>
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i8*>
+; CHECK-NEXT:    [[V:%.*]] = bitcast <2 x i8*> [[TMP1]] to <2 x i32*>
 ; CHECK-NEXT:    call void @use(<2 x i32*> [[V]])
-; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint i32* [[P:%.*]] to i32
-; CHECK-NEXT:    [[R:%.*]] = insertelement <2 x i32> [[X]], i32 [[TMP1]], i32 0
+; CHECK-NEXT:    [[TMP2:%.*]] = ptrtoint i32* [[P:%.*]] to i32
+; CHECK-NEXT:    [[R:%.*]] = insertelement <2 x i32> [[X]], i32 [[TMP2]], i32 0
 ; CHECK-NEXT:    ret <2 x i32> [[R]]
 ;
   %v = inttoptr <2 x i32> %x to <2 x i32*>
   call void @use(<2 x i32*> %v)
   %i = insertelement <2 x i32*> %v, i32* %p, i32 0
   %r = ptrtoint <2 x i32*> %i to <2 x i32>
   ret <2 x i32> %r
 }
 
 define <2 x i32> @insertelt_extra_use2(<2 x i32> %x, i32* %p) {
 ; CHECK-LABEL: @insertelt_extra_use2(
-; CHECK-NEXT:    [[V:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i32*>
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr <2 x i32> [[X:%.*]] to <2 x i8*>
+; CHECK-NEXT:    [[V:%.*]] = bitcast <2 x i8*> [[TMP1]] to <2 x i32*>
 ; CHECK-NEXT:    [[I:%.*]] = insertelement <2 x i32*> [[V]], i32* [[P:%.*]], i32 0
 ; CHECK-NEXT:    call void @use(<2 x i32*> [[I]])
 ; CHECK-NEXT:    [[R:%.*]] = ptrtoint <2 x i32*> [[I]] to <2 x i32>
 ; CHECK-NEXT:    ret <2 x i32> [[R]]
 ;
   %v = inttoptr <2 x i32> %x to <2 x i32*>
   %i = insertelement <2 x i32*> %v, i32* %p, i32 0
   call void @use(<2 x i32*> %i)
   %r = ptrtoint <2 x i32*> %i to <2 x i32>
   ret <2 x i32> %r
 }

llvm/test/Transforms/InstCombine/indexed-gep-compares.ll

bb:
   %cond = icmp ult i32 * %LHS, %RHS
   br i1 %cond, label %bb2, label %bb
 
 bb2:
   ret i32* %RHS
 
 }
 
 define i32 *@test2(i32 %A, i32 %Offset) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i32 [[A:%.*]] to i8*
+; CHECK-NEXT:    [[A_PTR:%.*]] = bitcast i8* [[TMP0]] to i32*
+; CHECK-NEXT:    [[TMP:%.*]] = getelementptr inbounds i32, i32* [[A_PTR]], i32 [[OFFSET:%.*]]
 ; CHECK-NEXT:    br label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
-; CHECK-NEXT:    [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT:    [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[LHS:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 400
+; CHECK-NEXT:    [[RHS_NEXT]] = getelementptr inbounds i32, i32* [[RHS]], i32 1
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i32* [[RHS]] to i8*
+; CHECK-NEXT:    [[COND:%.*]] = icmp ult i8* [[LHS]], [[TMP1]]
 ; CHECK-NEXT:    br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    [[RHSTO_PTR:%.*]] = inttoptr i32 [[A:%.*]] to i32*
-; CHECK-NEXT:    [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]]
-; CHECK-NEXT:    ret i32* [[RHS_PTR]]
+; CHECK-NEXT:    ret i32* [[RHS]]
 ;
 entry:
   %A.ptr = inttoptr i32 %A to i32*
   %tmp = getelementptr inbounds i32, i32* %A.ptr, i32 %Offset
   br label %bb
 
 bb:
   %RHS = phi i32* [ %RHS.next, %bb ], [ %tmp, %entry ]
   %LHS = getelementptr inbounds i32, i32* %A.ptr, i32 100

 bb2:
   ret i32* %RHS
 
 }
 
 ; An inttoptr that requires an extension or truncation will be opaque when determining
 ; the base pointer. In this case we can still perform the transformation by considering
 ; A.ptr as being the base pointer.
 define i32 *@test4(i16 %A, i32 %Offset) {
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[A:%.*]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[TMP0]] to i8*
+; CHECK-NEXT:    [[A_PTR:%.*]] = bitcast i8* [[TMP1]] to i32*
+; CHECK-NEXT:    [[TMP:%.*]] = getelementptr inbounds i32, i32* [[A_PTR]], i32 [[OFFSET:%.*]]
 ; CHECK-NEXT:    br label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
-; CHECK-NEXT:    [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT:    [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[LHS:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i32 400
+; CHECK-NEXT:    [[RHS_NEXT]] = getelementptr inbounds i32, i32* [[RHS]], i32 1
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[RHS]] to i8*
+; CHECK-NEXT:    [[COND:%.*]] = icmp ult i8* [[LHS]], [[TMP2]]
 ; CHECK-NEXT:    br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    [[TMP0:%.*]] = zext i16 [[A:%.*]] to i32
-; CHECK-NEXT:    [[RHSTO_PTR:%.*]] = inttoptr i32 [[TMP0]] to i32*
-; CHECK-NEXT:    [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]]
-; CHECK-NEXT:    ret i32* [[RHS_PTR]]
+; CHECK-NEXT:    ret i32* [[RHS]]
 ;
 entry:
   %A.ptr = inttoptr i16 %A to i32*
   %tmp = getelementptr inbounds i32, i32* %A.ptr, i32 %Offset
   br label %bb
 
 bb:
   %RHS = phi i32* [ %RHS.next, %bb ], [ %tmp, %entry ]
   %LHS = getelementptr inbounds i32, i32* %A.ptr, i32 100

 lpad:
   %l = landingpad { i8*, i32 } cleanup
   ret i32* null
 
 }
 
 declare i32 @fun_i32()
 
 define i32 *@test6(i32 %Offset) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 ; CHECK-LABEL: @test6(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = invoke i32 @fun_i32()
 ; CHECK-NEXT:    to label [[CONT:%.*]] unwind label [[LPAD:%.*]]
 ; CHECK:       cont:
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i32 [[A]] to i8*
+; CHECK-NEXT:    [[A_PTR:%.*]] = bitcast i8* [[TMP0]] to i32*
+; CHECK-NEXT:    [[TMP:%.*]] = getelementptr inbounds i32, i32* [[A_PTR]], i32 [[OFFSET:%.*]]
 ; CHECK-NEXT:    br label [[BB:%.*]]
 ; CHECK:       bb:
-; CHECK-NEXT:    [[RHS_IDX:%.*]] = phi i32 [ [[RHS_ADD:%.*]], [[BB]] ], [ [[OFFSET:%.*]], [[CONT]] ]
-; CHECK-NEXT:    [[RHS_ADD]] = add nsw i32 [[RHS_IDX]], 1
-; CHECK-NEXT:    [[COND:%.*]] = icmp sgt i32 [[RHS_IDX]], 100
+; CHECK-NEXT:    [[RHS:%.*]] = phi i32* [ [[RHS_NEXT:%.*]], [[BB]] ], [ [[TMP]], [[CONT]] ]
+; CHECK-NEXT:    [[LHS:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 400
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast i8* [[LHS]] to i32*
+; CHECK-NEXT:    [[RHS_NEXT]] = getelementptr inbounds i32, i32* [[RHS]], i32 1
+; CHECK-NEXT:    [[COND:%.*]] = icmp ugt i32* [[RHS]], [[TMP1]]
 ; CHECK-NEXT:    br i1 [[COND]], label [[BB2:%.*]], label [[BB]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    [[RHSTO_PTR:%.*]] = inttoptr i32 [[A]] to i32*
-; CHECK-NEXT:    [[RHS_PTR:%.*]] = getelementptr inbounds i32, i32* [[RHSTO_PTR]], i32 [[RHS_IDX]]
-; CHECK-NEXT:    ret i32* [[RHS_PTR]]
+; CHECK-NEXT:    ret i32* [[RHS]]
 ; CHECK:       lpad:
 ; CHECK-NEXT:    [[L:%.*]] = landingpad { i8*, i32 }
 ; CHECK-NEXT:    cleanup
 ; CHECK-NEXT:    ret i32* null
 ;
 entry:
   %A = invoke i32 @fun_i32() to label %cont unwind label %lpad
 
 cont:
   %A.ptr = inttoptr i32 %A to i32*
   %tmp = getelementptr inbounds i32, i32* %A.ptr, i32 %Offset
   br label %bb
 
 bb:

 define i1 @test8(i64* %in, i64 %offset) {
 ; CHECK-LABEL: @test8(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[LD:%.*]] = load i64, i64* [[IN:%.*]], align 8
 ; CHECK-NEXT:    [[TMP0:%.*]] = trunc i64 [[LD]] to i32
 ; CHECK-NEXT:    [[CASTI8:%.*]] = inttoptr i32 [[TMP0]] to i8*
 ; CHECK-NEXT:    [[TMP1:%.*]] = trunc i64 [[OFFSET:%.*]] to i32
 ; CHECK-NEXT:    [[GEPI8:%.*]] = getelementptr inbounds i8, i8* [[CASTI8]], i32 [[TMP1]]
-; CHECK-NEXT:    [[CAST:%.*]] = bitcast i8* [[GEPI8]] to i32**
 ; CHECK-NEXT:    [[TMP2:%.*]] = trunc i64 [[LD]] to i32
-; CHECK-NEXT:    [[PTRCAST:%.*]] = inttoptr i32 [[TMP2]] to i32**
-; CHECK-NEXT:    [[GEPI32:%.*]] = getelementptr inbounds i32*, i32** [[PTRCAST]], i32 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32** [[GEPI32]], [[CAST]]
+; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to i8*
+; CHECK-NEXT:    [[GEPI32:%.*]] = getelementptr inbounds i8, i8* [[TMP3]], i32 4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8* [[GEPI32]], [[GEPI8]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
 entry:
 
   %ld = load i64, i64* %in, align 8
   %casti8 = inttoptr i64 %ld to i8*
   %gepi8 = getelementptr inbounds i8, i8* %casti8, i64 %offset
   %cast = bitcast i8* %gepi8 to i32**
   %ptrcast = inttoptr i64 %ld to i32**
   %gepi32 = getelementptr inbounds i32*, i32** %ptrcast, i64 1
   %cmp = icmp eq i32** %gepi32, %cast
   ret i1 %cmp
 
 
 }

llvm/test/Transforms/InstCombine/intptr1.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s  -instcombine  -S | FileCheck %s
 
 define void @test1(float* %a, float* readnone %a_end, i64* %b.i64) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
 ; CHECK:       for.body.preheader:
 ; CHECK-NEXT:    [[B:%.*]] = load i64, i64* [[B_I64:%.*]], align 8
-; CHECK-NEXT:    [[B_PTR:%.*]] = inttoptr i64 [[B]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[B]] to i8*
+; CHECK-NEXT:    [[B_PTR:%.*]] = bitcast i8* [[TMP0]] to float*
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
 ; CHECK-NEXT:    [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1

 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
 ; CHECK:       for.body.preheader:
 ; CHECK-NEXT:    [[B:%.*]] = load i64, i64* [[B_I64:%.*]], align 8
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[BB:%.*]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[B_ADDR_02:%.*]] = phi i64 [ [[ADD_INT:%.*]], [[BB]] ], [ [[B]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT:    [[TMP:%.*]] = inttoptr i64 [[B_ADDR_02]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[B_ADDR_02]] to i8*
+; CHECK-NEXT:    [[TMP:%.*]] = bitcast i8* [[TMP0]] to float*
 ; CHECK-NEXT:    [[PTRCMP:%.*]] = icmp ult float* [[TMP]], [[A_END]]
 ; CHECK-NEXT:    br i1 [[PTRCMP]], label [[FOR_END]], label [[BB]]
 ; CHECK:       bb:
 ; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[A]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
 ; CHECK-NEXT:    [[ADD:%.*]] = getelementptr inbounds float, float* [[A]], i64 1
 ; CHECK-NEXT:    [[ADD_INT]] = ptrtoint float* [[ADD]] to i64

 define void @test2(float* %a, float* readnone %a_end, float** %b.float) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
 ; CHECK:       for.body.preheader:
 ; CHECK-NEXT:    [[B_I64:%.*]] = bitcast float** [[B_FLOAT:%.*]] to i64*
 ; CHECK-NEXT:    [[B:%.*]] = load i64, i64* [[B_I64]], align 8
-; CHECK-NEXT:    [[B_PTR:%.*]] = inttoptr i64 [[B]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[B]] to i8*
+; CHECK-NEXT:    [[B_PTR:%.*]] = bitcast i8* [[TMP0]] to float*
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
 ; CHECK-NEXT:    [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1

 define void @test3(float* %a, float* readnone %a_end, i8** %b.i8p) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
 ; CHECK:       for.body.preheader:
 ; CHECK-NEXT:    [[B_I64:%.*]] = bitcast i8** [[B_I8P:%.*]] to i64*
 ; CHECK-NEXT:    [[B:%.*]] = load i64, i64* [[B_I64]], align 8
-; CHECK-NEXT:    [[B_PTR:%.*]] = inttoptr i64 [[B]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[B]] to i8*
+; CHECK-NEXT:    [[B_PTR:%.*]] = bitcast i8* [[TMP0]] to float*
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
 ; CHECK-NEXT:    [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1

llvm/test/Transforms/InstCombine/intptr3.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s  -instcombine -S | FileCheck %s
 
 define  void @test(float* %a, float* readnone %a_end, i64 %b) unnamed_addr  {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
 ; CHECK:       for.body.preheader:
-; CHECK-NEXT:    [[B_FLOAT:%.*]] = inttoptr i64 [[B:%.*]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[B:%.*]] to i8*
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT:    [[B_ADDR_FLOAT:%.*]] = phi float* [ [[B_ADDR_FLOAT_INC:%.*]], [[FOR_BODY]] ], [ [[B_FLOAT]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:    [[B_ADDR_I64_PTR:%.*]] = phi i8* [ [[B_ADDR_FLOAT_INC:%.*]], [[FOR_BODY]] ], [ [[TMP0]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:    [[B_ADDR_FLOAT:%.*]] = bitcast i8* [[B_ADDR_I64_PTR]] to float*
 ; CHECK-NEXT:    [[L:%.*]] = load float, float* [[B_ADDR_FLOAT]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[L]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
-; CHECK-NEXT:    [[B_ADDR_FLOAT_INC]] = getelementptr inbounds float, float* [[B_ADDR_FLOAT]], i64 1
+; CHECK-NEXT:    [[B_ADDR_FLOAT_INC]] = getelementptr inbounds i8, i8* [[B_ADDR_I64_PTR]], i64 4
 ; CHECK-NEXT:    [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
 ; CHECK:       for.end:
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp1 = icmp ult float* %a, %a_end

llvm/test/Transforms/InstCombine/intptr7.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s  -instcombine -S | FileCheck %s
 
 define void @matching_phi(i64 %a, float* %b, i1 %cond) {
 ; CHECK-LABEL: @matching_phi(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[ADD_INT:%.*]] = add i64 [[A:%.*]], 1
-; CHECK-NEXT:    [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[ADD_INT]] to i8*
+; CHECK-NEXT:    [[ADD:%.*]] = bitcast i8* [[TMP0]] to float*
+; CHECK-NEXT:    [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[BBB:%.*]], label [[A:%.*]]
 ; CHECK:       A:
-; CHECK-NEXT:    [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2
+; CHECK-NEXT:    [[ADDB_INT:%.*]] = ptrtoint float* [[ADDB]] to i64
 ; CHECK-NEXT:    br label [[C:%.*]]
 ; CHECK:       Bbb:
 ; CHECK-NEXT:    store float 1.000000e+01, float* [[ADD]], align 4
 ; CHECK-NEXT:    br label [[C]]
 ; CHECK:       C:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[ADDB]], [[A]] ], [ [[ADD]], [[BBB]] ]
-; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[A_ADDR_03]], align 4
+; CHECK-NEXT:    [[B_ADDR_02:%.*]] = phi i64 [ [[ADDB_INT]], [[A]] ], [ [[ADD_INT]], [[BBB]] ]
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[B_ADDR_02]] to i8*
+; CHECK-NEXT:    [[I0:%.*]] = bitcast i8* [[TMP1]] to float*
+; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[I0]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp1 = icmp  eq i1 %cond, 0
   %add.int = add i64 %a, 1
   %add = inttoptr i64 %add.int to float *
 
   %addb = getelementptr inbounds float, float* %b, i64 2
   %addb.int = ptrtoint float* %addb to i64
   br i1 %cmp1, label %A, label %Bbb
 A:
   br label %C
 Bbb:
   store float 1.0e+01, float* %add, align 4
   br label %C
 
 C:
   %a.addr.03 = phi float* [ %addb, %A ], [ %add, %Bbb ]
   %b.addr.02 = phi i64 [ %addb.int, %A ], [ %add.int, %Bbb ]
   %i0 = inttoptr i64 %b.addr.02 to float*
   %i1 = load float, float* %i0, align 4
   %mul.i = fmul float %i1, 4.200000e+01
   store float %mul.i, float* %a.addr.03, align 4
   ret void
 }
 
 define void @no_matching_phi(i64 %a, float* %b, i1 %cond) {
 ; CHECK-LABEL: @no_matching_phi(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[ADD_INT:%.*]] = add i64 [[A:%.*]], 1
-; CHECK-NEXT:    [[ADD:%.*]] = inttoptr i64 [[ADD_INT]] to float*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[ADD_INT]] to i8*
+; CHECK-NEXT:    [[ADD:%.*]] = bitcast i8* [[TMP0]] to float*
 ; CHECK-NEXT:    [[ADDB:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 2
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[B:%.*]], label [[A:%.*]]
 ; CHECK:       A:
 ; CHECK-NEXT:    br label [[C:%.*]]
 ; CHECK:       B:
+; CHECK-NEXT:    [[ADDB_INT:%.*]] = ptrtoint float* [[ADDB]] to i64
 ; CHECK-NEXT:    store float 1.000000e+01, float* [[ADD]], align 4
 ; CHECK-NEXT:    br label [[C]]
 ; CHECK:       C:
 ; CHECK-NEXT:    [[A_ADDR_03:%.*]] = phi float* [ [[ADDB]], [[A]] ], [ [[ADD]], [[B]] ]
-; CHECK-NEXT:    [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD]], [[A]] ], [ [[ADDB]], [[B]] ]
-; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT:    [[B_ADDR_02:%.*]] = phi i64 [ [[ADD_INT]], [[A]] ], [ [[ADDB_INT]], [[B]] ]
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[B_ADDR_02]] to i8*
+; CHECK-NEXT:    [[I0:%.*]] = bitcast i8* [[TMP1]] to float*
+; CHECK-NEXT:    [[I1:%.*]] = load float, float* [[I0]], align 4
 ; CHECK-NEXT:    [[MUL_I:%.*]] = fmul float [[I1]], 4.200000e+01
 ; CHECK-NEXT:    store float [[MUL_I]], float* [[A_ADDR_03]], align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %cmp1 = icmp  eq i1 %cond, 0
   %add.int = add i64 %a, 1
   %add = inttoptr i64 %add.int to float *
 
   %addb = getelementptr inbounds float, float* %b, i64 2
   %addb.int = ptrtoint float* %addb to i64
   br i1 %cmp1, label %A, label %B

llvm/test/Transforms/InstCombine/load-bitcast32.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -instcombine -S < %s | FileCheck %s
 
 target datalayout = "p:32:32:32"
 
 
 define i64* @test1(i8* %x) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = bitcast i8* [[X:%.*]] to i64*
 ; CHECK-NEXT:    [[B:%.*]] = load i64, i64* [[A]], align 4
 ; CHECK-NEXT:    [[TMP0:%.*]] = trunc i64 [[B]] to i32
-; CHECK-NEXT:    [[C:%.*]] = inttoptr i32 [[TMP0]] to i64*
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[TMP0]] to i8*
+; CHECK-NEXT:    [[C:%.*]] = bitcast i8* [[TMP1]] to i64*
 ; CHECK-NEXT:    ret i64* [[C]]
 ;
 entry:
   %a = bitcast i8* %x to i64*
   %b = load i64, i64* %a
   %c = inttoptr i64 %b to i64*
 
   ret i64* %c
 }
 
 define i32* @test2(i8* %x) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = bitcast i8* [[X:%.*]] to i32*
 ; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[A]], align 4
-; CHECK-NEXT:    [[C:%.*]] = inttoptr i32 [[B]] to i32*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i32 [[B]] to i8*
+; CHECK-NEXT:    [[C:%.*]] = bitcast i8* [[TMP0]] to i32*
 ; CHECK-NEXT:    ret i32* [[C]]
 ;
 entry:
   %a = bitcast i8* %x to i32*
   %b = load i32, i32* %a
   %c = inttoptr i32 %b to i32*
 
   ret i32* %c
 }
 
 define i64* @test3(i8* %x) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = bitcast i8* [[X:%.*]] to i32*
 ; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[A]], align 4
-; CHECK-NEXT:    [[C:%.*]] = inttoptr i32 [[B]] to i64*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i32 [[B]] to i8*
+; CHECK-NEXT:    [[C:%.*]] = bitcast i8* [[TMP0]] to i64*
 ; CHECK-NEXT:    ret i64* [[C]]
 ;
 entry:
   %a = bitcast i8* %x to i32*
   %b = load i32, i32* %a
   %c = inttoptr i32 %b to i64*
 
   ret i64* %c

llvm/test/Transforms/InstCombine/load-bitcast64.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -instcombine -S < %s | FileCheck %s
 
 target datalayout = "p:64:64:64-i64:32:32"
 
 
 define i64* @test1(i8* %x) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = bitcast i8* [[X:%.*]] to i64*
 ; CHECK-NEXT:    [[B:%.*]] = load i64, i64* [[A]], align 4
-; CHECK-NEXT:    [[C:%.*]] = inttoptr i64 [[B]] to i64*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[B]] to i8*
+; CHECK-NEXT:    [[C:%.*]] = bitcast i8* [[TMP0]] to i64*
 ; CHECK-NEXT:    ret i64* [[C]]
 ;
 entry:
   %a = bitcast i8* %x to i64*
   %b = load i64, i64* %a
   %c = inttoptr i64 %b to i64*
 
   ret i64* %c
 }
 
 define i32* @test2(i8* %x) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = bitcast i8* [[X:%.*]] to i32*
 ; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[A]], align 4
 ; CHECK-NEXT:    [[TMP0:%.*]] = zext i32 [[B]] to i64
-; CHECK-NEXT:    [[C:%.*]] = inttoptr i64 [[TMP0]] to i32*
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i8*
+; CHECK-NEXT:    [[C:%.*]] = bitcast i8* [[TMP1]] to i32*
 ; CHECK-NEXT:    ret i32* [[C]]
 ;
 entry:
   %a = bitcast i8* %x to i32*
   %b = load i32, i32* %a
   %c = inttoptr i32 %b to i32*
 
   ret i32* %c
 }
 
 define i64* @test3(i8* %x) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[A:%.*]] = bitcast i8* [[X:%.*]] to i32*
 ; CHECK-NEXT:    [[B:%.*]] = load i32, i32* [[A]], align 4
 ; CHECK-NEXT:    [[TMP0:%.*]] = zext i32 [[B]] to i64
-; CHECK-NEXT:    [[C:%.*]] = inttoptr i64 [[TMP0]] to i64*
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i8*
+; CHECK-NEXT:    [[C:%.*]] = bitcast i8* [[TMP1]] to i64*
 ; CHECK-NEXT:    ret i64* [[C]]
 ;
 entry:
   %a = bitcast i8* %x to i32*
   %b = load i32, i32* %a
   %c = inttoptr i32 %b to i64*
 
   ret i64* %c

llvm/test/Transforms/InstCombine/multi-use-load-casts.ll

 ; CHECK-NEXT:    [[DATA:%.*]] = load i64, i64* [[SRC:%.*]], align 8
 ; CHECK-NEXT:    br i1 [[C0:%.*]], label [[BB3:%.*]], label [[BB7:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    br i1 [[C1:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
 ; CHECK:       bb4:
 ; CHECK-NEXT:    tail call void @abort()
 ; CHECK-NEXT:    unreachable
 ; CHECK:       bb5:
-; CHECK-NEXT:    [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[DATA]] to i8*
+; CHECK-NEXT:    [[PTR0:%.*]] = bitcast i8* [[TMP0]] to i32*
 ; CHECK-NEXT:    tail call void @sink0(i32* [[PTR0]])
 ; CHECK-NEXT:    br label [[BB9:%.*]]
 ; CHECK:       bb7:
-; CHECK-NEXT:    [[PTR1:%.*]] = inttoptr i64 [[DATA]] to i32*
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[DATA]] to i8*
+; CHECK-NEXT:    [[PTR1:%.*]] = bitcast i8* [[TMP1]] to i32*
 ; CHECK-NEXT:    tail call void @sink1(i32* [[PTR1]])
 ; CHECK-NEXT:    br label [[BB9]]
 ; CHECK:       bb9:
 ; CHECK-NEXT:    ret void
 ;
 bb:
   %data = load i64, i64* %src, align 8
   br i1 %c0, label %bb3, label %bb7

 ; CHECK-NEXT:    [[DATA:%.*]] = load i64, i64* [[SRC:%.*]], align 8
 ; CHECK-NEXT:    br i1 [[C0:%.*]], label [[BB3:%.*]], label [[BB7:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    br i1 [[C1:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
 ; CHECK:       bb4:
 ; CHECK-NEXT:    tail call void @abort()
 ; CHECK-NEXT:    unreachable
 ; CHECK:       bb5:
-; CHECK-NEXT:    [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[DATA]] to i8*
+; CHECK-NEXT:    [[PTR0:%.*]] = bitcast i8* [[TMP0]] to i32*
 ; CHECK-NEXT:    tail call void @sink0(i32* [[PTR0]])
 ; CHECK-NEXT:    br label [[BB9:%.*]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    [[VEC:%.*]] = bitcast i64 [[DATA]] to <2 x i32>
 ; CHECK-NEXT:    tail call void @sink2(<2 x i32> [[VEC]])
 ; CHECK-NEXT:    br label [[BB9]]
 ; CHECK:       bb9:
 ; CHECK-NEXT:    ret void

 ; CHECK-NEXT:    [[DATA:%.*]] = load i64, i64* [[SRC:%.*]], align 8
 ; CHECK-NEXT:    br i1 [[C0:%.*]], label [[BB3:%.*]], label [[BB7:%.*]]
 ; CHECK:       bb3:
 ; CHECK-NEXT:    br i1 [[C1:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
 ; CHECK:       bb4:
 ; CHECK-NEXT:    tail call void @abort()
 ; CHECK-NEXT:    unreachable
 ; CHECK:       bb5:
-; CHECK-NEXT:    [[PTR0:%.*]] = inttoptr i64 [[DATA]] to i32*
+; CHECK-NEXT:    [[TMP0:%.*]] = inttoptr i64 [[DATA]] to i8*
+; CHECK-NEXT:    [[PTR0:%.*]] = bitcast i8* [[TMP0]] to i32*
 ; CHECK-NEXT:    tail call void @sink0(i32* [[PTR0]])
 ; CHECK-NEXT:    br label [[BB9:%.*]]
 ; CHECK:       bb7:
 ; CHECK-NEXT:    tail call void @sink3(i64 [[DATA]])
 ; CHECK-NEXT:    br label [[BB9]]
 ; CHECK:       bb9:
 ; CHECK-NEXT:    ret void
 ;

llvm/test/Transforms/InstCombine/ptr-int-cast.ll

entry:
   %0 = ptrtoint i32* %x to i1
   ret i1 %0
 }
 
 define i32* @test2(i128 %x) nounwind {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[TMP0:%.*]] = trunc i128 [[X:%.*]] to i64
-; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i32*
-; CHECK-NEXT:    ret i32* [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to i8*
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
+; CHECK-NEXT:    ret i32* [[TMP2]]
 ;
 entry:
   %0 = inttoptr i128 %x to i32*
   ret i32* %0
 }
 
 ; PR3574
 define i64 @f0(i32 %a0) nounwind {

llvm/test/Transforms/InstCombine/type_pun-inseltpoison.ll

;
   ret i32 %1
 }
 
 ; Type punning to an array of pointers.
 define i32* @type_pun_pointer(<16 x i8> %in) {
 ; CHECK-LABEL: @type_pun_pointer(
 ; CHECK-NEXT:    [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32>
 ; CHECK-NEXT:    [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0
-; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i32*
-; CHECK-NEXT:    ret i32* [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i8*
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
+; CHECK-NEXT:    ret i32* [[TMP2]]
 ;
   %sroa = shufflevector <16 x i8> %in, <16 x i8> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
   %1 = bitcast <4 x i8> %sroa to i32
   %2 = inttoptr i32 %1 to i32*
   ret i32* %2
 }
 
 ; Type punning to an array of 32-bit floating-point values.

llvm/test/Transforms/InstCombine/type_pun.ll

;
   ret i32 %1
 }
 
 ; Type punning to an array of pointers.
 define i32* @type_pun_pointer(<16 x i8> %in) {
 ; CHECK-LABEL: @type_pun_pointer(
 ; CHECK-NEXT:    [[SROA_BC:%.*]] = bitcast <16 x i8> [[IN:%.*]] to <4 x i32>
 ; CHECK-NEXT:    [[SROA_EXTRACT:%.*]] = extractelement <4 x i32> [[SROA_BC]], i32 0
-; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i32*
-; CHECK-NEXT:    ret i32* [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = inttoptr i32 [[SROA_EXTRACT]] to i8*
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
+; CHECK-NEXT:    ret i32* [[TMP2]]
 ;
   %sroa = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
   %1 = bitcast <4 x i8> %sroa to i32
   %2 = inttoptr i32 %1 to i32*
   ret i32* %2
 }
 
 ; Type punning to an array of 32-bit floating-point values.