[InstCombine] Stop folding inttoptr+bitcast if multiple uses

[ruiling]

Summary

Don't combine a inttoptr followed by a bitcast to another pointer type if
the intermediate pointer has multiple uses. Such combine is very unfriendly
to later passes like ScalarEvolutionAnalysis and LoadStoreVectorizer. For
example, this may change the IR from:

%p1 = inttoptr %addr to i32 *
%i  = load i32, i32 * %p1

==> %p2 = bitcast i32 * %p1 to float *

%p3 = getelementptr float, float * %p2, i64 1
%f  = load float, float * %p3

into:

%p1 = inttoptr %addr to i32 *

==> %p2 = inttoptr %addr to float *

%i  = load i32, i32 * %p1
%p3 = getelementptr float, float * %p2, i64 1
%f  = load float, float * %p3

This causes above mentioned passes fail to reason that the two pointers
are consecutive, thus fail to vectorize the two loads.

[arsenm]

llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

279

Remove the spaces between the type and * throughout the comment

295–296

This feels like the wrong place. This is isEliminableCastPair, and the cast can be eliminated. Can the hasOneUse check go to some specific combine?

[lebedev.ri]

i agree that it makes sense, but this is only a partial solution.
I'm looking at the full solution, not sure what fallout it will have yet.

[lebedev.ri]

Alternative full solution: D99121

llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp

unsigned Res = CastInst::isEliminableCastPair(firstOp, secondOp, SrcTy, MidTy,
                                                 DstIntPtrTy);
 
   // We don't want to form an inttoptr or ptrtoint that converts to an integer
   // type that differs from the pointer size.
   if ((Res == Instruction::IntToPtr && SrcTy != DstIntPtrTy) ||
       (Res == Instruction::PtrToInt && DstTy != SrcIntPtrTy))
     Res = 0;
 
+  // Don't combine a inttoptr followed by a bitcast to another pointer type if
+  // the intermediate pointer has multiple uses. Such combine is very unfriendly
+  // to later passes like ScalarEvolutionAnalysis and LoadStoreVectorizer. For
+  // example, this may change the IR from:
+  //
+  // %p1 = inttoptr %addr to i32 *
+  // %i  = load i32, i32 * %p1
+  // %p2 = bitcast i32 * %p1 to float *
+  // %p3 = getelementptr float, float * %p2, i64 1
+  // %f  = load float, float * %p3
+  //
+  // into:
+  //
+  // %p1 = inttoptr %addr to i32 *
+  // %p2 = inttoptr %addr to float *
+  // %i  = load i32, i32 * %p1
+  // %p3 = getelementptr float, float * %p2, i64 1
+  // %f  = load float, float * %p3
+  //
+  // This causes above mentioned passes fail to reason that the two pointers
+  // are consecutive, thus fail to vectorize the two loads.
+  if (firstOp == Instruction::IntToPtr && Res == Instruction::IntToPtr &&
+      !CI1->hasOneUse())
+    Res = 0;
+
   return Instruction::CastOps(Res);
 }
 
 /// Implement the transforms common to all CastInst visitors.
 Instruction *InstCombinerImpl::commonCastTransforms(CastInst &CI) {
   Value *Src = CI.getOperand(0);
 
   // Try to eliminate a cast of a cast.

llvm/test/Transforms/InstCombine/inttoptr_followed_by_bitcast.ll

+; RUN: opt < %s  -instcombine  -S | FileCheck %s
+
+define i32 @inttoptr_followed_by_bitcast(i32 %i0, i32 %i1, float %i2) {
+; CHECK-LABEL: @inttoptr_followed_by_bitcast(
+; CHECK:  [[PTR1:%.*]] = inttoptr i64 [[I:%.*]] to i32 addrspace(1)*
+; CHECK:  [[PTR2:%.*]] = bitcast i32 addrspace(1)* [[PTR1]] to float addrspace(1)*
+; CHECK:  [[F:%.*]] = load float, float addrspace(1)* [[PTR2]], align 4
+
+  %i3 = zext i32 %i0 to i64
+  %i4 = shl i32 %i1, 3
+  %i5 = and i32 %i4, -64
+  %i6 = zext i32 %i5 to i64
+  %i7 = add nuw nsw i64 %i3, %i6
+
+  %ip = inttoptr i64 %i7 to i32 addrspace(1)*
+  %fp = bitcast i32 addrspace(1)* %ip to float addrspace(1)*
+  %if0 = load float, float addrspace(1)* %fp, align 4
+
+  %ip2 = getelementptr i32, i32 addrspace(1)* %ip, i64 1
+  %i8 = load i32, i32 addrspace(1)* %ip2, align 4
+
+  %mul0 = fmul reassoc nnan nsz arcp contract afn float %if0, %i2
+
+  %ip3 = bitcast i32 addrspace(1)* %ip to float addrspace(1)*
+  store float %mul0, float addrspace(1)* %ip3, align 4
+
+  ret i32 %i8
+}