[SveEmitter] Add builtins for contiguous prefetches

[sdesmalen]

Summary

This patch also adds the enum sv_prfop for the prefetch operation specifier
and checks to ensure the passed enum values are valid.

[sdesmalen]

• Removed unrelated whitespace changes.

[efriedma]

LGTM with a couple minor comments.

clang/lib/CodeGen/CGBuiltin.cpp

7727

It seems sort of silly to emit a no-op bitcast+gep+bitcast in the Ops.size() <= 3 case, but I guess it doesn't matter much.

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfb.c

23

Maybe worth adding a negative test for svprfb_vnum?

[sdesmalen]

• Don't emit bitcast+gep+bitcast when offset is 0.
• Added negative tests for _vnum cases.

[sdesmalen]

clang/lib/CodeGen/CGBuiltin.cpp

7727

You're right that was a bit silly. I've changed it now.

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfb.c

23

Yes good catch I've added them. I'm not necessarily sure we also need to add them for all the gather variants as well. I think just having tests where the position of the prefetch specifier is different should be sufficient.

[efriedma]

LGTM

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfb.c

23

Yes, that seems fine.

clang/include/clang/Basic/TargetBuiltins.h

#undef LLVM_GET_SVE_IMMCHECKTYPES
     bool isByteIndexed() const { return Flags & IsByteIndexed; }
     bool isOverloadNone() const { return Flags & IsOverloadNone; }
     bool isOverloadWhile() const { return Flags & IsOverloadWhile; }
     bool isOverloadDefault() const { return !(Flags & OverloadKindMask); }
     bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; }
     bool isOverloadCvt() const { return Flags & IsOverloadCvt; }
     bool isAppendSVALL() const { return Flags & IsAppendSVALL; }
     bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; }
+    bool isPrefetch() const { return Flags & IsPrefetch; }
 
     uint64_t getBits() const { return Flags; }
     bool isFlagSet(uint64_t Flag) const { return Flags & Flag; }
   };
 
   /// Hexagon builtins
   namespace Hexagon {
     enum {

clang/include/clang/Basic/arm_sve.td

 // ------------------
 // P: boolean
 // U: unsigned
 
 // Prototype modifiers
 // -------------------
 // prototype: return (arg, arg, ...)
 //
+// v: void
 // x: vector of signed integers
 // u: vector of unsigned integers
 // d: default
 // c: const pointer type
 // P: predicate type
 // s: scalar of element type
 // a: scalar of element type (splat to vector type)
 // e: 1/2 width unsigned elements, 2x element count

 
 // t: svint32_t
 // z: svuint32_t
 // g: svuint64_t
 // O: svfloat16_t
 // M: svfloat32_t
 // N: svfloat64_t
 
+// J: Prefetch type (sv_prfop)
 // A: pointer to int8_t
 // B: pointer to int16_t
 // C: pointer to int32_t
 // D: pointer to int64_t
 
 // E: pointer to uint8_t
 // F: pointer to uint16_t
 // G: pointer to uint32_t

 def IsOverloadNone            : FlagType<0x00100000>; // Intrinsic does not take any overloaded types.
 def IsOverloadWhile           : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types.
 def IsOverloadWhileRW         : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types.
 def IsOverloadCvt             : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types.
 def OverloadKindMask          : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type.
 def IsByteIndexed             : FlagType<0x01000000>;
 def IsAppendSVALL             : FlagType<0x02000000>; // Appends SV_ALL as the last operand.
 def IsInsertOp1SVALL          : FlagType<0x04000000>; // Inserts SV_ALL as the second operand.
+def IsPrefetch                : FlagType<0x08000000>; // Contiguous prefetches.
 
 // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h
 class ImmCheckType<int val> {
   int Value = val;
 }
 def ImmCheck0_31                : ImmCheckType<0>;  // 0..31 (used for e.g. predicate patterns)
 def ImmCheck1_16                : ImmCheckType<1>;  // 1..16
 def ImmCheckExtract             : ImmCheckType<2>;  // 0..(2048/sizeinbits(elt) - 1)
 def ImmCheckShiftRight          : ImmCheckType<3>;  // 1..sizeinbits(elt)
 def ImmCheckShiftRightNarrow    : ImmCheckType<4>;  // 1..sizeinbits(elt)/2
 def ImmCheckShiftLeft           : ImmCheckType<5>;  // 0..(sizeinbits(elt) - 1)
 def ImmCheck0_7                 : ImmCheckType<6>;  // 0..7
 def ImmCheckLaneIndex           : ImmCheckType<7>;  // 0..(128/(1*sizeinbits(elt)) - 1)
 def ImmCheckLaneIndexCompRotate : ImmCheckType<8>;  // 0..(128/(2*sizeinbits(elt)) - 1)
 def ImmCheckLaneIndexDot        : ImmCheckType<9>;  // 0..(128/(4*sizeinbits(elt)) - 1)
 def ImmCheckComplexRot90_270    : ImmCheckType<10>; // [90,270]
 def ImmCheckComplexRotAll90     : ImmCheckType<11>; // [0, 90, 180,270]
+def ImmCheck0_13                : ImmCheckType<12>; // 0..13
 
 class ImmCheck<int arg, ImmCheckType kind, int eltSizeArg = -1> {
   int Arg = arg;
   int EltSizeArg = eltSizeArg;
   ImmCheckType Kind = kind;
 }
 
 class Inst<string n, string p, string t, MergeType mt, string i,

 
 // Store one vector, with no truncation, non-temporal (scalar base)
 def SVSTNT1 : MInst<"svstnt1[_{d}]", "vPpd", "csilUcUsUiUlhfd", [IsStore], MemEltTyDefault, "aarch64_sve_stnt1">;
 
 // Store one vector, with no truncation, non-temporal (scalar base, VL displacement)
 def SVSTNT1_VNUM : MInst<"svstnt1_vnum[_{d}]", "vPpld", "csilUcUsUiUlhfd", [IsStore], MemEltTyDefault, "aarch64_sve_stnt1">;
 
 ////////////////////////////////////////////////////////////////////////////////
+// Prefetches
+
+// Prefetch (Scalar base)
+def SVPRFB : MInst<"svprfb", "vPcJ", "c", [IsPrefetch], MemEltTyInt8,  "aarch64_sve_prf">;
+def SVPRFH : MInst<"svprfh", "vPcJ", "s", [IsPrefetch], MemEltTyInt16, "aarch64_sve_prf">;
+def SVPRFW : MInst<"svprfw", "vPcJ", "i", [IsPrefetch], MemEltTyInt32, "aarch64_sve_prf">;
+def SVPRFD : MInst<"svprfd", "vPcJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">;
+
+// Prefetch (Scalar base, VL displacement)
+def SVPRFB_VNUM : MInst<"svprfb_vnum", "vPclJ", "c", [IsPrefetch], MemEltTyInt8,  "aarch64_sve_prf">;
+def SVPRFH_VNUM : MInst<"svprfh_vnum", "vPclJ", "s", [IsPrefetch], MemEltTyInt16, "aarch64_sve_prf">;
+def SVPRFW_VNUM : MInst<"svprfw_vnum", "vPclJ", "i", [IsPrefetch], MemEltTyInt32, "aarch64_sve_prf">;
+def SVPRFD_VNUM : MInst<"svprfd_vnum", "vPclJ", "l", [IsPrefetch], MemEltTyInt64, "aarch64_sve_prf">;
+
+////////////////////////////////////////////////////////////////////////////////
 // Integer arithmetic
 
 multiclass SInstZPZ<string name, string types, string intrinsic, list<FlagType> flags=[]> {
   def _M : SInst<name # "[_{d}]", "ddPd", types, MergeOp1,     intrinsic, flags>;
   def _X : SInst<name # "[_{d}]", "dPd",  types, MergeAnyExp,  intrinsic, flags>;
   def _Z : SInst<name # "[_{d}]", "dPd",  types, MergeZeroExp, intrinsic, flags>;
 }
 

clang/lib/CodeGen/CGBuiltin.cpp

case SVETypeFlags::EltTyBool16:
     return llvm::VectorType::get(Builder.getInt1Ty(), {8, true});
   case SVETypeFlags::EltTyBool32:
     return llvm::VectorType::get(Builder.getInt1Ty(), {4, true});
   case SVETypeFlags::EltTyBool64:
     return llvm::VectorType::get(Builder.getInt1Ty(), {2, true});
   }
 }
 
+constexpr unsigned SVEBitsPerBlock = 128;
+
+static llvm::VectorType* getSVEVectorForElementType(llvm::Type *EltTy) {
+  unsigned NumElts = SVEBitsPerBlock / EltTy->getScalarSizeInBits();
+  return llvm::VectorType::get(EltTy, { NumElts, true });
+}
+
 // Reinterpret the input predicate so that it can be used to correctly isolate
 // the elements of the specified datatype.
 Value *CodeGenFunction::EmitSVEPredicateCast(Value *Pred,
                                              llvm::VectorType *VTy) {
   llvm::VectorType *RTy = llvm::VectorType::get(
       IntegerType::get(getLLVMContext(), 1), VTy->getElementCount());
   if (Pred->getType() == RTy)
     return Pred;
unsigned BytesPerElt =
         OverloadedTy->getElementType()->getScalarSizeInBits() / 8;
     Value *Scale = ConstantInt::get(Int64Ty, BytesPerElt);
     Ops[3] = Builder.CreateMul(Ops[3], Scale);
   }
 
   return Builder.CreateCall(F, Ops);
 }
 
+Value *CodeGenFunction::EmitSVEPrefetchLoad(SVETypeFlags TypeFlags,
+                                            SmallVectorImpl<Value *> &Ops,
+                                            unsigned BuiltinID) {
+  auto *MemEltTy = SVEBuiltinMemEltTy(TypeFlags);
+  auto *VectorTy = getSVEVectorForElementType(MemEltTy);
+  auto *MemoryTy = llvm::VectorType::get(MemEltTy, VectorTy->getElementCount());
+
+  Value *Predicate = EmitSVEPredicateCast(Ops[0], MemoryTy);
+  Value *BasePtr = Ops[1];
+
+  // Implement the index operand if not omitted.
+  if (Ops.size() > 3) {
+    BasePtr = Builder.CreateBitCast(BasePtr, MemoryTy->getPointerTo());
+    BasePtr = Builder.CreateGEP(MemoryTy, BasePtr, Ops[2]);
+  }
+
+  // Prefetch intriniscs always expect an i8*
+  BasePtr = Builder.CreateBitCast(BasePtr, llvm::PointerType::getUnqual(Int8Ty));
+  Value *PrfOp = Ops.back();
+
+  Function *F = CGM.getIntrinsic(BuiltinID, Predicate->getType());
+  return Builder.CreateCall(F, {Predicate, BasePtr, PrfOp});
+}
+
 Value *CodeGenFunction::EmitSVEMaskedLoad(const CallExpr *E,
                                           llvm::Type *ReturnTy,
                                           SmallVectorImpl<Value *> &Ops,
                                           unsigned BuiltinID,
                                           bool IsZExtReturn) {
   QualType LangPTy = E->getArg(1)->getType();
   llvm::Type *MemEltTy = CGM.getTypes().ConvertType(
       LangPTy->getAs<PointerType>()->getPointeeType());
Value *CodeGenFunction::EmitSVEMaskedStore(const CallExpr *E,
   // Last value is always the data
   llvm::Value *Val = Builder.CreateTrunc(Ops.back(), MemoryTy);
 
   BasePtr = Builder.CreateBitCast(BasePtr, MemEltTy->getPointerTo());
   Function *F = CGM.getIntrinsic(BuiltinID, MemoryTy);
   return Builder.CreateCall(F, {Val, Predicate, BasePtr});
 }
 
-constexpr unsigned SVEBitsPerBlock = 128;
-
-static llvm::VectorType* getSVEVectorForElementType(llvm::Type *EltTy) {
-  unsigned NumElts = SVEBitsPerBlock / EltTy->getScalarSizeInBits();
-  return llvm::VectorType::get(EltTy, { NumElts, true });
-}
-
 // Limit the usage of scalable llvm IR generated by the ACLE by using the
 // sve dup.x intrinsic instead of IRBuilder::CreateVectorSplat.
 Value *CodeGenFunction::EmitSVEDupX(Value* Scalar) {
   auto F = CGM.getIntrinsic(Intrinsic::aarch64_sve_dup_x,
                             getSVEVectorForElementType(Scalar->getType()));
   return Builder.CreateCall(F, Scalar);
 }
 
if (TypeFlags.isLoad())
     return EmitSVEMaskedLoad(E, Ty, Ops, Builtin->LLVMIntrinsic,
                              TypeFlags.isZExtReturn());
   else if (TypeFlags.isStore())
     return EmitSVEMaskedStore(E, Ops, Builtin->LLVMIntrinsic);
   else if (TypeFlags.isGatherLoad())
     return EmitSVEGatherLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic);
   else if (TypeFlags.isScatterStore())
     return EmitSVEScatterStore(TypeFlags, Ops, Builtin->LLVMIntrinsic);
+  else if (TypeFlags.isPrefetch())
+    return EmitSVEPrefetchLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic);
   else if (Builtin->LLVMIntrinsic != 0) {
     if (TypeFlags.getMergeType() == SVETypeFlags::MergeZeroExp)
       InsertExplicitZeroOperand(Builder, Ty, Ops);
 
     if (TypeFlags.getMergeType() == SVETypeFlags::MergeAnyExp)
       InsertExplicitUndefOperand(Builder, Ty, Ops);
 
     // Some ACLE builtins leave out the argument to specify the predicate

clang/lib/CodeGen/CodeGenFunction.h

llvm::Value *EmitSVEScatterStore(SVETypeFlags TypeFlags,
                                    llvm::SmallVectorImpl<llvm::Value *> &Ops,
                                    unsigned IntID);
   llvm::Value *EmitSVEMaskedLoad(const CallExpr *, llvm::Type *ReturnTy,
                                  SmallVectorImpl<llvm::Value *> &Ops,
                                  unsigned BuiltinID, bool IsZExtReturn);
   llvm::Value *EmitSVEMaskedStore(const CallExpr *,
                                   SmallVectorImpl<llvm::Value *> &Ops,
                                   unsigned BuiltinID);
+  llvm::Value *EmitSVEPrefetchLoad(SVETypeFlags TypeFlags,
+                                   SmallVectorImpl<llvm::Value *> &Ops,
+                                   unsigned BuiltinID);
   llvm::Value *EmitAArch64SVEBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
 
   llvm::Value *EmitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
                                       llvm::Triple::ArchType Arch);
   llvm::Value *EmitBPFBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
 
   llvm::Value *BuildVector(ArrayRef<llvm::Value*> Ops);
   llvm::Value *EmitX86BuiltinExpr(unsigned BuiltinID, const CallExpr *E);

clang/lib/Sema/SemaChecking.cpp

auto CheckImmediateInSet = [&](OptionSetCheckFnTy CheckImm,
       return false;
     };
 
     switch ((SVETypeFlags::ImmCheckType)CheckTy) {
     case SVETypeFlags::ImmCheck0_31:
       if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 31))
         HasError = true;
       break;
+    case SVETypeFlags::ImmCheck0_13:
+      if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 13))
+        HasError = true;
+      break;
     case SVETypeFlags::ImmCheck1_16:
       if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 1, 16))
         HasError = true;
       break;
     case SVETypeFlags::ImmCheck0_7:
       if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 7))
         HasError = true;
       break;

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+void test_svprfb(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 0)
+  return svprfb(pg, base, SV_PLDL1KEEP);
+}
+
+void test_svprfb_1(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_1
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 1)
+  return svprfb(pg, base, SV_PLDL1STRM);
+}
+
+void test_svprfb_2(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_2
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 2)
+  return svprfb(pg, base, SV_PLDL2KEEP);
+}
+
+void test_svprfb_3(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_3
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 3)
+  return svprfb(pg, base, SV_PLDL2STRM);
+}
+
+void test_svprfb_4(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_4
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 4)
+  return svprfb(pg, base, SV_PLDL3KEEP);
+}
+
+void test_svprfb_5(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_5
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 5)
+  return svprfb(pg, base, SV_PLDL3STRM);
+}
+
+void test_svprfb_6(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_6
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 8)
+  return svprfb(pg, base, SV_PSTL1KEEP);
+}
+
+void test_svprfb_7(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_7
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 9)
+  return svprfb(pg, base, SV_PSTL1STRM);
+}
+
+void test_svprfb_8(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_8
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 10)
+  return svprfb(pg, base, SV_PSTL2KEEP);
+}
+
+void test_svprfb_9(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_9
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 11)
+  return svprfb(pg, base, SV_PSTL2STRM);
+}
+
+void test_svprfb_10(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_10
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 12)
+  return svprfb(pg, base, SV_PSTL3KEEP);
+}
+
+void test_svprfb_11(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfb_11
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 13)
+  return svprfb(pg, base, SV_PSTL3STRM);
+}
+
+void test_svprfb_vnum(svbool_t pg, const void *base, int64_t vnum)
+{
+  // CHECK-LABEL: test_svprfb_vnum
+  // CHECK: %[[BASE:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
+  // CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BASE]], i64 %vnum, i64 0
+  // CHECK: @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %[[GEP]], i32 0)
+  return svprfb_vnum(pg, base, vnum, SV_PLDL1KEEP);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+void test_svprfd(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 0)
+  return svprfd(pg, base, SV_PLDL1KEEP);
+}
+
+void test_svprfd_1(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_1
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 1)
+  return svprfd(pg, base, SV_PLDL1STRM);
+}
+
+void test_svprfd_2(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_2
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 2)
+  return svprfd(pg, base, SV_PLDL2KEEP);
+}
+
+void test_svprfd_3(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_3
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 3)
+  return svprfd(pg, base, SV_PLDL2STRM);
+}
+
+void test_svprfd_4(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_4
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 4)
+  return svprfd(pg, base, SV_PLDL3KEEP);
+}
+
+void test_svprfd_5(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_5
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 5)
+  return svprfd(pg, base, SV_PLDL3STRM);
+}
+
+void test_svprfd_6(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_6
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 8)
+  return svprfd(pg, base, SV_PSTL1KEEP);
+}
+
+void test_svprfd_7(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_7
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 9)
+  return svprfd(pg, base, SV_PSTL1STRM);
+}
+
+void test_svprfd_8(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_8
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 10)
+  return svprfd(pg, base, SV_PSTL2KEEP);
+}
+
+void test_svprfd_9(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_9
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 11)
+  return svprfd(pg, base, SV_PSTL2STRM);
+}
+
+void test_svprfd_10(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_10
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 12)
+  return svprfd(pg, base, SV_PSTL3KEEP);
+}
+
+void test_svprfd_11(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfd_11
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %base, i32 13)
+  return svprfd(pg, base, SV_PSTL3STRM);
+}
+
+void test_svprfd_vnum(svbool_t pg, const void *base, int64_t vnum)
+{
+  // CHECK-LABEL: test_svprfd_vnum
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 2 x i64>*
+  // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BASE]], i64 %vnum
+  // CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 2 x i64>* %[[GEP]] to i8*
+  // CHECK: @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0)
+  return svprfd_vnum(pg, base, vnum, SV_PLDL1KEEP);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+void test_svprfh(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 0)
+  return svprfh(pg, base, SV_PLDL1KEEP);
+}
+
+void test_svprfh_1(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_1
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 1)
+  return svprfh(pg, base, SV_PLDL1STRM);
+}
+
+void test_svprfh_2(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_2
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 2)
+  return svprfh(pg, base, SV_PLDL2KEEP);
+}
+
+void test_svprfh_3(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_3
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 3)
+  return svprfh(pg, base, SV_PLDL2STRM);
+}
+
+void test_svprfh_4(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_4
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 4)
+  return svprfh(pg, base, SV_PLDL3KEEP);
+}
+
+void test_svprfh_5(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_5
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 5)
+  return svprfh(pg, base, SV_PLDL3STRM);
+}
+
+void test_svprfh_6(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_6
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 8)
+  return svprfh(pg, base, SV_PSTL1KEEP);
+}
+
+void test_svprfh_7(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_7
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 9)
+  return svprfh(pg, base, SV_PSTL1STRM);
+}
+
+void test_svprfh_8(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_8
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 10)
+  return svprfh(pg, base, SV_PSTL2KEEP);
+}
+
+void test_svprfh_9(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_9
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 11)
+  return svprfh(pg, base, SV_PSTL2STRM);
+}
+
+void test_svprfh_10(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_10
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 12)
+  return svprfh(pg, base, SV_PSTL3KEEP);
+}
+
+void test_svprfh_11(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfh_11
+  // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %base, i32 13)
+  return svprfh(pg, base, SV_PSTL3STRM);
+}
+
+void test_svprfh_vnum(svbool_t pg, const void *base, int64_t vnum)
+{
+  // CHECK-LABEL: test_svprfh_vnum
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 8 x i16>*
+  // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BASE]], i64 %vnum
+  // CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 8 x i16>* %[[GEP]] to i8*
+  // CHECK: @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0)
+  return svprfh_vnum(pg, base, vnum, SV_PLDL1KEEP);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+void test_svprfw(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 0)
+  return svprfw(pg, base, SV_PLDL1KEEP);
+}
+
+void test_svprfw_1(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_1
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 1)
+  return svprfw(pg, base, SV_PLDL1STRM);
+}
+
+void test_svprfw_2(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_2
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 2)
+  return svprfw(pg, base, SV_PLDL2KEEP);
+}
+
+void test_svprfw_3(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_3
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 3)
+  return svprfw(pg, base, SV_PLDL2STRM);
+}
+
+void test_svprfw_4(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_4
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 4)
+  return svprfw(pg, base, SV_PLDL3KEEP);
+}
+
+void test_svprfw_5(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_5
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 5)
+  return svprfw(pg, base, SV_PLDL3STRM);
+}
+
+void test_svprfw_6(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_6
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 8)
+  return svprfw(pg, base, SV_PSTL1KEEP);
+}
+
+void test_svprfw_7(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_7
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 9)
+  return svprfw(pg, base, SV_PSTL1STRM);
+}
+
+void test_svprfw_8(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_8
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 10)
+  return svprfw(pg, base, SV_PSTL2KEEP);
+}
+
+void test_svprfw_9(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_9
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 11)
+  return svprfw(pg, base, SV_PSTL2STRM);
+}
+
+void test_svprfw_10(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_10
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 12)
+  return svprfw(pg, base, SV_PSTL3KEEP);
+}
+
+void test_svprfw_11(svbool_t pg, const void *base)
+{
+  // CHECK-LABEL: test_svprfw_11
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %base, i32 13)
+  return svprfw(pg, base, SV_PSTL3STRM);
+}
+
+void test_svprfw_vnum(svbool_t pg, const void *base, int64_t vnum)
+{
+  // CHECK-LABEL: test_svprfw_vnum
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 4 x i32>*
+  // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BASE]], i64 %vnum
+  // CHECK-DAG: %[[I8_BASE:.*]] = bitcast <vscale x 4 x i32>* %[[GEP]] to i8*
+  // CHECK: @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %[[PG]], i8* %[[I8_BASE]], i32 0)
+  return svprfw_vnum(pg, base, vnum, SV_PLDL1KEEP);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfb.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#include <arm_sve.h>
+
+void test_svprfb(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfb(pg, base, 14);
+}
+
+void test_svprfb_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfb(pg, base, -1);
+}
+
+void test_svprfb_vnum(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfb_vnum(pg, base, 0, 14);
+}
+
+void test_svprfb_vnum_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfb_vnum(pg, base, 0, -1);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfd.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#include <arm_sve.h>
+
+void test_svprfd(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfd(pg, base, 14);
+}
+
+void test_svprfd_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfd(pg, base, -1);
+}
+
+void test_svprfd_vnum(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfd_vnum(pg, base, 0, 14);
+}
+
+void test_svprfd_vnum_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfd_vnum(pg, base, 0, -1);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfh.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#include <arm_sve.h>
+
+void test_svprfh(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfh(pg, base, 14);
+}
+
+void test_svprfh_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfh(pg, base, -1);
+}
+
+void test_svprfh_vnum(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfh_vnum(pg, base, 0, 14);
+}
+
+void test_svprfh_vnum_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfh_vnum(pg, base, 0, -1);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfw.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#include <arm_sve.h>
+
+void test_svprfw(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfw(pg, base, 14);
+}
+
+void test_svprfw_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfw(pg, base, -1);
+}
+
+void test_svprfw_vnum(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value 14 is outside the valid range [0, 13]}}
+  return svprfw_vnum(pg, base, 0, 14);
+}
+
+void test_svprfw_vnum_1(svbool_t pg, const void *base)
+{
+  // expected-error@+1 {{argument value -1 is outside the valid range [0, 13]}}
+  return svprfw_vnum(pg, base, 0, -1);
+}

clang/utils/TableGen/SveEmitter.cpp

case 'I':
     Predicate = false;
     Float = false;
     ElementBitwidth = Bitwidth = 32;
     NumVectors = 0;
     Signed = true;
     Immediate = true;
     PredicatePattern = true;
     break;
+  case 'J':
+    Predicate = false;
+    Float = false;
+    ElementBitwidth = Bitwidth = 32;
+    NumVectors = 0;
+    Signed = true;
+    Immediate = true;
+    PrefetchOp = true;
+    break;
   case 'k':
     Predicate = false;
     Signed = true;
     Float = false;
     ElementBitwidth = Bitwidth = 32;
     NumVectors = 0;
     break;
   case 'l':
for (unsigned I = 0; I < Proto.size(); ++I) {
     SVEType T(BaseTypeSpec, Proto[I]);
     Types.push_back(T);
 
     // Add range checks for immediates
     if (I > 0) {
       if (T.isPredicatePattern())
         ImmChecks.emplace_back(
             I - 1, Emitter.getEnumValueForImmCheck("ImmCheck0_31"));
+      else if (T.isPrefetchOp())
+        ImmChecks.emplace_back(
+            I - 1, Emitter.getEnumValueForImmCheck("ImmCheck0_13"));
     }
   }
 
   // Set flags based on properties
   this->Flags |= Emitter.encodeTypeFlags(BaseType);
   this->Flags |= Emitter.encodeMemoryElementType(MemoryElementTy);
   this->Flags |= Emitter.encodeMergeType(MergeTy);
   if (hasSplat())
void SVEEmitter::createHeader(raw_ostream &OS) {
   OS << "  SV_VL64 = 11,\n";
   OS << "  SV_VL128 = 12,\n";
   OS << "  SV_VL256 = 13,\n";
   OS << "  SV_MUL4 = 29,\n";
   OS << "  SV_MUL3 = 30,\n";
   OS << "  SV_ALL = 31\n";
   OS << "} sv_pattern;\n\n";
 
+  OS << "typedef enum\n";
+  OS << "{\n";
+  OS << "  SV_PLDL1KEEP = 0,\n";
+  OS << "  SV_PLDL1STRM = 1,\n";
+  OS << "  SV_PLDL2KEEP = 2,\n";
+  OS << "  SV_PLDL2STRM = 3,\n";
+  OS << "  SV_PLDL3KEEP = 4,\n";
+  OS << "  SV_PLDL3STRM = 5,\n";
+  OS << "  SV_PSTL1KEEP = 8,\n";
+  OS << "  SV_PSTL1STRM = 9,\n";
+  OS << "  SV_PSTL2KEEP = 10,\n";
+  OS << "  SV_PSTL2STRM = 11,\n";
+  OS << "  SV_PSTL3KEEP = 12,\n";
+  OS << "  SV_PSTL3STRM = 13\n";
+  OS << "} sv_prfop;\n\n";
+
   OS << "/* Function attributes */\n";
   OS << "#define __aio static inline __attribute__((__always_inline__, "
         "__nodebug__, __overloadable__))\n\n";
 
   SmallVector<std::unique_ptr<Intrinsic>, 128> Defs;
   std::vector<Record *> RV = Records.getAllDerivedDefinitions("Inst");
   for (auto *R : RV)
     createIntrinsic(R, Defs);