[DebugInfo] Don't translate dbg.addr and similar intrinsics into indirect DBG_VALUEs

[jmorse]

Summary

This patch kills-off a significant user of the "IsIndirect" field of DBG_VALUE machine insts. Brought up in in this bug [0], I suggested that IsIndirect was redundant, and @dblaikie broadly agreed. IMHO IsIndirect is a bit of a liability because its current useage can mean two things:

• The IR input (dbg.declare/dbg.addr) wants the operand plus expression dereferenced,
• The register allocator spilt the operand, and wants a dereference between the spill-address-calculation and whatever the original expression was.

Better IMO to just eliminate the first use case by appending a DW_OP_deref to the expression when the DBG_VALUE is created -- there are no circumstances AFAIUI where the machine-lowering transforms needs to know whether the location a DBG_VALUE refers to will be interpreted as an address or not. In the future we can use the IsIndirect field for Better Things (TM), more on that in a future patch [1]. This patch isn't quite NFC as it exposes another bug (see below).

This patch has all creators of DBG_VALUEs append a DW_OP_deref to all dbg.declare/dbg.addr's they handle, which makes the DWARF expression backend emit a memory location, the same as the IsIndirect field. Some producers were also setting IsIndirect for constant-valued DBG_VALUEs, I've switched those to set IsIndirect to false.

SelectionDAGBuilder::EmitFuncArgumentDbgValue has code that theoretically could lower a dbg.declare onto multiple registers. I don't think this ever happens, and I've added an assertion; no test hits it, a clang-3.4 build for x86_64 doesn't hit it. I don't *think* a scenario where LLVM specifies something is in memory with dbg.declare but then the backend reckons it arrives in registers would make sense, but I'm no ABI expert.

I've stripped out the "IsIndirect" field throughout LiveDebugVariables as its use case is gone, and added an assertion that LiveDebugVariables doesn't see any incoming DBG_VALUEs with IsIndirect set.

There are a lot of test changes, they fall into four categories:

• Textual output change: a bunch of tests check what the textual assembly printer produces. If the IsIndirect field is set, the assembly printer writes "[$reg+0]" to represent indirection, wheras if there's a DW_OP_deref in the expression then it prints "[DW_OP_deref] $reg". Both produce the same DWARF. Tests that change in this way are:
  • test/CodeGen/ARM/debug-info-arg.ll
  • test/DebugInfo/ARM/PR16736.ll
  • test/DebugInfo/X86/dbg-addr-dse.ll
  • test/DebugInfo/X86/dbg-addr.ll
  • test/DebugInfo/X86/live-debug-vars-dse.mir
  • test/DebugInfo/X86/spill-indirect-nrvo.ll
  • test/DebugInfo/X86/spill-nontrivial-param.ll
• Internal representation changes (IsIndirect -> DW_OP_deref), which is just a different way of expressing the same thing.
  • test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
  • test/CodeGen/AArch64/GlobalISel/debug-insts.ll
  • test/CodeGen/PowerPC/debuginfo-stackarg.ll
  • test/DebugInfo/ARM/float-stack-arg.ll
• There were a few tests where the input IR had a 'DW_OP_deref' in a dbg.declare, which doesn't play well with this implementation. I don't think it makes sense for dbg.declare to have a deref in its expression, so in these tests I've deleted it.
  • test/DebugInfo/X86/op_deref.ll
  • test/DebugInfo/X86/parameters.ll
  • test/DebugInfo/X86/safestack-byval.ll
  • test/DebugInfo/X86/vla.ll <--- I also added a llvm-dwarfdump check that the DWARF output is right

One COFF/CodeView test changes. This too had an excess DW_OP_deref in the input, but, fixing that causes the type name in the CodeView output to change (see diff). The new type appears correct (the function argument is a struct, not a reference), but I know nothing about CodeView (paging @rnk)

• test/DebugInfo/COFF/pieces.ll

I've added XFails to two tests -- this is because of PR41992 [2], which @Orlando has a patch for somewhere.

I haven't added any new test, this is an internal representation change so I don't believe one is necessary.

[0] https://bugs.llvm.org/show_bug.cgi?id=41675#c9
[1] Signalling more information about spill locations between LiveDebugVariables and LiveDebugValues.
[2] https://bugs.llvm.org/show_bug.cgi?id=41992

[aprantl]

Thanks a lot! When changing something like this, you might want to diff the debug info of a test program before and after the change and look for any unexpected changes not covered by our tests.

Yes, a DW_OP_deref is preferable to the indirect bit. How hard would it be to convert the remaining use-cases to retire the flag?

lib/CodeGen/GlobalISel/IRTranslator.cpp

1381 ↗

(On Diff #224846)

Out of curiosity: is passing 0 here really the same as creating an undef?

[rnk]

This makes sense to me, we should be able to replace isIndirect with DW_OP_deref.

I checked the test case updates, they look good.

One concern that I have about folding everything into the DIExpression is that they are effectively leaked. For every unique variable location description, which now includes offsets and indirection, we make a DIExpression and never clean it up. This is probably not significant in overall compilation, but it feels sloppy to me. As a future alternative, maybe we could use the same representation (sequence of DWARF opcodes), but store them as MachineInstr operands, so that they get cleaned up after emitting the MachineFunction.

test/DebugInfo/COFF/pieces.ll

208 ↗

(On Diff #224846)

This change looks good to me. The reference usage came about in D36907, which shouldn't apply in this case. The DefRangeRegisterRel record below already implies that the variable o lives in memory pointed to by RCX, which is correct, o is passed indirectly and it's address lives in RCX.

We started using references sometimes in D36907 as a way to squeeze out one more level of indirection through memory from this format. We'd use the reference if RCX was spilled, for example. In that case, we'd say that o was a reference, it lives *in* RCX, and later is spilled to stack slot offset N, and the debugger will display o as expected, even though it's the wrong type at the source level.

test/DebugInfo/X86/dbg-addr-dse.ll

6–8 ↗

(On Diff #224846)

I just want to make sure that this gets addressed soon-ish, I suppose before the next release. I see that you said @Orlando has a patch for it.

I don't think it will cause any issues for Chromium, because we still set -instcombine-lower-dbg-declare=0, so things that are escaped are mainly described as stack locations in the side table. But, if we ever want to get off that flag, I want to make sure that LLVM can reliably track escaped variables.

[aprantl]

In D68945#1708337, @rnk wrote:

One concern that I have about folding everything into the DIExpression is that they are effectively leaked. For every unique variable location description, which now includes offsets and indirection, we make a DIExpression and never clean it up. This is probably not significant in overall compilation, but it feels sloppy to me. As a future alternative, maybe we could use the same representation (sequence of DWARF opcodes), but store them as MachineInstr operands, so that they get cleaned up after emitting the MachineFunction.

I don't think that this poses a real problem since they are on average <16 bytes each and very repetitive and DIExpressions are globally uniqued by a FoldingSet, but I do see your point. A pathological case would be long-lived JIT that generates consecutive DIExpressions DW_OP_constu 0 , DW_OP_constu 1, ... .

[jmorse]

In D68945#1708182, @aprantl wrote:

Thanks a lot! When changing something like this, you might want to diff the debug info of a test program before and after the change and look for any unexpected changes not covered by our tests.

It looks like clang-3.4's X86ISelLowering.cpp produces identical debuginfo; I was expecting to see more PR41992 differences,

Yes, a DW_OP_deref is preferable to the indirect bit. How hard would it be to convert the remaining use-cases to retire the flag?

Moderately complicated, there's currently a good use-case for IsIndirect, it lets the PrologEpilog pass distinguish:

• DBG_VALUEs that refer to the contents of a spill stack slot (IsIndirect=True)
• DBG_VALUEs that should evaluate to a stack pointer, not its value (IsIndirect=False)

There are other ways of implementing this though, such as examining the stack-slot type or LiveDebugVariables prepending a DW_OP_deref for slot-contents locations.

I'd like to keep the field around, but use it to pass spill-slot frame indexes to LiveDebugValues, more on that in another patch though.

Reid wrote:

One concern that I have about folding everything into the DIExpression is that they are effectively leaked. [...] As a future alternative, maybe we could use the same representation (sequence of DWARF opcodes), but store them as MachineInstr operands.

That too might be achievable by putting the spill-slot frame index in DBG_VALUE insts.

lib/CodeGen/GlobalISel/IRTranslator.cpp

1381 ↗

(On Diff #224846)

I think so -- both Indirect and Direct builders use the register-form of BuildMI and create DBG_VALUEs with $noreg as the first operand.

This change isn't technically necessary, but we may as well skip adding a spurious deref to a $noreg DBG_VALUE if we can.

lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

129 ↗

(On Diff #224846)

Note to self, I missed this, and it risks asserting later

[aprantl]

In D68945#1709220, @jmorse wrote:

In D68945#1708182, @aprantl wrote:

Thanks a lot! When changing something like this, you might want to diff the debug info of a test program before and after the change and look for any unexpected changes not covered by our tests.

It looks like clang-3.4's X86ISelLowering.cpp produces identical debuginfo; I was expecting to see more PR41992 differences,

Yes, a DW_OP_deref is preferable to the indirect bit. How hard would it be to convert the remaining use-cases to retire the flag?

Moderately complicated, there's currently a good use-case for IsIndirect, it lets the PrologEpilog pass distinguish:

• DBG_VALUEs that refer to the contents of a spill stack slot (IsIndirect=True)
• DBG_VALUEs that should evaluate to a stack pointer, not its value (IsIndirect=False)

There are other ways of implementing this though, such as examining the stack-slot type or LiveDebugVariables prepending a DW_OP_deref for slot-contents locations.

I'd like to keep the field around, but use it to pass spill-slot frame indexes to LiveDebugValues, more on that in another patch though.

Sounds like the problem here is that we don't encode the difference between Memory locations and Register locations in DIExpression and/or DBG_VALUE. I think we currently decide the very late in DwarfExpression.cpp.

[aprantl]

(But we do have DW_OP_stack_value). Maybe we need a DW_OP_LLVM_memory_value, or rename this flag?

[uabelho]

Hi,

I'm struggling with a case for my out-of-tree target where I think debug info is wrong with this change.

Before Isel we have:

call void @llvm.dbg.value(metadata i16 %x, metadata !20, metadata !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)), !dbg !13

And before this change we got the following after Isel:

DBG_VALUE %fixed-stack.1, 0, !"bar_y", !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)

With this change, we instead get this after Isel:

DBG_VALUE %fixed-stack.1, $noreg, !"bar_y", !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_deref, DW_OP_stack_value)

Isn't the DW_OP_deref inserted in the wrong place? I think it should be done before the DW_OP_LLVM_convert:s rather than after?

[jmorse]

Adrian wrote:

Sounds like the problem here is that we don't encode the difference between Memory locations and Register locations in DIExpression and/or DBG_VALUE. I think we currently decide the very late in DwarfExpression.cpp.

Yeah, I've been bitten by this in the past, sometimes adding an extra DW_OP_deref to the end of an expression causes no change to the output DWARF because DwarfExpression.cpp was already guessing the location type ("unknown" -> memory). Particularly awkward is that adding any opcode might implicitly add a deref, if DwarfExpression.cpp starts interpreting the expression as a memory location rather than register location. Unless the expression is already an implicit location, in which case you don't get that extra deref!

(But we do have DW_OP_stack_value). Maybe we need a DW_OP_LLVM_memory_value, or rename this flag?

IMHO, YMMV, it would be better to head in the other direction and abandon what "kind" of location we have in the compilation stages, because it's a DWARF encoding detail. That would mean adding an opcode to a DIExpression always meant the same thing, with no flags to change their interpretation. Location kinds would have to be decided by DwarfExpression.cpp, something like:

• All expressions ending in a deref are memory locations
• Anything else not ending in a deref that performs some kind of computation is an implicit location
• An empty expression is interpreted as a register location

[jmorse]

Hi Mikael,

In D68945#1710654, @uabelho wrote:

And before this change we got the following after Isel:

DBG_VALUE %fixed-stack.1, 0, !"bar_y", !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)

With this change, we instead get this after Isel:

DBG_VALUE %fixed-stack.1, $noreg, !"bar_y", !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_deref, DW_OP_stack_value)

Isn't the DW_OP_deref inserted in the wrong place? I think it should be done before the DW_OP_LLVM_convert:s rather than after?

You're right, that definitely looks wrong. This change was only supposed to affect DBG_VALUEs generated from indirect intrinsics (dbg.addr/dbg.declare); at a guess, it looks like dbg.values of Values that becomes FrameIndexes have the IsIndirect flag set too. I'll try to replicate this locally and patch it, please do back the commit out if it's causing significant misery.

(This is a great example of the kind of bug IsIndirect might be / have been causing, it doesn't express where the deref happens if there's an existing expression).

[uabelho]

In D68945#1710698, @jmorse wrote:

Hi Mikael,

In D68945#1710654, @uabelho wrote:

And before this change we got the following after Isel:

DBG_VALUE %fixed-stack.1, 0, !"bar_y", !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)

With this change, we instead get this after Isel:

DBG_VALUE %fixed-stack.1, $noreg, !"bar_y", !DIExpression(DW_OP_LLVM_convert, 16, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_deref, DW_OP_stack_value)

Isn't the DW_OP_deref inserted in the wrong place? I think it should be done before the DW_OP_LLVM_convert:s rather than after?

You're right, that definitely looks wrong. This change was only supposed to affect DBG_VALUEs generated from indirect intrinsics (dbg.addr/dbg.declare); at a guess, it looks like dbg.values of Values that becomes FrameIndexes have the IsIndirect flag set too. I'll try to replicate this locally and patch it, please do back the commit out if it's causing significant misery.

Thanks!

The C code originally looked like

typedef signed short T;
T bar(T d0, T d1, T d2, T d3, T d4, T x, T d5) {
  signed long bar_y = x;
  return bar_y;
}

(where short is 16bits and long is 32bits on my target) and "x" was passed on the stack.

[jmorse]

Follow-up in D69028; hopefully the test there replicates the issue you've encountered, and the patch fixes it.

[aprantl]

In D68945#1710656, @jmorse wrote:

Adrian wrote:

Sounds like the problem here is that we don't encode the difference between Memory locations and Register locations in DIExpression and/or DBG_VALUE. I think we currently decide the very late in DwarfExpression.cpp.

Yeah, I've been bitten by this in the past, sometimes adding an extra DW_OP_deref to the end of an expression causes no change to the output DWARF because DwarfExpression.cpp was already guessing the location type ("unknown" -> memory). Particularly awkward is that adding any opcode might implicitly add a deref, if DwarfExpression.cpp starts interpreting the expression as a memory location rather than register location. Unless the expression is already an implicit location, in which case you don't get that extra deref!

(But we do have DW_OP_stack_value). Maybe we need a DW_OP_LLVM_memory_value, or rename this flag?

IMHO, YMMV, it would be better to head in the other direction and abandon what "kind" of location we have in the compilation stages, because it's a DWARF encoding detail. That would mean adding an opcode to a DIExpression always meant the same thing, with no flags to change their interpretation. Location kinds would have to be decided by DwarfExpression.cpp, something like:

• All expressions ending in a deref are memory locations
• Anything else not ending in a deref that performs some kind of computation is an implicit location
• An empty expression is interpreted as a register location

Those two last examples don't really work: Due to salvageDebugInfo it is perfectly possible to arrive at either a register or a memory location that ends in DW_OP_constu 1 DW_OP_plus

I think we need slightly different tuning knobs. We need to distinguish:

• axis 1: read-only vs. read-write locations Is it safe for the debugger to write to that location to change the variable's value? I think we can only guarantee that for dbg.declare(alloca) at the moment. In DWARF terms this is the difference between DW_OP_reg0 and DW_OP_breg0 DW_OP_stack_value.

• axis 2: SSA-Value/(v)reg vs. memory locations

I need to think harder about this the primary open questions for me are:

• why do we currently add DW_OP_stack_value in LLVM IR (which if the two axis does it address)?
• is axis 2 currently implicitly encoded by the kind of value being bound by the DBG_VALUE and would it remove ambiguity to make it explicit? Because of my example above I'm convinced that DW_OP_deref is not a sufficient indicator.

[aprantl]

Hmm.. I think my example was bad, too. A non-empty expression isn't a register location in the DWARF sense, and something that modifies the *value* isn't a memory location in the DWARF sense either. That said, I think the rest of the comment is still valid :-)

[Orlando]

I'm working in this area for pr41992 so I noticed a couple of things (inline comments). I am happy to just add the changes I'm suggesting into my own upcoming patch if you'd like?

llvm/lib/CodeGen/LiveDebugVariables.cpp

105

I don't think either of these asserts are necessary now. Or, at least the first one's message needs updating to something like "expected DbgValueLocation to be pointer size".

112

I think this should have been updated. Previously the LocNo was 31 bits and UndefLocNo is defined above as ~0u, so after assigning LocNo = UndefLocNo, LocNo == INT_MAX. Now it's just equal to UndefLocNo.

[jmorse]

In D68945#1712448, @Orlando wrote:

I'm working in this area for pr41992 so I noticed a couple of things (inline comments). I am happy to just add the changes I'm suggesting into my own upcoming patch if you'd like?

Those both sound legit, please do!

[Orlando]

In D68945#1714323, @jmorse wrote:

In D68945#1712448, @Orlando wrote:

I'm working in this area for pr41992 so I noticed a couple of things (inline comments). I am happy to just add the changes I'm suggesting into my own upcoming patch if you'd like?

Those both sound legit, please do!

I have incorporated these minor changes into D70121. I'll it split them out if asked, but I'm hoping they're small enough that it isn't necessary.

[leonardchan]

Hi, it seems that this revision introduced the regression in https://bugs.llvm.org/show_bug.cgi?id=44585 that produces incorrect DWARF expressions when using safestack. Would you mind taking a look? Thanks.

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

case Intrinsic::dbg_value: {
     const DbgValueInst &DI = cast<DbgValueInst>(CI);
     const Value *V = DI.getValue();
     assert(DI.getVariable()->isValidLocationForIntrinsic(
                MIRBuilder.getDebugLoc()) &&
            "Expected inlined-at fields to agree");
     if (!V) {
       // Currently the optimizer can produce this; insert an undef to
       // help debugging.  Probably the optimizer should not do this.
-      MIRBuilder.buildIndirectDbgValue(0, DI.getVariable(), DI.getExpression());
+      MIRBuilder.buildDirectDbgValue(0, DI.getVariable(), DI.getExpression());
     } else if (const auto *CI = dyn_cast<Constant>(V)) {
       MIRBuilder.buildConstDbgValue(*CI, DI.getVariable(), DI.getExpression());
     } else {
       for (Register Reg : getOrCreateVRegs(*V)) {
         // FIXME: This does not handle register-indirect values at offset 0. The
         // direct/indirect thing shouldn't really be handled by something as
         // implicit as reg+noreg vs reg+imm in the first place, but it seems
         // pretty baked in right now.

llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

 MachineInstrBuilder
 MachineIRBuilder::buildIndirectDbgValue(Register Reg, const MDNode *Variable,
                                         const MDNode *Expr) {
   assert(isa<DILocalVariable>(Variable) && "not a variable");
   assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
   assert(
       cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(getDL()) &&
       "Expected inlined-at fields to agree");
+  // DBG_VALUE insts now carry IR-level indirection in their DIExpression
+  // rather than encoding it in the instruction itself.
+  const DIExpression *DIExpr = cast<DIExpression>(Expr);
+  DIExpr = DIExpression::append(DIExpr, {dwarf::DW_OP_deref});
   return insertInstr(BuildMI(getMF(), getDL(),
                              getTII().get(TargetOpcode::DBG_VALUE),
-                             /*IsIndirect*/ true, Reg, Variable, Expr));
+                             /*IsIndirect*/ false, Reg, Variable, DIExpr));
 }
 
 MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI,
                                                       const MDNode *Variable,
                                                       const MDNode *Expr) {
   assert(isa<DILocalVariable>(Variable) && "not a variable");
   assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
   assert(
       cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(getDL()) &&
       "Expected inlined-at fields to agree");
+  // DBG_VALUE insts now carry IR-level indirection in their DIExpression
+  // rather than encoding it in the instruction itself.
+  const DIExpression *DIExpr = cast<DIExpression>(Expr);
+  DIExpr = DIExpression::append(DIExpr, {dwarf::DW_OP_deref});
   return buildInstr(TargetOpcode::DBG_VALUE)
       .addFrameIndex(FI)
-      .addImm(0)
+      .addReg(0)
       .addMetadata(Variable)
-      .addMetadata(Expr);
+      .addMetadata(DIExpr);
 }
 
 MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C,
                                                          const MDNode *Variable,
                                                          const MDNode *Expr) {
   assert(isa<DILocalVariable>(Variable) && "not a variable");
   assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
   assert(
       cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(getDL()) &&
       "Expected inlined-at fields to agree");
   auto MIB = buildInstr(TargetOpcode::DBG_VALUE);
   if (auto *CI = dyn_cast<ConstantInt>(&C)) {
     if (CI->getBitWidth() > 64)
       MIB.addCImm(CI);
     else
       MIB.addImm(CI->getZExtValue());
   } else if (auto *CFP = dyn_cast<ConstantFP>(&C)) {
     MIB.addFPImm(CFP);
   } else {
     // Insert %noreg if we didn't find a usable constant and had to drop it.
     MIB.addReg(0U);
   }
 
-  return MIB.addImm(0).addMetadata(Variable).addMetadata(Expr);
+  return MIB.addReg(0).addMetadata(Variable).addMetadata(Expr);
 }
 
 MachineInstrBuilder MachineIRBuilder::buildDbgLabel(const MDNode *Label) {
   assert(isa<DILabel>(Label) && "not a label");
   assert(cast<DILabel>(Label)->isValidLocationForIntrinsic(State.DL) &&
          "Expected inlined-at fields to agree");
   auto MIB = buildInstr(TargetOpcode::DBG_LABEL);
 

llvm/lib/CodeGen/LiveDebugVariables.cpp

 }
 
 enum : unsigned { UndefLocNo = ~0U };
 
 /// Describes a location by number along with some flags about the original
 /// usage of the location.
 class DbgValueLocation {
 public:
-  DbgValueLocation(unsigned LocNo, bool WasIndirect)
-      : LocNo(LocNo), WasIndirect(WasIndirect) {
+  DbgValueLocation(unsigned LocNo)
+      : LocNo(LocNo) {
     static_assert(sizeof(*this) == sizeof(unsigned), "bad bitfield packing");
     assert(locNo() == LocNo && "location truncation");
   }
 
-  DbgValueLocation() : LocNo(0), WasIndirect(0) {}
+  DbgValueLocation() : LocNo(0) {}
 
   unsigned locNo() const {
     // Fix up the undef location number, which gets truncated.
     return LocNo == INT_MAX ? UndefLocNo : LocNo;
   }
-  bool wasIndirect() const { return WasIndirect; }
   bool isUndef() const { return locNo() == UndefLocNo; }
 
   DbgValueLocation changeLocNo(unsigned NewLocNo) const {
-    return DbgValueLocation(NewLocNo, WasIndirect);
+    return DbgValueLocation(NewLocNo);
   }
 
   friend inline bool operator==(const DbgValueLocation &LHS,
                                 const DbgValueLocation &RHS) {
-    return LHS.LocNo == RHS.LocNo && LHS.WasIndirect == RHS.WasIndirect;
+    return LHS.LocNo == RHS.LocNo;
   }
 
   friend inline bool operator!=(const DbgValueLocation &LHS,
                                 const DbgValueLocation &RHS) {
     return !(LHS == RHS);
   }
 
 private:
-  unsigned LocNo : 31;
-  unsigned WasIndirect : 1;
+  unsigned LocNo;
 };
 
 /// Map of where a user value is live, and its location.
 using LocMap = IntervalMap<SlotIndex, DbgValueLocation, 4>;
 
 /// Map of stack slot offsets for spilled locations.
 /// Non-spilled locations are not added to the map.
 using SpillOffsetMap = DenseMap<unsigned, unsigned>;
unsigned getLocationNo(const MachineOperand &LocMO) {
     }
     return locations.size() - 1;
   }
 
   /// Ensure that all virtual register locations are mapped.
   void mapVirtRegs(LDVImpl *LDV);
 
   /// Add a definition point to this value.
-  void addDef(SlotIndex Idx, const MachineOperand &LocMO, bool IsIndirect) {
-    DbgValueLocation Loc(getLocationNo(LocMO), IsIndirect);
+  void addDef(SlotIndex Idx, const MachineOperand &LocMO) {
+    DbgValueLocation Loc(getLocationNo(LocMO));
     // Add a singular (Idx,Idx) -> Loc mapping.
     LocMap::iterator I = locInts.find(Idx);
     if (!I.valid() || I.start() != Idx)
       I.insert(Idx, Idx.getNextSlot(), Loc);
     else
       // A later DBG_VALUE at the same SlotIndex overrides the old location.
       I.setValue(Loc);
   }
void extendDef(SlotIndex Idx, DbgValueLocation Loc,
                  LiveIntervals &LIS);
 
   /// The value in LI/LocNo may be copies to other registers. Determine if
   /// any of the copies are available at the kill points, and add defs if
   /// possible.
   ///
   /// \param LI Scan for copies of the value in LI->reg.
   /// \param LocNo Location number of LI->reg.
-  /// \param WasIndirect Indicates if the original use of LI->reg was indirect
   /// \param Kills Points where the range of LocNo could be extended.
   /// \param [in,out] NewDefs Append (Idx, LocNo) of inserted defs here.
   void addDefsFromCopies(
-      LiveInterval *LI, unsigned LocNo, bool WasIndirect,
+      LiveInterval *LI, unsigned LocNo,
       const SmallVectorImpl<SlotIndex> &Kills,
       SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs,
       MachineRegisterInfo &MRI, LiveIntervals &LIS);
 
   /// Compute the live intervals of all locations after collecting all their
   /// def points.
   void computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
                         LiveIntervals &LIS, LexicalScopes &LS);
void UserValue::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
 
   OS << "\"\t";
   for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
     OS << " [" << I.start() << ';' << I.stop() << "):";
     if (I.value().isUndef())
       OS << "undef";
     else {
       OS << I.value().locNo();
-      if (I.value().wasIndirect())
-        OS << " ind";
     }
   }
   for (unsigned i = 0, e = locations.size(); i != e; ++i) {
     OS << " Loc" << i << '=';
     locations[i].print(OS, TRI);
   }
   OS << '\n';
 }
if (!LIS->hasInterval(Reg)) {
         Discard = true;
         LLVM_DEBUG(dbgs() << "Discarding debug info (reg not live): " << Idx
                           << " " << MI);
       }
     }
   }
 
   // Get or create the UserValue for (variable,offset) here.
-  bool IsIndirect = MI.getOperand(1).isImm();
-  if (IsIndirect)
-    assert(MI.getOperand(1).getImm() == 0 && "DBG_VALUE with nonzero offset");
+  assert(!MI.getOperand(1).isImm() && "DBG_VALUE with indirect flag before "
+                                      "LiveDebugVariables");
   const DILocalVariable *Var = MI.getDebugVariable();
   const DIExpression *Expr = MI.getDebugExpression();
   UserValue *UV =
       getUserValue(Var, Expr, MI.getDebugLoc());
   if (!Discard)
-    UV->addDef(Idx, MI.getOperand(0), IsIndirect);
+    UV->addDef(Idx, MI.getOperand(0));
   else {
     MachineOperand MO = MachineOperand::CreateReg(0U, false);
     MO.setIsDebug();
-    UV->addDef(Idx, MO, false);
+    UV->addDef(Idx, MO);
   }
   return true;
 }
 
 bool LDVImpl::handleDebugLabel(MachineInstr &MI, SlotIndex Idx) {
   // DBG_LABEL label
   if (MI.getNumOperands() != 1 || !MI.getOperand(0).isMetadata()) {
     LLVM_DEBUG(dbgs() << "Can't handle " << MI);
void UserValue::extendDef(SlotIndex Idx, DbgValueLocation Loc, LiveRange *LR,
   else if (!ToEnd && Kills)
     Kills->push_back(Stop);
 
   if (Start < Stop)
     I.insert(Start, Stop, Loc);
 }
 
 void UserValue::addDefsFromCopies(
-    LiveInterval *LI, unsigned LocNo, bool WasIndirect,
+    LiveInterval *LI, unsigned LocNo,
     const SmallVectorImpl<SlotIndex> &Kills,
     SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs,
     MachineRegisterInfo &MRI, LiveIntervals &LIS) {
   if (Kills.empty())
     return;
   // Don't track copies from physregs, there are too many uses.
   if (!Register::isVirtualRegister(LI->reg))
     return;
for (unsigned j = 0, e = CopyValues.size(); j != e; ++j) {
       LocMap::iterator I = locInts.find(Idx);
       if (I.valid() && I.start() <= Idx)
         continue;
       LLVM_DEBUG(dbgs() << "Kill at " << Idx << " covered by valno #"
                         << DstVNI->id << " in " << *DstLI << '\n');
       MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def);
       assert(CopyMI && CopyMI->isCopy() && "Bad copy value");
       unsigned LocNo = getLocationNo(CopyMI->getOperand(0));
-      DbgValueLocation NewLoc(LocNo, WasIndirect);
+      DbgValueLocation NewLoc(LocNo);
       I.insert(Idx, Idx.getNextSlot(), NewLoc);
       NewDefs.push_back(std::make_pair(Idx, NewLoc));
       break;
     }
   }
 }
 
 void UserValue::computeIntervals(MachineRegisterInfo &MRI,
if (Register::isVirtualRegister(LocMO.getReg())) {
       // if the original location for example is %vreg0:sub_hi, and we find a
       // full register copy in addDefsFromCopies (at the moment it only handles
       // full register copies), then we must add the sub1 sub-register index to
       // the new location. However, that is only possible if the new virtual
       // register is of the same regclass (or if there is an equivalent
       // sub-register in that regclass). For now, simply skip handling copies if
       // a sub-register is involved.
       if (LI && !LocMO.getSubReg())
-        addDefsFromCopies(LI, Loc.locNo(), Loc.wasIndirect(), Kills, Defs, MRI,
-                          LIS);
+        addDefsFromCopies(LI, Loc.locNo(), Kills, Defs, MRI, LIS);
       continue;
     }
 
     // For physregs, we only mark the start slot idx. DwarfDebug will see it
     // as if the DBG_VALUE is valid up until the end of the basic block, or
     // the next def of the physical register. So we do not need to extend the
     // range. It might actually happen that the DBG_VALUE is the last use of
     // the physical register (e.g. if this is an unused input argument to a
assert(cast<DILocalVariable>(Variable)
              ->isValidLocationForIntrinsic(getDebugLoc()) &&
          "Expected inlined-at fields to agree");
 
   // If the location was spilled, the new DBG_VALUE will be indirect. If the
   // original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
   // that the original virtual register was a pointer. Also, add the stack slot
   // offset for the spilled register to the expression.
   const DIExpression *Expr = Expression;
-  uint8_t DIExprFlags = DIExpression::ApplyOffset;
-  bool IsIndirect = Loc.wasIndirect();
-  if (Spilled) {
-    if (IsIndirect)
-      DIExprFlags |= DIExpression::DerefAfter;
-    Expr =
-        DIExpression::prepend(Expr, DIExprFlags, SpillOffset);
-    IsIndirect = true;
-  }
+  if (Spilled)
+    Expr = DIExpression::prepend(Expr, DIExpression::ApplyOffset, SpillOffset);
 
   assert((!Spilled || MO.isFI()) && "a spilled location must be a frame index");
 
   do {
     BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
-            IsIndirect, MO, Variable, Expr);
+            Spilled, MO, Variable, Expr);
 
     // Continue and insert DBG_VALUES after every redefinition of register
     // associated with the debug value within the range
     I = findNextInsertLocation(MBB, I, StopIdx, MO, LIS, TRI);
   } while (I != MBB->end());
 }
 
 void UserLabel::insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx,

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

if (!Op && !Address->use_empty() && isa<Instruction>(Address) &&
       Op = MachineOperand::CreateReg(FuncInfo.InitializeRegForValue(Address),
                                      false);
 
     if (Op) {
       assert(DI->getVariable()->isValidLocationForIntrinsic(DbgLoc) &&
              "Expected inlined-at fields to agree");
       // A dbg.declare describes the address of a source variable, so lower it
       // into an indirect DBG_VALUE.
+      auto *Expr = DI->getExpression();
+      Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
-              TII.get(TargetOpcode::DBG_VALUE), /*IsIndirect*/ true,
-              *Op, DI->getVariable(), DI->getExpression());
+              TII.get(TargetOpcode::DBG_VALUE), /*IsIndirect*/ false,
+              *Op, DI->getVariable(), Expr);
     } else {
       // We can't yet handle anything else here because it would require
       // generating code, thus altering codegen because of debug info.
       LLVM_DEBUG(dbgs() << "Dropping debug info for " << *DI << "\n");
     }
     return true;
   }
   case Intrinsic::dbg_value: {
     // This form of DBG_VALUE is target-independent.
     const DbgValueInst *DI = cast<DbgValueInst>(II);
     const MCInstrDesc &II = TII.get(TargetOpcode::DBG_VALUE);
     const Value *V = DI->getValue();
     assert(DI->getVariable()->isValidLocationForIntrinsic(DbgLoc) &&
            "Expected inlined-at fields to agree");
     if (!V) {
       // Currently the optimizer can produce this; insert an undef to
       // help debugging.  Probably the optimizer should not do this.
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, false, 0U,
               DI->getVariable(), DI->getExpression());
     } else if (const auto *CI = dyn_cast<ConstantInt>(V)) {
       if (CI->getBitWidth() > 64)
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
             .addCImm(CI)
-            .addImm(0U)
+            .addReg(0U)
             .addMetadata(DI->getVariable())
             .addMetadata(DI->getExpression());
       else
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
             .addImm(CI->getZExtValue())
-            .addImm(0U)
+            .addReg(0U)
             .addMetadata(DI->getVariable())
             .addMetadata(DI->getExpression());
     } else if (const auto *CF = dyn_cast<ConstantFP>(V)) {
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
           .addFPImm(CF)
-          .addImm(0U)
+          .addReg(0U)
           .addMetadata(DI->getVariable())
           .addMetadata(DI->getExpression());
     } else if (unsigned Reg = lookUpRegForValue(V)) {
       // FIXME: This does not handle register-indirect values at offset 0.
       bool IsIndirect = false;
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg,
               DI->getVariable(), DI->getExpression());
     } else {

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

 }
 
 /// EmitDbgValue - Generate machine instruction for a dbg_value node.
 ///
 MachineInstr *
 InstrEmitter::EmitDbgValue(SDDbgValue *SD,
                            DenseMap<SDValue, unsigned> &VRBaseMap) {
   MDNode *Var = SD->getVariable();
-  MDNode *Expr = SD->getExpression();
+  const DIExpression *Expr = SD->getExpression();
   DebugLoc DL = SD->getDebugLoc();
   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
          "Expected inlined-at fields to agree");
 
   SD->setIsEmitted();
 
   if (SD->isInvalidated()) {
     // An invalidated SDNode must generate an undef DBG_VALUE: although the
     // original value is no longer computed, earlier DBG_VALUEs live ranges
     // must not leak into later code.
     auto MIB = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE));
     MIB.addReg(0U);
     MIB.addReg(0U, RegState::Debug);
     MIB.addMetadata(Var);
     MIB.addMetadata(Expr);
     return &*MIB;
   }
 
   if (SD->getKind() == SDDbgValue::FRAMEIX) {
     // Stack address; this needs to be lowered in target-dependent fashion.
     // EmitTargetCodeForFrameDebugValue is responsible for allocation.
     auto FrameMI = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE))
                        .addFrameIndex(SD->getFrameIx());
+
     if (SD->isIndirect())
-      // Push [fi + 0] onto the DIExpression stack.
-      FrameMI.addImm(0);
-    else
-      // Push fi onto the DIExpression stack.
-      FrameMI.addReg(0);
+      Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
+
     return FrameMI.addMetadata(Var).addMetadata(Expr);
   }
   // Otherwise, we're going to create an instruction here.
   const MCInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
   MachineInstrBuilder MIB = BuildMI(*MF, DL, II);
   if (SD->getKind() == SDDbgValue::SDNODE) {
     SDNode *Node = SD->getSDNode();
     SDValue Op = SDValue(Node, SD->getResNo());
if (SD->getKind() == SDDbgValue::SDNODE) {
     }
   } else {
     // Insert an Undef so we can see what we dropped.
     MIB.addReg(0U);
   }
 
   // Indirect addressing is indicated by an Imm as the second parameter.
   if (SD->isIndirect())
-    MIB.addImm(0U);
-  else
-    MIB.addReg(0U, RegState::Debug);
+    Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
+
 
   MIB.addMetadata(Var);
   MIB.addMetadata(Expr);
 
   return &*MIB;
 }
 
 MachineInstr *

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

if (!Op) {
     auto splitMultiRegDbgValue
       = [&](ArrayRef<std::pair<unsigned, unsigned>> SplitRegs) {
       unsigned Offset = 0;
       for (auto RegAndSize : SplitRegs) {
         auto FragmentExpr = DIExpression::createFragmentExpression(
           Expr, Offset, RegAndSize.second);
         if (!FragmentExpr)
           continue;
+        assert(!IsDbgDeclare && "DbgDeclare operand is not in memory?");
         FuncInfo.ArgDbgValues.push_back(
-          BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsDbgDeclare,
+          BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), false,
                   RegAndSize.first, Variable, *FragmentExpr));
         Offset += RegAndSize.second;
       }
     };
 
     // Check if ValueMap has reg number.
     DenseMap<const Value *, unsigned>::const_iterator
       VMI = FuncInfo.ValueMap.find(V);
bool SelectionDAGBuilder::EmitFuncArgumentDbgValue(
   }
 
   if (!Op)
     return false;
 
   assert(Variable->isValidLocationForIntrinsic(DL) &&
          "Expected inlined-at fields to agree");
   IsIndirect = (Op->isReg()) ? IsIndirect : true;
+  if (IsIndirect)
+    Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
   FuncInfo.ArgDbgValues.push_back(
-      BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsIndirect,
+      BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), false,
               *Op, Variable, Expr));
 
   return true;
 }
 
 /// Return the appropriate SDDbgValue based on N.
 SDDbgValue *SelectionDAGBuilder::getDbgValue(SDValue N,
                                              DILocalVariable *Variable,

llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll

 ; ModuleID = 'ntcopy.cpp'
 source_filename = "ntcopy.cpp"
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64-unknown-linux-gnu"
 
 %struct.NTCopy = type { i32 }
 
 ; CHECK-LABEL: name: _Z3foo6NTCopy
-; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24
+; CHECK: DBG_VALUE %{{[0-9]+}}(p0), $noreg, !23, !DIExpression(DW_OP_deref), debug-location !24
 ; Function Attrs: noinline nounwind optnone
 define dso_local i32 @_Z3foo6NTCopy(%struct.NTCopy* %o) #0 !dbg !7 {
 entry:
   call void @llvm.dbg.declare(metadata %struct.NTCopy* %o, metadata !23, metadata !DIExpression()), !dbg !24
   %x = getelementptr inbounds %struct.NTCopy, %struct.NTCopy* %o, i32 0, i32 0, !dbg !25
   %0 = load i32, i32* %x, align 4, !dbg !25
   ret i32 %0, !dbg !26
 }

llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll

 entry:
   %in.addr = alloca i32, align 4
   store i32 %in, i32* %in.addr, align 4
   call void @llvm.dbg.declare(metadata i32* %in.addr, metadata !11, metadata !DIExpression()), !dbg !12
   ret void, !dbg !12
 }
 
 ; CHECK-LABEL: name: debug_declare_vla
-; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15
+; CHECK: DBG_VALUE %{{[0-9]+}}(p0), $noreg, !14, !DIExpression(DW_OP_deref), debug-location !15
 define void @debug_declare_vla(i32 %in) #0 !dbg !13 {
 entry:
   %vla.addr = alloca i32, i32 %in
   call void @llvm.dbg.declare(metadata i32* %vla.addr, metadata !14, metadata !DIExpression()), !dbg !15
   ret void, !dbg !15
 }
 
 ; CHECK-LABEL: name: debug_value
 ; CHECK: [[IN:%[0-9]+]]:_(s32) = COPY $w0
 define void @debug_value(i32 %in) #0 !dbg !16 {
   %addr = alloca i32
 ; CHECK: DBG_VALUE [[IN]](s32), $noreg, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata i32 %in, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
   store i32 %in, i32* %addr
 ; CHECK: DBG_VALUE %1(p0), $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18
   call void @llvm.dbg.value(metadata i32* %addr, i64 0, metadata !17, metadata !DIExpression(DW_OP_deref)), !dbg !18
-; CHECK: DBG_VALUE 123, 0, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE 123, $noreg, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata i32 123, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
-; CHECK: DBG_VALUE float 1.000000e+00, 0, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE float 1.000000e+00, $noreg, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata float 1.000000e+00, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
-; CHECK: DBG_VALUE $noreg, 0, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE $noreg, $noreg, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata i32* null, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
   ret void
 }
 
 ; Function Attrs: nounwind readnone
 declare void @llvm.dbg.declare(metadata, metadata, metadata)
 declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
 

llvm/test/CodeGen/ARM/debug-info-arg.ll

 ; RUN: llc < %s | FileCheck %s
 ; Test to check argument y's debug info uses FI
 ; Radar 10048772
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32"
 target triple = "thumbv7-apple-ios"
 
 %struct.tag_s = type { i32, i32, i32 }
 
 define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "no-frame-pointer-elim"="true" !dbg !1 {
   tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, metadata !5, metadata !DIExpression()), !dbg !20
   tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21
   tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22
   tail call void @llvm.dbg.value(metadata i64 %y, metadata !17, metadata !DIExpression()), !dbg !23
-;CHECK: @DEBUG_VALUE: foo:y <- [DW_OP_plus_uconst 8] [$r7+0]
+;CHECK: @DEBUG_VALUE: foo:y <- [DW_OP_plus_uconst 8, DW_OP_deref] $r7
   tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, metadata !18, metadata !DIExpression()), !dbg !24
   tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, metadata !19, metadata !DIExpression()), !dbg !25
   %1 = icmp eq %struct.tag_s* %c, null, !dbg !26
   br i1 %1, label %3, label %2, !dbg !26
 
 ; <label>:2                                       ; preds = %0
   tail call void @foobar(i64 %x, i64 %y) nounwind, !dbg !28
   br label %3, !dbg !28

llvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll

 ; CHECK: id: 1, type: default, offset: 8, size: 4
 ; CHECK-NOT: id: 2
 ; CHECK-LABEL: stack:
 ;
 ; Finally check the resulting function body.
 ; We expect to find a DBG_VALUE refering to the metadata id for bar5, using the lowest
 ; of the two fixed stack offsets found earlier.
 ; CHECK-LABEL: body:
-; CHECK: DBG_VALUE $r1, 0, !17, !DIExpression(DW_OP_plus_uconst, 8)
+; CHECK: DBG_VALUE $r1, $noreg, !17, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_deref)
 entry:
   tail call void @llvm.dbg.value(metadata i64 %bar1, metadata !13, metadata !DIExpression()), !dbg !18
   tail call void @llvm.dbg.value(metadata i64 %bar2, metadata !14, metadata !DIExpression()), !dbg !19
   tail call void @llvm.dbg.value(metadata i64 %bar3, metadata !15, metadata !DIExpression()), !dbg !20
   tail call void @llvm.dbg.value(metadata i64 %bar4, metadata !16, metadata !DIExpression()), !dbg !21
   tail call void @llvm.dbg.value(metadata i64 %bar5, metadata !17, metadata !DIExpression()), !dbg !22
   %add = add nsw i64 %bar2, %bar1, !dbg !23
   %add1 = add nsw i64 %add, %bar3, !dbg !24

llvm/test/DebugInfo/ARM/PR16736.ll

 ; RUN: llc -filetype=asm < %s | FileCheck %s
 ; RUN: llc -filetype=obj < %s \
 ; RUN:   | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF
 ;
-; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}] [$r{{.*}}+0]
+; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}, DW_OP_deref] $r{{.*}}
 ; DWARF: DW_TAG_formal_parameter
 ; DWARF:       DW_AT_location
 ; DWARF-NEXT:    DW_OP_reg0 R0
 ; DWARF: DW_TAG_formal_parameter
 ; DWARF:       DW_AT_location
 ; DWARF-NEXT:    DW_OP_reg1 R1
 ; DWARF: DW_TAG_formal_parameter
 ; DWARF:       DW_AT_location

llvm/test/DebugInfo/ARM/float-stack-arg.ll

 ; that was compiled using -O1 -g -S -emit-llvm.
 ;
 ; Irrelevant metadata, e.g. information about %p[1-4], has been stripped.
 
 ; CHECK: ![[P5:[0-9]*]] = !DILocalVariable(name: "p5"
 
 define arm_aapcscc float @fn1(i32 %p1, i32 %p2, i32 %p3, i32 %p4, float returned %p5) #0 !dbg !7 {
 ; CHECK-LABEL: bb.0.entry:
-; CHECK-NEXT: DBG_VALUE %fixed-stack.0, 0, ![[P5]]
+; CHECK-NEXT: DBG_VALUE %fixed-stack.0, $noreg, ![[P5]], !DIExpression(DW_OP_deref)
 entry:
   call void @llvm.dbg.value(metadata float %p5, metadata !17, metadata !DIExpression()), !dbg !18
   ret float %p5, !dbg !19
 }
 
 ; Function Attrs: nounwind readnone speculatable
 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
 

llvm/test/DebugInfo/COFF/pieces.ll

 ; ASM:         .cv_loc 2 1 24 3                # t.c:24:3
 ; ASM:         movq    %rcx, %rax
 ; ASM: [[pad_left_tmp:\.Ltmp[0-9]+]]:
 ; ASM:         #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] $eax
 ; ASM:         retq
 
 
 ; ASM-LABEL: nested: # @nested
-; ASM:         #DEBUG_VALUE: nested:o <- [DW_OP_deref] [$rcx+0]
+; ASM:         #DEBUG_VALUE: nested:o <- [DW_OP_deref] $rcx
 ; ASM:         movl    12(%rcx), %eax
 ; ASM: [[p_start:\.Ltmp[0-9]+]]:
 ; ASM:         #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] $eax
 ; ASM:         retq
 
 ; ASM-LABEL: bitpiece_spill: # @bitpiece_spill
 ; ASM:         #DEBUG_VALUE: bitpiece_spill:o <- [DW_OP_LLVM_fragment 0 32] 0
 ; ASM:         xorl    %ecx, %ecx

 ; ASM:        .asciz  "p"
 ; ASM:        .cv_def_range    [[p_start]] .Lfunc_end3, subfield_reg, 17, 4
 
 ; OBJ-LABEL: GlobalProcIdSym {
 ; OBJ:         Kind: S_GPROC32_ID (0x1147)
 ; OBJ:         DisplayName: nested
 ; OBJ:       }
 ; OBJ:       LocalSym {
-; OBJ:         Type: Nested&
+; OBJ:         Type: Nested
 ; OBJ:         VarName: o
 ; OBJ:       }
 ; OBJ:       DefRangeRegisterRelSym {
 ; OBJ:         BaseRegister: RCX (0x14A)
 ; OBJ:         HasSpilledUDTMember: No
 ; OBJ:         OffsetInParent: 0
 ; OBJ:         BasePointerOffset: 0
 ; OBJ:         LocalVariableAddrRange {

 !65 = !{!66}
 !66 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !64, file: !1, line: 4, baseType: !67, size: 128, align: 32)
 !67 = !DICompositeType(tag: DW_TAG_array_type, baseType: !53, size: 128, align: 32, elements: !68)
 !68 = !{!69}
 !69 = !DISubrange(count: 2)
 !70 = !{!71, !72}
 !71 = !DILocalVariable(name: "o", arg: 1, scope: !61, file: !1, line: 27, type: !64)
 !72 = !DILocalVariable(name: "p", scope: !61, file: !1, line: 28, type: !53)
-!73 = !DIExpression(DW_OP_deref)
+!73 = !DIExpression()
 !74 = !DILocation(line: 27, column: 26, scope: !61)
 !75 = !DILocation(line: 28, column: 18, scope: !61)
 !76 = !DILocation(line: 28, column: 22, scope: !61)
 !77 = !DILocation(line: 29, column: 3, scope: !61)
 !78 = distinct !DISubprogram(name: "bitpiece_spill", scope: !1, file: !1, line: 32, type: !8, isLocal: false, isDefinition: true, scopeLine: 32, isOptimized: true, unit: !0, retainedNodes: !79)
 !79 = !{!80}
 !80 = !DILocalVariable(name: "o", scope: !78, file: !1, line: 33, type: !13)
 !81 = !DILocation(line: 33, column: 18, scope: !78)
 !82 = !DILocation(line: 33, column: 26, scope: !78)
 !83 = !DILocation(line: 35, column: 3, scope: !78)
 !84 = !{i32 603}
 !85 = !DILocation(line: 37, column: 3, scope: !78)

llvm/test/DebugInfo/X86/dbg-addr-dse.ll

 ; RUN: llc %s -o %t.s
 ; RUN: llvm-mc %t.s -filetype=obj -triple=x86_64-windows-msvc -o %t.o
 ; RUN: FileCheck %s < %t.s --check-prefix=ASM
 ; RUN: llvm-dwarfdump %t.o | FileCheck %s --check-prefix=DWARF
 
+; XFAIL: *
+; See PR41992, the third and final dbg.value disappears after
+; LiveDebugVariables.
+
 ; In this example, the variable lives mostly in memory, but at the point of the
 ; assignment to global, it lives nowhere, and is described as the constant
 ; value 1.
 
 ; C source:
 ;
 ; void escape(int *);
 ; extern int global;
entry:
   store i32 1, i32* @global, align 4, !dbg !22
   call void @llvm.dbg.addr(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !23
   store i32 2, i32* %x.addr, align 4, !dbg !23
   call void @escape(i32* %x.addr), !dbg !24
   ret void, !dbg !25
 }
 
 ; ASM-LABEL: f: # @f
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X:[0-9]+]]] [$rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X:[0-9]+]], DW_OP_deref] $rsp
 ; ASM: movl    %ecx, [[OFF_X]](%rsp)
 ; ASM: callq   escape
 ; ASM: #DEBUG_VALUE: f:x <- 1
 ; ASM: movl    $1, global(%rip)
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]], DW_OP_deref] $rsp
 ; ASM: movl    $2, [[OFF_X]](%rsp)
 ; ASM: callq   escape
 ; ASM: retq
 
 ; DWARF:      DW_TAG_formal_parameter
 ; DWARF-NEXT:   DW_AT_location        (0x00000000
 ; DWARF-NEXT:      {{[^:]*}}: DW_OP_breg7 RSP+{{[0-9]+}}
 ; DWARF-NEXT:      {{[^:]*}}: DW_OP_consts +1, DW_OP_stack_value

llvm/test/DebugInfo/X86/dbg-addr.ll

 ; RUN: llc %s -o %t.s
 ; RUN: llvm-mc -triple x86_64--linux %t.s -filetype=obj -o %t.o
 ; RUN: FileCheck < %t.s %s
 ; RUN: llvm-dwarfdump %t.o | FileCheck %s --check-prefix=DWARF
 
 ; Unlike dbg.declare, dbg.addr should be lowered to DBG_VALUE instructions. It
 ; is control-dependent.
 
 ; CHECK-LABEL: use_dbg_addr:
-; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [$rsp+0]
+; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [DW_OP_deref] $rsp
 
 ; DWARF: DW_TAG_variable
 ; DWARF-NEXT:              DW_AT_location (DW_OP_fbreg +0)
 ; DWARF-NEXT:              DW_AT_name ("o")
 
 
 ; ModuleID = 't.c'
 source_filename = "t.c"

llvm/test/DebugInfo/X86/live-debug-vars-dse.mir

 # RUN: llc -start-after=machine-scheduler %s -o - | FileCheck %s
 
+# XFAIL: *
+# See PR41992, the third and final dbg.value disappears after
+# LiveDebugVariables.
+
 # C source:
 # void escape(int *);
 # extern int global;
 # void f(int x) {
 #   escape(&x);
 #   x = 1;
 #   global = x;
 #   x = 2;
 #   escape(&x);
 # }
 
 # CHECK-LABEL: f: # @f
 # CHECK: movl    %ecx, [[OFF_X:[0-9]+]](%rsp)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]], DW_OP_deref] $rsp
 # CHECK: leaq [[OFF_X]](%rsp), %rsi
 # CHECK: callq   escape
 # CHECK: #DEBUG_VALUE: f:x <- 1
 # CHECK: movl    $1, global(%rip)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]], DW_OP_deref] $rsp
 # CHECK: movl    $2, [[OFF_X]](%rsp)
 # CHECK: callq   escape
 # CHECK: retq
 
 
 --- |
   ; ModuleID = '<stdin>'
   source_filename = "dse.c"
   target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-pc-windows-msvc19.0.24215"
   
   @global = external global i32, align 4
   
   ; Function Attrs: nounwind readnone speculatable
   declare void @llvm.dbg.value(metadata, metadata, metadata) #0
   
   declare void @escape(i32*)
   
   ; Function Attrs: nounwind uwtable
   define void @f(i32 %x) #1 !dbg !8 {
   entry:
     %x.addr = alloca i32, align 4
     store i32 %x, i32* %x.addr, align 4
-    call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !14
+    call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression(DW_OP_deref)), !dbg !14
     call void @escape(i32* %x.addr), !dbg !15
     call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()), !dbg !16
     store i32 1, i32* @global, align 4, !dbg !17
-    call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !18
+    call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression(DW_OP_deref)), !dbg !18
     store i32 2, i32* %x.addr, align 4, !dbg !18
     call void @escape(i32* %x.addr), !dbg !19
     ret void, !dbg !20
   }
   
   ; Function Attrs: nounwind
   declare void @llvm.stackprotector(i8*, i8**) #2
   
- { id: 0, name: x.addr, type: default, offset: 0, size: 4, alignment: 4,
       debug-info-expression: '', debug-info-location: '' }
 constants:       
 body:             |
   bb.0.entry:
     liveins: $ecx
   
     %0 = COPY $ecx
     MOV32mr %stack.0.x.addr, 1, _, 0, _, %0 :: (store 4 into %ir.x.addr)
-    DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !14
+    DBG_VALUE %stack.0.x.addr, $noreg, !13, !DIExpression(DW_OP_deref), debug-location !14
     ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15
     %1 = LEA64r %stack.0.x.addr, 1, _, 0, _
     $rcx = COPY %1, debug-location !15
     CALL64pcrel32 @escape, csr_win64, implicit $rsp, implicit $ssp, implicit $rcx, implicit-def $rsp, implicit-def $ssp, debug-location !15
     ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15
     DBG_VALUE 1, _, !13, !DIExpression(), debug-location !16
     MOV32mi $rip, 1, _, @global, _, 1, debug-location !17 :: (store 4 into @global)
-    DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !18
+    DBG_VALUE %stack.0.x.addr, $noreg, !13, !DIExpression(DW_OP_deref), debug-location !18
     MOV32mi %stack.0.x.addr, 1, _, 0, _, 2, debug-location !18 :: (store 4 into %ir.x.addr)
     ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !19
     $rcx = COPY %1, debug-location !19
     CALL64pcrel32 @escape, csr_win64, implicit $rsp, implicit $ssp, implicit $rcx, implicit-def $rsp, implicit-def $ssp, debug-location !19
     ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !19
     RET 0, debug-location !20
 
 ...

llvm/test/DebugInfo/X86/op_deref.ll

 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s -filetype=obj \
 ; RUN:     | llvm-dwarfdump -v -debug-info - \
 ; RUN:     | FileCheck %s -check-prefix=CHECK -check-prefix=DWARF4
 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s -filetype=obj -dwarf-version=3 \
 ; RUN:     | llvm-dwarfdump -v -debug-info - \
 ; RUN:     | FileCheck %s -check-prefix=CHECK -check-prefix=DWARF3
 
 ; DWARF4: DW_AT_location [DW_FORM_sec_offset]                      (0x00000000
-; DWARF4-NEXT:  {{.*}}: DW_OP_breg1 RDX+0, DW_OP_deref
+; DWARF4-NEXT:  {{.*}}: DW_OP_breg1 RDX+0{{$}}
+; DWARF4-NEXT:  {{.*}}: DW_OP_breg6 RBP-{{[0-9]+}}, DW_OP_deref)
 
 ; DWARF3: DW_AT_location [DW_FORM_data4]                      (0x00000000
-; DWARF3-NEXT:  {{.*}}: DW_OP_breg1 RDX+0, DW_OP_deref
+; DWARF3-NEXT:  {{.*}}: DW_OP_breg1 RDX+0{{$}}
+; DWARF3-NEXT:  {{.*}}: DW_OP_breg6 RBP-{{[0-9]+}}, DW_OP_deref)
 
 ; CHECK-NOT: DW_TAG
 ; CHECK: DW_AT_name [DW_FORM_strp]  ( .debug_str[0x00000067] = "vla")
 
 ; Check the DEBUG_VALUE comments for good measure.
 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
 ; vla should have a register-indirect address at one point.
-; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] [$rdx+0]
+; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] $rdx
+; vla ptr is spilt too, it should have a stack location,
+; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_constu {{[0-9]+}}, DW_OP_minus, DW_OP_deref] [$rbp+0]
 ; ASM-CHECK: DW_OP_breg1
 
 ; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s --check-prefix=PRETTY-PRINT
-; PRETTY-PRINT: DIExpression(DW_OP_deref)
+; PRETTY-PRINT: DIExpression()
 
 define void @testVLAwithSize(i32 %s) nounwind uwtable ssp !dbg !5 {
 entry:
   %s.addr = alloca i32, align 4
   %saved_stack = alloca i8*
   %i = alloca i32, align 4
   store i32 %s, i32* %s.addr, align 4
   call void @llvm.dbg.declare(metadata i32* %s.addr, metadata !10, metadata !DIExpression()), !dbg !11

 !22 = distinct !DILexicalBlock(line: 5, column: 3, file: !28, scope: !13)
 !23 = !DILocation(line: 6, column: 5, scope: !24)
 !24 = distinct !DILexicalBlock(line: 5, column: 27, file: !28, scope: !22)
 !25 = !DILocation(line: 7, column: 3, scope: !24)
 !26 = !DILocation(line: 5, column: 22, scope: !22)
 !27 = !DILocation(line: 8, column: 1, scope: !13)
 !28 = !DIFile(filename: "bar.c", directory: "/Users/echristo/tmp")
 !29 = !{i32 1, !"Debug Info Version", i32 3}
-!30 = !DIExpression(DW_OP_deref)
+!30 = !DIExpression()

llvm/test/DebugInfo/X86/parameters.ll

 
 ; CHECK: debug_info contents
 ; The parameter is accessed indirectly (with a zero offset) from the second
 ; register parameter. RDI is consumed by 'sret'.
 ; CHECK: DW_TAG_subprogram
 ; CHECK: DW_AT_name{{.*}} = "func"
 ; CHECK: DW_TAG_formal_parameter
 ; CHECK: DW_AT_location {{.*}}
-; CHECK-NEXT: DW_OP_breg4 RSI+0, DW_OP_deref
+; CHECK-NEXT: DW_OP_breg4 RSI+0)
 ; CHECK-NOT: DW_TAG
 ; CHECK: DW_AT_name{{.*}} = "f"
 
 ; CHECK: DW_TAG_subprogram
 ; CHECK: DW_AT_name{{.*}} = "func2"
 ; CHECK: DW_TAG_formal_parameter
 ; CHECK: DW_AT_location{{.*}}(DW_OP_fbreg +23)
 ; CHECK: DW_TAG_formal_parameter
 ; CHECK: DW_AT_location{{.*}}(
-; CHECK-NEXT: {{.*}}: DW_OP_breg4 RSI+0, DW_OP_deref
-; CHECK-NEXT: {{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref, DW_OP_deref)
+; CHECK-NEXT: {{.*}}: DW_OP_breg4 RSI+0{{$}}
+; CHECK-NEXT: {{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref)
 ; CHECK-NOT: DW_TAG
 ; CHECK: DW_AT_name{{.*}} = "g"
 
 %"struct.pr14763::foo" = type { i8 }
 
 ; Function Attrs: uwtable
 define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 !dbg !4 {
 entry:
-  call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !DIExpression(DW_OP_deref)), !dbg !24
+  call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !DIExpression()), !dbg !24
   call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25
   ret void, !dbg !25
 }
 
 ; Function Attrs: nounwind readnone
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 declare void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"*, %"struct.pr14763::foo"*) #2
 
 ; Function Attrs: uwtable
 define void @_ZN7pr147635func2EbNS_3fooE(i1 zeroext %b, %"struct.pr14763::foo"* %g) #0 !dbg !17 {
 entry:
   %b.addr = alloca i8, align 1
   %frombool = zext i1 %b to i8
   store i8 %frombool, i8* %b.addr, align 1
   call void @llvm.dbg.declare(metadata i8* %b.addr, metadata !26, metadata !DIExpression()), !dbg !27
-  call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %g, metadata !28, metadata !DIExpression(DW_OP_deref)), !dbg !27
+  call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %g, metadata !28, metadata !DIExpression()), !dbg !27
   %0 = load i8, i8* %b.addr, align 1, !dbg !29
   %tobool = trunc i8 %0 to i1, !dbg !29
   br i1 %tobool, label %if.then, label %if.end, !dbg !29
 
 if.then:                                          ; preds = %entry
   %1 = bitcast %"struct.pr14763::foo"* %g to i8*, !dbg !31
   call void @_ZN7pr147634sinkEPv(i8* %1), !dbg !31
   br label %if.end, !dbg !31

llvm/test/DebugInfo/X86/safestack-byval.ll

 ; Test dwarf codegen for DILocalVariable of a byval function argument that
 ; points to neither an argument nor an alloca. This kind of IR is generated by
 ; SafeStack for unsafe byval arguments.
 ; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after finalize-isel %s -o - | FileCheck %s
 
 ; This was built by compiling the following source with SafeStack and
 ; simplifying the result a little.
 ; struct S {
 ;   int a[100];
 ; };
 ;
 ; int f(S zzz, unsigned long len) {
 ;   return zzz.a[len];
 ; }
 
 ; CHECK: ![[ZZZ:.*]] = !DILocalVariable(name: "zzz",
-; CHECK: DBG_VALUE {{.*}} ![[ZZZ]], !DIExpression(DW_OP_deref, DW_OP_constu, 400, DW_OP_minus)
+; CHECK: DBG_VALUE {{.*}} ![[ZZZ]], !DIExpression(DW_OP_constu, 400, DW_OP_minus, DW_OP_deref)
 
 %struct.S = type { [100 x i32] }
 
 @__safestack_unsafe_stack_ptr = external thread_local(initialexec) global i8*
 
 ; Function Attrs: norecurse nounwind readonly safestack uwtable
 define i32 @_Z1f1Sm(%struct.S* byval nocapture readonly align 8 %zzz, i64 %len) #0 !dbg !12 {
 entry:

 !15 = !DIBasicType(name: "long unsigned int", size: 64, align: 64, encoding: DW_ATE_unsigned)
 !16 = !{!17, !18}
 !17 = !DILocalVariable(name: "zzz", arg: 1, scope: !12, file: !1, line: 8, type: !4)
 !18 = !DILocalVariable(name: "len", arg: 2, scope: !12, file: !1, line: 8, type: !15)
 !19 = !{i32 2, !"Dwarf Version", i32 4}
 !20 = !{i32 2, !"Debug Info Version", i32 3}
 !21 = !{!"clang version 3.8.0 (trunk 254107) (llvm/trunk 254109)"}
 !22 = !DILocation(line: 8, column: 9, scope: !12)
-!23 = !DIExpression(DW_OP_deref, DW_OP_constu, 400, DW_OP_minus)
+!23 = !DIExpression(DW_OP_constu, 400, DW_OP_minus)
 !24 = !DILocation(line: 8, column: 28, scope: !12)
 !25 = !DIExpression()
 !26 = !DILocation(line: 9, column: 10, scope: !12)
 !27 = !{!28, !28, i64 0}
 !28 = !{!"int", !29, i64 0}
 !29 = !{!"omnipotent char", !30, i64 0}
 !30 = !{!"Simple C/C++ TBAA"}
 !31 = !DILocation(line: 9, column: 3, scope: !12)

llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll

 ; };
 ; string get_string() {
 ;   string result = 3;
 ;   FORCE_SPILL();
 ;   return result;
 ; }
 
 ; CHECK-LABEL: _Z10get_stringv:
-; CHECK: #DEBUG_VALUE: get_string:result <- [$rdi+0]
+; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_deref] $rdi
 ; CHECK: movq   %rdi, [[OFFS:[0-9]+]](%rsp)          # 8-byte Spill
 ; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [$rsp+0]
 ; CHECK: callq  _ZN6stringC1Ei
 ; CHECK: #APP
 ; CHECK: #NO_APP
 
 ; ModuleID = 't.cpp'
 source_filename = "t.cpp"

llvm/test/DebugInfo/X86/spill-nontrivial-param.ll

 ;   int i;
 ; };
 ; int foo(NonTrivial nt) {
 ;   FORCE_SPILL();
 ;   return nt.i;
 ; }
 
 ; CHECK-LABEL: _Z3foo10NonTrivial:
-; CHECK: #DEBUG_VALUE: foo:nt <- [$rdi+0]
+; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_deref] $rdi
 ; CHECK: movq    %rdi, -8(%rsp)          # 8-byte Spill
 ; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [$rsp+0]
 ; CHECK: #APP
 ; CHECK: #NO_APP
 ; CHECK: movq    -8(%rsp), %rax          # 8-byte Reload
 ; CHECK: movl    (%rax), %eax
 
 ; ModuleID = 't.cpp'

llvm/test/DebugInfo/X86/vla.ll

 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=obj %s -o - | llvm-dwarfdump - --name=a | FileCheck --check-prefix=OBJFILE %s
+; REQUIRES: object-emission
+;
 ; Ensure that we generate an indirect location for the variable length array a.
-; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] [{{\$r[a-z]+}}+0]
+;
+; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] {{\$r[a-z]+}}
 ; CHECK: DW_OP_breg{{[0-9]}}
+;
+; Ensure there's only one level of indirection in the vla location -- it should
+; be a memory location. Base register can be any allocatable one; variables are
+; filtered by --name arg to llvm-dwarfdump.
+;
+; OBJFILE: DW_TAG_variable
+; OBJFILE: DW_AT_location
+; OBJFILE-NEXT: ): DW_OP_breg{{[0-9]+}} R{{[0-9A-Z]+}}+0)
+; OBJFILE: DW_AT_name ("a")
+;
 ; rdar://problem/13658587
 ;
 ; generated from:
 ;
 ; int vla(int n) {
 ;   int a[n];
 ;   a[0] = 42;
 ;   return a[n-1];
entry:
   %cleanup.dest.slot = alloca i32
   store i32 %n, i32* %n.addr, align 4
   call void @llvm.dbg.declare(metadata i32* %n.addr, metadata !15, metadata !DIExpression()), !dbg !16
   %0 = load i32, i32* %n.addr, align 4, !dbg !17
   %1 = zext i32 %0 to i64, !dbg !17
   %2 = call i8* @llvm.stacksave(), !dbg !17
   store i8* %2, i8** %saved_stack, !dbg !17
   %vla = alloca i32, i64 %1, align 16, !dbg !17
-  call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !17
+  call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !DIExpression()), !dbg !17
   %arrayidx = getelementptr inbounds i32, i32* %vla, i64 0, !dbg !22
   store i32 42, i32* %arrayidx, align 4, !dbg !22
   %3 = load i32, i32* %n.addr, align 4, !dbg !23
   %sub = sub nsw i32 %3, 1, !dbg !23
   %idxprom = sext i32 %sub to i64, !dbg !23
   %arrayidx1 = getelementptr inbounds i32, i32* %vla, i64 %idxprom, !dbg !23
   %4 = load i32, i32* %arrayidx1, align 4, !dbg !23
   store i32 1, i32* %cleanup.dest.slot