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[clang] [RISC-V] Add validation for inline assembly constraints
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Authored by mhorne on Apr 24 2019, 3:14 PM.

Details

Summary

GCC supports a small number of RISC-V specific inline assembly
constraints, while currently clang only supports the machine independent
ones for RISC-V targets. Add parsing for these constraints, based on
their descriptions in the GCC documentation [1].

[1] https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints

Event Timeline

mhorne created this revision.Apr 24 2019, 3:14 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 24 2019, 3:14 PM

Apologies if I didn't tag the right reviewers; I took a look at those who seemed to be most involved with the RISC-V target, but if there's anyone more appropriate to review clang changes then feel free to add them instead :)

mhorne abandoned this revision.Aug 26 2019, 5:54 PM

This has been handled more correctly and completely with recent patches.