[MIPS] Handle cross-mode (regular <-> microMIPS) jumps

[atanasyan]

Summary

1. MIPS ABI allows to mix regular and microMIPS code and perform cross-mode jumps. Linker needs to detect such cases and replace jump/branch instructions by their cross-mode equivalents.

2. Other tools like dunamic linkers need to recognize cases when dynamic table entries, e_entry field of an ELF header etc point to microMIPS symbol. Linker should provide such information.

The first task is implemented in the MIPS<ELFT>::relocateOne() method. New routine fixupCrossModeJump detects ISA mode change, checks and replaces an instruction.

The main problem is how to recognize that relocation target is microMIPS symbol. For absolute and section symbols compiler or assembler set the less-significant bit of the symbol's value or sum of the symbol's value and addend. And this bit signals to linker about microMIPS code. For global symbols compiler cannot do the same trick because other tools like, for example, disassembler wants to know an actual position of the symbol. So compiler sets STO_MIPS_MICROMIPS flag in the st_other field.

In MIPS<ELFT>::relocateOne() method we have a symbol's value only and cannot access any symbol's attributes. To pass type of the symbol (regular/microMIPS) to that routine as well as other places where we write a symbol value as-is (.dynamic section, Elf_Ehdr::e_entry field etc) we set when necessary a less-significant bit in the getSymVA function.

[ruiu]

ELF/Arch/Mips.cpp

459 ↗

(On Diff #123236)

Can you write default at end?

482 ↗

(On Diff #123236)

This needs a comment so that not only a person who understand the details of MIPS ABI can edit this function.

[ruiu]

ELF/Symbols.cpp

107 ↗

(On Diff #123236)

I do understand why you need this by reading comment, but doing this in this function doesn't feel right. This function returns an address of a symbol, and the tag whether the target is microMIPS or not is not logically part of its address. Can't you do this when you apply relocations?

[atanasyan]

ELF/Arch/Mips.cpp

459 ↗

(On Diff #123236)

Can you write default at end?

Will do.

482 ↗

(On Diff #123236)

This needs a comment so that not only a person who understand the details of MIPS ABI can edit this function.

OK

ELF/Symbols.cpp

107 ↗

(On Diff #123236)

Can't you do this when you apply relocations?

I had such patch. In that case we need:

• Add the less-significant bit in the InputSectionBase::relocateAlloc() or getRelocTargetVA before calling the relocateOne. We can't do that in the MIPS::relocateOne because we do not have any information about target there.
• Add the less-significant bit in the Writer::getEntryAddr. The Elf_Ehdr::e_entry field holds just a value so we have to signal a loader that the entry symbol is microMIPS.
• Add the less-significant bit in the DynamicSection::writeTo. By the same reason as above.

This way looks more correct, but introduces more changes in the code. Do you think it's acceptable?

[atanasyan]

In this variant of the patch I do not modify the getSymVA function. Instead of that the less-significant bit is configured right before using in the following methods:

• InputSection::relocateNonAlloc
• InputSectionBase::relocateAlloc
• DynamicSection<ELFT>::addSym
• Writer<ELFT>::getEntryAddr

It's more correct solution but it adds more if (MIPS) statements in the code.

[atanasyan]

• Updated the patch against the trunk.

[ruiu]

ELF/Arch/Mips.cpp

491 ↗

(On Diff #128847)

I'd return a new Val instead of mutating a given value through a pointer.

ELF/InputSection.cpp

686–689 ↗

(On Diff #128847)

Is this really unavaoidable to add this MIPS-specific code to this generic function?

723 ↗

(On Diff #128847)

Ditto -- adding more code to this function makes this function hard to understand.

ELF/SyntheticSections.cpp

1025 ↗

(On Diff #128847)

Ditto

[atanasyan]

ELF/Arch/Mips.cpp

491 ↗

(On Diff #128847)

OK

ELF/InputSection.cpp

686–689 ↗

(On Diff #128847)

There are alternatives:

• Setup the bit in the getSymVA or in the Symbol::getVA like I did in the first version of the patch.
• Pass more information about the symbol to the relocateOne routine and setup the bit there.
• Create and use R_MICROMIPS_xxx relocations expressions. In that case we need to add 5-7 new expressions.

I could try to create a patch with the third solution if you think it might make a sense.

ELF/SyntheticSections.cpp

1025 ↗

(On Diff #128847)

When dynamic linker reads "symbol" tags it needs to know a type of the symbol to use, for example, a correct instruction for jumping. It gets a symbol's value only so we have to setup the less-significant bit to pass the symbol's type to it. The first alternative solution is to setup the bit in every place where we call DynamicSection<ELFT>::addSym. The second alternative is to setup the bit in the getSymVA or in the Symbol::getVA.

[atanasyan]

One more variant of the patch. The if Mips code were removed from InputSectionBase::relocate and InputSection::relocateNonAlloc methods. Now the less-significant bit is configured in the getRelocTargetVA routine. I could not remove Mips-ness from DynamicSection<ELFT>::addSym and Writer<ELFT>::getEntryAddr because if an e_entry field or a dynamic table entry contains microMIPS symbol value this value should have the less-significant bit to notify loader / dynamic-linker about the symbol's type.

[atanasyan]

Ping?

[atanasyan]

Ping?

[ruiu]

Sorry for the belated response. A few minor comments.

ELF/InputSection.cpp

458 ↗

(On Diff #132118)

Please add comment so that people who don't know about MIPS can change this code and this file.

685 ↗

(On Diff #132118)

nit: add {}

ELF/SyntheticSections.cpp

1024 ↗

(On Diff #132118)

I'd move this if out of this lambda like this.

if (Config->EMachine == EM_MIPS && ...)
  Entries.push_back({Tag, [=] { return Sym->getVA() | 1; }});
else
  Entries.push_back({Tag, [=] { return Sym->getVA(); }});

1027–1029 ↗

(On Diff #132118)

I don't think people who don't know MIPS can understand this comment. Why does the reader (who is the reader?) has to know if it is MicroMIPS?

[atanasyan]

• Addressing review comments

[ruiu]

ELF/InputSection.cpp

469–474 ↗

(On Diff #134166)

Oh, thank you for writing this. I think I finally understand what it does correctly. So, you are using the least significant bit just to signal to the later pass that this is a MicroMIPS code, right? I was thinking that jump instructions jumping to MicroMIPS code must be marked with LSB 1, but it looks like you cleared the last bit, so the bit you set in this function is not used there. You set the least significant bit just to encode some information that is consumed in the later pass.

That makes me wonder if that's the best way of doing that. Apparently, the side effect of embedding some information to the address isn't negligible -- you needed to update a lot of places to set/unset the least significant bit. That doesn't seem like a good way to encode that kind of out-of-bound information. Address should be just an address.

What if you pass Symbol to relocateOne? Does this solve the issue? I'm not suggesting you do right now, but I'm wondering that's what you wanted to do.

[atanasyan]

• Pass a pointer to relocatable symbol to the relocateOne method
• Move handling of the less-significant bit from relocateNonAlloc and relocateAlloc to MIPS::relocateOne

[atanasyan]

Ping?

[atanasyan]

Ping?

[atanasyan]

Ping?

[atanasyan]

Ping? This patch got the last comment more than a month ago.

[atanasyan]

Ping?

[atanasyan]

Rebased against the trunk.

[atanasyan]

Ping?

This patch have not got any comments since Feb 16. Does it mean that the patch cab be committed without any additional approval?

[atanasyan]

Ping? I'm going to commit this patch in a couple of weeks if I do not receive any objections. We can always perform a post-commit review.

[atanasyan]

Rebased against the trunk.

[atanasyan]

Ping?

[atanasyan]

Ping?

[atanasyan]

Ping?

@ruiu could I use a post-commit review option in that case?

[emaste]

Perhaps someone else can review?

[MaskRay]

ELF/Arch/AArch64.cpp

46 ↗

(On Diff #145686)

I like this change.

With const Symbol *S, we can improve error reporting of relocation overflow of checkUInt(...)

[ruiu]

ELF/Arch/AArch64.cpp

46 ↗

(On Diff #145686)

Adding const Symbol * to relocateOne might be fine, but I don't like to add a default argument to the parameter. How many locations do we call relocateOne? Can we just always pass a symbol to the function?

[atanasyan]

• Rebase against the trunk
• Remove default nullptr value from the relocateOne method

[atanasyan]

• Really remove default nullptr argument value from the relocateOne method

[ruiu]

Adding a new parameter to relocateOne doesn't look beautiful, but that makes me think whether you are editing the right place of the code. relocateOne is supposed to apply a single relocation based on a value passed to the function. No complex logic should be in the function. Passing one more parameter so that you can do more complex computation in the function may not be a good idea.

[atanasyan]

In D40147#1308904, @ruiu wrote:

Adding a new parameter to relocateOne doesn't look beautiful, but that makes me think whether you are editing the right place of the code. relocateOne is supposed to apply a single relocation based on a value passed to the function. No complex logic should be in the function. Passing one more parameter so that you can do more complex computation in the function may not be a good idea.

That's interesting - you suggested to pass a Symbol to relocateOne on Feb 16.
https://reviews.llvm.org/D40147#inline-379274

I will try to implement an alternative solution. Maybe by updating one of initial patches.

[ruiu]

In D40147#1309748, @atanasyan wrote:

In D40147#1308904, @ruiu wrote:

Adding a new parameter to relocateOne doesn't look beautiful, but that makes me think whether you are editing the right place of the code. relocateOne is supposed to apply a single relocation based on a value passed to the function. No complex logic should be in the function. Passing one more parameter so that you can do more complex computation in the function may not be a good idea.

That's interesting - you suggested to pass a Symbol to relocateOne on Feb 16.
https://reviews.llvm.org/D40147#inline-379274

I will try to implement an alternative solution. Maybe by updating one of initial patches.

Yeah, sorry, but until code is actually written, I don't know whether it is going to look good or not, so I can suggest, but my suggestion is not a promise or anything.

[atanasyan]

• Remove new argument from relocateOne methods
• Introduce new helper function setMicroMipsBit and call it before the relocateOne

[atanasyan]

Gentle ping...

[atanasyan]

Gentle ping...

Any chance to get review this year or at least before 8.0 release?

[atanasyan]

Gentle ping...

[atanasyan]

Gentle ping...

[grimar]

I am pretty sure we can land this because having a patch on a review for about a year is always a terrible thing. My comments are inline.

ELF/InputSection.cpp

862 ↗

(On Diff #177778)

I wonder if this piece of code can be in MIPS::relocateOne ?

964 ↗

(On Diff #177778)

Same?

ELF/SyntheticSections.cpp

1256 ↗

(On Diff #177778)

The comment does not answer why we do that..

ELF/Writer.cpp

2296 ↗

(On Diff #177778)

Should it be in a getVA()?

test/ELF/mips-micro-bad-cross-calls.s

8 ↗

(On Diff #177778)

Please move the REQUIRES on the first line.

[atanasyan]

In D40147#1352518, @grimar wrote:

I am pretty sure we can land this because having a patch on a review for about a year is always a terrible thing. My comments are inline.

Thanks for review.

We cannot move call of setMicroMipsBit to the MIPS::relocateOne because the relocateOne does not have a reference to the "target" symbol. One possible solution is to extend the getVA() and getPltVA() routines and add a less-significant bit there when necessary. That eliminates almost all manipulations with the bit in other places and makes calls of the setMicroMipsBit routine unnecessary. It's interesting that this approach was implemented in the first version of this patch https://reviews.llvm.org/D40147?id=123236.

I will try to restore that version of the patch.

[atanasyan]

• Move the most part of manipulations with the less-significant bit to the getSymVA and Symbol::getPltVA() methods.

[grimar]

I am not a specialist in MIPS, but the code itself in this diff looks much better to me.

lld/ELF/Arch/Mips.cpp

471 ↗

(On Diff #185709)

I would rewrite this in a shorter way:

return Type == R_MIPS_26 || Type == R_MIPS_PC26_S2 ... ;

483 ↗

(On Diff #185709)

The same.

523 ↗

(On Diff #185709)

Is it ok to ignore these, or should it trigger an error instead maybe?

[grimar]

LGTM, but please wait for Rui's opinion too.

lld/ELF/Arch/Mips.cpp

523 ↗

(On Diff #185709)

Oh, please ignore this comment. So the error below will be triggered.

[atanasyan]

• Use if instead of switch

[atanasyan]

In D40147#1390202, @grimar wrote:

LGTM, but please wait for Rui's opinion too.

Thanks for review.

[atanasyan]

@ruiu : Do you have any comments?

[grimar]

LGTM. This patch is more or less isolated, so I think you can land it if there will be no objections/comments in a reasonable amount of time, let's say until EOW.

lld/trunk/ELF/Arch/Mips.cpp

if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
     return std::make_pair(Type2, Val);
   if (Type2 == R_MIPS_SUB && (Type3 == R_MIPS_HI16 || Type3 == R_MIPS_LO16))
     return std::make_pair(Type3, -Val);
   error(getErrorLocation(Loc) + "unsupported relocations combination " +
         Twine(Type));
   return std::make_pair(Type & 0xff, Val);
 }
 
+static bool isBranchReloc(RelType Type) {
+  return Type == R_MIPS_26 || Type == R_MIPS_PC26_S2 ||
+         Type == R_MIPS_PC21_S2 || Type == R_MIPS_PC16;
+}
+
+static bool isMicroBranchReloc(RelType Type) {
+  return Type == R_MICROMIPS_26_S1 || Type == R_MICROMIPS_PC16_S1 ||
+         Type == R_MICROMIPS_PC10_S1 || Type == R_MICROMIPS_PC7_S1;
+}
+
+template <class ELFT>
+static uint64_t fixupCrossModeJump(uint8_t *Loc, RelType Type, uint64_t Val) {
+  // Here we need to detect jump/branch from regular MIPS code
+  // to a microMIPS target and vice versa. In that cases jump
+  // instructions need to be replaced by their "cross-mode"
+  // equivalents.
+  const endianness E = ELFT::TargetEndianness;
+  bool IsMicroTgt = Val & 0x1;
+  bool IsCrossJump = (IsMicroTgt && isBranchReloc(Type)) ||
+                     (!IsMicroTgt && isMicroBranchReloc(Type));
+  if (!IsCrossJump)
+    return Val;
+
+  switch (Type) {
+  case R_MIPS_26: {
+    uint32_t Inst = read32<E>(Loc) >> 26;
+    if (Inst == 0x3 || Inst == 0x1d) { // JAL or JALX
+      writeValue<E>(Loc, 0x1d << 26, 32, 0);
+      return Val;
+    }
+    break;
+  }
+  case R_MICROMIPS_26_S1: {
+    uint32_t Inst = readShuffle<E>(Loc) >> 26;
+    if (Inst == 0x3d || Inst == 0x3c) { // JAL32 or JALX32
+      Val >>= 1;
+      writeShuffleValue<E>(Loc, 0x3c << 26, 32, 0);
+      return Val;
+    }
+    break;
+  }
+  case R_MIPS_PC26_S2:
+  case R_MIPS_PC21_S2:
+  case R_MIPS_PC16:
+  case R_MICROMIPS_PC16_S1:
+  case R_MICROMIPS_PC10_S1:
+  case R_MICROMIPS_PC7_S1:
+    // FIXME (simon): Support valid branch relocations.
+    break;
+  default:
+    llvm_unreachable("unexpected jump/branch relocation");
+  }
+
+  error(getErrorLocation(Loc) +
+        "unsupported jump/branch instruction between ISA modes referenced by " +
+        toString(Type) + " relocation");
+  return Val;
+}
+
 template <class ELFT>
 void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
   const endianness E = ELFT::TargetEndianness;
 
   if (ELFT::Is64Bits || Config->MipsN32Abi)
     std::tie(Type, Val) = calculateMipsRelChain(Loc, Type, Val);
 
+  // Detect cross-mode jump/branch and fix instruction.
+  Val = fixupCrossModeJump<ELFT>(Loc, Type, Val);
+
   // Thread pointer and DRP offsets from the start of TLS data area.
   // https://www.linux-mips.org/wiki/NPTL
   if (Type == R_MIPS_TLS_DTPREL_HI16 || Type == R_MIPS_TLS_DTPREL_LO16 ||
       Type == R_MIPS_TLS_DTPREL32 || Type == R_MIPS_TLS_DTPREL64 ||
       Type == R_MICROMIPS_TLS_DTPREL_HI16 ||
       Type == R_MICROMIPS_TLS_DTPREL_LO16) {
     Val -= 0x8000;
   } else if (Type == R_MIPS_TLS_TPREL_HI16 || Type == R_MIPS_TLS_TPREL_LO16 ||

lld/trunk/ELF/Symbols.cpp

case Symbol::DefinedKind: {
     // 3. The offset within the input section (this addition happens
     //    inside InputSection::getOffset).
     //
     // If you understand the data structures involved with this next
     // line (and how they get built), then you have a pretty good
     // understanding of the linker.
     uint64_t VA = IS->getVA(Offset);
 
+    // MIPS relocatable files can mix regular and microMIPS code.
+    // Linker needs to distinguish such code. To do so microMIPS
+    // symbols has the `STO_MIPS_MICROMIPS` flag in the `st_other`
+    // field. Unfortunately, the `MIPS::relocateOne()` method has
+    // a symbol value only. To pass type of the symbol (regular/microMIPS)
+    // to that routine as well as other places where we write
+    // a symbol value as-is (.dynamic section, `Elf_Ehdr::e_entry`
+    // field etc) do the same trick as compiler uses to mark microMIPS
+    // for CPU - set the less-significant bit.
+    if (Config->EMachine == EM_MIPS && isMicroMips() &&
+        ((Sym.StOther & STO_MIPS_MICROMIPS) || Sym.NeedsPltAddr))
+      VA |= 1;
+
     if (D.isTls() && !Config->Relocatable) {
       // Use the address of the TLS segment's first section rather than the
       // segment's address, because segment addresses aren't initialized until
       // after sections are finalized. (e.g. Measuring the size of .rela.dyn
       // for Android relocation packing requires knowing TLS symbol addresses
       // during section finalization.)
       if (!Out::TlsPhdr || !Out::TlsPhdr->FirstSec)
         fatal(toString(D.File) +

 
 uint64_t Symbol::getPPC64LongBranchOffset() const {
   assert(PPC64BranchltIndex != 0xffff);
   return PPC64BranchltIndex * Target->GotPltEntrySize;
 }
 
 uint64_t Symbol::getPltVA() const {
   PltSection *Plt = IsInIplt ? In.Iplt : In.Plt;
-  return Plt->getVA() + Plt->HeaderSize + PltIndex * Target->PltEntrySize;
+  uint64_t OutVA =
+      Plt->getVA() + Plt->HeaderSize + PltIndex * Target->PltEntrySize;
+  // While linking microMIPS code PLT code are always microMIPS
+  // code. Set the less-significant bit to track that fact.
+  // See detailed comment in the `getSymVA` function.
+  if (Config->EMachine == EM_MIPS && isMicroMips())
+    OutVA |= 1;
+  return OutVA;
 }
 
 uint64_t Symbol::getPPC64LongBranchTableVA() const {
   assert(PPC64BranchltIndex != 0xffff);
   return In.PPC64LongBranchTarget->getVA() +
          PPC64BranchltIndex * Target->GotPltEntrySize;
 }
 

lld/trunk/ELF/SyntheticSections.cpp

void MipsGotSection::writeTo(uint8_t *Buf) {
   // generated by GNU tools have this special GOT value, and because
   // we've been doing this for years, it is probably a safe bet to
   // keep doing this for now. We really need to revisit this to see
   // if we had to do this.
   writeUint(Buf + Config->Wordsize, (uint64_t)1 << (Config->Wordsize * 8 - 1));
   for (const FileGot &G : Gots) {
     auto Write = [&](size_t I, const Symbol *S, int64_t A) {
       uint64_t VA = A;
-      if (S) {
+      if (S)
         VA = S->getVA(A);
-        if (S->StOther & STO_MIPS_MICROMIPS)
-          VA |= 1;
-      }
       writeUint(Buf + I * Config->Wordsize, VA);
     };
     // Write 'page address' entries to the local part of the GOT.
     for (const std::pair<const OutputSection *, FileGot::PageBlock> &L :
          G.PagesMap) {
       size_t PageCount = L.second.Count;
       uint64_t FirstPageAddr = getMipsPageAddr(L.first->Addr);
       for (size_t PI = 0; PI < PageCount; ++PI)
template <class ELFT> void SymbolTableSection<ELFT>::writeTo(uint8_t *Buf) {
   if (Config->EMachine == EM_MIPS) {
     auto *ESym = reinterpret_cast<Elf_Sym *>(Buf);
 
     for (SymbolTableEntry &Ent : Symbols) {
       Symbol *Sym = Ent.Sym;
       if (Sym->isInPlt() && Sym->NeedsPltAddr)
         ESym->st_other |= STO_MIPS_PLT;
       if (isMicroMips()) {
-        // Set STO_MIPS_MICROMIPS flag and less-significant bit for
-        // a defined microMIPS symbol and symbol should point to its
-        // PLT entry (in case of microMIPS, PLT entries always contain
-        // microMIPS code).
+        // We already set the less-significant bit for symbols
+        // marked by the `STO_MIPS_MICROMIPS` flag and for microMIPS PLT
+        // records. That allows us to distinguish such symbols in
+        // the `MIPS<ELFT>::relocateOne()` routine. Now we should
+        // clear that bit for non-dynamic symbol table, so tools
+        // like `objdump` will be able to deal with a correct
+        // symbol position.
         if (Sym->isDefined() &&
             ((Sym->StOther & STO_MIPS_MICROMIPS) || Sym->NeedsPltAddr)) {
-          if (StrTabSec.isDynamic())
-            ESym->st_value |= 1;
+          if (!StrTabSec.isDynamic())
+            ESym->st_value &= ~1;
           ESym->st_other |= STO_MIPS_MICROMIPS;
         }
       }
       if (Config->Relocatable)
         if (auto *D = dyn_cast<Defined>(Sym))
           if (isMipsPIC<ELFT>(D))
             ESym->st_other |= STO_MIPS_PIC;
       ++ESym;

lld/trunk/test/ELF/mips-micro-bad-cross-calls.s

+# REQUIRES: mips
+# Check error message for invalid cross-mode branch instructions.
+
+# RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux \
+# RUN:         %S/Inputs/mips-dynamic.s -o %t2.o
+# RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux %s -o %t1.o
+# RUN: not ld.lld -o %t.exe %t1.o %t2.o 2>&1 | FileCheck %s
+
+# CHECK: (.text+0x0): unsupported jump/branch instruction between ISA modes referenced by R_MICROMIPS_PC10_S1 relocation
+
+  .text
+  .set micromips
+  .global __start
+__start:
+  b16 foo0

lld/trunk/test/ELF/mips-micro-cross-calls.s

+# REQUIRES: mips
+# Check various cases of microMIPS - regular code cross-calls.
+
+# RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux \
+# RUN:         -mattr=micromips %s -o %t-eb.o
+# RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux \
+# RUN:         -position-independent -mattr=micromips \
+# RUN:         %S/Inputs/mips-micro.s -o %t-eb-pic.o
+# RUN: ld.lld -o %t-eb.exe %t-eb.o %t-eb-pic.o
+# RUN: llvm-objdump -d -mattr=-micromips %t-eb.exe \
+# RUN:   | FileCheck --check-prefix=REG %s
+# RUN: llvm-objdump -d -mattr=+micromips %t-eb.exe \
+# RUN:   | FileCheck --check-prefix=MICRO %s
+
+# REG:        __start:
+# REG-NEXT:      20000:       74 00 80 04     jalx 131088 <micro>
+# REG-NEXT:      20004:       00 00 00 00     nop
+# REG-NEXT:      20008:       74 00 80 08     jalx 131104 <__microLA25Thunk_foo>
+
+# REG:        __LA25Thunk_bar:
+# REG-NEXT:      20030:       3c 19 00 02     lui     $25, 2
+# REG-NEXT:      20034:       08 00 80 11     j       131140 <bar>
+
+# MICRO:      micro:
+# MICRO-NEXT:    20010:       f0 00 80 00     jalx 65536
+# MICRO-NEXT:    20014:       00 00 00 00     nop
+# MICRO-NEXT:    20018:       f0 00 80 0c     jalx 65560
+
+# MICRO:      __microLA25Thunk_foo:
+# MICRO-NEXT:    20020:       41 b9 00 02     lui     $25, 2
+# MICRO-NEXT:    20024:       d4 01 00 20     j       131136
+
+  .text
+  .set nomicromips
+  .global __start
+__start:
+  jal micro
+  jal foo
+
+  .set micromips
+  .global micro
+micro:
+  jal __start
+  jal bar

lld/trunk/test/ELF/mips-micro-plt.s

 # CHECK-NEXT:       Section: Undefined
 # CHECK-NEXT:       Name: foo0
 # CHECK-NEXT:     }
 # CHECK-NEXT:   ]
 # CHECK-NEXT: }
 
 # ASM:      __start:
 # ASM-NEXT:    20000:       fd 1c 80 18     lw      $8, -32744($gp)
-# ASM-NEXT:    20004:       11 08 00 10     addi    $8, $8, 16
+# ASM-NEXT:    20004:       11 08 00 11     addi    $8, $8, 17
 # ASM-NEXT:    20008:       41 a8 00 02     lui     $8, 2
-# ASM-NEXT:    2000c:       11 08 00 40     addi    $8, $8, 64
+# ASM-NEXT:    2000c:       11 08 00 41     addi    $8, $8, 65
 #
 # ASM:      foo:
 # ASM-NEXT:    20010:       f4 01 00 20     jal     131136
 
   .text
   .set micromips
   .global foo
   .hidden foo
   .global __start
 __start:
   lw    $t0,%got(foo)($gp)
   addi  $t0,$t0,%lo(foo)
   lui   $t0,%hi(foo0)
   addi  $t0,$t0,%lo(foo0)
 foo:
   jal   foo0

lld/trunk/test/ELF/mips-micro-relocs.s

 # REQUIRES: mips
 # Check handling of microMIPS relocations.
 
 # RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux \
 # RUN:         -mattr=micromips %S/Inputs/mips-micro.s -o %t1eb.o
 # RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux \
 # RUN:         -mattr=micromips %s -o %t2eb.o
 # RUN: ld.lld -o %teb.exe %t1eb.o %t2eb.o
-# RUN: llvm-objdump -d -t -mattr=micromips %teb.exe \
+# RUN: llvm-objdump -d -t -s -mattr=micromips %teb.exe \
 # RUN:   | FileCheck --check-prefixes=EB,SYM %s
+# RUN: llvm-readobj -h %teb.exe | FileCheck --check-prefix=ELF %s
 
 # RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-linux \
 # RUN:         -mattr=micromips %S/Inputs/mips-micro.s -o %t1el.o
 # RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-linux \
 # RUN:         -mattr=micromips %s -o %t2el.o
 # RUN: ld.lld -o %tel.exe %t1el.o %t2el.o
-# RUN: llvm-objdump -d -t -mattr=micromips %tel.exe \
+# RUN: llvm-objdump -d -t -s -mattr=micromips %tel.exe \
 # RUN:   | FileCheck --check-prefixes=EL,SYM %s
+# RUN: llvm-readobj -h %tel.exe | FileCheck --check-prefix=ELF %s
 
 # EB:      __start:
 # EB-NEXT:      20010:       41 a3 00 01     lui     $3, 1
-# EB-NEXT:      20014:       30 63 7f df     addiu   $3, $3, 32735
+# EB-NEXT:      20014:       30 63 7f ef     addiu   $3, $3, 32751
 # EB-NEXT:      20018:       fc 7c 80 18     lw      $3, -32744($gp)
 # EB-NEXT:      2001c:       fc 63 80 18     lw      $3, -32744($3)
 # EB-NEXT:      20020:       8f 70           beqz16  $6, -32
 # EB-NEXT:      20022:       00 7e 00 00     sll     $3, $fp, 0
 # EB-NEXT:      20026:       cf ec           b16     -40
 # EB-NEXT:      20028:       00 00 00 00     nop
 # EB-NEXT:      2002c:       94 00 ff e8     b       -44
 
+# EB:      Contents of section .data:
+# EB-NEXT:  30000 fffe8011
+
+# EB:      Contents of section .debug_info
+# EB-NEXT:  0000 00020011
+
 # EL:      __start:
 # EL-NEXT:      20010:       a3 41 01 00     lui     $3, 1
-# EL-NEXT:      20014:       63 30 df 7f     addiu   $3, $3, 32735
+# EL-NEXT:      20014:       63 30 ef 7f     addiu   $3, $3, 32751
 # EL-NEXT:      20018:       7c fc 18 80     lw      $3, -32744($gp)
 # EL-NEXT:      2001c:       63 fc 18 80     lw      $3, -32744($3)
 # EL-NEXT:      20020:       70 8f           beqz16  $6, -32
 # EL-NEXT:      20022:       7e 00 00 00     sll     $3, $fp, 0
 # EL-NEXT:      20026:       ec cf           b16     -40
 # EL-NEXT:      20028:       00 00 00 00     nop
 # EL-NEXT:      2002c:       00 94 e8 ff     b       -44
 
-# SYM: 00037ff0         .got            00000000 .hidden _gp
+# EL:      Contents of section .data:
+# EL-NEXT:  30000 1180feff
+
+# EL:      Contents of section .debug_info
+# EL-NEXT:  0000 11000200
+
+# SYM: 00038000         .got            00000000 .hidden _gp
 # SYM: 00020000 g F     .text           00000000 foo
 # SYM: 00020010         .text           00000000 __start
 
+# ELF: ElfHeader {
+# ELF:   Entry: 0x20011
+
   .text
   .set micromips
   .global __start
 __start:
   lui     $3, %hi(_gp_disp)       # R_MICROMIPS_HI16
   addiu   $3, $3, %lo(_gp_disp)   # R_MICROMIPS_LO16
 
   lw      $3, %call16(foo)($gp)   # R_MICROMIPS_CALL16
   lw      $3, %got(foo)($3)       # R_MICROMIPS_GOT16
 
   beqz16  $6, foo                 # R_MICROMIPS_PC7_S1
   b16     foo                     # R_MICROMIPS_PC10_S1
   b       foo                     # R_MICROMIPS_PC16_S1
+
+  .data
+  .gpword __start                 # R_MIPS_GPREL32
+
+  .section .debug_info
+  .word __start                   # R_MIPS_32