[flang] Add two more PowerPC vector intrinsics

[DanielCChen]

Summary

This patch adds 2 more PowerPC vector intrinsics

vec_cvspbf16
vec_cvbf16spn

These two are for Power10 only. The checking code along with other similar vector or mma intrinsics will be in a separate patch.

[DanielCChen]

Add the test cases.

[tschuett]

Can you prioritise the checking code? The in-tree flang intrinsics may crash on my fictitious PowerPC Apple and your Power 9.

[DanielCChen]

In D156243#4532250, @tschuett wrote:

Can you prioritise the checking code? The in-tree flang intrinsics may crash on my fictitious PowerPC Apple and your Power 9.

I see. Since this patch seems small enough, I will include the checking code with this patch.

[DanielCChen]

Add semantic checking for specific supported cpu. In this case, power10.

[kkwli0]

flang/include/flang/Evaluate/target.h

44 ↗

(On Diff #544070)

Why are they moved from the original location?

flang/lib/Semantics/check-call.cpp

1429 ↗

(On Diff #544070)

This has dependency on https://reviews.llvm.org/D155725. I suggest to add this check in there and also add a test for the MMA intrinsics.

flang/module/__ppc_intrinsics.f90

34

missing elemental

473

Nit: please order it alphebatically

[DanielCChen]

To address review comments.

flang/include/flang/Evaluate/target.h

44 ↗

(On Diff #544070)

It occurs to me that the order of setters and getters are based on the order of the declaration of the member. e.g. isPPC_ is after isBigEndian_. I am not sure if this is something we "need" to maintain though

[DanielCChen]

flang/lib/Semantics/check-call.cpp

1429 ↗

(On Diff #544070)

Right. I will remove the mma check from this patch and will add it back in with the mma patch.

[DanielCChen]

Remove check for mma intrinsics from this patch. It will be added back in with the MMA intrinsic patch.

[DanielCChen]

Fix the build failure due to chang-format checking.

[DanielCChen]

flang/lib/Semantics/check-call.cpp

1427 ↗

(On Diff #544769)

@tschuett
We had an internal discussion on how to check a specific intrinsic against its supported CPUs. We plan to migrate the current target feature checking code for PowerPC from clang to llvm so that it can be referenced by both clang and flang. This is not a small feature so it will take a while to implement.
As for this CPU checking function in this patch, I think we have 2 options.

1. we keep it as is until we implement the proper target feature checking in llvm, then we update the code here.
2. we remove all CPU checking related code from this patch and re-implement it the proper way.

What would be your suggestion?

[tschuett]

No worries. Pick your preference.

[DanielCChen]

In D156243#4554766, @tschuett wrote:

No worries. Pick your preference.

Thanks! I will remove the code for now then as it is a cleaner approach.

[DanielCChen]

To remove the pwr10 check as we plan to do it as target feature checking as in clang.

[DanielCChen]

Fix the test header to to only dump llvm IR.

[kkwli0]

LG

[DanielCChen]

In D156243#4557253, @kkwli0 wrote:

LG

Thanks. I will wait for one more day to see if there are any further comments.

flang/include/flang/Semantics/expression.h

struct CalleeAndArguments {
     std::variant<ProcedureDesignator, SymbolRef> u;
     ActualArguments arguments;
   };
 
   std::optional<CalleeAndArguments> AnalyzeProcedureComponentRef(
       const parser::ProcComponentRef &, ActualArguments &&, bool isSubroutine);
   std::optional<characteristics::Procedure> CheckCall(
       parser::CharBlock, const ProcedureDesignator &, ActualArguments &);
-  bool CheckPPCIntrinsic(const ProcedureDesignator &, ActualArguments &);
   using AdjustActuals =
       std::optional<std::function<bool(const Symbol &, ActualArguments &)>>;
   bool ResolveForward(const Symbol &);
   std::pair<const Symbol *, bool /* failure due ambiguity */> ResolveGeneric(
       const Symbol &, const ActualArguments &, const AdjustActuals &,
       bool isSubroutine, bool mightBeStructureConstructor = false);
   void EmitGenericResolutionError(
       const Symbol &, bool dueToNullActuals, bool isSubroutine);

flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp

static constexpr MathOperation ppcMathOperations[] = {
     {"__ppc_fre", "llvm.ppc.fre", genFuncType<Ty::Real<8>, Ty::Real<8>>,
      genLibCall},
     {"__ppc_fres", "llvm.ppc.fres", genFuncType<Ty::Real<4>, Ty::Real<4>>,
      genLibCall},
     {"__ppc_frsqrte", "llvm.ppc.frsqrte", genFuncType<Ty::Real<8>, Ty::Real<8>>,
      genLibCall},
     {"__ppc_frsqrtes", "llvm.ppc.frsqrtes",
      genFuncType<Ty::Real<4>, Ty::Real<4>>, genLibCall},
+    {"__ppc_vec_cvbf16spn", "llvm.ppc.vsx.xvcvbf16spn",
+     genFuncType<Ty::UnsignedVector<1>, Ty::UnsignedVector<1>>, genLibCall},
+    {"__ppc_vec_cvspbf16_", "llvm.ppc.vsx.xvcvspbf16",
+     genFuncType<Ty::UnsignedVector<1>, Ty::UnsignedVector<1>>, genLibCall},
     {"__ppc_vec_madd", "llvm.fma.v4f32",
      genFuncType<Ty::RealVector<4>, Ty::RealVector<4>, Ty::RealVector<4>,
                  Ty::RealVector<4>>,
      genLibCall},
     {"__ppc_vec_madd", "llvm.fma.v2f64",
      genFuncType<Ty::RealVector<8>, Ty::RealVector<8>, Ty::RealVector<8>,
                  Ty::RealVector<8>>,
      genLibCall},

flang/module/__ppc_intrinsics.f90

 !--------------------
 !! ================ 1 argument function interface ================
 ! vector(i) function f(vector(i))
 #define ELEM_FUNC_VIVI(VKIND) \
   elemental vector(integer(VKIND)) function elem_func_vi##VKIND##vi##VKIND(arg1); \
     vector(integer(VKIND)), intent(in) :: arg1; \
   end function ;
 
+! vector(u) function f(vector(u))
+#define ELEM_FUNC_VUVU(VKIND) \
+  elemental vector(unsigned(VKIND)) function elem_func_vu##VKIND##vu##VKIND(arg1); \
+    vector(unsigned(VKIND)), intent(in) :: arg1; \
+  end function ;
+
 ! vector(r) function f(vector(r))
 #define ELEM_FUNC_VRVR_2(VKIND1, VKIND2) \
   elemental vector(real(VKIND1)) function elem_func_vr##VKIND1##vr##VKIND2(arg1); \
     vector(real(VKIND2)), intent(in) :: arg1; \
   end function ;
 #define ELEM_FUNC_VRVR(VKIND) ELEM_FUNC_VRVR_2(VKIND, VKIND)
 
   ELEM_FUNC_VIVI(1) ELEM_FUNC_VIVI(2) ELEM_FUNC_VIVI(4) ELEM_FUNC_VIVI(8)
+  ELEM_FUNC_VUVU(1)
   ELEM_FUNC_VRVR_2(4,8) ELEM_FUNC_VRVR_2(8,4)
   ELEM_FUNC_VRVR(4) ELEM_FUNC_VRVR(8)
 
 #undef ELEM_FUNC_VRVR
 #undef ELEM_FUNC_VRVR_2
+#undef ELEM_FUNC_VUVU
 #undef ELEM_FUNC_VIVI
 
 !! ================ 2 arguments function interface ================
 ! vector(i) function f(vector(i), vector(i))
 #define ELEM_FUNC_VIVIVI(VKIND) \
   elemental vector(integer(VKIND)) function elem_func_vi##VKIND##vi##VKIND##vi##VKIND(arg1, arg2); \
     vector(integer(VKIND)), intent(in) :: arg1, arg2; \
   end function ;
interface mtfsfi
     end subroutine __ppc_mtfsfi
   end interface mtfsfi
   public :: mtfsfi
 
 !-------------------------
 ! vector function(vector)
 !-------------------------
 #define VI_VI(NAME, VKIND) __ppc_##NAME##_vi##VKIND##vi##VKIND
+#define VU_VU(NAME, VKIND) __ppc_##NAME##_vu##VKIND##vu##VKIND
 #define VR_VR_2(NAME, VKIND1, VKIND2) __ppc_##NAME##_vr##VKIND1##vr##VKIND2
 #define VR_VR(NAME, VKIND) VR_VR_2(NAME, VKIND, VKIND)
 
 #define VEC_VI_VI(NAME, VKIND) \
   procedure(elem_func_vi##VKIND##vi##VKIND) :: VI_VI(NAME, VKIND);
+#define VEC_VU_VU(NAME, VKIND) \
+  procedure(elem_func_vu##VKIND##vu##VKIND) :: VU_VU(NAME, VKIND);
 #define VEC_VR_VR_2(NAME, VKIND1, VKIND2) \
   procedure(elem_func_vr##VKIND1##vr##VKIND2) :: VR_VR_2(NAME, VKIND1, VKIND2);
 #define VEC_VR_VR(NAME, VKIND) VEC_VR_VR_2(NAME, VKIND, VKIND)
 
 ! vec_abs
   VEC_VI_VI(vec_abs,1) VEC_VI_VI(vec_abs,2) VEC_VI_VI(vec_abs,4) VEC_VI_VI(vec_abs,8)
   VEC_VR_VR(vec_abs,4) VEC_VR_VR(vec_abs,8)
   interface vec_abs
     procedure :: VI_VI(vec_abs,1), VI_VI(vec_abs,2), VI_VI(vec_abs,4), VI_VI(vec_abs,8)
     procedure :: VR_VR(vec_abs,4), VR_VR(vec_abs,8)
   end interface vec_abs
   public :: vec_abs
 
 ! vec_cvf
   VEC_VR_VR_2(vec_cvf,4,8) VEC_VR_VR_2(vec_cvf,8,4)
   interface vec_cvf
     procedure :: VR_VR_2(vec_cvf,4,8), VR_VR_2(vec_cvf,8,4)
   end interface vec_cvf
   public :: vec_cvf
 
+! vec_cvbf16spn
+  VEC_VU_VU(vec_cvbf16spn,1)
+  interface vec_cvbf16spn
+    procedure :: VU_VU(vec_cvbf16spn,1)
+  end interface
+  public vec_cvbf16spn
+
+! vec_cvspbf16
+  VEC_VU_VU(vec_cvspbf16_,1)
+  interface vec_cvspbf16
+    procedure :: VU_VU(vec_cvspbf16_,1)
+  end interface
+  public vec_cvspbf16
+
 #undef VEC_VR_VR
 #undef VEC_VR_VR_2
+#undef VEC_VU_VU
 #undef VEC_VI_VI
 #undef VR_VR
 #undef VR_VR_2
+#undef VU_VU
 #undef VI_VI
   
 !---------------------------------
 ! vector function(vector, vector)
 !---------------------------------
 #define VI_VI_VI(NAME, VKIND) __ppc_##NAME##_vi##VKIND##vi##VKIND##vi##VKIND
 #define VU_VI_VI(NAME, VKIND) __ppc_##NAME##_vu##VKIND##vi##VKIND##vi##VKIND
 #define VU_VU_VU_2(NAME, VKIND1, VKIND2) __ppc_##NAME##_vu##VKIND1##vu##VKIND1##vu##VKIND2

flang/test/Lower/PowerPC/ppc-pwr10-vec-intrinsics.f90

+! RUN: %flang_fc1 -triple powerpc64le-unknown-unknown -target-cpu pwr10 -emit-llvm %s -o - | FileCheck --check-prefixes="CHECK" %s
+! REQUIRES: target=powerpc{{.*}}
+      subroutine test_cvspbf16()
+      implicit none
+      vector(unsigned(1)) :: v1, v2
+      v1 = vec_cvspbf16(v2)
+      end subroutine test_cvspbf16
+
+!CHECK-LABEL: @test_cvspbf16_
+!CHECK:  %1 = alloca <16 x i8>, i64 1, align 16
+!CHECK:  %2 = alloca <16 x i8>, i64 1, align 16
+!CHECK:  %3 = load <16 x i8>, ptr %2, align 16
+!CHECK:  %4 = call <16 x i8> @llvm.ppc.vsx.xvcvspbf16(<16 x i8> %3)
+!CHECK:  store <16 x i8> %4, ptr %1, align 16
+
+      subroutine test_cvbf16spn()
+      implicit none
+      vector(unsigned(1)) :: v1, v2
+      v1 = vec_cvbf16spn(v2)
+      end subroutine test_cvbf16spn
+
+!CHECK-LABEL: @test_cvbf16spn_
+!CHECK:  %1 = alloca <16 x i8>, i64 1, align 16
+!CHECK:  %2 = alloca <16 x i8>, i64 1, align 16
+!CHECK:  %3 = load <16 x i8>, ptr %2, align 16
+!CHECK:  %4 = call <16 x i8> @llvm.ppc.vsx.xvcvbf16spn(<16 x i8> %3)
+!CHECK:  store <16 x i8> %4, ptr %1, align 16